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212 Commits

Author SHA1 Message Date
angie
c42b486f6e yet another fix 2024-12-16 10:23:20 -03:00
angie
79897f8304 version bump 2024-12-16 09:45:56 -03:00
angie
b86964fc4a Fix python releases CI again 2024-12-16 09:17:19 -03:00
angie
d4e5cf1b6d version bump 2024-12-16 08:38:28 -03:00
Angie
441b235a63 More fixes 2024-10-13 19:27:19 -03:00
angie
02302f29b6 Fix some instructions missing their corresponding AccessType 2024-10-13 11:54:05 -03:00
angie
0188913d1b version bump 2024-07-21 19:26:37 -04:00
angie
1c22fdcc43 New RegistersTracker.getJrRegData method to simplify getting jr information and RegistersTracker.processBranch to track register usage on branches 2024-07-19 13:58:06 -04:00
angie
f28fba1cc5 version bump 2024-07-16 21:15:37 -04:00
Angie
fc2e1098ec Fix vilwr and viswr 2024-07-15 20:28:41 -04:00
Angie
ef2598d2c7 Fix pmfhl and pmthl missing the .fmt specifier 2024-07-15 16:05:53 -04:00
Angie
2c5e2cfc26 Implement rfe 2024-07-13 17:30:13 -04:00
angie
ee77a95d5d version bump 2024-07-12 11:45:48 -04:00
angie
ea58c73ecf Fix registers not being cleared after tail call 2024-07-12 09:57:33 -04:00
angie
b284f11232 version bump 2024-05-22 12:49:08 -04:00
angie
d3669aac76 Fix test 2024-05-20 09:44:22 -04:00
angie
9f3107d812 misc_expandJalr 2024-04-23 11:09:58 -04:00
Anghelo Carvajal
b51b62da45
ALLEGREX support (#60) 
* setup ALLEGREX

* more setup

* clo

* fix

* Implement SPECIAL_RS and SPECIAL_SA instructions

* more table placeholders

* Implement bshfl instructions

* Rename to R4000Allegrex

* Implement SPECIAL instructions

* Add tests

* Remove some duplicated tests

* Implement SPECIAL3 instructions

* fix bug in test

* update

* Implement COPz

* Implement SPECIAL2 instructions

* Implement COP1

* Yeet cop3

* som tests

* bvf, bvfl, bvt, bvtl

* fix bshfl prefix

* need to implement the vfpu registers

* implement vt_7?

* R4000AllegrexVF -> R4000AllegrexVScalar

* Add test suite to compare with the sn toolchain decoding

* more vfpu test cases

* forgor this

* I can't decide how to name these registers

* Prepare tables for all register types

* Fix typo

* Implement vector scalar register operands

* Implement quad registers

* Fix tests?

* svl.q, svr.q

* Implement a bunch of vfpu0 instructions

* implement registers for `.t` and `.p` instructions

* Implement VFPU1 instructions

* bleh

* VFPU1, VFPU3 and `vcmp.`

* Fix wrong register type on some instructions

* start vfpu3

* Implement VFPU3 instructions

* start categorizing VFPU4

* Categorize VFPU5

* VFPU6 identification

* Identify VFPU7

* COP2 is weird

* organize COP2 a bit

* Add test cases for VFPU4 FMT

* VFPU4 FMT2 stuff

* VFPU4 FMT3 stuff

* VFPU5 stuff

* VFPU6 stuff

* VFPU7 stuff

* Implement COP2 instructions

* Implement vmov, vabs and vneg

* VPFU4 FMT0 FMT0 FMT0 implemented

* VFPU FMT0 FMT0 FMT2

* vnrcp, vnsin, vrexp2

* vrnds, vrndi, vrndf1, vrndf2

* Change tests a bit

* vf2h, vh2f, vsbz, vlgb

* vuc2ifs, vc2i, vus2i, vs2i, vi2uc, vi2c, vi2us, vi2s

* vsrt1, vsrt2, vbfy1, vbfy2, vocp, vsocp, vfad, vavg

* vsrt3, vsrt4, vsgn

* vmfvc and vmtvc placeholders

* vt4444, vt5551, vt5650

* vcst placeholder

* vf2in

* vf2iz

* vf2iu, vf2id, vi2f

* vcmovt, vcmovf

* vwbn.s, viim.s, vfim.s

* vpfxs, vpfxt, vpfxd, vnop, vsync, vflush

* vmmov, vmidt, vmzero, vmone

* vrot

* vmmul, vhtfm2, vtfm2, vhtfm3, vtfm3, vhtfm4, vtfm4, vmscl, vcrsp, vqmul

* Implement matrix operands

* fix matrix operands

* Fix `illegal` tests

* hack out a way to check the test cases are assemblable

* test-fixing: branches

* fix more test cases

* fix vmfvc and vmtvc

* more test fixing

* vdiv and fix operand R323

* more test fixing

* Fix matrix operands

* implement vcmp comparisons

* fix vsync2

* vsqrt and vrndf1 fixes

* Implement "constant" operand for `vcst`

* Add missing operand of vf2in, vf2iz, vf2iu, vf2id, vi2f

* Add missing vcmovt and vcmovf operands

* Add missing vwbn operand

* Tests cases for vmmul

* Fix vtfm2

* Implement "transpose matrix register"

* Add placeholders for the remaining missing operands

* Implement viim operand

* Implement vrot code operand

* placeholders for rp and wp operands

* test cases for vpfxs, vpfxt and vpfxd

* Properly implement rpx, rpy, rpz and rpw

* Properly implement wpx, wpy, wpz and wpw operands

* Implement vfim

* changelog

* readme

* some cleanup

* Restructure some tables

* more table restructure

* fix tests

* more table yeeting

* more cleanup

* more cleanup

* reanming

* moar

* fmt
 2024-04-22 13:15:58 -04:00
Angie
2dcd926e39 version bump 2024-04-09 20:52:39 -04:00
angie
b2d6385e2d clang tidy 2024-04-03 12:45:21 -03:00
angie
f5d811f18e Avoid heap-allocating memory for calculating required buffer size on RabbitizerOperandType_getBufferSize 2024-04-03 12:41:26 -03:00
angie
5f4ff4d2e5 Consider r5900's paddub as a possible move instruction 2024-03-25 20:54:06 -03:00
angie
a701f616bf cleanups 2024-03-18 10:16:51 -03:00
angie
acf15a3852 Always use named registers for R5900's VU instructions 2024-03-18 10:12:34 -03:00
angie
ebf82b91d9 version bump 2024-03-17 11:18:13 -03:00
angie
757bb8d380 Fix rsp pref too 2024-03-11 09:30:45 -03:00
angie
904a226fc5 Fix test 2024-03-11 09:20:46 -03:00
angie
13d5c1b069 Fix c.seq.d 2024-03-11 09:17:29 -03:00
Angie
c4360efe43 Fix pref 2024-03-10 16:56:29 -03:00
angie
d717d29f0f version bump 2024-03-10 11:06:53 -03:00
angie
2189f99e11 Update cibuildwheel on GHA 2024-02-18 16:50:30 -03:00
angie
59042b2777 version bump 2024-02-18 13:13:05 -03:00
angie
f3c9c60947 Mark neg as notEmittedByCompilers 2024-02-18 11:44:20 -03:00
angie
a6ecfecb99 Implement neg pseudo 2024-02-18 11:34:07 -03:00
angie
8bb835b8c6 Instruction.getProcessedImmediate now raises an exception if the instruction does not contain an immediate field. 2024-02-11 10:54:56 -03:00
angie
8b17b28683 version bump 2024-01-28 13:52:35 -03:00
angie
e8c9217a82 version bump 2024-01-28 12:24:33 -03:00
angie
728815fba3 Update copyright years 2024-01-28 12:16:11 -03:00
angie
3b42e1ca00 version bump 2023-12-25 15:07:58 -03:00
descawed
b92e43ef51
getBranchVramGeneric should return an unsigned value (#49) 
* getBranchVramGeneric should return an unsigned value

* Add test

* Revert "Add test"

This reverts commit 55e7bc12bf.
 2023-12-25 14:58:47 -03:00
angie
80aa0b6c20 Change flag_disasmAsData to flag_r5900DisasmAsData and redo the logic completely 2023-11-12 10:33:23 -03:00
angie
111ee90a3a flag_r5900UseDollar 2023-11-11 13:55:06 -03:00
angie
049b47b32c flag_disasmAsData 2023-11-11 13:19:56 -03:00
angie
df1a1233bd Add bindings for __version_info__, __version__ and __author__ 2023-09-22 19:23:34 -03:00
angie
802f953b59 Add markdown linter to CI 2023-09-22 15:54:19 -03:00
angie
a0fd33c8c9 version bump 2023-09-18 10:07:51 -03:00
Ethan Roseman
e73c76b87b
Don't attempt disassembling vclipw / vsqrt in gnu mode (#44) 
* Don't attempt disassembling vclipw in gnu mode

* also vsqrt

* regen tables

* comments

* format

---------

Co-authored-by: angie <angheloalf95@gmail.com>
 2023-09-16 16:28:48 -03:00
angie
2625534240 Remove deprecation on treatJAsUnconditionalBranch 2023-09-13 11:06:32 -03:00
Ethan Roseman
0f4691b409
Add $ to special PS2 regs (#41) 
* Add $ to special PS2 regs

* Hide it behind gnuMode option

* remove suffix from vclipw

it has a suffixless version and one with .xyz, but it doesn't have one with .xy or .z like Rabbitizer currently emits

* Regenerating tables

---------

Co-authored-by: angie <angheloalf95@gmail.com>
 2023-09-13 10:58:25 -03:00
angie
9a98ff93ee Properly implement r5900's vcallms operand 
Closes #42
 2023-09-13 10:45:11 -03:00