misc_expandJalr

CHANGELOG.md

@@ -7,6 +7,13 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+### Added
+
+- New global configuration:
+  - `misc_expandJalr`: If `True` then `jalr` instructions will be always emitted
+    with two operands. Otherwise the `rd` register will be omitted if it is
+    `$ra` and will be used explicitly if it isn't `$ra`. Defaults to `False`.
+
 ## [1.10.0] - 2024-04-22
 
 ### Added
@@ -566,8 +573,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [1.0.0] - 2022-07-07
 
-### Uncategorized
-
 ### Added
 
 - New classes:

Cargo.toml

@@ -4,7 +4,7 @@
 [package]
 name = "rabbitizer"
 # Version should be synced with include/common/RabbitizerVersion.h
-version = "1.10.0"
+version = "1.10.1"
 edition = "2021"
 authors = ["Anghelo Carvajal <angheloalf95@gmail.com>"]
 description = "MIPS instruction decoder"

README.md

@@ -17,12 +17,13 @@ MIPS instruction decoder API.
   doesn't allocate in anything in the heap by itself.
 - Other language bindings supported in this repo:
   - Python bindings
-    - The minimal Python version is 3.7, older versions are not guaranteed to work.
+    - The minimal Python version is 3.7, older versions are not guaranteed to
+      work.
   - C++ bindings
   - Rust bindings
 - Simple per-word instruction decoding.
   - The library doesn't try to be too smart by processing multiple instructions
-  at a time.
+    at a time.
 - Can perform validation checks for instructions.
 - Provides many examination/grouping functions for instructions, allowing to
   simplify checking characteristics of an instruction and minimizing the need to
@@ -30,6 +31,9 @@ MIPS instruction decoder API.
 - Includes some minor tools to build your own pointer/symbol detection.
 - Configurable, many features can be turned on and off.
 - MIPS instructions features:
+  - Configurable behavior for the `jalr` instruction, allowing to disassemble
+    that instruction using an implicit or explicit `rd` register depending if
+    that register is `$ra` or not.
   - Named registers for MIPS VR4300's coprocessors.
   - Support for many pseudo-instructions.
   - Properly handle move to/from coprocessor instructions.
@@ -65,7 +69,7 @@ If you use a `requirements.txt` file in your repository, then you can add this
 library with the following line:
 
 ```txt
-rabbitizer>=1.10.0,<2.0.0
+rabbitizer>=1.10.1,<2.0.0
 ```
 
 ### Development version

include/common/RabbitizerConfig.h

@@ -63,6 +63,7 @@ typedef struct RabbitizerConfig_Misc {
     bool unknownInstrComment; // Generate a pseudo-disassembly comment when disassembling non implemented instructions
     bool omit0XOnSmallImm;
     bool upperCaseImm;
+    bool expandJalr;
 } RabbitizerConfig_Misc;
 
 typedef struct RabbitizerConfig {

pyproject.toml

@@ -4,7 +4,7 @@
 [project]
 name = "rabbitizer"
 # Version should be synced with include/common/RabbitizerVersion.h
-version = "1.10.0"
+version = "1.10.1"
 description = "MIPS instruction decoder"
 # license = "MIT"
 readme = "README.md"

rabbitizer/Config.pyi

@@ -35,5 +35,6 @@ class _RabbitizerConfig:
     misc_unknownInstrComment: bool = True
     misc_omit0XOnSmallImm: bool = False
     misc_upperCaseImm: bool = True
+    misc_expandJalr: bool = False
 
 config: _RabbitizerConfig

rabbitizer/rabbitizer_global_config.c

@@ -126,6 +126,7 @@ DEF_MEMBER_GET_SET_INT(misc, opcodeLJust, false, 0, 0)
 DEF_MEMBER_GET_SET_BOOL(misc, unknownInstrComment)
 DEF_MEMBER_GET_SET_BOOL(misc, omit0XOnSmallImm)
 DEF_MEMBER_GET_SET_BOOL(misc, upperCaseImm)
+DEF_MEMBER_GET_SET_BOOL(misc, expandJalr)
 
 
 static PyGetSetDef rabbitizer_global_config_GetSets[] = {
@@ -155,6 +156,7 @@ static PyGetSetDef rabbitizer_global_config_GetSets[] = {
     MEMBER_GET_SET(misc, unknownInstrComment, "", NULL),
     MEMBER_GET_SET(misc, omit0XOnSmallImm, "", NULL),
     MEMBER_GET_SET(misc, upperCaseImm, "", NULL),
+    MEMBER_GET_SET(misc, expandJalr, "", NULL),
 
     { 0 },
 };

src/common/RabbitizerConfig.c

@@ -49,5 +49,6 @@ RabbitizerConfig RabbitizerConfig_Cfg = {
         .unknownInstrComment = true,
         .omit0XOnSmallImm = false,
         .upperCaseImm = true,
+        .expandJalr = false,
     }
 };

src/instructions/RabbitizerInstructionCpu/RabbitizerInstructionCpu_OperandType.c

@@ -291,7 +291,7 @@ size_t RabbitizerOperandType_process_cpu_maybe_rd_rs(const RabbitizerInstruction
     uint8_t rd = RAB_INSTR_GET_rd(self);
     const RabbitizerRegisterDescriptor *regDescriptor = RabbitizerRegister_getDescriptor_Gpr(rd);
 
-    if (!RabbitizerRegisterDescriptor_isRa(regDescriptor)) {
+    if (!RabbitizerRegisterDescriptor_isRa(regDescriptor) || RabbitizerConfig_Cfg.misc.expandJalr) {
         RABUTILS_BUFFER_ADVANCE(dst, totalSize,
                                 RabbitizerOperandType_process_cpu_rd(self, dst, immOverride, immOverrideLength));