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https://github.com/hathach/tinyusb.git
synced 2025-02-15 03:40:19 +00:00
minor update
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e9109f36ba
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@ -29,6 +29,9 @@
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#if CFG_TUD_ENABLED && defined(TUP_USBIP_MUSB)
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#if CFG_TUD_ENABLED && defined(TUP_USBIP_MUSB)
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#define MUSB_DEBUG 2
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#define MUSB_REGS(rhport) ((musb_regs_t*) MUSB_BASES[rhport])
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#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
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#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
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/* GCC warns that an address may be unaligned, even though
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/* GCC warns that an address may be unaligned, even though
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* the target CPU has the capability for unaligned memory access. */
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* the target CPU has the capability for unaligned memory access. */
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@ -49,10 +52,6 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
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#error "Unsupported MCU"
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#error "Unsupported MCU"
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#endif
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#endif
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#define MUSB_REGS(rhport) ((musb_regs_t*) MUSB_BASES[rhport])
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#define MUSB_DEBUG 2
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/*------------------------------------------------------------------
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/*------------------------------------------------------------------
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* MACRO TYPEDEF CONSTANT ENUM DECLARATION
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* MACRO TYPEDEF CONSTANT ENUM DECLARATION
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*------------------------------------------------------------------*/
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*------------------------------------------------------------------*/
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@ -60,9 +59,9 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
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#define REQUEST_TYPE_INVALID (0xFFu)
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#define REQUEST_TYPE_INVALID (0xFFu)
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typedef union {
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typedef union {
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uint8_t u8;
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volatile uint8_t u8;
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uint16_t u16;
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volatile uint16_t u16;
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uint32_t u32;
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volatile uint32_t u32;
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} hw_fifo_t;
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} hw_fifo_t;
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typedef struct TU_ATTR_PACKED
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typedef struct TU_ATTR_PACKED
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@ -223,9 +222,10 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
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static void process_setup_packet(uint8_t rhport) {
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static void process_setup_packet(uint8_t rhport) {
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musb_regs_t* musb_regs = MUSB_REGS(rhport);
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musb_regs_t* musb_regs = MUSB_REGS(rhport);
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// Read setup packet
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uint32_t *p = (void*)&_dcd.setup_packet;
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uint32_t *p = (void*)&_dcd.setup_packet;
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volatile uint32_t *fifo_ptr = &musb_regs->fifo[0];
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volatile uint32_t *fifo_ptr = &musb_regs->fifo[0];
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p[0] = *fifo_ptr;
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p[0] = *fifo_ptr;
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p[1] = *fifo_ptr;
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p[1] = *fifo_ptr;
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@ -407,6 +407,7 @@ static void process_ep0(uint8_t rhport)
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uint_fast8_t csrl = ep_csr->csr0l;
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uint_fast8_t csrl = ep_csr->csr0l;
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// TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
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// TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
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// 21.1.5: endpoint 0 service routine as peripheral
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if (csrl & USB_CSRL0_STALLED) {
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if (csrl & USB_CSRL0_STALLED) {
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/* Returned STALL packet to HOST. */
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/* Returned STALL packet to HOST. */
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@ -705,7 +706,10 @@ void dcd_edpt_close_all(uint8_t rhport)
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fifo_reset(musb, i, 0);
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fifo_reset(musb, i, 0);
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fifo_reset(musb, i, 1);
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fifo_reset(musb, i, 1);
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}
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}
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#if MUSB_CFG_DYNAMIC_FIFO
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alloced_fifo_bytes = CFG_TUD_ENDPOINT0_SIZE;
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alloced_fifo_bytes = CFG_TUD_ENDPOINT0_SIZE;
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#endif
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if (ie) musb_dcd_int_enable(rhport);
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if (ie) musb_dcd_int_enable(rhport);
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}
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}
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@ -822,10 +826,12 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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* ISR
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* ISR
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*-------------------------------------------------------------------*/
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*-------------------------------------------------------------------*/
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void dcd_int_handler(uint8_t rhport) {
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void dcd_int_handler(uint8_t rhport) {
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musb_regs_t* musb_regs = MUSB_REGS(rhport);
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const uint8_t saved_index = musb_regs->index; // save endpoint index
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//Part specific ISR setup/entry
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//Part specific ISR setup/entry
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musb_dcd_int_handler_enter(rhport);
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musb_dcd_int_handler_enter(rhport);
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musb_regs_t* musb_regs = MUSB_REGS(rhport);
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uint_fast8_t intr_usb = musb_regs->intr_usb; // a read will clear this interrupt status
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uint_fast8_t intr_usb = musb_regs->intr_usb; // a read will clear this interrupt status
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uint_fast8_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
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uint_fast8_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
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uint_fast8_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
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uint_fast8_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
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@ -865,8 +871,7 @@ void dcd_int_handler(uint8_t rhport) {
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intr_rx &= ~TU_BIT(num);
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intr_rx &= ~TU_BIT(num);
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}
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}
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//Part specific ISR exit
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musb_regs->index = saved_index; // restore endpoint index
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musb_dcd_int_handler_exit(rhport);
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}
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}
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#endif
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#endif
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@ -42,11 +42,6 @@ const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
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#if CFG_TUD_ENABLED
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#if CFG_TUD_ENABLED
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#define USBHS_M31_CLOCK_RECOVERY
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#define USBHS_M31_CLOCK_RECOVERY
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// Mapping of peripheral instances to port. Currently just 1.
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static mxc_usbhs_regs_t* const musb_periph_inst[] = {
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MXC_USBHS
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};
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// Mapping of IRQ numbers to port. Currently just 1.
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// Mapping of IRQ numbers to port. Currently just 1.
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static const IRQn_Type musb_irqs[] = {
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static const IRQn_Type musb_irqs[] = {
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USB_IRQn
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USB_IRQn
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@ -77,31 +72,21 @@ static inline void musb_dcd_int_clear(uint8_t rhport) {
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NVIC_ClearPendingIRQ(musb_irqs[rhport]);
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NVIC_ClearPendingIRQ(musb_irqs[rhport]);
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}
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}
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//Used to save and restore user's register map when interrupt occurs
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static volatile unsigned isr_saved_index = 0;
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static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
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static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
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mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
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uint32_t mxm_int, mxm_int_en, mxm_is;
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uint32_t mxm_int, mxm_int_en, mxm_is;
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//save current register index
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isr_saved_index = musb_periph_inst[rhport]->index;
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//Handle PHY specific events
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//Handle PHY specific events
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mxm_int = musb_periph_inst[rhport]->mxm_int;
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mxm_int = hs_phy->mxm_int;
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mxm_int_en = musb_periph_inst[rhport]->mxm_int_en;
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mxm_int_en = hs_phy->mxm_int_en;
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mxm_is = mxm_int & mxm_int_en;
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mxm_is = mxm_int & mxm_int_en;
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musb_periph_inst[rhport]->mxm_int = mxm_is;
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hs_phy->mxm_int = mxm_is;
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if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
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if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
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dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
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dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
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}
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}
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}
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}
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static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
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//restore register index
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musb_periph_inst[rhport]->index = isr_saved_index;
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}
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static inline void musb_dcd_phy_init(uint8_t rhport) {
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static inline void musb_dcd_phy_init(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
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mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
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@ -120,7 +105,6 @@ static inline void musb_dcd_phy_init(uint8_t rhport) {
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hs_phy->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
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hs_phy->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
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hs_phy->m31_phy_xcfgi_127_96 = 0;
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hs_phy->m31_phy_xcfgi_127_96 = 0;
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#ifdef USBHS_M31_CLOCK_RECOVERY
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#ifdef USBHS_M31_CLOCK_RECOVERY
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hs_phy->m31_phy_noncry_rstb = 1;
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hs_phy->m31_phy_noncry_rstb = 1;
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hs_phy->m31_phy_noncry_en = 1;
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hs_phy->m31_phy_noncry_en = 1;
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@ -87,11 +87,6 @@ static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
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//Nothing to do for this part
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//Nothing to do for this part
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}
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}
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static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
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(void)rhport;
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//Nothing to do for this part
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}
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#if 0
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#if 0
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typedef struct {
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typedef struct {
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uint_fast16_t beg; /* offset of including first element */
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uint_fast16_t beg; /* offset of including first element */
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