mirror of
https://github.com/hathach/tinyusb.git
synced 2025-02-15 03:40:19 +00:00
improve processing usb complete and error isr.
also merge them together
This commit is contained in:
hathach
parent
dc74e634f9
commit
4deea87579
@ -22,69 +22,71 @@ set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
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#------------------------------------
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# only need to be built ONCE for all examples
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function(add_board_target BOARD_TARGET)
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if (NOT TARGET ${BOARD_TARGET})
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add_library(${BOARD_TARGET} STATIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
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#${SDK_DIR}/drivers/adc_12b1msps_sar/fsl_adc.c
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${SDK_DIR}/drivers/common/fsl_common.c
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${SDK_DIR}/drivers/igpio/fsl_gpio.c
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${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
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${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
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${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
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${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
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if (TARGET ${BOARD_TARGET})
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return()
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endif ()
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add_library(${BOARD_TARGET} STATIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
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#${SDK_DIR}/drivers/adc_12b1msps_sar/fsl_adc.c
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${SDK_DIR}/drivers/common/fsl_common.c
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${SDK_DIR}/drivers/igpio/fsl_gpio.c
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${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
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${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
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${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
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${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
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)
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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__ARMVFP__=0
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__ARMFPV5__=0
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XIP_EXTERNAL_FLASH=1
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XIP_BOOT_HEADER_ENABLE=1
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)
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target_include_directories(${BOARD_TARGET} PUBLIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
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${CMSIS_DIR}/CMSIS/Core/Include
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${SDK_DIR}/devices/${MCU_VARIANT}
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers
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#${SDK_DIR}/drivers/adc_12b1msps_sar
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${SDK_DIR}/drivers/common
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${SDK_DIR}/drivers/igpio
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${SDK_DIR}/drivers/lpspi
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${SDK_DIR}/drivers/lpuart
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)
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update_board(${BOARD_TARGET})
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# LD_FILE and STARTUP_FILE can be defined in board.cmake
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if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
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set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
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#set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
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endif ()
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if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
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set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
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#set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
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endif ()
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target_sources(${BOARD_TARGET} PUBLIC
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${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
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)
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if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--script=${LD_FILE_GNU}"
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# nanolib
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--specs=nosys.specs
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--specs=nano.specs
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# force linker to look for these symbols
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-Wl,-uimage_vector_table
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-Wl,-ug_boot_data
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)
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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__ARMVFP__=0
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__ARMFPV5__=0
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XIP_EXTERNAL_FLASH=1
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XIP_BOOT_HEADER_ENABLE=1
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elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--config=${LD_FILE_IAR}"
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)
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target_include_directories(${BOARD_TARGET} PUBLIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
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${CMSIS_DIR}/CMSIS/Core/Include
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${SDK_DIR}/devices/${MCU_VARIANT}
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers
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#${SDK_DIR}/drivers/adc_12b1msps_sar
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${SDK_DIR}/drivers/common
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${SDK_DIR}/drivers/igpio
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${SDK_DIR}/drivers/lpspi
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${SDK_DIR}/drivers/lpuart
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)
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update_board(${BOARD_TARGET})
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# LD_FILE and STARTUP_FILE can be defined in board.cmake
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if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
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set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
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#set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
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endif ()
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if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
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set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
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#set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
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endif ()
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target_sources(${BOARD_TARGET} PUBLIC
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${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
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)
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if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--script=${LD_FILE_GNU}"
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# nanolib
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--specs=nosys.specs
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--specs=nano.specs
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# force linker to look for these symbols
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-Wl,-uimage_vector_table
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-Wl,-ug_boot_data
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)
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elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--config=${LD_FILE_IAR}"
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)
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endif ()
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endif ()
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endfunction()
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@ -114,7 +116,7 @@ function(family_configure_example TARGET RTOS)
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# Add TinyUSB target and port source
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family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX ${RTOS})
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target_sources(${TARGET}-tinyusb PUBLIC
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target_sources(${TARGET}-tinyusb PRIVATE
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${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
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${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
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${TOP}/src/portable/ehci/ehci.c
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@ -64,6 +64,7 @@ function(add_tinyusb TARGET)
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-Wnull-dereference
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-Wuninitialized
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-Wunused
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-Wunused-function
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-Wreturn-type
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-Wredundant-decls
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)
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@ -314,11 +314,11 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
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ehci_qhd_t * const async_head = list_get_async_head(rhport);
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tu_memclr(async_head, sizeof(ehci_qhd_t));
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async_head->next.address = (uint32_t) async_head; // circular list, next is itself
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async_head->next.type = EHCI_QTYPE_QHD;
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async_head->head_list_flag = 1;
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async_head->qtd_overlay.halted = 1; // inactive most of time
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async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified
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async_head->next.address = (uint32_t) async_head; // circular list, next is itself
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async_head->next.type = EHCI_QTYPE_QHD;
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async_head->head_list_flag = 1;
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async_head->qtd_overlay.halted = 1; // inactive most of time
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async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified
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regs->async_list_addr = (uint32_t) async_head;
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@ -533,70 +533,74 @@ void async_advance_isr(uint8_t rhport)
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void port_connect_status_change_isr(uint8_t rhport)
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{
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void port_connect_status_change_isr(uint8_t rhport) {
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// NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device
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if (ehci_data.regs->portsc_bm.current_connect_status)
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{
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if ( ehci_data.regs->portsc_bm.current_connect_status ) {
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hcd_port_reset(rhport);
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hcd_event_device_attach(rhport, true);
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}else // device unplugged
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} else // device unplugged
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{
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hcd_event_device_remove(rhport, true);
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}
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}
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// Check queue head for potential transfer complete (successful or error)
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TU_ATTR_ALWAYS_INLINE static inline
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void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
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// examine TD attached to queue head
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ehci_qtd_t * volatile qtd = qhd->attached_qtd;
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hcd_dcache_invalidate(qhd, sizeof(ehci_qhd_t)); // HC may have updated the overlay
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volatile ehci_qtd_t *qtd_overlay = &qhd->qtd_overlay;
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if (qtd == NULL) {
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return; // no TD attached
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}
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// process non-active (completed) QHD with attached (scheduled) TD
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if ( !qtd_overlay->active && qhd->attached_qtd != NULL ) {
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xfer_result_t xfer_result;
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hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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// TD is still active, no need to process
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if (qtd->active) {
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return;
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}
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uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
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uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
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// invalidate dcache if IN transfer
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if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
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hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
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}
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// remove and free TD before invoking callback
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qhd_remove_qtd(qhd);
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// notify usbh
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uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
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hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
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{
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ehci_qhd_t *p_qhd = async_head;
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do
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{
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hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
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// halted or error is processed in error isr
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if ( !p_qhd->qtd_overlay.halted ) {
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qhd_xfer_complete_isr(p_qhd);
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if ( qtd_overlay->halted ) {
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if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
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// Error count = 0 often occurs when device disconnected, or other bus-related error
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xfer_result = XFER_RESULT_FAILED;
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TU_LOG3(" QHD xfer err count: %d\n", qtd_overlay->err_count);
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// TU_BREAKPOINT(); // TODO skip unplugged device
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}else {
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// no error bits are set, endpoint is halted due to STALL
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xfer_result = XFER_RESULT_STALLED;
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}
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} else {
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xfer_result = XFER_RESULT_SUCCESS;
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}
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p_qhd = qhd_next(p_qhd);
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}while(p_qhd != async_head); // async list traversal, stop if loop around
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ehci_qtd_t * volatile qtd = qhd->attached_qtd;
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hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t)); // HC may have written back TD
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uint8_t const dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
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uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
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// invalidate dcache if IN transfer with data
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if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
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hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
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}
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// remove and free TD before invoking callback
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qhd_remove_qtd(qhd);
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// notify usbh
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uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
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hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
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void proccess_async_xfer_isr(ehci_qhd_t * const list_head)
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{
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ehci_qhd_t *qhd = list_head;
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do {
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qhd_xfer_complete_isr(qhd);
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qhd = qhd_next(qhd);
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} while ( qhd != list_head ); // async list traversal, stop if loop around
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void process_period_xfer_isr(uint8_t rhport, uint32_t interval_ms)
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{
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uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
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ehci_link_t next_link = *list_get_period_head(rhport, interval_ms);
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@ -612,22 +616,13 @@ void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
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switch (next_link.type) {
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case EHCI_QTYPE_QHD: {
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ehci_qhd_t *qhd = (ehci_qhd_t *) entry_addr;
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hcd_dcache_invalidate(qhd, sizeof(ehci_qhd_t));
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if (!qhd->qtd_overlay.halted) {
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qhd_xfer_complete_isr(qhd);
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}
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qhd_xfer_complete_isr(qhd);
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}
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break;
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// TODO support hs/fs ISO
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case EHCI_QTYPE_ITD:
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// TODO support hs ISO
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break;
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case EHCI_QTYPE_SITD:
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// TODO support split ISO
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break;
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case EHCI_QTYPE_FSTN:
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default:
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break;
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@ -637,106 +632,6 @@ void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
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}
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}
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// TODO merge with qhd_xfer_complete_isr()
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TU_ATTR_ALWAYS_INLINE static inline
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void qhd_xfer_error_isr(ehci_qhd_t * qhd)
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{
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volatile ehci_qtd_t *qtd_overlay = &qhd->qtd_overlay;
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// TD has error
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if (qtd_overlay->halted) {
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xfer_result_t xfer_result;
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if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
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// Error count = 0 often occurs when device disconnected, or other bus-related error
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xfer_result = XFER_RESULT_FAILED;
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}else {
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// no error bits are set, endpoint is halted due to STALL
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xfer_result = XFER_RESULT_STALLED;
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}
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// if (XFER_RESULT_FAILED == xfer_result ) {
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// TU_LOG1(" QHD xfer err count: %d\n", qtd_overlay->err_count);
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// TU_BREAKPOINT(); // TODO skip unplugged device
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// }
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ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
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TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
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hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
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uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
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// invalidate dcache if IN transfer
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if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
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hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
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}
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// remove and free TD before invoking callback
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qhd_remove_qtd(qhd);
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if (0 == qhd->ep_number ) {
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// control cannot be halted
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qhd->qtd_overlay.next.terminate = 1;
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qhd->qtd_overlay.alternate.terminate = 1;
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qhd->qtd_overlay.halted = 0;
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hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
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}
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// notify usbh
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uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
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hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void xfer_error_isr(uint8_t rhport)
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{
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//------------- async list -------------//
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ehci_qhd_t * const async_head = list_get_async_head(rhport);
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ehci_qhd_t *p_qhd = async_head;
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do
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{
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hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
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qhd_xfer_error_isr( p_qhd );
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p_qhd = qhd_next(p_qhd);
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}while(p_qhd != async_head); // async list traversal, stop if loop around
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//------------- TODO refractor period list -------------//
|
||||
uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
|
||||
for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
|
||||
{
|
||||
ehci_link_t next_item = *list_get_period_head(rhport, interval_ms);
|
||||
|
||||
// TODO abstract max loop guard for period
|
||||
while( !next_item.terminate &&
|
||||
!(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) )
|
||||
{
|
||||
switch ( next_item.type )
|
||||
{
|
||||
case EHCI_QTYPE_QHD:
|
||||
{
|
||||
ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address);
|
||||
hcd_dcache_invalidate(p_qhd_int, sizeof(ehci_qhd_t));
|
||||
|
||||
qhd_xfer_error_isr(p_qhd_int);
|
||||
}
|
||||
break;
|
||||
|
||||
// TODO support hs/fs ISO
|
||||
case EHCI_QTYPE_ITD:
|
||||
case EHCI_QTYPE_SITD:
|
||||
case EHCI_QTYPE_FSTN:
|
||||
default: break;
|
||||
}
|
||||
|
||||
next_item = *list_next(&next_item);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//------------- Host Controller Driver's Interrupt Handler -------------//
|
||||
void hcd_int_handler(uint8_t rhport)
|
||||
{
|
||||
@ -768,21 +663,16 @@ void hcd_int_handler(uint8_t rhport)
|
||||
regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
|
||||
}
|
||||
|
||||
// A USB transfer is completed with error
|
||||
if (int_status & EHCI_INT_MASK_ERROR) {
|
||||
xfer_error_isr(rhport);
|
||||
regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
|
||||
}
|
||||
// A USB transfer is completed (OK or error)
|
||||
uint32_t const usb_int = int_status & (EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR);
|
||||
if (usb_int) {
|
||||
proccess_async_xfer_isr(list_get_async_head(rhport));
|
||||
|
||||
// A USB transfer is completed
|
||||
if (int_status & EHCI_INT_MASK_USB) {
|
||||
for ( uint32_t i = 1; i <= FRAMELIST_SIZE; i *= 2 ) {
|
||||
period_list_xfer_complete_isr(rhport, i);
|
||||
process_period_xfer_isr(rhport, i);
|
||||
}
|
||||
|
||||
async_list_xfer_complete_isr(list_get_async_head(rhport));
|
||||
|
||||
regs->status = EHCI_INT_MASK_USB; // Acknowledge
|
||||
regs->status = usb_int; // Acknowledge
|
||||
}
|
||||
|
||||
//------------- There is some removed async previously -------------//
|
||||
@ -1011,8 +901,7 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t *qtd_find_free(void) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
|
||||
{
|
||||
static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes) {
|
||||
tu_memclr(qtd, sizeof(ehci_qtd_t));
|
||||
qtd->used = 1;
|
||||
|
||||
@ -1026,8 +915,7 @@ static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
|
||||
qtd->expected_bytes = total_bytes;
|
||||
|
||||
qtd->buffer[0] = (uint32_t) buffer;
|
||||
for(uint8_t i=1; i<5; i++)
|
||||
{
|
||||
for(uint8_t i=1; i<5; i++) {
|
||||
qtd->buffer[i] |= tu_align4k(qtd->buffer[i - 1] ) + 4096;
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user