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st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for now
While the ST code has a 2 ms stabilization delay for the USBC PHY PLL, running without this delay showed no problem for at leat 10 USB un/replug cycles. Observe for problems!
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@ -27,7 +27,6 @@
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*/
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#include "tusb_option.h"
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#include "../../../../hw/bsp//board.h"
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#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
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defined (STM32F107xB) || defined (STM32F107xC)
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@ -349,7 +348,12 @@ static bool USB_HS_PHYCInit(void)
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// Enable PLL internal PHY
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usb_hs_phyc->USB_HS_PHYC_PLL = phyc_pll | USB_HS_PHYC_PLL_PLLEN;
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board_delay(2);
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/* Original ST code has 2 ms delay for PLL stabilization.
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* Primitive test shows that more than 10 USB un/replug cycle
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* showed no error with enumeration
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* //#include "../../../../hw/bsp//board.h"
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* //board_delay(2);
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*/
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return true;
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}
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# endif
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