From 196bdbc7024fcfd3f94e4609cee6580df5bab70b Mon Sep 17 00:00:00 2001 From: Uwe Bonnes Date: Wed, 1 Jul 2020 14:45:07 +0200 Subject: [PATCH] st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for now While the ST code has a 2 ms stabilization delay for the USBC PHY PLL, running without this delay showed no problem for at leat 10 USB un/replug cycles. Observe for problems! --- src/portable/st/synopsys/dcd_synopsys.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index ba3cc3460..4a372348a 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -27,7 +27,6 @@ */ #include "tusb_option.h" -#include "../../../../hw/bsp//board.h" #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ defined (STM32F107xB) || defined (STM32F107xC) @@ -349,7 +348,12 @@ static bool USB_HS_PHYCInit(void) // Enable PLL internal PHY usb_hs_phyc->USB_HS_PHYC_PLL = phyc_pll | USB_HS_PHYC_PLL_PLLEN; - board_delay(2); + /* Original ST code has 2 ms delay for PLL stabilization. + * Primitive test shows that more than 10 USB un/replug cycle + * showed no error with enumeration + * //#include "../../../../hw/bsp//board.h" + * //board_delay(2); + */ return true; } # endif