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rsx: Do not emit rounding code when not needed

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kd-11 2024-01-21 04:14:14 +03:00 committed by kd-11
parent abe5013f1d
commit 8eae8cb86c
1 changed files with 7 additions and 5 deletions
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12
rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl
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@ -6,11 +6,6 @@ R"(
#else #else
// Mixed types. We have fp16 outputs // Mixed types. We have fp16 outputs
#define _mrt_color_t f16vec4 #define _mrt_color_t f16vec4
f16vec4 round_to_8bit(const in f16vec4 v4)
{
uvec4 raw = uvec4(floor(fma(v4, f16vec4(255.), f16vec4(0.5))));
return f16vec4(raw) / f16vec4(255.);
}
#endif #endif
#if defined(_ENABLE_ROP_OUTPUT_ROUNDING) || defined(_ENABLE_PROGRAMMABLE_BLENDING) #if defined(_ENABLE_ROP_OUTPUT_ROUNDING) || defined(_ENABLE_PROGRAMMABLE_BLENDING)
@ -20,6 +15,13 @@ vec4 round_to_8bit(const in vec4 v4)
uvec4 raw = uvec4(floor(fma(v4, vec4(255.), vec4(0.5)))); uvec4 raw = uvec4(floor(fma(v4, vec4(255.), vec4(0.5))));
return vec4(raw) / vec4(255.); return vec4(raw) / vec4(255.);
} }
#ifndef _32_BIT_OUTPUT
f16vec4 round_to_8bit(const in f16vec4 v4)
{
uvec4 raw = uvec4(floor(fma(v4, f16vec4(255.), f16vec4(0.5))));
return f16vec4(raw) / f16vec4(255.);
}
#endif
#endif #endif
#ifdef _DISABLE_EARLY_DISCARD #ifdef _DISABLE_EARLY_DISCARD