SPU LLVM: Add m_use_vnni

- Alderlake and Sapphirerapids will require an update to the llvm fork before they can be detected

rpcs3/Emu/CPU/CPUTranslator.cpp

@@ -63,14 +63,24 @@ void cpu_translator::initialize(llvm::LLVMContext& context, llvm::ExecutionEngin
 		m_use_avx512 = true;
 	}
 
+	// Test VNNI feature (TODO)
+	if (cpu == "cascadelake" ||
+		cpu == "cooperlake" ||
+		cpu == "alderlake")
+	{
+		m_use_vnni = true;
+	}
+
 	// Test AVX-512_icelake features (TODO)
 	if (cpu == "icelake" ||
 		cpu == "icelake-client" ||
 		cpu == "icelake-server" ||
 		cpu == "tigerlake" ||
-		cpu == "rocketlake")
+		cpu == "rocketlake" ||
+		cpu == "sapphirerapids")
 	{
 		m_use_avx512_icl = true;
+		m_use_vnni = true;
 	}
 }
 

rpcs3/Emu/CPU/CPUTranslator.h

@@ -2451,6 +2451,9 @@ protected:
 	// Allow skylake-x tier AVX-512
 	bool m_use_avx512 = false;
 
+	// Allow VNNI
+	bool m_use_vnni = false;
+
 	// Allow Icelake tier AVX-512
 	bool m_use_avx512_icl = false;
 

rpcs3/Emu/Cell/SPURecompiler.cpp

@@ -7032,8 +7032,7 @@ public:
 
 	void SUMB(spu_opcode_t op)
 	{
-		// TODO: Some future CPUS will support VNNI but not avx512
-		if (m_use_avx512_icl)
+		if (m_use_vnni)
 		{
 			const auto [a, b] = get_vrs<u32[4]>(op.ra, op.rb);
 			const auto zeroes = splat<u32[4]>(0);