From 43cc62d2679f2dc2a1c0a0a4a169869d8adf001f Mon Sep 17 00:00:00 2001 From: Malcolm Jestadt Date: Mon, 30 Aug 2021 13:32:51 -0400 Subject: [PATCH] SPU LLVM: Add m_use_vnni - Alderlake and Sapphirerapids will require an update to the llvm fork before they can be detected --- rpcs3/Emu/CPU/CPUTranslator.cpp | 12 +++++++++++- rpcs3/Emu/CPU/CPUTranslator.h | 3 +++ rpcs3/Emu/Cell/SPURecompiler.cpp | 3 +-- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/rpcs3/Emu/CPU/CPUTranslator.cpp b/rpcs3/Emu/CPU/CPUTranslator.cpp index 1c7173d27f..16d69cb9ed 100644 --- a/rpcs3/Emu/CPU/CPUTranslator.cpp +++ b/rpcs3/Emu/CPU/CPUTranslator.cpp @@ -63,14 +63,24 @@ void cpu_translator::initialize(llvm::LLVMContext& context, llvm::ExecutionEngin m_use_avx512 = true; } + // Test VNNI feature (TODO) + if (cpu == "cascadelake" || + cpu == "cooperlake" || + cpu == "alderlake") + { + m_use_vnni = true; + } + // Test AVX-512_icelake features (TODO) if (cpu == "icelake" || cpu == "icelake-client" || cpu == "icelake-server" || cpu == "tigerlake" || - cpu == "rocketlake") + cpu == "rocketlake" || + cpu == "sapphirerapids") { m_use_avx512_icl = true; + m_use_vnni = true; } } diff --git a/rpcs3/Emu/CPU/CPUTranslator.h b/rpcs3/Emu/CPU/CPUTranslator.h index c062fbb936..003dd5c3a2 100644 --- a/rpcs3/Emu/CPU/CPUTranslator.h +++ b/rpcs3/Emu/CPU/CPUTranslator.h @@ -2451,6 +2451,9 @@ protected: // Allow skylake-x tier AVX-512 bool m_use_avx512 = false; + // Allow VNNI + bool m_use_vnni = false; + // Allow Icelake tier AVX-512 bool m_use_avx512_icl = false; diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp index 1eb261b95c..d9f1a9ed7e 100644 --- a/rpcs3/Emu/Cell/SPURecompiler.cpp +++ b/rpcs3/Emu/Cell/SPURecompiler.cpp @@ -7032,8 +7032,7 @@ public: void SUMB(spu_opcode_t op) { - // TODO: Some future CPUS will support VNNI but not avx512 - if (m_use_avx512_icl) + if (m_use_vnni) { const auto [a, b] = get_vrs(op.ra, op.rb); const auto zeroes = splat(0);