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More opcodes
This commit is contained in:
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4246d83f2a
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@ -587,6 +587,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0700, A1, VABD_),
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ARMv7_OP4(0xef80, 0x0f50, 0xef80, 0x0700, T2, VABD_),
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ARMv7_OP4(0xfe80, 0x0f50, 0xf280, 0x0700, A2, VABD_),
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ARMv7_OP4(0xffa0, 0x0f10, 0xff20, 0x0d00, T1, VABD_FP),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf320, 0x0d00, A1, VABD_FP),
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@ -600,6 +601,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0800, T1, VADD),
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ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0800, A1, VADD),
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ARMv7_OP4(0xffa0, 0x0f10, 0xef00, 0x0d00, T1, VADD_FP),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf200, 0x0d00, A1, VADD_FP),
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ARMv7_OP4(0xffb0, 0x0e50, 0xee30, 0x0a00, T2, VADD_FP),
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@ -616,6 +618,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xefb8, 0x00b0, 0xef80, 0x0030, T1, VBIC_IMM),
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ARMv7_OP4(0xfeb0, 0x00b0, 0xf280, 0x0030, A1, VBIC_IMM),
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ARMv7_OP4(0xffb0, 0x0f10, 0xef10, 0x0110, T1, VBIC_REG),
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ARMv7_OP4(0xffb0, 0x0f10, 0xf210, 0x0110, A1, VBIC_REG),
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@ -626,6 +629,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0810, A1, VCEQ_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xef00, 0x0e00, T2, VCEQ_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf200, 0x0e00, A2, VCEQ_REG),
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ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0100, T1, VCEQ_ZERO),
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ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0100, A1, VCEQ_ZERO),
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@ -633,6 +637,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0310, A1, VCGE_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xff00, 0x0e00, T2, VCGE_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf300, 0x0e00, A2, VCGE_REG),
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ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0080, T1, VCGE_ZERO),
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ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0080, A1, VCGE_ZERO),
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@ -640,6 +645,7 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0300, A1, VCGT_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xff20, 0x0e00, T2, VCGT_REG),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf320, 0x0e00, A2, VCGT_REG),
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ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0000, T1, VCGT_ZERO),
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ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0000, A1, VCGT_ZERO),
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@ -665,11 +671,13 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xffb3, 0x0e10, 0xffb3, 0x0600, T1, VCVT_FIA),
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ARMv7_OP4(0xffb3, 0x0e10, 0xf3b3, 0x0600, A1, VCVT_FIA),
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ARMv7_OP4(0xffb8, 0x0e50, 0xeeb8, 0x0a40, T1, VCVT_FIF),
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ARMv7_OP4(0x0fb8, 0x0e50, 0x0eb8, 0x0a40, A1, VCVT_FIF),
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ARMv7_OP4(0xef80, 0x0e90, 0xef80, 0x0e10, T1, VCVT_FFA),
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ARMv7_OP4(0xfe80, 0x0e90, 0xf280, 0x0e10, A1, VCVT_FFA),
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ARMv7_OP4(0xffba, 0x0e50, 0xeeba, 0x0a40, T1, VCVT_FFF),
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ARMv7_OP4(0x0fba, 0x0e50, 0x0eba, 0x0a40, A1, VCVT_FFF),
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@ -678,10 +686,314 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
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ARMv7_OP4(0xffb3, 0x0ed0, 0xffb2, 0x0600, T1, VCVT_HFA),
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ARMv7_OP4(0xffb3, 0x0ed0, 0xf3b2, 0x0600, A1, VCVT_HFA),
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ARMv7_OP4(0xffbe, 0x0f50, 0xeeb2, 0x0a40, T1, VCVT_HFF),
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ARMv7_OP4(0x0fbe, 0x0f50, 0x0eb2, 0x0a40, A1, VCVT_HFF),
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// TODO: vector instructions
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ARMv7_OP4(0xffb0, 0x0e50, 0xee80, 0x0a00, T1, VDIV),
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ARMv7_OP4(0x0fb0, 0x0e50, 0x0e80, 0x0a00, A1, VDIV),
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ARMv7_OP4(0xffb0, 0x0f90, 0xffb0, 0x0c00, T1, VDUP_S),
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ARMv7_OP4(0xffb0, 0x0f90, 0xf3b0, 0x0c00, A1, VDUP_S),
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ARMv7_OP4(0xff90, 0x0f5f, 0xee80, 0x0b10, T1, VDUP_R),
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ARMv7_OP4(0x0f90, 0x0f5f, 0x0e80, 0x0b10, A1, VDUP_R),
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ARMv7_OP4(0xffb0, 0x0f10, 0xff00, 0x0110, T1, VEOR),
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ARMv7_OP4(0xffb0, 0x0f10, 0xf300, 0x0110, A1, VEOR),
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ARMv7_OP4(0xffb0, 0x0010, 0xefb0, 0x0000, T1, VEXT),
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ARMv7_OP4(0xffb0, 0x0010, 0xf2b0, 0x0000, A1, VEXT),
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ARMv7_OP4(0xef80, 0x0b10, 0xef00, 0x0000, T1, VHADDSUB),
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ARMv7_OP4(0xfe80, 0x0b10, 0xf200, 0x0000, A1, VHADDSUB),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf9a0, 0x0c00, T1, VLD1_SAL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf4a0, 0x0c00, A1, VLD1_SAL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf9a0, 0x0000, T1, VLD1_SL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf4a0, 0x0000, A1, VLD1_SL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf9a0, 0x0d00, T1, VLD2_SAL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf4a0, 0x0d00, A1, VLD2_SAL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf9a0, 0x0100, T1, VLD2_SL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf4a0, 0x0100, A1, VLD2_SL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf9a0, 0x0e00, T1, VLD3_SAL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf4a0, 0x0e00, A1, VLD3_SAL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf9a0, 0x0200, T1, VLD3_SL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf4a0, 0x0200, A1, VLD3_SL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf9a0, 0x0f00, T1, VLD4_SAL),
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ARMv7_OP4(0xffb0, 0x0f00, 0xf4a0, 0x0f00, A1, VLD4_SAL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf9a0, 0x0300, T1, VLD4_SL),
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ARMv7_OP4(0xffb0, 0x0300, 0xf4a0, 0x0300, A1, VLD4_SL),
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ARMv7_OP4(0xffb0, 0x0000, 0xf920, 0x0000, T1, VLD__MS), // VLD1, VLD2, VLD3, VLD4
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ARMv7_OP4(0xffb0, 0x0000, 0xf420, 0x0000, A1, VLD__MS),
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ARMv7_OP4(0xfe10, 0x0f00, 0xec10, 0x0b00, T1, VLDM),
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ARMv7_OP4(0x0e10, 0x0f00, 0x0c10, 0x0b00, A1, VLDM),
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ARMv7_OP4(0xfe10, 0x0f00, 0xec10, 0x0a00, T2, VLDM),
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ARMv7_OP4(0x0e10, 0x0f00, 0x0c10, 0x0a00, A2, VLDM),
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ARMv7_OP4(0xff30, 0x0f00, 0xed10, 0x0b00, T1, VLDR),
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ARMv7_OP4(0x0f30, 0x0f00, 0x0d10, 0x0b00, A1, VLDR),
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ARMv7_OP4(0xff30, 0x0f00, 0xed10, 0x0a00, T2, VLDR),
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ARMv7_OP4(0x0f30, 0x0f00, 0x0d10, 0x0a00, A2, VLDR),
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ARMv7_OP4(0xef80, 0x0f00, 0xef00, 0x0600, T1, VMAXMIN),
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ARMv7_OP4(0xfe80, 0x0f00, 0xf200, 0x0600, A1, VMAXMIN),
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ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0f00, T1, VMAXMIN_FP),
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ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0f00, A1, VMAXMIN_FP),
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ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0900, T1, VML__),
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ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0900, A1, VML__),
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ARMv7_OP4(0xef80, 0x0d50, 0xef80, 0x0800, T2, VML__),
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ARMv7_OP4(0xfe80, 0x0d50, 0xf280, 0x0800, A2, VML__),
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ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0d10, T1, VML__FP),
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ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0d10, A1, VML__FP),
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ARMv7_OP4(0xffb0, 0x0e10, 0xee00, 0x0a00, T2, VML__FP),
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ARMv7_OP4(0x0fb0, 0x0e10, 0x0e00, 0x0a00, A2, VML__FP),
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ARMv7_OP4(0xef80, 0x0a50, 0xef80, 0x0040, T1, VML__S),
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ARMv7_OP4(0xfe80, 0x0a50, 0xf280, 0x0040, A1, VML__S),
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ARMv7_OP4(0xef80, 0x0b50, 0xef80, 0x0240, T2, VML__S),
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ARMv7_OP4(0xfe80, 0x0b50, 0xf280, 0x0240, A2, VML__S),
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ARMv7_OP4(0xefb8, 0x0090, 0xef80, 0x0010, T1, VMOV_IMM),
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ARMv7_OP4(0xfeb8, 0x0090, 0xf280, 0x0010, A1, VMOV_IMM),
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ARMv7_OP4(0xffb0, 0x0ef0, 0xeeb0, 0x0a00, T2, VMOV_IMM),
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ARMv7_OP4(0x0fb0, 0x0ef0, 0x0eb0, 0x0a00, A2, VMOV_IMM),
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ARMv7_OP4(0xffb0, 0x0f10, 0xef20, 0x0110, T1, VMOV_REG),
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ARMv7_OP4(0xffb0, 0x0f10, 0xf220, 0x0110, A1, VMOV_REG),
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ARMv7_OP4(0xffbf, 0x0ed0, 0xeeb0, 0x0a40, T2, VMOV_REG),
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ARMv7_OP4(0x0fbf, 0x0ed0, 0x0eb0, 0x0a40, A2, VMOV_REG),
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ARMv7_OP4(0xff90, 0x0f1f, 0xee00, 0x0b10, T1, VMOV_RS),
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ARMv7_OP4(0x0f90, 0x0f1f, 0x0e00, 0x0b10, A1, VMOV_RS),
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ARMv7_OP4(0xff10, 0x0f1f, 0xee10, 0x0b10, T1, VMOV_SR),
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ARMv7_OP4(0x0f10, 0x0f1f, 0x0e10, 0x0b10, A1, VMOV_SR),
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ARMv7_OP4(0xffe0, 0x0f7f, 0xee00, 0x0a10, T1, VMOV_RF),
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ARMv7_OP4(0x0fe0, 0x0f7f, 0x0e00, 0x0a10, A1, VMOV_RF),
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ARMv7_OP4(0xffe0, 0x0fd0, 0xec40, 0x0a10, T1, VMOV_2RF),
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ARMv7_OP4(0x0fe0, 0x0fd0, 0x0c40, 0x0a10, A1, VMOV_2RF),
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ARMv7_OP4(0xffe0, 0x0fd0, 0xec40, 0x0b10, T1, VMOV_2RD),
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ARMv7_OP4(0x0fe0, 0x0fd0, 0x0c40, 0x0b10, A1, VMOV_2RD),
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ARMv7_OP4(0xef87, 0x0fd0, 0xef80, 0x0a10, T1, VMOVL),
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ARMv7_OP4(0xfe87, 0x0fd0, 0xf280, 0x0a10, A1, VMOVL),
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ARMv7_OP4(0xffb3, 0x0fd0, 0xffb2, 0x0200, T1, VMOVN),
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ARMv7_OP4(0xffb3, 0x0fd0, 0xf3b2, 0x0200, A1, VMOVN),
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ARMv7_OP4(0xffff, 0x0fff, 0xeef1, 0x0a10, T1, VMRS),
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ARMv7_OP4(0x0fff, 0x0fff, 0x0ef1, 0x0a10, A1, VMRS),
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ARMv7_OP4(0xffff, 0x0fff, 0xeee1, 0x0a10, T1, VMSR),
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ARMv7_OP4(0x0fff, 0x0fff, 0x0ee1, 0x0a10, A1, VMSR),
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ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0910, T1, VMUL_),
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ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0910, A1, VMUL_),
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ARMv7_OP4(0xef80, 0x0d50, 0xef80, 0x0c00, T2, VMUL_),
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ARMv7_OP4(0xfe80, 0x0d50, 0xf280, 0x0c00, A2, VMUL_),
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ARMv7_OP4(0xffa0, 0x0f10, 0xff00, 0x0d10, T1, VMUL_FP),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf300, 0x0d10, A1, VMUL_FP),
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ARMv7_OP4(0xffb0, 0x0e50, 0xee20, 0x0a00, T2, VMUL_FP),
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ARMv7_OP4(0x0fb0, 0x0e50, 0x0e20, 0x0a00, A2, VMUL_FP),
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ARMv7_OP4(0xef80, 0x0e50, 0xef80, 0x0840, T1, VMUL_S),
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ARMv7_OP4(0xfe80, 0x0e50, 0xf280, 0x0840, A1, VMUL_S),
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ARMv7_OP4(0xef80, 0x0f50, 0xef80, 0x0a40, T2, VMUL_S),
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ARMv7_OP4(0xfe80, 0x0f50, 0xf280, 0x0a40, A2, VMUL_S),
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ARMv7_OP4(0xefb8, 0x00b0, 0xef80, 0x0030, T1, VMVN_IMM),
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ARMv7_OP4(0xfeb8, 0x00b0, 0xf280, 0x0030, A1, VMVN_IMM),
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ARMv7_OP4(0xffb3, 0x0f90, 0xffb0, 0x0580, T1, VMVN_REG),
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ARMv7_OP4(0xffb3, 0x0f90, 0xf3b0, 0x0580, A1, VMVN_REG),
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ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0380, T1, VNEG),
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ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0380, A1, VNEG),
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ARMv7_OP4(0xffbf, 0x0ed0, 0xeeb1, 0x0a40, T2, VNEG),
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ARMv7_OP4(0x0fbf, 0x0ed0, 0x0eb1, 0x0a40, A2, VNEG),
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ARMv7_OP4(0xffb0, 0x0e10, 0xee10, 0x0a00, T1, VNM__),
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ARMv7_OP4(0x0fb0, 0x0e10, 0x0e10, 0x0a00, A1, VNM__),
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ARMv7_OP4(0xffb0, 0x0e50, 0xee20, 0x0a40, T2, VNM__),
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ARMv7_OP4(0x0fb0, 0x0e50, 0x0e20, 0x0a40, A2, VNM__),
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ARMv7_OP4(0xffb0, 0x0f10, 0xef30, 0x0110, T1, VORN_REG),
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ARMv7_OP4(0xffb0, 0x0f10, 0xf230, 0x0110, A1, VORN_REG),
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ARMv7_OP4(0xefb8, 0x00b0, 0xef80, 0x0010, T1, VORR_IMM),
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ARMv7_OP4(0xfeb8, 0x00b0, 0xf280, 0x0010, A1, VORR_IMM),
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ARMv7_OP4(0xffb0, 0x0f10, 0xef20, 0x0110, T1, VORR_REG),
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ARMv7_OP4(0xffb0, 0x0f10, 0xf220, 0x0110, A1, VORR_REG),
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ARMv7_OP4(0xffb3, 0x0f10, 0xffb0, 0x0600, T1, VPADAL),
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ARMv7_OP4(0xffb3, 0x0f10, 0xf3b0, 0x0600, A1, VPADAL),
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ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0b10, T1, VPADD),
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ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0b10, A1, VPADD),
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ARMv7_OP4(0xffa0, 0x0f10, 0xff00, 0x0d00, T1, VPADD_FP),
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ARMv7_OP4(0xffa0, 0x0f10, 0xf300, 0x0d00, A1, VPADD_FP),
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ARMv7_OP4(0xffb3, 0x0f10, 0xffb0, 0x0200, T1, VPADDL),
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ARMv7_OP4(0xffb3, 0x0f10, 0xf3b0, 0x0200, A1, VPADDL),
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ARMv7_OP4(0xef80, 0x0f00, 0xef00, 0x0a00, T1, VPMAXMIN),
|
||||
ARMv7_OP4(0xfe80, 0x0f00, 0xf200, 0x0a00, A1, VPMAXMIN),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xff00, 0x0f00, T1, VPMAXMIN_FP),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0f00, A1, VPMAXMIN_FP),
|
||||
|
||||
ARMv7_OP4(0xffbf, 0x0f00, 0xecbd, 0x0b00, T1, VPOP),
|
||||
ARMv7_OP4(0x0fbf, 0x0f00, 0x0cbd, 0x0b00, A1, VPOP),
|
||||
ARMv7_OP4(0xffbf, 0x0f00, 0xecbd, 0x0a00, T2, VPOP),
|
||||
ARMv7_OP4(0x0fbf, 0x0f00, 0x0cbd, 0x0a00, A2, VPOP),
|
||||
|
||||
ARMv7_OP4(0xffbf, 0x0f00, 0xed2d, 0x0b00, T1, VPUSH),
|
||||
ARMv7_OP4(0x0fbf, 0x0f00, 0x0d2d, 0x0b00, A1, VPUSH),
|
||||
ARMv7_OP4(0xffbf, 0x0f00, 0xed2d, 0x0a00, T2, VPUSH),
|
||||
ARMv7_OP4(0x0fbf, 0x0f00, 0x0d2d, 0x0a00, A2, VPUSH),
|
||||
|
||||
// TODO: VQ* instructions
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xff80, 0x0400, T1, VRADDHN),
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xf380, 0x0400, A1, VRADDHN),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0e90, 0xffb3, 0x0400, T1, VRECPE),
|
||||
ARMv7_OP4(0xffb3, 0x0e90, 0xf3b3, 0x0400, A1, VRECPE),
|
||||
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xef00, 0x0f10, T1, VRECPS),
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xf200, 0x0f10, A1, VRECPS),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0e10, 0xffb0, 0x0000, T1, VREV__),
|
||||
ARMv7_OP4(0xffb3, 0x0e10, 0xf3b0, 0x0000, A1, VREV__),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0100, T1, VRHADD),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0100, A1, VRHADD),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0500, T1, VRSHL),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0500, A1, VRSHL),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef80, 0x0210, T1, VRSHR),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf280, 0x0210, A1, VRSHR),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0fd0, 0xef80, 0x0850, T1, VRSHRN),
|
||||
ARMv7_OP4(0xff80, 0x0fd0, 0xf280, 0x0850, A1, VRSHRN),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0e90, 0xffb3, 0x0480, T1, VRSQRTE),
|
||||
ARMv7_OP4(0xffb3, 0x0e90, 0xf3b3, 0x0480, A1, VRSQRTE),
|
||||
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xef20, 0x0f10, T1, VRSQRTS),
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xf220, 0x0f10, A1, VRSQRTS),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef80, 0x0310, T1, VRSRA),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf280, 0x0310, A1, VRSRA),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xff80, 0x0600, T1, VRSUBHN),
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xf380, 0x0600, A1, VRSUBHN),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xef80, 0x0510, T1, VSHL_IMM),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf280, 0x0510, A1, VSHL_IMM),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0400, T1, VSHL_REG),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0400, A1, VSHL_REG),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0fd0, 0xef80, 0x0a10, T1, VSHLL),
|
||||
ARMv7_OP4(0xfe80, 0x0fd0, 0xf280, 0x0a10, A1, VSHLL),
|
||||
ARMv7_OP4(0xffb3, 0x0fd0, 0xffb2, 0x0300, T2, VSHLL),
|
||||
ARMv7_OP4(0xffb3, 0x0fd0, 0xf3b2, 0x0300, A2, VSHLL),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef80, 0x0010, T1, VSHR),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf280, 0x0010, A1, VSHR),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0fd0, 0xef80, 0x0810, T1, VSHRN),
|
||||
ARMv7_OP4(0xff80, 0x0fd0, 0xf280, 0x0810, A1, VSHRN),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xff80, 0x0510, T1, VSLI),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf380, 0x0510, A1, VSLI),
|
||||
|
||||
ARMv7_OP4(0xffbf, 0x0ed0, 0xeeb1, 0x0ac0, T1, VSQRT),
|
||||
ARMv7_OP4(0x0fbf, 0x0ed0, 0x0eb1, 0x0ac0, A1, VSQRT),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0f10, 0xef80, 0x0110, T1, VSRA),
|
||||
ARMv7_OP4(0xfe80, 0x0f10, 0xf280, 0x0110, A1, VSRA),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xff80, 0x0410, T1, VSRI),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf380, 0x0410, A1, VSRI),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0000, 0xf900, 0x0000, T1, VST__MS), // VST1, VST2, VST3, VST4
|
||||
ARMv7_OP4(0xffb0, 0x0000, 0xf400, 0x0000, A1, VST__MS),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf980, 0x0000, T1, VST1_SL),
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf480, 0x0000, A1, VST1_SL),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf980, 0x0100, T1, VST2_SL),
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf480, 0x0100, A1, VST2_SL),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf980, 0x0200, T1, VST3_SL),
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf480, 0x0200, A1, VST3_SL),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf980, 0x0300, T1, VST4_SL),
|
||||
ARMv7_OP4(0xffb0, 0x0300, 0xf480, 0x0300, A1, VST4_SL),
|
||||
|
||||
ARMv7_OP4(0xfe10, 0x0f00, 0xec00, 0x0b00, T1, VSTM),
|
||||
ARMv7_OP4(0x0e10, 0x0f00, 0x0c00, 0x0b00, A1, VSTM),
|
||||
ARMv7_OP4(0xfe10, 0x0f00, 0xec00, 0x0a00, T2, VSTM),
|
||||
ARMv7_OP4(0x0e10, 0x0f00, 0x0c00, 0x0a00, A2, VSTM),
|
||||
|
||||
ARMv7_OP4(0xff30, 0x0f00, 0xed00, 0x0b00, T1, VSTR),
|
||||
ARMv7_OP4(0x0f30, 0x0f00, 0x0d00, 0x0b00, A1, VSTR),
|
||||
ARMv7_OP4(0xff30, 0x0f00, 0xed00, 0x0a00, T2, VSTR),
|
||||
ARMv7_OP4(0x0f30, 0x0f00, 0x0d00, 0x0a00, A2, VSTR),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xff00, 0x0800, T1, VSUB),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0800, A1, VSUB),
|
||||
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xef20, 0x0d00, T1, VSUB_FP),
|
||||
ARMv7_OP4(0xffa0, 0x0f10, 0xf220, 0x0d00, A1, VSUB_FP),
|
||||
ARMv7_OP4(0xffb0, 0x0e50, 0xee30, 0x0a40, T2, VSUB_FP),
|
||||
ARMv7_OP4(0x0fb0, 0x0e50, 0x0e30, 0x0a40, A2, VSUB_FP),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xef80, 0x0600, T1, VSUBHN),
|
||||
ARMv7_OP4(0xff80, 0x0f50, 0xf280, 0x0600, A1, VSUBHN),
|
||||
|
||||
ARMv7_OP4(0xef80, 0x0e50, 0xef80, 0x0200, T1, VSUB_),
|
||||
ARMv7_OP4(0xfe80, 0x0e50, 0xf280, 0x0200, A1, VSUB_),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xffb2, 0x0000, T1, VSWP),
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b2, 0x0000, A1, VSWP),
|
||||
|
||||
ARMv7_OP4(0xffb0, 0x0c10, 0xffb0, 0x0800, T1, VTB_),
|
||||
ARMv7_OP4(0xffb0, 0x0c10, 0xf3b0, 0x0800, A1, VTB_),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xffb2, 0x0080, T1, VTRN),
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b2, 0x0080, A1, VTRN),
|
||||
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0810, T1, VTST),
|
||||
ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0810, A1, VTST),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xffb2, 0x0100, T1, VUZP),
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b2, 0x0100, A1, VUZP),
|
||||
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xffb2, 0x0180, T1, VZIP),
|
||||
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b2, 0x0180, A1, VZIP),
|
||||
|
||||
ARMv7_OP2(0xffff, 0xbf20, T1, WFE),
|
||||
ARMv7_OP4(0xffff, 0xffff, 0xf3af, 0x8002, T2, WFE),
|
||||
|
@ -3855,7 +3855,7 @@ void ARMv7_instrs::VHADDSUB(ARMv7Context& context, const ARMv7Code code, const A
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD1_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VLD__MS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
@ -3882,15 +3882,6 @@ void ARMv7_instrs::VLD1_SAL(ARMv7Context& context, const ARMv7Code code, const A
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD2_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD2_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -3909,15 +3900,6 @@ void ARMv7_instrs::VLD2_SAL(ARMv7Context& context, const ARMv7Code code, const A
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD3_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD3_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -3936,15 +3918,6 @@ void ARMv7_instrs::VLD3_SAL(ARMv7Context& context, const ARMv7Code code, const A
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD4_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VLD4_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -4008,7 +3981,7 @@ void ARMv7_instrs::VML__(ARMv7Context& context, const ARMv7Code code, const ARMv
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VML_FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VML__FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
@ -4071,7 +4044,7 @@ void ARMv7_instrs::VMOV_RF(ARMv7Context& context, const ARMv7Code code, const AR
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VMOV_RF2(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VMOV_2RF(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
@ -4080,7 +4053,7 @@ void ARMv7_instrs::VMOV_RF2(ARMv7Context& context, const ARMv7Code code, const A
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VMOV_RD(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VMOV_2RD(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
@ -4188,15 +4161,6 @@ void ARMv7_instrs::VNM__(ARMv7Context& context, const ARMv7Code code, const ARMv
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VORN_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VORN_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -4611,7 +4575,7 @@ void ARMv7_instrs::VSRI(ARMv7Context& context, const ARMv7Code code, const ARMv7
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST1_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VST__MS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
@ -4629,15 +4593,6 @@ void ARMv7_instrs::VST1_SL(ARMv7Context& context, const ARMv7Code code, const AR
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST2_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST2_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -4647,15 +4602,6 @@ void ARMv7_instrs::VST2_SL(ARMv7Context& context, const ARMv7Code code, const AR
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST3_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST3_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -4665,15 +4611,6 @@ void ARMv7_instrs::VST3_SL(ARMv7Context& context, const ARMv7Code code, const AR
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST4_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VST4_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
@ -4746,16 +4683,7 @@ void ARMv7_instrs::VSWP(ARMv7Context& context, const ARMv7Code code, const ARMv7
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VTBL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case A1: throw __FUNCTION__;
|
||||
default: throw __FUNCTION__;
|
||||
}
|
||||
}
|
||||
|
||||
void ARMv7_instrs::VTBX(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
void ARMv7_instrs::VTB_(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
|
@ -414,16 +414,13 @@ namespace ARMv7_instrs
|
||||
void VEOR(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VEXT(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VHADDSUB(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD1_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD__MS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD1_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD1_SAL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD2_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD2_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD2_SAL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD3_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD3_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD3_SAL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD4_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD4_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLD4_SAL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VLDM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
@ -431,15 +428,15 @@ namespace ARMv7_instrs
|
||||
void VMAXMIN(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMAXMIN_FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VML__(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VML_FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VML__FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VML__S(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_RS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_SR(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_RF(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_RF2(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_RD(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_2RF(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOV_2RD(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOVL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMOVN(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VMRS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
@ -451,7 +448,6 @@ namespace ARMv7_instrs
|
||||
void VMVN_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VNEG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VNM__(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VORN_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VORN_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VORR_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VORR_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
@ -498,13 +494,10 @@ namespace ARMv7_instrs
|
||||
void VSQRT(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSRA(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSRI(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST1_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST__MS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST1_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST2_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST2_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST3_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST3_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST4_MUL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VST4_SL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSTM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSTR(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
@ -513,8 +506,7 @@ namespace ARMv7_instrs
|
||||
void VSUBHN(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSUB_(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VSWP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VTBL(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VTBX(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VTB_(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VTRN(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VTST(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
void VUZP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
|
||||
|
Loading…
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Reference in New Issue
Block a user