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More opcodes

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This commit is contained in:
Nekotekina 2015-01-22 04:58:20 +03:00
parent 07a2e0b55a
commit 4246d83f2a
3 changed files with 100 additions and 32 deletions
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98
rpcs3/Emu/ARMv7/ARMv7Decoder.cpp
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@ -583,6 +583,104 @@ const ARMv7_opcode_t ARMv7_opcode_table[] =
ARMv7_OP4(0xef80, 0x0f50, 0xef80, 0x0500, T2, VABA_),
ARMv7_OP4(0xfe80, 0x0f50, 0xf280, 0x0500, A2, VABA_),
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0700, T1, VABD_),
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0700, A1, VABD_),
ARMv7_OP4(0xef80, 0x0f50, 0xef80, 0x0700, T2, VABD_),
ARMv7_OP4(0xfe80, 0x0f50, 0xf280, 0x0700, A2, VABD_),
ARMv7_OP4(0xffa0, 0x0f10, 0xff20, 0x0d00, T1, VABD_FP),
ARMv7_OP4(0xffa0, 0x0f10, 0xf320, 0x0d00, A1, VABD_FP),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0300, T1, VABS),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0300, A1, VABS),
ARMv7_OP4(0xffbf, 0x0ed0, 0xeeb0, 0x0ac0, T2, VABS),
ARMv7_OP4(0x0fbf, 0x0ed0, 0x0eb0, 0x0ac0, A2, VABS),
ARMv7_OP4(0xff80, 0x0f10, 0xff00, 0x0e10, T1, VAC__),
ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0e10, A1, VAC__),
ARMv7_OP4(0xff80, 0x0f10, 0xef00, 0x0800, T1, VADD),
ARMv7_OP4(0xff80, 0x0f10, 0xf200, 0x0800, A1, VADD),
ARMv7_OP4(0xffa0, 0x0f10, 0xef00, 0x0d00, T1, VADD_FP),
ARMv7_OP4(0xffa0, 0x0f10, 0xf200, 0x0d00, A1, VADD_FP),
ARMv7_OP4(0xffb0, 0x0e50, 0xee30, 0x0a00, T2, VADD_FP),
ARMv7_OP4(0x0fb0, 0x0e50, 0x0e30, 0x0a00, A2, VADD_FP),
ARMv7_OP4(0xff80, 0x0f50, 0xef80, 0x0400, T1, VADDHN),
ARMv7_OP4(0xff80, 0x0f50, 0xf280, 0x0400, A1, VADDHN),
ARMv7_OP4(0xef80, 0x0e50, 0xef80, 0x0000, T1, VADD_),
ARMv7_OP4(0xfe80, 0x0e50, 0xf280, 0x0000, A1, VADD_),
ARMv7_OP4(0xffb0, 0x0f10, 0xef00, 0x0110, T1, VAND),
ARMv7_OP4(0xffb0, 0x0f10, 0xf200, 0x0110, A1, VAND),
ARMv7_OP4(0xefb8, 0x00b0, 0xef80, 0x0030, T1, VBIC_IMM),
ARMv7_OP4(0xfeb0, 0x00b0, 0xf280, 0x0030, A1, VBIC_IMM),
ARMv7_OP4(0xffb0, 0x0f10, 0xef10, 0x0110, T1, VBIC_REG),
ARMv7_OP4(0xffb0, 0x0f10, 0xf210, 0x0110, A1, VBIC_REG),
ARMv7_OP4(0xff80, 0x0f10, 0xff00, 0x0110, T1, VB__),
ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0110, A1, VB__),
ARMv7_OP4(0xff80, 0x0f10, 0xff00, 0x0810, T1, VCEQ_REG),
ARMv7_OP4(0xff80, 0x0f10, 0xf300, 0x0810, A1, VCEQ_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xef00, 0x0e00, T2, VCEQ_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xf200, 0x0e00, A2, VCEQ_REG),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0100, T1, VCEQ_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0100, A1, VCEQ_ZERO),
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0310, T1, VCGE_REG),
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0310, A1, VCGE_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xff00, 0x0e00, T2, VCGE_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xf300, 0x0e00, A2, VCGE_REG),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0080, T1, VCGE_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0080, A1, VCGE_ZERO),
ARMv7_OP4(0xef80, 0x0f10, 0xef00, 0x0300, T1, VCGT_REG),
ARMv7_OP4(0xfe80, 0x0f10, 0xf200, 0x0300, A1, VCGT_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xff20, 0x0e00, T2, VCGT_REG),
ARMv7_OP4(0xffa0, 0x0f10, 0xf320, 0x0e00, A2, VCGT_REG),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0000, T1, VCGT_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0000, A1, VCGT_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0180, T1, VCLE_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0180, A1, VCLE_ZERO),
ARMv7_OP4(0xffb3, 0x0f90, 0xffb0, 0x0400, T1, VCLS),
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b0, 0x0400, A1, VCLS),
ARMv7_OP4(0xffb3, 0x0b90, 0xffb1, 0x0200, T1, VCLT_ZERO),
ARMv7_OP4(0xffb3, 0x0b90, 0xf3b1, 0x0200, A1, VCLT_ZERO),
ARMv7_OP4(0xffb3, 0x0f90, 0xffb0, 0x0480, T1, VCLZ),
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b0, 0x0480, A1, VCLZ),
ARMv7_OP4(0xffbf, 0x0e50, 0xeeb4, 0x0a40, T1, VCMP_),
ARMv7_OP4(0x0fbf, 0x0e50, 0x0eb4, 0x0a40, A1, VCMP_),
ARMv7_OP4(0xffbf, 0x0e7f, 0xeeb5, 0x0a40, T2, VCMP_),
ARMv7_OP4(0x0fbf, 0x0e7f, 0x0eb5, 0x0a40, A2, VCMP_),
ARMv7_OP4(0xffb3, 0x0f90, 0xffb0, 0x0500, T1, VCNT),
ARMv7_OP4(0xffb3, 0x0f90, 0xf3b0, 0x0500, A1, VCNT),
ARMv7_OP4(0xffb3, 0x0e10, 0xffb3, 0x0600, T1, VCVT_FIA),
ARMv7_OP4(0xffb3, 0x0e10, 0xf3b3, 0x0600, A1, VCVT_FIA),
ARMv7_OP4(0xffb8, 0x0e50, 0xeeb8, 0x0a40, T1, VCVT_FIF),
ARMv7_OP4(0x0fb8, 0x0e50, 0x0eb8, 0x0a40, A1, VCVT_FIF),
ARMv7_OP4(0xef80, 0x0e90, 0xef80, 0x0e10, T1, VCVT_FFA),
ARMv7_OP4(0xfe80, 0x0e90, 0xf280, 0x0e10, A1, VCVT_FFA),
ARMv7_OP4(0xffba, 0x0e50, 0xeeba, 0x0a40, T1, VCVT_FFF),
ARMv7_OP4(0x0fba, 0x0e50, 0x0eba, 0x0a40, A1, VCVT_FFF),
ARMv7_OP4(0xffbf, 0x0ed0, 0xeeb7, 0x0ac0, T1, VCVT_DF),
ARMv7_OP4(0x0fbf, 0x0ed0, 0x0eb7, 0x0ac0, A1, VCVT_DF),
ARMv7_OP4(0xffb3, 0x0ed0, 0xffb2, 0x0600, T1, VCVT_HFA),
ARMv7_OP4(0xffb3, 0x0ed0, 0xf3b2, 0x0600, A1, VCVT_HFA),
ARMv7_OP4(0xffbe, 0x0f50, 0xeeb2, 0x0a40, T1, VCVT_HFF),
ARMv7_OP4(0x0fbe, 0x0f50, 0x0eb2, 0x0a40, A1, VCVT_HFF),
// TODO: vector instructions
ARMv7_OP2(0xffff, 0xbf20, T1, WFE),

29
rpcs3/Emu/ARMv7/ARMv7Interpreter.cpp
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@ -3594,16 +3594,7 @@ void ARMv7_instrs::VADD_(ARMv7Context& context, const ARMv7Code code, const ARMv
}
}
void ARMv7_instrs::VAND_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)
{
case A1: throw __FUNCTION__;
default: throw __FUNCTION__;
}
}
void ARMv7_instrs::VAND_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
void ARMv7_instrs::VAND(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)
{
@ -3693,15 +3684,6 @@ void ARMv7_instrs::VCGT_ZERO(ARMv7Context& context, const ARMv7Code code, const
}
}
void ARMv7_instrs::VCLE_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)
{
case A1: throw __FUNCTION__;
default: throw __FUNCTION__;
}
}
void ARMv7_instrs::VCLE_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)
@ -3720,15 +3702,6 @@ void ARMv7_instrs::VCLS(ARMv7Context& context, const ARMv7Code code, const ARMv7
}
}
void ARMv7_instrs::VCLT_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)
{
case A1: throw __FUNCTION__;
default: throw __FUNCTION__;
}
}
void ARMv7_instrs::VCLT_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type)
{
switch (type)

5
rpcs3/Emu/ARMv7/ARMv7Interpreter.h
View File

@ -385,8 +385,7 @@ namespace ARMv7_instrs
void VADD_FP(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VADDHN(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VADD_(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VAND_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VAND_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VAND(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VBIC_IMM(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VBIC_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VB__(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
@ -396,10 +395,8 @@ namespace ARMv7_instrs
void VCGE_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCGT_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCGT_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLE_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLE_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLS(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLT_REG(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLT_ZERO(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCLZ(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);
void VCMP_(ARMv7Context& context, const ARMv7Code code, const ARMv7_encoding type);