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rabbitizer/cplusplus/include/generated/Registers_enum_classes.hpp
Anghelo Carvajal b51b62da45
ALLEGREX support (#60) 
* setup ALLEGREX

* more setup

* clo

* fix

* Implement SPECIAL_RS and SPECIAL_SA instructions

* more table placeholders

* Implement bshfl instructions

* Rename to R4000Allegrex

* Implement SPECIAL instructions

* Add tests

* Remove some duplicated tests

* Implement SPECIAL3 instructions

* fix bug in test

* update

* Implement COPz

* Implement SPECIAL2 instructions

* Implement COP1

* Yeet cop3

* som tests

* bvf, bvfl, bvt, bvtl

* fix bshfl prefix

* need to implement the vfpu registers

* implement vt_7?

* R4000AllegrexVF -> R4000AllegrexVScalar

* Add test suite to compare with the sn toolchain decoding

* more vfpu test cases

* forgor this

* I can't decide how to name these registers

* Prepare tables for all register types

* Fix typo

* Implement vector scalar register operands

* Implement quad registers

* Fix tests?

* svl.q, svr.q

* Implement a bunch of vfpu0 instructions

* implement registers for `.t` and `.p` instructions

* Implement VFPU1 instructions

* bleh

* VFPU1, VFPU3 and `vcmp.`

* Fix wrong register type on some instructions

* start vfpu3

* Implement VFPU3 instructions

* start categorizing VFPU4

* Categorize VFPU5

* VFPU6 identification

* Identify VFPU7

* COP2 is weird

* organize COP2 a bit

* Add test cases for VFPU4 FMT

* VFPU4 FMT2 stuff

* VFPU4 FMT3 stuff

* VFPU5 stuff

* VFPU6 stuff

* VFPU7 stuff

* Implement COP2 instructions

* Implement vmov, vabs and vneg

* VPFU4 FMT0 FMT0 FMT0 implemented

* VFPU FMT0 FMT0 FMT2

* vnrcp, vnsin, vrexp2

* vrnds, vrndi, vrndf1, vrndf2

* Change tests a bit

* vf2h, vh2f, vsbz, vlgb

* vuc2ifs, vc2i, vus2i, vs2i, vi2uc, vi2c, vi2us, vi2s

* vsrt1, vsrt2, vbfy1, vbfy2, vocp, vsocp, vfad, vavg

* vsrt3, vsrt4, vsgn

* vmfvc and vmtvc placeholders

* vt4444, vt5551, vt5650

* vcst placeholder

* vf2in

* vf2iz

* vf2iu, vf2id, vi2f

* vcmovt, vcmovf

* vwbn.s, viim.s, vfim.s

* vpfxs, vpfxt, vpfxd, vnop, vsync, vflush

* vmmov, vmidt, vmzero, vmone

* vrot

* vmmul, vhtfm2, vtfm2, vhtfm3, vtfm3, vhtfm4, vtfm4, vmscl, vcrsp, vqmul

* Implement matrix operands

* fix matrix operands

* Fix `illegal` tests

* hack out a way to check the test cases are assemblable

* test-fixing: branches

* fix more test cases

* fix vmfvc and vmtvc

* more test fixing

* vdiv and fix operand R323

* more test fixing

* Fix matrix operands

* implement vcmp comparisons

* fix vsync2

* vsqrt and vrndf1 fixes

* Implement "constant" operand for `vcst`

* Add missing operand of vf2in, vf2iz, vf2iu, vf2id, vi2f

* Add missing vcmovt and vcmovf operands

* Add missing vwbn operand

* Tests cases for vmmul

* Fix vtfm2

* Implement "transpose matrix register"

* Add placeholders for the remaining missing operands

* Implement viim operand

* Implement vrot code operand

* placeholders for rp and wp operands

* test cases for vpfxs, vpfxt and vpfxd

* Properly implement rpx, rpy, rpz and rpw

* Properly implement wpx, wpy, wpz and wpw operands

* Implement vfim

* changelog

* readme

* some cleanup

* Restructure some tables

* more table restructure

* fix tests

* more table yeeting

* more cleanup

* more cleanup

* reanming

* moar

* fmt
2024-04-22 13:15:58 -04:00

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/* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */
/* SPDX-License-Identifier: MIT */
/* Automatically generated. DO NOT MODIFY */
#ifndef Registers_enum_classes_hpp_automatic
#define Registers_enum_classes_hpp_automatic
namespace Cpu {
enum class GprO32 {
GPR_O32_zero,
GPR_O32_at,
GPR_O32_v0,
GPR_O32_v1,
GPR_O32_a0,
GPR_O32_a1,
GPR_O32_a2,
GPR_O32_a3,
GPR_O32_t0,
GPR_O32_t1,
GPR_O32_t2,
GPR_O32_t3,
GPR_O32_t4,
GPR_O32_t5,
GPR_O32_t6,
GPR_O32_t7,
GPR_O32_s0,
GPR_O32_s1,
GPR_O32_s2,
GPR_O32_s3,
GPR_O32_s4,
GPR_O32_s5,
GPR_O32_s6,
GPR_O32_s7,
GPR_O32_t8,
GPR_O32_t9,
GPR_O32_k0,
GPR_O32_k1,
GPR_O32_gp,
GPR_O32_sp,
GPR_O32_fp,
GPR_O32_ra,
};
enum class GprN32 {
GPR_N32_zero,
GPR_N32_at,
GPR_N32_v0,
GPR_N32_v1,
GPR_N32_a0,
GPR_N32_a1,
GPR_N32_a2,
GPR_N32_a3,
GPR_N32_a4,
GPR_N32_a5,
GPR_N32_a6,
GPR_N32_a7,
GPR_N32_t0,
GPR_N32_t1,
GPR_N32_t2,
GPR_N32_t3,
GPR_N32_s0,
GPR_N32_s1,
GPR_N32_s2,
GPR_N32_s3,
GPR_N32_s4,
GPR_N32_s5,
GPR_N32_s6,
GPR_N32_s7,
GPR_N32_t8,
GPR_N32_t9,
GPR_N32_k0,
GPR_N32_k1,
GPR_N32_gp,
GPR_N32_sp,
GPR_N32_fp,
GPR_N32_ra,
};
enum class Cop0 {
COP0_Index,
COP0_Random,
COP0_EntryLo0,
COP0_EntryLo1,
COP0_Context,
COP0_PageMask,
COP0_Wired,
COP0_Reserved07,
COP0_BadVaddr,
COP0_Count,
COP0_EntryHi,
COP0_Compare,
COP0_Status,
COP0_Cause,
COP0_EPC,
COP0_PRevID,
COP0_Config,
COP0_LLAddr,
COP0_WatchLo,
COP0_WatchHi,
COP0_XContext,
COP0_Reserved21,
COP0_Reserved22,
COP0_Reserved23,
COP0_Reserved24,
COP0_Reserved25,
COP0_PErr,
COP0_CacheErr,
COP0_TagLo,
COP0_TagHi,
COP0_ErrorEPC,
COP0_Reserved31,
};
enum class Cop1O32 {
COP1_O32_fv0,
COP1_O32_fv0f,
COP1_O32_fv1,
COP1_O32_fv1f,
COP1_O32_ft0,
COP1_O32_ft0f,
COP1_O32_ft1,
COP1_O32_ft1f,
COP1_O32_ft2,
COP1_O32_ft2f,
COP1_O32_ft3,
COP1_O32_ft3f,
COP1_O32_fa0,
COP1_O32_fa0f,
COP1_O32_fa1,
COP1_O32_fa1f,
COP1_O32_ft4,
COP1_O32_ft4f,
COP1_O32_ft5,
COP1_O32_ft5f,
COP1_O32_fs0,
COP1_O32_fs0f,
COP1_O32_fs1,
COP1_O32_fs1f,
COP1_O32_fs2,
COP1_O32_fs2f,
COP1_O32_fs3,
COP1_O32_fs3f,
COP1_O32_fs4,
COP1_O32_fs4f,
COP1_O32_fs5,
COP1_O32_fs5f,
};
enum class Cop1N32 {
COP1_N32_fv0,
COP1_N32_ft14,
COP1_N32_fv1,
COP1_N32_ft15,
COP1_N32_ft0,
COP1_N32_ft1,
COP1_N32_ft2,
COP1_N32_ft3,
COP1_N32_ft4,
COP1_N32_ft5,
COP1_N32_ft6,
COP1_N32_ft7,
COP1_N32_fa0,
COP1_N32_fa1,
COP1_N32_fa2,
COP1_N32_fa3,
COP1_N32_fa4,
COP1_N32_fa5,
COP1_N32_fa6,
COP1_N32_fa7,
COP1_N32_fs0,
COP1_N32_ft8,
COP1_N32_fs1,
COP1_N32_ft9,
COP1_N32_fs2,
COP1_N32_ft10,
COP1_N32_fs3,
COP1_N32_ft11,
COP1_N32_fs4,
COP1_N32_ft12,
COP1_N32_fs5,
COP1_N32_ft13,
};
enum class Cop1N64 {
COP1_N64_fv0,
COP1_N64_ft12,
COP1_N64_fv1,
COP1_N64_ft13,
COP1_N64_ft0,
COP1_N64_ft1,
COP1_N64_ft2,
COP1_N64_ft3,
COP1_N64_ft4,
COP1_N64_ft5,
COP1_N64_ft6,
COP1_N64_ft7,
COP1_N64_fa0,
COP1_N64_fa1,
COP1_N64_fa2,
COP1_N64_fa3,
COP1_N64_fa4,
COP1_N64_fa5,
COP1_N64_fa6,
COP1_N64_fa7,
COP1_N64_ft8,
COP1_N64_ft9,
COP1_N64_ft10,
COP1_N64_ft11,
COP1_N64_fs0,
COP1_N64_fs1,
COP1_N64_fs2,
COP1_N64_fs3,
COP1_N64_fs4,
COP1_N64_fs5,
COP1_N64_fs6,
COP1_N64_fs7,
};
enum class Cop1Control {
COP1_CONTROL_0,
COP1_CONTROL_1,
COP1_CONTROL_2,
COP1_CONTROL_3,
COP1_CONTROL_4,
COP1_CONTROL_5,
COP1_CONTROL_6,
COP1_CONTROL_7,
COP1_CONTROL_8,
COP1_CONTROL_9,
COP1_CONTROL_10,
COP1_CONTROL_11,
COP1_CONTROL_12,
COP1_CONTROL_13,
COP1_CONTROL_14,
COP1_CONTROL_15,
COP1_CONTROL_16,
COP1_CONTROL_17,
COP1_CONTROL_18,
COP1_CONTROL_19,
COP1_CONTROL_20,
COP1_CONTROL_21,
COP1_CONTROL_22,
COP1_CONTROL_23,
COP1_CONTROL_24,
COP1_CONTROL_25,
COP1_CONTROL_26,
COP1_CONTROL_27,
COP1_CONTROL_28,
COP1_CONTROL_29,
COP1_CONTROL_30,
COP1_CONTROL_FpcCsr,
};
enum class Cop2 {
COP2_0,
COP2_1,
COP2_2,
COP2_3,
COP2_4,
COP2_5,
COP2_6,
COP2_7,
COP2_8,
COP2_9,
COP2_10,
COP2_11,
COP2_12,
COP2_13,
COP2_14,
COP2_15,
COP2_16,
COP2_17,
COP2_18,
COP2_19,
COP2_20,
COP2_21,
COP2_22,
COP2_23,
COP2_24,
COP2_25,
COP2_26,
COP2_27,
COP2_28,
COP2_29,
COP2_30,
COP2_31,
};
};
namespace Rsp {
enum class Gpr {
RSP_GPR_zero,
RSP_GPR_1,
RSP_GPR_2,
RSP_GPR_3,
RSP_GPR_4,
RSP_GPR_5,
RSP_GPR_6,
RSP_GPR_7,
RSP_GPR_8,
RSP_GPR_9,
RSP_GPR_10,
RSP_GPR_11,
RSP_GPR_12,
RSP_GPR_13,
RSP_GPR_14,
RSP_GPR_15,
RSP_GPR_16,
RSP_GPR_17,
RSP_GPR_18,
RSP_GPR_19,
RSP_GPR_20,
RSP_GPR_21,
RSP_GPR_22,
RSP_GPR_23,
RSP_GPR_24,
RSP_GPR_25,
RSP_GPR_26,
RSP_GPR_27,
RSP_GPR_28,
RSP_GPR_29,
RSP_GPR_30,
RSP_GPR_ra,
};
enum class Cop0 {
RSP_COP0_SP_MEM_ADDR,
RSP_COP0_SP_DRAM_ADDR,
RSP_COP0_SP_RD_LEN,
RSP_COP0_SP_WR_LEN,
RSP_COP0_SP_STATUS,
RSP_COP0_SP_DMA_FULL,
RSP_COP0_SP_DMA_BUSY,
RSP_COP0_SP_SEMAPHORE,
RSP_COP0_DPC_START,
RSP_COP0_DPC_END,
RSP_COP0_DPC_CURRENT,
RSP_COP0_DPC_STATUS,
RSP_COP0_DPC_CLOCK,
RSP_COP0_DPC_BUFBUSY,
RSP_COP0_DPC_PIPEBUSY,
RSP_COP0_DPC_TMEM,
};
enum class Cop2 {
RSP_COP2_0,
RSP_COP2_1,
RSP_COP2_2,
RSP_COP2_3,
RSP_COP2_4,
RSP_COP2_5,
RSP_COP2_6,
RSP_COP2_7,
RSP_COP2_8,
RSP_COP2_9,
RSP_COP2_10,
RSP_COP2_11,
RSP_COP2_12,
RSP_COP2_13,
RSP_COP2_14,
RSP_COP2_15,
RSP_COP2_16,
RSP_COP2_17,
RSP_COP2_18,
RSP_COP2_19,
RSP_COP2_20,
RSP_COP2_21,
RSP_COP2_22,
RSP_COP2_23,
RSP_COP2_24,
RSP_COP2_25,
RSP_COP2_26,
RSP_COP2_27,
RSP_COP2_28,
RSP_COP2_29,
RSP_COP2_30,
RSP_COP2_31,
};
enum class Cop2Control {
RSP_COP2_CONTROL_0,
RSP_COP2_CONTROL_1,
RSP_COP2_CONTROL_2,
RSP_COP2_CONTROL_3,
RSP_COP2_CONTROL_4,
RSP_COP2_CONTROL_5,
RSP_COP2_CONTROL_6,
RSP_COP2_CONTROL_7,
RSP_COP2_CONTROL_8,
RSP_COP2_CONTROL_9,
RSP_COP2_CONTROL_10,
RSP_COP2_CONTROL_11,
RSP_COP2_CONTROL_12,
RSP_COP2_CONTROL_13,
RSP_COP2_CONTROL_14,
RSP_COP2_CONTROL_15,
RSP_COP2_CONTROL_16,
RSP_COP2_CONTROL_17,
RSP_COP2_CONTROL_18,
RSP_COP2_CONTROL_19,
RSP_COP2_CONTROL_20,
RSP_COP2_CONTROL_21,
RSP_COP2_CONTROL_22,
RSP_COP2_CONTROL_23,
RSP_COP2_CONTROL_24,
RSP_COP2_CONTROL_25,
RSP_COP2_CONTROL_26,
RSP_COP2_CONTROL_27,
RSP_COP2_CONTROL_28,
RSP_COP2_CONTROL_29,
RSP_COP2_CONTROL_30,
RSP_COP2_CONTROL_31,
};
enum class Vector {
RSP_VECTOR_v0,
RSP_VECTOR_v1,
RSP_VECTOR_v2,
RSP_VECTOR_v3,
RSP_VECTOR_v4,
RSP_VECTOR_v5,
RSP_VECTOR_v6,
RSP_VECTOR_v7,
RSP_VECTOR_v8,
RSP_VECTOR_v9,
RSP_VECTOR_v10,
RSP_VECTOR_v11,
RSP_VECTOR_v12,
RSP_VECTOR_v13,
RSP_VECTOR_v14,
RSP_VECTOR_v15,
RSP_VECTOR_v16,
RSP_VECTOR_v17,
RSP_VECTOR_v18,
RSP_VECTOR_v19,
RSP_VECTOR_v20,
RSP_VECTOR_v21,
RSP_VECTOR_v22,
RSP_VECTOR_v23,
RSP_VECTOR_v24,
RSP_VECTOR_v25,
RSP_VECTOR_v26,
RSP_VECTOR_v27,
RSP_VECTOR_v28,
RSP_VECTOR_v29,
RSP_VECTOR_v30,
RSP_VECTOR_v31,
};
};
namespace R4000Allegrex {
enum class S {
R4000ALLEGREX_S_S000,
R4000ALLEGREX_S_S010,
R4000ALLEGREX_S_S020,
R4000ALLEGREX_S_S030,
R4000ALLEGREX_S_S100,
R4000ALLEGREX_S_S110,
R4000ALLEGREX_S_S120,
R4000ALLEGREX_S_S130,
R4000ALLEGREX_S_S200,
R4000ALLEGREX_S_S210,
R4000ALLEGREX_S_S220,
R4000ALLEGREX_S_S230,
R4000ALLEGREX_S_S300,
R4000ALLEGREX_S_S310,
R4000ALLEGREX_S_S320,
R4000ALLEGREX_S_S330,
R4000ALLEGREX_S_S400,
R4000ALLEGREX_S_S410,
R4000ALLEGREX_S_S420,
R4000ALLEGREX_S_S430,
R4000ALLEGREX_S_S500,
R4000ALLEGREX_S_S510,
R4000ALLEGREX_S_S520,
R4000ALLEGREX_S_S530,
R4000ALLEGREX_S_S600,
R4000ALLEGREX_S_S610,
R4000ALLEGREX_S_S620,
R4000ALLEGREX_S_S630,
R4000ALLEGREX_S_S700,
R4000ALLEGREX_S_S710,
R4000ALLEGREX_S_S720,
R4000ALLEGREX_S_S730,
R4000ALLEGREX_S_S001,
R4000ALLEGREX_S_S011,
R4000ALLEGREX_S_S021,
R4000ALLEGREX_S_S031,
R4000ALLEGREX_S_S101,
R4000ALLEGREX_S_S111,
R4000ALLEGREX_S_S121,
R4000ALLEGREX_S_S131,
R4000ALLEGREX_S_S201,
R4000ALLEGREX_S_S211,
R4000ALLEGREX_S_S221,
R4000ALLEGREX_S_S231,
R4000ALLEGREX_S_S301,
R4000ALLEGREX_S_S311,
R4000ALLEGREX_S_S321,
R4000ALLEGREX_S_S331,
R4000ALLEGREX_S_S401,
R4000ALLEGREX_S_S411,
R4000ALLEGREX_S_S421,
R4000ALLEGREX_S_S431,
R4000ALLEGREX_S_S501,
R4000ALLEGREX_S_S511,
R4000ALLEGREX_S_S521,
R4000ALLEGREX_S_S531,
R4000ALLEGREX_S_S601,
R4000ALLEGREX_S_S611,
R4000ALLEGREX_S_S621,
R4000ALLEGREX_S_S631,
R4000ALLEGREX_S_S701,
R4000ALLEGREX_S_S711,
R4000ALLEGREX_S_S721,
R4000ALLEGREX_S_S731,
R4000ALLEGREX_S_S002,
R4000ALLEGREX_S_S012,
R4000ALLEGREX_S_S022,
R4000ALLEGREX_S_S032,
R4000ALLEGREX_S_S102,
R4000ALLEGREX_S_S112,
R4000ALLEGREX_S_S122,
R4000ALLEGREX_S_S132,
R4000ALLEGREX_S_S202,
R4000ALLEGREX_S_S212,
R4000ALLEGREX_S_S222,
R4000ALLEGREX_S_S232,
R4000ALLEGREX_S_S302,
R4000ALLEGREX_S_S312,
R4000ALLEGREX_S_S322,
R4000ALLEGREX_S_S332,
R4000ALLEGREX_S_S402,
R4000ALLEGREX_S_S412,
R4000ALLEGREX_S_S422,
R4000ALLEGREX_S_S432,
R4000ALLEGREX_S_S502,
R4000ALLEGREX_S_S512,
R4000ALLEGREX_S_S522,
R4000ALLEGREX_S_S532,
R4000ALLEGREX_S_S602,
R4000ALLEGREX_S_S612,
R4000ALLEGREX_S_S622,
R4000ALLEGREX_S_S632,
R4000ALLEGREX_S_S702,
R4000ALLEGREX_S_S712,
R4000ALLEGREX_S_S722,
R4000ALLEGREX_S_S732,
R4000ALLEGREX_S_S003,
R4000ALLEGREX_S_S013,
R4000ALLEGREX_S_S023,
R4000ALLEGREX_S_S033,
R4000ALLEGREX_S_S103,
R4000ALLEGREX_S_S113,
R4000ALLEGREX_S_S123,
R4000ALLEGREX_S_S133,
R4000ALLEGREX_S_S203,
R4000ALLEGREX_S_S213,
R4000ALLEGREX_S_S223,
R4000ALLEGREX_S_S233,
R4000ALLEGREX_S_S303,
R4000ALLEGREX_S_S313,
R4000ALLEGREX_S_S323,
R4000ALLEGREX_S_S333,
R4000ALLEGREX_S_S403,
R4000ALLEGREX_S_S413,
R4000ALLEGREX_S_S423,
R4000ALLEGREX_S_S433,
R4000ALLEGREX_S_S503,
R4000ALLEGREX_S_S513,
R4000ALLEGREX_S_S523,
R4000ALLEGREX_S_S533,
R4000ALLEGREX_S_S603,
R4000ALLEGREX_S_S613,
R4000ALLEGREX_S_S623,
R4000ALLEGREX_S_S633,
R4000ALLEGREX_S_S703,
R4000ALLEGREX_S_S713,
R4000ALLEGREX_S_S723,
R4000ALLEGREX_S_S733,
};
enum class V2D {
R4000ALLEGREX_V2D_C000,
R4000ALLEGREX_V2D_C010,
R4000ALLEGREX_V2D_C020,
R4000ALLEGREX_V2D_C030,
R4000ALLEGREX_V2D_C100,
R4000ALLEGREX_V2D_C110,
R4000ALLEGREX_V2D_C120,
R4000ALLEGREX_V2D_C130,
R4000ALLEGREX_V2D_C200,
R4000ALLEGREX_V2D_C210,
R4000ALLEGREX_V2D_C220,
R4000ALLEGREX_V2D_C230,
R4000ALLEGREX_V2D_C300,
R4000ALLEGREX_V2D_C310,
R4000ALLEGREX_V2D_C320,
R4000ALLEGREX_V2D_C330,
R4000ALLEGREX_V2D_C400,
R4000ALLEGREX_V2D_C410,
R4000ALLEGREX_V2D_C420,
R4000ALLEGREX_V2D_C430,
R4000ALLEGREX_V2D_C500,
R4000ALLEGREX_V2D_C510,
R4000ALLEGREX_V2D_C520,
R4000ALLEGREX_V2D_C530,
R4000ALLEGREX_V2D_C600,
R4000ALLEGREX_V2D_C610,
R4000ALLEGREX_V2D_C620,
R4000ALLEGREX_V2D_C630,
R4000ALLEGREX_V2D_C700,
R4000ALLEGREX_V2D_C710,
R4000ALLEGREX_V2D_C720,
R4000ALLEGREX_V2D_C730,
R4000ALLEGREX_V2D_R000,
R4000ALLEGREX_V2D_R001,
R4000ALLEGREX_V2D_R002,
R4000ALLEGREX_V2D_R003,
R4000ALLEGREX_V2D_R100,
R4000ALLEGREX_V2D_R101,
R4000ALLEGREX_V2D_R102,
R4000ALLEGREX_V2D_R103,
R4000ALLEGREX_V2D_R200,
R4000ALLEGREX_V2D_R201,
R4000ALLEGREX_V2D_R202,
R4000ALLEGREX_V2D_R203,
R4000ALLEGREX_V2D_R300,
R4000ALLEGREX_V2D_R301,
R4000ALLEGREX_V2D_R302,
R4000ALLEGREX_V2D_R303,
R4000ALLEGREX_V2D_R400,
R4000ALLEGREX_V2D_R401,
R4000ALLEGREX_V2D_R402,
R4000ALLEGREX_V2D_R403,
R4000ALLEGREX_V2D_R500,
R4000ALLEGREX_V2D_R501,
R4000ALLEGREX_V2D_R502,
R4000ALLEGREX_V2D_R503,
R4000ALLEGREX_V2D_R600,
R4000ALLEGREX_V2D_R601,
R4000ALLEGREX_V2D_R602,
R4000ALLEGREX_V2D_R603,
R4000ALLEGREX_V2D_R700,
R4000ALLEGREX_V2D_R701,
R4000ALLEGREX_V2D_R702,
R4000ALLEGREX_V2D_R703,
R4000ALLEGREX_V2D_C002,
R4000ALLEGREX_V2D_C012,
R4000ALLEGREX_V2D_C022,
R4000ALLEGREX_V2D_C032,
R4000ALLEGREX_V2D_C102,
R4000ALLEGREX_V2D_C112,
R4000ALLEGREX_V2D_C122,
R4000ALLEGREX_V2D_C132,
R4000ALLEGREX_V2D_C202,
R4000ALLEGREX_V2D_C212,
R4000ALLEGREX_V2D_C222,
R4000ALLEGREX_V2D_C232,
R4000ALLEGREX_V2D_C302,
R4000ALLEGREX_V2D_C312,
R4000ALLEGREX_V2D_C322,
R4000ALLEGREX_V2D_C332,
R4000ALLEGREX_V2D_C402,
R4000ALLEGREX_V2D_C412,
R4000ALLEGREX_V2D_C422,
R4000ALLEGREX_V2D_C432,
R4000ALLEGREX_V2D_C502,
R4000ALLEGREX_V2D_C512,
R4000ALLEGREX_V2D_C522,
R4000ALLEGREX_V2D_C532,
R4000ALLEGREX_V2D_C602,
R4000ALLEGREX_V2D_C612,
R4000ALLEGREX_V2D_C622,
R4000ALLEGREX_V2D_C632,
R4000ALLEGREX_V2D_C702,
R4000ALLEGREX_V2D_C712,
R4000ALLEGREX_V2D_C722,
R4000ALLEGREX_V2D_C732,
R4000ALLEGREX_V2D_R020,
R4000ALLEGREX_V2D_R021,
R4000ALLEGREX_V2D_R022,
R4000ALLEGREX_V2D_R023,
R4000ALLEGREX_V2D_R120,
R4000ALLEGREX_V2D_R121,
R4000ALLEGREX_V2D_R122,
R4000ALLEGREX_V2D_R123,
R4000ALLEGREX_V2D_R220,
R4000ALLEGREX_V2D_R221,
R4000ALLEGREX_V2D_R222,
R4000ALLEGREX_V2D_R223,
R4000ALLEGREX_V2D_R320,
R4000ALLEGREX_V2D_R321,
R4000ALLEGREX_V2D_R322,
R4000ALLEGREX_V2D_R323,
R4000ALLEGREX_V2D_R420,
R4000ALLEGREX_V2D_R421,
R4000ALLEGREX_V2D_R422,
R4000ALLEGREX_V2D_R423,
R4000ALLEGREX_V2D_R520,
R4000ALLEGREX_V2D_R521,
R4000ALLEGREX_V2D_R522,
R4000ALLEGREX_V2D_R523,
R4000ALLEGREX_V2D_R620,
R4000ALLEGREX_V2D_R621,
R4000ALLEGREX_V2D_R622,
R4000ALLEGREX_V2D_R623,
R4000ALLEGREX_V2D_R720,
R4000ALLEGREX_V2D_R721,
R4000ALLEGREX_V2D_R722,
R4000ALLEGREX_V2D_R723,
};
enum class V3D {
R4000ALLEGREX_V3D_C000,
R4000ALLEGREX_V3D_C010,
R4000ALLEGREX_V3D_C020,
R4000ALLEGREX_V3D_C030,
R4000ALLEGREX_V3D_C100,
R4000ALLEGREX_V3D_C110,
R4000ALLEGREX_V3D_C120,
R4000ALLEGREX_V3D_C130,
R4000ALLEGREX_V3D_C200,
R4000ALLEGREX_V3D_C210,
R4000ALLEGREX_V3D_C220,
R4000ALLEGREX_V3D_C230,
R4000ALLEGREX_V3D_C300,
R4000ALLEGREX_V3D_C310,
R4000ALLEGREX_V3D_C320,
R4000ALLEGREX_V3D_C330,
R4000ALLEGREX_V3D_C400,
R4000ALLEGREX_V3D_C410,
R4000ALLEGREX_V3D_C420,
R4000ALLEGREX_V3D_C430,
R4000ALLEGREX_V3D_C500,
R4000ALLEGREX_V3D_C510,
R4000ALLEGREX_V3D_C520,
R4000ALLEGREX_V3D_C530,
R4000ALLEGREX_V3D_C600,
R4000ALLEGREX_V3D_C610,
R4000ALLEGREX_V3D_C620,
R4000ALLEGREX_V3D_C630,
R4000ALLEGREX_V3D_C700,
R4000ALLEGREX_V3D_C710,
R4000ALLEGREX_V3D_C720,
R4000ALLEGREX_V3D_C730,
R4000ALLEGREX_V3D_R000,
R4000ALLEGREX_V3D_R001,
R4000ALLEGREX_V3D_R002,
R4000ALLEGREX_V3D_R003,
R4000ALLEGREX_V3D_R100,
R4000ALLEGREX_V3D_R101,
R4000ALLEGREX_V3D_R102,
R4000ALLEGREX_V3D_R103,
R4000ALLEGREX_V3D_R200,
R4000ALLEGREX_V3D_R201,
R4000ALLEGREX_V3D_R202,
R4000ALLEGREX_V3D_R203,
R4000ALLEGREX_V3D_R300,
R4000ALLEGREX_V3D_R301,
R4000ALLEGREX_V3D_R302,
R4000ALLEGREX_V3D_R303,
R4000ALLEGREX_V3D_R400,
R4000ALLEGREX_V3D_R401,
R4000ALLEGREX_V3D_R402,
R4000ALLEGREX_V3D_R403,
R4000ALLEGREX_V3D_R500,
R4000ALLEGREX_V3D_R501,
R4000ALLEGREX_V3D_R502,
R4000ALLEGREX_V3D_R503,
R4000ALLEGREX_V3D_R600,
R4000ALLEGREX_V3D_R601,
R4000ALLEGREX_V3D_R602,
R4000ALLEGREX_V3D_R603,
R4000ALLEGREX_V3D_R700,
R4000ALLEGREX_V3D_R701,
R4000ALLEGREX_V3D_R702,
R4000ALLEGREX_V3D_R703,
R4000ALLEGREX_V3D_C001,
R4000ALLEGREX_V3D_C011,
R4000ALLEGREX_V3D_C021,
R4000ALLEGREX_V3D_C031,
R4000ALLEGREX_V3D_C101,
R4000ALLEGREX_V3D_C111,
R4000ALLEGREX_V3D_C121,
R4000ALLEGREX_V3D_C131,
R4000ALLEGREX_V3D_C201,
R4000ALLEGREX_V3D_C211,
R4000ALLEGREX_V3D_C221,
R4000ALLEGREX_V3D_C231,
R4000ALLEGREX_V3D_C301,
R4000ALLEGREX_V3D_C311,
R4000ALLEGREX_V3D_C321,
R4000ALLEGREX_V3D_C331,
R4000ALLEGREX_V3D_C401,
R4000ALLEGREX_V3D_C411,
R4000ALLEGREX_V3D_C421,
R4000ALLEGREX_V3D_C431,
R4000ALLEGREX_V3D_C501,
R4000ALLEGREX_V3D_C511,
R4000ALLEGREX_V3D_C521,
R4000ALLEGREX_V3D_C531,
R4000ALLEGREX_V3D_C601,
R4000ALLEGREX_V3D_C611,
R4000ALLEGREX_V3D_C621,
R4000ALLEGREX_V3D_C631,
R4000ALLEGREX_V3D_C701,
R4000ALLEGREX_V3D_C711,
R4000ALLEGREX_V3D_C721,
R4000ALLEGREX_V3D_C731,
R4000ALLEGREX_V3D_R010,
R4000ALLEGREX_V3D_R011,
R4000ALLEGREX_V3D_R012,
R4000ALLEGREX_V3D_R013,
R4000ALLEGREX_V3D_R110,
R4000ALLEGREX_V3D_R111,
R4000ALLEGREX_V3D_R112,
R4000ALLEGREX_V3D_R113,
R4000ALLEGREX_V3D_R210,
R4000ALLEGREX_V3D_R211,
R4000ALLEGREX_V3D_R212,
R4000ALLEGREX_V3D_R213,
R4000ALLEGREX_V3D_R310,
R4000ALLEGREX_V3D_R311,
R4000ALLEGREX_V3D_R312,
R4000ALLEGREX_V3D_R313,
R4000ALLEGREX_V3D_R410,
R4000ALLEGREX_V3D_R411,
R4000ALLEGREX_V3D_R412,
R4000ALLEGREX_V3D_R413,
R4000ALLEGREX_V3D_R510,
R4000ALLEGREX_V3D_R511,
R4000ALLEGREX_V3D_R512,
R4000ALLEGREX_V3D_R513,
R4000ALLEGREX_V3D_R610,
R4000ALLEGREX_V3D_R611,
R4000ALLEGREX_V3D_R612,
R4000ALLEGREX_V3D_R613,
R4000ALLEGREX_V3D_R710,
R4000ALLEGREX_V3D_R711,
R4000ALLEGREX_V3D_R712,
R4000ALLEGREX_V3D_R713,
};
enum class V4D {
R4000ALLEGREX_V4D_C000,
R4000ALLEGREX_V4D_C010,
R4000ALLEGREX_V4D_C020,
R4000ALLEGREX_V4D_C030,
R4000ALLEGREX_V4D_C100,
R4000ALLEGREX_V4D_C110,
R4000ALLEGREX_V4D_C120,
R4000ALLEGREX_V4D_C130,
R4000ALLEGREX_V4D_C200,
R4000ALLEGREX_V4D_C210,
R4000ALLEGREX_V4D_C220,
R4000ALLEGREX_V4D_C230,
R4000ALLEGREX_V4D_C300,
R4000ALLEGREX_V4D_C310,
R4000ALLEGREX_V4D_C320,
R4000ALLEGREX_V4D_C330,
R4000ALLEGREX_V4D_C400,
R4000ALLEGREX_V4D_C410,
R4000ALLEGREX_V4D_C420,
R4000ALLEGREX_V4D_C430,
R4000ALLEGREX_V4D_C500,
R4000ALLEGREX_V4D_C510,
R4000ALLEGREX_V4D_C520,
R4000ALLEGREX_V4D_C530,
R4000ALLEGREX_V4D_C600,
R4000ALLEGREX_V4D_C610,
R4000ALLEGREX_V4D_C620,
R4000ALLEGREX_V4D_C630,
R4000ALLEGREX_V4D_C700,
R4000ALLEGREX_V4D_C710,
R4000ALLEGREX_V4D_C720,
R4000ALLEGREX_V4D_C730,
R4000ALLEGREX_V4D_R000,
R4000ALLEGREX_V4D_R001,
R4000ALLEGREX_V4D_R002,
R4000ALLEGREX_V4D_R003,
R4000ALLEGREX_V4D_R100,
R4000ALLEGREX_V4D_R101,
R4000ALLEGREX_V4D_R102,
R4000ALLEGREX_V4D_R103,
R4000ALLEGREX_V4D_R200,
R4000ALLEGREX_V4D_R201,
R4000ALLEGREX_V4D_R202,
R4000ALLEGREX_V4D_R203,
R4000ALLEGREX_V4D_R300,
R4000ALLEGREX_V4D_R301,
R4000ALLEGREX_V4D_R302,
R4000ALLEGREX_V4D_R303,
R4000ALLEGREX_V4D_R400,
R4000ALLEGREX_V4D_R401,
R4000ALLEGREX_V4D_R402,
R4000ALLEGREX_V4D_R403,
R4000ALLEGREX_V4D_R500,
R4000ALLEGREX_V4D_R501,
R4000ALLEGREX_V4D_R502,
R4000ALLEGREX_V4D_R503,
R4000ALLEGREX_V4D_R600,
R4000ALLEGREX_V4D_R601,
R4000ALLEGREX_V4D_R602,
R4000ALLEGREX_V4D_R603,
R4000ALLEGREX_V4D_R700,
R4000ALLEGREX_V4D_R701,
R4000ALLEGREX_V4D_R702,
R4000ALLEGREX_V4D_R703,
R4000ALLEGREX_V4D_C002,
R4000ALLEGREX_V4D_C012,
R4000ALLEGREX_V4D_C022,
R4000ALLEGREX_V4D_C032,
R4000ALLEGREX_V4D_C102,
R4000ALLEGREX_V4D_C112,
R4000ALLEGREX_V4D_C122,
R4000ALLEGREX_V4D_C132,
R4000ALLEGREX_V4D_C202,
R4000ALLEGREX_V4D_C212,
R4000ALLEGREX_V4D_C222,
R4000ALLEGREX_V4D_C232,
R4000ALLEGREX_V4D_C302,
R4000ALLEGREX_V4D_C312,
R4000ALLEGREX_V4D_C322,
R4000ALLEGREX_V4D_C332,
R4000ALLEGREX_V4D_C402,
R4000ALLEGREX_V4D_C412,
R4000ALLEGREX_V4D_C422,
R4000ALLEGREX_V4D_C432,
R4000ALLEGREX_V4D_C502,
R4000ALLEGREX_V4D_C512,
R4000ALLEGREX_V4D_C522,
R4000ALLEGREX_V4D_C532,
R4000ALLEGREX_V4D_C602,
R4000ALLEGREX_V4D_C612,
R4000ALLEGREX_V4D_C622,
R4000ALLEGREX_V4D_C632,
R4000ALLEGREX_V4D_C702,
R4000ALLEGREX_V4D_C712,
R4000ALLEGREX_V4D_C722,
R4000ALLEGREX_V4D_C732,
R4000ALLEGREX_V4D_R020,
R4000ALLEGREX_V4D_R021,
R4000ALLEGREX_V4D_R022,
R4000ALLEGREX_V4D_R023,
R4000ALLEGREX_V4D_R120,
R4000ALLEGREX_V4D_R121,
R4000ALLEGREX_V4D_R122,
R4000ALLEGREX_V4D_R123,
R4000ALLEGREX_V4D_R220,
R4000ALLEGREX_V4D_R221,
R4000ALLEGREX_V4D_R222,
R4000ALLEGREX_V4D_R223,
R4000ALLEGREX_V4D_R320,
R4000ALLEGREX_V4D_R321,
R4000ALLEGREX_V4D_R322,
R4000ALLEGREX_V4D_R323,
R4000ALLEGREX_V4D_R420,
R4000ALLEGREX_V4D_R421,
R4000ALLEGREX_V4D_R422,
R4000ALLEGREX_V4D_R423,
R4000ALLEGREX_V4D_R520,
R4000ALLEGREX_V4D_R521,
R4000ALLEGREX_V4D_R522,
R4000ALLEGREX_V4D_R523,
R4000ALLEGREX_V4D_R620,
R4000ALLEGREX_V4D_R621,
R4000ALLEGREX_V4D_R622,
R4000ALLEGREX_V4D_R623,
R4000ALLEGREX_V4D_R720,
R4000ALLEGREX_V4D_R721,
R4000ALLEGREX_V4D_R722,
R4000ALLEGREX_V4D_R723,
};
enum class M2x2 {
R4000ALLEGREX_M2X2_M000,
R4000ALLEGREX_M2X2_M010,
R4000ALLEGREX_M2X2_M020,
R4000ALLEGREX_M2X2_M030,
R4000ALLEGREX_M2X2_M100,
R4000ALLEGREX_M2X2_M110,
R4000ALLEGREX_M2X2_M120,
R4000ALLEGREX_M2X2_M130,
R4000ALLEGREX_M2X2_M200,
R4000ALLEGREX_M2X2_M210,
R4000ALLEGREX_M2X2_M220,
R4000ALLEGREX_M2X2_M230,
R4000ALLEGREX_M2X2_M300,
R4000ALLEGREX_M2X2_M310,
R4000ALLEGREX_M2X2_M320,
R4000ALLEGREX_M2X2_M330,
R4000ALLEGREX_M2X2_M400,
R4000ALLEGREX_M2X2_M410,
R4000ALLEGREX_M2X2_M420,
R4000ALLEGREX_M2X2_M430,
R4000ALLEGREX_M2X2_M500,
R4000ALLEGREX_M2X2_M510,
R4000ALLEGREX_M2X2_M520,
R4000ALLEGREX_M2X2_M530,
R4000ALLEGREX_M2X2_M600,
R4000ALLEGREX_M2X2_M610,
R4000ALLEGREX_M2X2_M620,
R4000ALLEGREX_M2X2_M630,
R4000ALLEGREX_M2X2_M700,
R4000ALLEGREX_M2X2_M710,
R4000ALLEGREX_M2X2_M720,
R4000ALLEGREX_M2X2_M730,
R4000ALLEGREX_M2X2_E000,
R4000ALLEGREX_M2X2_E001,
R4000ALLEGREX_M2X2_E002,
R4000ALLEGREX_M2X2_E003,
R4000ALLEGREX_M2X2_E100,
R4000ALLEGREX_M2X2_E101,
R4000ALLEGREX_M2X2_E102,
R4000ALLEGREX_M2X2_E103,
R4000ALLEGREX_M2X2_E200,
R4000ALLEGREX_M2X2_E201,
R4000ALLEGREX_M2X2_E202,
R4000ALLEGREX_M2X2_E203,
R4000ALLEGREX_M2X2_E300,
R4000ALLEGREX_M2X2_E301,
R4000ALLEGREX_M2X2_E302,
R4000ALLEGREX_M2X2_E303,
R4000ALLEGREX_M2X2_E400,
R4000ALLEGREX_M2X2_E401,
R4000ALLEGREX_M2X2_E402,
R4000ALLEGREX_M2X2_E403,
R4000ALLEGREX_M2X2_E500,
R4000ALLEGREX_M2X2_E501,
R4000ALLEGREX_M2X2_E502,
R4000ALLEGREX_M2X2_E503,
R4000ALLEGREX_M2X2_E600,
R4000ALLEGREX_M2X2_E601,
R4000ALLEGREX_M2X2_E602,
R4000ALLEGREX_M2X2_E603,
R4000ALLEGREX_M2X2_E700,
R4000ALLEGREX_M2X2_E701,
R4000ALLEGREX_M2X2_E702,
R4000ALLEGREX_M2X2_E703,
R4000ALLEGREX_M2X2_M002,
R4000ALLEGREX_M2X2_M012,
R4000ALLEGREX_M2X2_M022,
R4000ALLEGREX_M2X2_M032,
R4000ALLEGREX_M2X2_M102,
R4000ALLEGREX_M2X2_M112,
R4000ALLEGREX_M2X2_M122,
R4000ALLEGREX_M2X2_M132,
R4000ALLEGREX_M2X2_M202,
R4000ALLEGREX_M2X2_M212,
R4000ALLEGREX_M2X2_M222,
R4000ALLEGREX_M2X2_M232,
R4000ALLEGREX_M2X2_M302,
R4000ALLEGREX_M2X2_M312,
R4000ALLEGREX_M2X2_M322,
R4000ALLEGREX_M2X2_M332,
R4000ALLEGREX_M2X2_M402,
R4000ALLEGREX_M2X2_M412,
R4000ALLEGREX_M2X2_M422,
R4000ALLEGREX_M2X2_M432,
R4000ALLEGREX_M2X2_M502,
R4000ALLEGREX_M2X2_M512,
R4000ALLEGREX_M2X2_M522,
R4000ALLEGREX_M2X2_M532,
R4000ALLEGREX_M2X2_M602,
R4000ALLEGREX_M2X2_M612,
R4000ALLEGREX_M2X2_M622,
R4000ALLEGREX_M2X2_M632,
R4000ALLEGREX_M2X2_M702,
R4000ALLEGREX_M2X2_M712,
R4000ALLEGREX_M2X2_M722,
R4000ALLEGREX_M2X2_M732,
R4000ALLEGREX_M2X2_E020,
R4000ALLEGREX_M2X2_E021,
R4000ALLEGREX_M2X2_E022,
R4000ALLEGREX_M2X2_E023,
R4000ALLEGREX_M2X2_E120,
R4000ALLEGREX_M2X2_E121,
R4000ALLEGREX_M2X2_E122,
R4000ALLEGREX_M2X2_E123,
R4000ALLEGREX_M2X2_E220,
R4000ALLEGREX_M2X2_E221,
R4000ALLEGREX_M2X2_E222,
R4000ALLEGREX_M2X2_E223,
R4000ALLEGREX_M2X2_E320,
R4000ALLEGREX_M2X2_E321,
R4000ALLEGREX_M2X2_E322,
R4000ALLEGREX_M2X2_E323,
R4000ALLEGREX_M2X2_E420,
R4000ALLEGREX_M2X2_E421,
R4000ALLEGREX_M2X2_E422,
R4000ALLEGREX_M2X2_E423,
R4000ALLEGREX_M2X2_E520,
R4000ALLEGREX_M2X2_E521,
R4000ALLEGREX_M2X2_E522,
R4000ALLEGREX_M2X2_E523,
R4000ALLEGREX_M2X2_E620,
R4000ALLEGREX_M2X2_E621,
R4000ALLEGREX_M2X2_E622,
R4000ALLEGREX_M2X2_E623,
R4000ALLEGREX_M2X2_E720,
R4000ALLEGREX_M2X2_E721,
R4000ALLEGREX_M2X2_E722,
R4000ALLEGREX_M2X2_E723,
};
enum class M3x3 {
R4000ALLEGREX_M3X3_M000,
R4000ALLEGREX_M3X3_M010,
R4000ALLEGREX_M3X3_M020,
R4000ALLEGREX_M3X3_M030,
R4000ALLEGREX_M3X3_M100,
R4000ALLEGREX_M3X3_M110,
R4000ALLEGREX_M3X3_M120,
R4000ALLEGREX_M3X3_M130,
R4000ALLEGREX_M3X3_M200,
R4000ALLEGREX_M3X3_M210,
R4000ALLEGREX_M3X3_M220,
R4000ALLEGREX_M3X3_M230,
R4000ALLEGREX_M3X3_M300,
R4000ALLEGREX_M3X3_M310,
R4000ALLEGREX_M3X3_M320,
R4000ALLEGREX_M3X3_M330,
R4000ALLEGREX_M3X3_M400,
R4000ALLEGREX_M3X3_M410,
R4000ALLEGREX_M3X3_M420,
R4000ALLEGREX_M3X3_M430,
R4000ALLEGREX_M3X3_M500,
R4000ALLEGREX_M3X3_M510,
R4000ALLEGREX_M3X3_M520,
R4000ALLEGREX_M3X3_M530,
R4000ALLEGREX_M3X3_M600,
R4000ALLEGREX_M3X3_M610,
R4000ALLEGREX_M3X3_M620,
R4000ALLEGREX_M3X3_M630,
R4000ALLEGREX_M3X3_M700,
R4000ALLEGREX_M3X3_M710,
R4000ALLEGREX_M3X3_M720,
R4000ALLEGREX_M3X3_M730,
R4000ALLEGREX_M3X3_E000,
R4000ALLEGREX_M3X3_E001,
R4000ALLEGREX_M3X3_E002,
R4000ALLEGREX_M3X3_E003,
R4000ALLEGREX_M3X3_E100,
R4000ALLEGREX_M3X3_E101,
R4000ALLEGREX_M3X3_E102,
R4000ALLEGREX_M3X3_E103,
R4000ALLEGREX_M3X3_E200,
R4000ALLEGREX_M3X3_E201,
R4000ALLEGREX_M3X3_E202,
R4000ALLEGREX_M3X3_E203,
R4000ALLEGREX_M3X3_E300,
R4000ALLEGREX_M3X3_E301,
R4000ALLEGREX_M3X3_E302,
R4000ALLEGREX_M3X3_E303,
R4000ALLEGREX_M3X3_E400,
R4000ALLEGREX_M3X3_E401,
R4000ALLEGREX_M3X3_E402,
R4000ALLEGREX_M3X3_E403,
R4000ALLEGREX_M3X3_E500,
R4000ALLEGREX_M3X3_E501,
R4000ALLEGREX_M3X3_E502,
R4000ALLEGREX_M3X3_E503,
R4000ALLEGREX_M3X3_E600,
R4000ALLEGREX_M3X3_E601,
R4000ALLEGREX_M3X3_E602,
R4000ALLEGREX_M3X3_E603,
R4000ALLEGREX_M3X3_E700,
R4000ALLEGREX_M3X3_E701,
R4000ALLEGREX_M3X3_E702,
R4000ALLEGREX_M3X3_E703,
R4000ALLEGREX_M3X3_M001,
R4000ALLEGREX_M3X3_M011,
R4000ALLEGREX_M3X3_M021,
R4000ALLEGREX_M3X3_M031,
R4000ALLEGREX_M3X3_M101,
R4000ALLEGREX_M3X3_M111,
R4000ALLEGREX_M3X3_M121,
R4000ALLEGREX_M3X3_M131,
R4000ALLEGREX_M3X3_M201,
R4000ALLEGREX_M3X3_M211,
R4000ALLEGREX_M3X3_M221,
R4000ALLEGREX_M3X3_M231,
R4000ALLEGREX_M3X3_M301,
R4000ALLEGREX_M3X3_M311,
R4000ALLEGREX_M3X3_M321,
R4000ALLEGREX_M3X3_M331,
R4000ALLEGREX_M3X3_M401,
R4000ALLEGREX_M3X3_M411,
R4000ALLEGREX_M3X3_M421,
R4000ALLEGREX_M3X3_M431,
R4000ALLEGREX_M3X3_M501,
R4000ALLEGREX_M3X3_M511,
R4000ALLEGREX_M3X3_M521,
R4000ALLEGREX_M3X3_M531,
R4000ALLEGREX_M3X3_M601,
R4000ALLEGREX_M3X3_M611,
R4000ALLEGREX_M3X3_M621,
R4000ALLEGREX_M3X3_M631,
R4000ALLEGREX_M3X3_M701,
R4000ALLEGREX_M3X3_M711,
R4000ALLEGREX_M3X3_M721,
R4000ALLEGREX_M3X3_M731,
R4000ALLEGREX_M3X3_E010,
R4000ALLEGREX_M3X3_E011,
R4000ALLEGREX_M3X3_E012,
R4000ALLEGREX_M3X3_E013,
R4000ALLEGREX_M3X3_E110,
R4000ALLEGREX_M3X3_E111,
R4000ALLEGREX_M3X3_E112,
R4000ALLEGREX_M3X3_E113,
R4000ALLEGREX_M3X3_E210,
R4000ALLEGREX_M3X3_E211,
R4000ALLEGREX_M3X3_E212,
R4000ALLEGREX_M3X3_E213,
R4000ALLEGREX_M3X3_E310,
R4000ALLEGREX_M3X3_E311,
R4000ALLEGREX_M3X3_E312,
R4000ALLEGREX_M3X3_E313,
R4000ALLEGREX_M3X3_E410,
R4000ALLEGREX_M3X3_E411,
R4000ALLEGREX_M3X3_E412,
R4000ALLEGREX_M3X3_E413,
R4000ALLEGREX_M3X3_E510,
R4000ALLEGREX_M3X3_E511,
R4000ALLEGREX_M3X3_E512,
R4000ALLEGREX_M3X3_E513,
R4000ALLEGREX_M3X3_E610,
R4000ALLEGREX_M3X3_E611,
R4000ALLEGREX_M3X3_E612,
R4000ALLEGREX_M3X3_E613,
R4000ALLEGREX_M3X3_E710,
R4000ALLEGREX_M3X3_E711,
R4000ALLEGREX_M3X3_E712,
R4000ALLEGREX_M3X3_E713,
};
enum class M4x4 {
R4000ALLEGREX_M4X4_M000,
R4000ALLEGREX_M4X4_M010,
R4000ALLEGREX_M4X4_M020,
R4000ALLEGREX_M4X4_M030,
R4000ALLEGREX_M4X4_M100,
R4000ALLEGREX_M4X4_M110,
R4000ALLEGREX_M4X4_M120,
R4000ALLEGREX_M4X4_M130,
R4000ALLEGREX_M4X4_M200,
R4000ALLEGREX_M4X4_M210,
R4000ALLEGREX_M4X4_M220,
R4000ALLEGREX_M4X4_M230,
R4000ALLEGREX_M4X4_M300,
R4000ALLEGREX_M4X4_M310,
R4000ALLEGREX_M4X4_M320,
R4000ALLEGREX_M4X4_M330,
R4000ALLEGREX_M4X4_M400,
R4000ALLEGREX_M4X4_M410,
R4000ALLEGREX_M4X4_M420,
R4000ALLEGREX_M4X4_M430,
R4000ALLEGREX_M4X4_M500,
R4000ALLEGREX_M4X4_M510,
R4000ALLEGREX_M4X4_M520,
R4000ALLEGREX_M4X4_M530,
R4000ALLEGREX_M4X4_M600,
R4000ALLEGREX_M4X4_M610,
R4000ALLEGREX_M4X4_M620,
R4000ALLEGREX_M4X4_M630,
R4000ALLEGREX_M4X4_M700,
R4000ALLEGREX_M4X4_M710,
R4000ALLEGREX_M4X4_M720,
R4000ALLEGREX_M4X4_M730,
R4000ALLEGREX_M4X4_E000,
R4000ALLEGREX_M4X4_E001,
R4000ALLEGREX_M4X4_E002,
R4000ALLEGREX_M4X4_E003,
R4000ALLEGREX_M4X4_E100,
R4000ALLEGREX_M4X4_E101,
R4000ALLEGREX_M4X4_E102,
R4000ALLEGREX_M4X4_E103,
R4000ALLEGREX_M4X4_E200,
R4000ALLEGREX_M4X4_E201,
R4000ALLEGREX_M4X4_E202,
R4000ALLEGREX_M4X4_E203,
R4000ALLEGREX_M4X4_E300,
R4000ALLEGREX_M4X4_E301,
R4000ALLEGREX_M4X4_E302,
R4000ALLEGREX_M4X4_E303,
R4000ALLEGREX_M4X4_E400,
R4000ALLEGREX_M4X4_E401,
R4000ALLEGREX_M4X4_E402,
R4000ALLEGREX_M4X4_E403,
R4000ALLEGREX_M4X4_E500,
R4000ALLEGREX_M4X4_E501,
R4000ALLEGREX_M4X4_E502,
R4000ALLEGREX_M4X4_E503,
R4000ALLEGREX_M4X4_E600,
R4000ALLEGREX_M4X4_E601,
R4000ALLEGREX_M4X4_E602,
R4000ALLEGREX_M4X4_E603,
R4000ALLEGREX_M4X4_E700,
R4000ALLEGREX_M4X4_E701,
R4000ALLEGREX_M4X4_E702,
R4000ALLEGREX_M4X4_E703,
R4000ALLEGREX_M4X4_M002,
R4000ALLEGREX_M4X4_M012,
R4000ALLEGREX_M4X4_M022,
R4000ALLEGREX_M4X4_M032,
R4000ALLEGREX_M4X4_M102,
R4000ALLEGREX_M4X4_M112,
R4000ALLEGREX_M4X4_M122,
R4000ALLEGREX_M4X4_M132,
R4000ALLEGREX_M4X4_M202,
R4000ALLEGREX_M4X4_M212,
R4000ALLEGREX_M4X4_M222,
R4000ALLEGREX_M4X4_M232,
R4000ALLEGREX_M4X4_M302,
R4000ALLEGREX_M4X4_M312,
R4000ALLEGREX_M4X4_M322,
R4000ALLEGREX_M4X4_M332,
R4000ALLEGREX_M4X4_M402,
R4000ALLEGREX_M4X4_M412,
R4000ALLEGREX_M4X4_M422,
R4000ALLEGREX_M4X4_M432,
R4000ALLEGREX_M4X4_M502,
R4000ALLEGREX_M4X4_M512,
R4000ALLEGREX_M4X4_M522,
R4000ALLEGREX_M4X4_M532,
R4000ALLEGREX_M4X4_M602,
R4000ALLEGREX_M4X4_M612,
R4000ALLEGREX_M4X4_M622,
R4000ALLEGREX_M4X4_M632,
R4000ALLEGREX_M4X4_M702,
R4000ALLEGREX_M4X4_M712,
R4000ALLEGREX_M4X4_M722,
R4000ALLEGREX_M4X4_M732,
R4000ALLEGREX_M4X4_E020,
R4000ALLEGREX_M4X4_E021,
R4000ALLEGREX_M4X4_E022,
R4000ALLEGREX_M4X4_E023,
R4000ALLEGREX_M4X4_E120,
R4000ALLEGREX_M4X4_E121,
R4000ALLEGREX_M4X4_E122,
R4000ALLEGREX_M4X4_E123,
R4000ALLEGREX_M4X4_E220,
R4000ALLEGREX_M4X4_E221,
R4000ALLEGREX_M4X4_E222,
R4000ALLEGREX_M4X4_E223,
R4000ALLEGREX_M4X4_E320,
R4000ALLEGREX_M4X4_E321,
R4000ALLEGREX_M4X4_E322,
R4000ALLEGREX_M4X4_E323,
R4000ALLEGREX_M4X4_E420,
R4000ALLEGREX_M4X4_E421,
R4000ALLEGREX_M4X4_E422,
R4000ALLEGREX_M4X4_E423,
R4000ALLEGREX_M4X4_E520,
R4000ALLEGREX_M4X4_E521,
R4000ALLEGREX_M4X4_E522,
R4000ALLEGREX_M4X4_E523,
R4000ALLEGREX_M4X4_E620,
R4000ALLEGREX_M4X4_E621,
R4000ALLEGREX_M4X4_E622,
R4000ALLEGREX_M4X4_E623,
R4000ALLEGREX_M4X4_E720,
R4000ALLEGREX_M4X4_E721,
R4000ALLEGREX_M4X4_E722,
R4000ALLEGREX_M4X4_E723,
};
enum class VfpuControl {
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS,
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT,
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD,
R4000ALLEGREX_VFPUCONTROL_VFPU_CC,
R4000ALLEGREX_VFPUCONTROL_VFPU_INF4,
R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5,
R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6,
R4000ALLEGREX_VFPUCONTROL_VFPU_REV,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7,
R4000ALLEGREX_VFPUCONTROL_144,
R4000ALLEGREX_VFPUCONTROL_145,
R4000ALLEGREX_VFPUCONTROL_146,
R4000ALLEGREX_VFPUCONTROL_147,
R4000ALLEGREX_VFPUCONTROL_148,
R4000ALLEGREX_VFPUCONTROL_149,
R4000ALLEGREX_VFPUCONTROL_150,
R4000ALLEGREX_VFPUCONTROL_151,
R4000ALLEGREX_VFPUCONTROL_152,
R4000ALLEGREX_VFPUCONTROL_153,
R4000ALLEGREX_VFPUCONTROL_154,
R4000ALLEGREX_VFPUCONTROL_155,
R4000ALLEGREX_VFPUCONTROL_156,
R4000ALLEGREX_VFPUCONTROL_157,
R4000ALLEGREX_VFPUCONTROL_158,
R4000ALLEGREX_VFPUCONTROL_159,
R4000ALLEGREX_VFPUCONTROL_160,
R4000ALLEGREX_VFPUCONTROL_161,
R4000ALLEGREX_VFPUCONTROL_162,
R4000ALLEGREX_VFPUCONTROL_163,
R4000ALLEGREX_VFPUCONTROL_164,
R4000ALLEGREX_VFPUCONTROL_165,
R4000ALLEGREX_VFPUCONTROL_166,
R4000ALLEGREX_VFPUCONTROL_167,
R4000ALLEGREX_VFPUCONTROL_168,
R4000ALLEGREX_VFPUCONTROL_169,
R4000ALLEGREX_VFPUCONTROL_170,
R4000ALLEGREX_VFPUCONTROL_171,
R4000ALLEGREX_VFPUCONTROL_172,
R4000ALLEGREX_VFPUCONTROL_173,
R4000ALLEGREX_VFPUCONTROL_174,
R4000ALLEGREX_VFPUCONTROL_175,
R4000ALLEGREX_VFPUCONTROL_176,
R4000ALLEGREX_VFPUCONTROL_177,
R4000ALLEGREX_VFPUCONTROL_178,
R4000ALLEGREX_VFPUCONTROL_179,
R4000ALLEGREX_VFPUCONTROL_180,
R4000ALLEGREX_VFPUCONTROL_181,
R4000ALLEGREX_VFPUCONTROL_182,
R4000ALLEGREX_VFPUCONTROL_183,
R4000ALLEGREX_VFPUCONTROL_184,
R4000ALLEGREX_VFPUCONTROL_185,
R4000ALLEGREX_VFPUCONTROL_186,
R4000ALLEGREX_VFPUCONTROL_187,
R4000ALLEGREX_VFPUCONTROL_188,
R4000ALLEGREX_VFPUCONTROL_189,
R4000ALLEGREX_VFPUCONTROL_190,
R4000ALLEGREX_VFPUCONTROL_191,
R4000ALLEGREX_VFPUCONTROL_192,
R4000ALLEGREX_VFPUCONTROL_193,
R4000ALLEGREX_VFPUCONTROL_194,
R4000ALLEGREX_VFPUCONTROL_195,
R4000ALLEGREX_VFPUCONTROL_196,
R4000ALLEGREX_VFPUCONTROL_197,
R4000ALLEGREX_VFPUCONTROL_198,
R4000ALLEGREX_VFPUCONTROL_199,
R4000ALLEGREX_VFPUCONTROL_200,
R4000ALLEGREX_VFPUCONTROL_201,
R4000ALLEGREX_VFPUCONTROL_202,
R4000ALLEGREX_VFPUCONTROL_203,
R4000ALLEGREX_VFPUCONTROL_204,
R4000ALLEGREX_VFPUCONTROL_205,
R4000ALLEGREX_VFPUCONTROL_206,
R4000ALLEGREX_VFPUCONTROL_207,
R4000ALLEGREX_VFPUCONTROL_208,
R4000ALLEGREX_VFPUCONTROL_209,
R4000ALLEGREX_VFPUCONTROL_210,
R4000ALLEGREX_VFPUCONTROL_211,
R4000ALLEGREX_VFPUCONTROL_212,
R4000ALLEGREX_VFPUCONTROL_213,
R4000ALLEGREX_VFPUCONTROL_214,
R4000ALLEGREX_VFPUCONTROL_215,
R4000ALLEGREX_VFPUCONTROL_216,
R4000ALLEGREX_VFPUCONTROL_217,
R4000ALLEGREX_VFPUCONTROL_218,
R4000ALLEGREX_VFPUCONTROL_219,
R4000ALLEGREX_VFPUCONTROL_220,
R4000ALLEGREX_VFPUCONTROL_221,
R4000ALLEGREX_VFPUCONTROL_222,
R4000ALLEGREX_VFPUCONTROL_223,
R4000ALLEGREX_VFPUCONTROL_224,
R4000ALLEGREX_VFPUCONTROL_225,
R4000ALLEGREX_VFPUCONTROL_226,
R4000ALLEGREX_VFPUCONTROL_227,
R4000ALLEGREX_VFPUCONTROL_228,
R4000ALLEGREX_VFPUCONTROL_229,
R4000ALLEGREX_VFPUCONTROL_230,
R4000ALLEGREX_VFPUCONTROL_231,
R4000ALLEGREX_VFPUCONTROL_232,
R4000ALLEGREX_VFPUCONTROL_233,
R4000ALLEGREX_VFPUCONTROL_234,
R4000ALLEGREX_VFPUCONTROL_235,
R4000ALLEGREX_VFPUCONTROL_236,
R4000ALLEGREX_VFPUCONTROL_237,
R4000ALLEGREX_VFPUCONTROL_238,
R4000ALLEGREX_VFPUCONTROL_239,
R4000ALLEGREX_VFPUCONTROL_240,
R4000ALLEGREX_VFPUCONTROL_241,
R4000ALLEGREX_VFPUCONTROL_242,
R4000ALLEGREX_VFPUCONTROL_243,
R4000ALLEGREX_VFPUCONTROL_244,
R4000ALLEGREX_VFPUCONTROL_245,
R4000ALLEGREX_VFPUCONTROL_246,
R4000ALLEGREX_VFPUCONTROL_247,
R4000ALLEGREX_VFPUCONTROL_248,
R4000ALLEGREX_VFPUCONTROL_249,
R4000ALLEGREX_VFPUCONTROL_250,
R4000ALLEGREX_VFPUCONTROL_251,
R4000ALLEGREX_VFPUCONTROL_252,
R4000ALLEGREX_VFPUCONTROL_253,
R4000ALLEGREX_VFPUCONTROL_254,
R4000ALLEGREX_VFPUCONTROL_255,
};
enum class VConstant {
R4000ALLEGREX_VCONSTANT_INVALID_0,
R4000ALLEGREX_VCONSTANT_VFPU_HUGE,
R4000ALLEGREX_VCONSTANT_VFPU_SQRT2,
R4000ALLEGREX_VCONSTANT_VFPU_SQRT1_2,
R4000ALLEGREX_VCONSTANT_VFPU_2_SQRTPI,
R4000ALLEGREX_VCONSTANT_VFPU_2_PI,
R4000ALLEGREX_VCONSTANT_VFPU_1_PI,
R4000ALLEGREX_VCONSTANT_VFPU_PI_4,
R4000ALLEGREX_VCONSTANT_VFPU_PI_2,
R4000ALLEGREX_VCONSTANT_VFPU_PI,
R4000ALLEGREX_VCONSTANT_VFPU_E,
R4000ALLEGREX_VCONSTANT_VFPU_LOG2E,
R4000ALLEGREX_VCONSTANT_VFPU_LOG10E,
R4000ALLEGREX_VCONSTANT_VFPU_LN2,
R4000ALLEGREX_VCONSTANT_VFPU_LN10,
R4000ALLEGREX_VCONSTANT_VFPU_2PI,
R4000ALLEGREX_VCONSTANT_VFPU_PI_6,
R4000ALLEGREX_VCONSTANT_VFPU_LOG10TWO,
R4000ALLEGREX_VCONSTANT_VFPU_LOG2TEN,
R4000ALLEGREX_VCONSTANT_VFPU_SQRT3_2,
R4000ALLEGREX_VCONSTANT_INVALID_20,
R4000ALLEGREX_VCONSTANT_INVALID_21,
R4000ALLEGREX_VCONSTANT_INVALID_22,
R4000ALLEGREX_VCONSTANT_INVALID_23,
R4000ALLEGREX_VCONSTANT_INVALID_24,
R4000ALLEGREX_VCONSTANT_INVALID_25,
R4000ALLEGREX_VCONSTANT_INVALID_26,
R4000ALLEGREX_VCONSTANT_INVALID_27,
R4000ALLEGREX_VCONSTANT_INVALID_28,
R4000ALLEGREX_VCONSTANT_INVALID_29,
R4000ALLEGREX_VCONSTANT_INVALID_30,
R4000ALLEGREX_VCONSTANT_INVALID_31,
};
};
namespace R5900 {
enum class VF {
R5900_VF_vf0,
R5900_VF_vf1,
R5900_VF_vf2,
R5900_VF_vf3,
R5900_VF_vf4,
R5900_VF_vf5,
R5900_VF_vf6,
R5900_VF_vf7,
R5900_VF_vf8,
R5900_VF_vf9,
R5900_VF_vf10,
R5900_VF_vf11,
R5900_VF_vf12,
R5900_VF_vf13,
R5900_VF_vf14,
R5900_VF_vf15,
R5900_VF_vf16,
R5900_VF_vf17,
R5900_VF_vf18,
R5900_VF_vf19,
R5900_VF_vf20,
R5900_VF_vf21,
R5900_VF_vf22,
R5900_VF_vf23,
R5900_VF_vf24,
R5900_VF_vf25,
R5900_VF_vf26,
R5900_VF_vf27,
R5900_VF_vf28,
R5900_VF_vf29,
R5900_VF_vf30,
R5900_VF_vf31,
};
enum class VI {
R5900_VI_vi0,
R5900_VI_vi1,
R5900_VI_vi2,
R5900_VI_vi3,
R5900_VI_vi4,
R5900_VI_vi5,
R5900_VI_vi6,
R5900_VI_vi7,
R5900_VI_vi8,
R5900_VI_vi9,
R5900_VI_vi10,
R5900_VI_vi11,
R5900_VI_vi12,
R5900_VI_vi13,
R5900_VI_vi14,
R5900_VI_vi15,
R5900_VI_vi16,
R5900_VI_vi17,
R5900_VI_vi18,
R5900_VI_vi19,
R5900_VI_vi20,
R5900_VI_vi21,
R5900_VI_vi22,
R5900_VI_vi23,
R5900_VI_vi24,
R5900_VI_vi25,
R5900_VI_vi26,
R5900_VI_vi27,
R5900_VI_vi28,
R5900_VI_vi29,
R5900_VI_vi30,
R5900_VI_vi31,
};
};
#endif
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