mirror of
https://github.com/Decompollaborate/rabbitizer.git
synced 2024-12-29 09:22:02 +00:00
136fb7a09a
* starting r5900 stuff * operands of pmaddh * expose R5900 to python * fix merge issues * move to subtables * mmi0 and mmi3 * the rest of mmi instructions * normal, special, regimm and cop0 * fpu_s * cop2 special1 * starting cop2 special2 * the rest of special2 * operands for normal, special, mmi and mmi0 * mmi1 and mmi2 * Fix mmi * sync.p * mmi3 and cop1 * add r5900 opcodes to InstrId.pyi * add invalid bits to unknown instruction comment * progress on cop2 special1 * kinda finish cop2 special1 * cop2 special2 progress * Special case for R5900 cvt.w.s -> trunc.w.s * R5900 c.olt.s and c.ole.s * Fix a bunch of VU0 instructions * I'm getting tired of this bullshit * vlqi, vsqi, vlqd, vsqd * fix some operands * fix div1 * lqc2 and sqc2 * sqrt.s and mult * fix mtsa and bc2 * Remove redundant .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN * RabbitizerInstrSuffix * Impleme instr suffix type * add instr suffix to remaining instructions * ifdef out xyzw suffix from registers * format * fix warnings * uncomment stuff on InstrId.pyi * readme
2.3 KiB
2.3 KiB
rabbitizer
A MIPS instruction decoder API.
Currently supports all the CPU instructions for MIPS I, II, III and IV.
Installing
The recommended way to install is using from the PyPi release, via pip
:
pip install rabbitizer
In case you want to mess with the latest development version without wanting to clone the repository, then you could use the following command:
pip install git+https://github.com/Decompollaborate/rabbitizer.git@develop
NOTE: Installing the development version is not recommended. Proceed at your own risk.
Features
- Should produces matching assembly.
- Fully written in C for fast decoding.
- Python bindings.
- The minimal Python version is 3.7, older versions are not guaranteed to work.
- Includes some minor tools to build your own pointer/symbol detection.
- Configurable, many features can be turned on and off.
- MIPS instructions features:
- Named registers for MIPS VR4300's coprocessors.
- Support for many pseudoinstructions.
- Properly handle move to/from coprocessor instructions.
- Support for numeric, o32, n32 and n64 ABI register names.
- Some workarounds for some specific compilers/assemblers:
SN64
:div
/divu
fix: tweaks a bit the produceddiv
,divu
andbreak
instructions.
- N64 RSP instruction decoding support.
- RSP decoding has been tested to build back to matching assemblies with armips.
- R5900 (PS2's Emotion Engine processor) decoding support.
References
- R5900:
- EmotionEngine instruction decoding: https://psi-rockin.github.io/ps2tek/#eeinstructiondecoding
- Official documentation from Toshiba: https://wiki.qemu.org/images/2/2a/C790.pdf
- VU instruction manual: http://lukasz.dk/files/vu-instruction-manual.pdf
- GNU binutils: https://github.com/bminor/binutils-gdb/blob/master/opcodes/mips-opc.c