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* Generate bindings for enums * Add .gitignore Cargo didn't automatically made * Actually build the files into the library * `pub` in `mod` to fix warning * instruction struct * Instruction rust binding * Add InstrId::ALL_MAX * link C library to rust * Publish crate CI * test * config bindings * add getters for registers * add names methods for register enums * get_operand_type * feedback from simon * Forgot to add new file to python setup.py * get_operands_slice * add stuff to cargo.toml
67 lines
3.0 KiB
Markdown
67 lines
3.0 KiB
Markdown
# rabbitizer
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[](https://pypi.org/project/rabbitizer/)
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A MIPS instruction decoder API.
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Currently supports all the CPU instructions for MIPS I, II, III and IV.
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## Installing
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The recommended way to install is using from the PyPi release, via `pip`:
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```bash
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pip install rabbitizer
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```
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In case you want to mess with the latest development version without wanting to clone the repository, then you could use the following command:
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```bash
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pip install git+https://github.com/Decompollaborate/rabbitizer.git@develop
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```
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NOTE: Installing the development version is not recommended. Proceed at your own risk.
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## Features
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- Should produces matching assembly.
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- Fully written in C for fast decoding.
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- Python bindings.
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- The minimal Python version is 3.7, older versions are not guaranteed to work.
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- C++ bindings
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- Rust bindings
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- Includes some minor tools to build your own pointer/symbol detection.
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- Configurable, many features can be turned on and off.
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- MIPS instructions features:
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- Named registers for MIPS VR4300's coprocessors.
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- Support for many pseudoinstructions.
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- Properly handle move to/from coprocessor instructions.
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- Support for numeric, o32, n32 and n64 ABI register names.
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- Some workarounds for some specific compilers/assemblers:
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- `SN64`:
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- `div`/`divu` fix: tweaks a bit the produced `div`, `divu` and `break` instructions.
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- N64 RSP instruction decoding support.
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- RSP decoding has been tested to build back to matching assemblies with [armips](https://github.com/Kingcom/armips/).
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- R5900 (PS2's Emotion Engine processor) decoding support.
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## References
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- MIPS CPU:
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- MIPS IV Instruction Set (Revision 3.2): <https://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf>
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- MIPS Calling Convention Summary: <https://courses.cs.washington.edu/courses/cse410/09sp/examples/MIPSCallingConventionsSummary.pdf>
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- mipt-mips pseudo instructions: <https://github.com/MIPT-ILab/mipt-mips/wiki/MIPS-pseudo-instructions>
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- N64's RSP (Reality Signal Processor):
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- Nintendo Ultra64 RSP Programmer’s Guide: <https://ultra64.ca/files/documentation/silicon-graphics/SGI_Nintendo_64_RSP_Programmers_Guide.pdf>
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- N64brew Reality Signal Processor/CPU Core: <https://n64brew.dev/wiki/Reality_Signal_Processor/CPU_Core>
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- R5900:
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- EmotionEngine instruction decoding: <https://psi-rockin.github.io/ps2tek/#eeinstructiondecoding>
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- Official documentation from Toshiba: <https://wiki.qemu.org/images/2/2a/C790.pdf>
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- VU instruction manual: <http://lukasz.dk/files/vu-instruction-manual.pdf>
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- GNU binutils: <https://github.com/bminor/binutils-gdb/blob/master/opcodes/mips-opc.c>
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