angie
d57c3b22b2
simplify including operand incs
2023-04-30 15:34:27 -04:00
Anghelo Carvajal
8237818ff9
Add R3000GTE instruction set support ( #31 )
...
* initial gte setup
* starting to parse gte instructions
* R3000_GTE -> R3000GTE
* decode all the non-operand instructions
* remove printfs, whoops
* decode gte with operands
* cleanups
* bindings stuffs
* RabbitizerInstrId_isValid
* fix missing include
2023-04-29 23:07:07 -04:00
angie
8a805123d4
Implement workaround for R5900's trunc.w.s issue
2023-04-16 10:05:01 -04:00
angie
eb11d93da9
Implement mfc2, mtc2, cfc2 and ctc2
2023-01-21 15:42:40 -03:00
angie
716d21f8ea
fix "emitted" typo
2022-12-26 20:24:41 -03:00
angie
027b3773fe
Expand list of instructions not emitted by C compilers
2022-12-26 19:59:23 -03:00
angie
5063702a07
modifiesF* and readsF
2022-12-20 00:42:27 -03:00
angie
2e74fc914f
outputsToGprZero
2022-12-19 19:04:26 -03:00
angie
75fe4e4fe3
use registerdescriptors
2022-12-19 18:38:05 -03:00
angie
6758468699
RegisterDescriptor
2022-12-19 17:07:32 -03:00
angie
ef2acdb328
Remove jalr_rd hack
2022-12-19 15:04:59 -03:00
Anghelo Carvajal
fb8c1edbd7
Rust bindings ( #17 )
...
* Generate bindings for enums
* Add .gitignore Cargo didn't automatically made
* Actually build the files into the library
* `pub` in `mod` to fix warning
* instruction struct
* Instruction rust binding
* Add InstrId::ALL_MAX
* link C library to rust
* Publish crate CI
* test
* config bindings
* add getters for registers
* add names methods for register enums
* get_operand_type
* feedback from simon
* Forgot to add new file to python setup.py
* get_operands_slice
* add stuff to cargo.toml
2022-12-18 15:15:39 -03:00
angie
3735d91fcc
Pregenerate every table
2022-12-16 15:37:46 -03:00
angie
61ccff4e42
Rename isJrRa to isReturn and isJrNotRa to isJumptableJump
2022-12-15 20:33:02 -03:00
angie
363aff8e5d
Fix descriptor logic errors
2022-12-15 16:55:31 -03:00
angie
32acccf873
Try to make logic check tests
2022-12-15 16:06:48 -03:00
angie
920c79d700
set .readsR* for every instruction
2022-12-14 20:53:32 -03:00
angie
77dda82424
readsR* functions
2022-12-14 18:03:13 -03:00
angie
96e2c465f6
Remove 3 non-existent RSP instructions
2022-12-14 15:22:06 -03:00
angie
6d49bb4abf
Remove signedness from access type and move it to doesUnsignedMemoryAccess
2022-10-16 17:02:50 -03:00
Angie
6fad5e740a
InstrCategory.fromStr
2022-10-14 18:49:59 -03:00
angie
5d0f9ad8f6
reads/modifies HI/LO
2022-10-14 14:58:14 -03:00
angie
71d241150f
getDestinationGpr
2022-10-14 13:55:20 -03:00
angie
7cec779b85
AccessType enum
2022-10-13 19:41:46 -03:00
angie
7dc241a036
format
2022-10-13 18:37:27 -03:00
angie
5b04520269
cleanup
2022-10-13 18:32:24 -03:00
angie
c1a6abe186
Deprecate getGenericBranchOffset, add getBranchOffsetGeneric and getBranchVramGeneric
2022-10-13 17:41:50 -03:00
angie
34f2e2e6a5
Remove getImmediate and getInstrIndex
2022-10-13 16:45:01 -03:00
angie
91f30645e8
Remove RabbitizerArchitectureVersion and deprecate RabbitizerInstrType
2022-10-13 16:12:07 -03:00
angie
faaf017aef
isJumpWithAddress
2022-10-13 14:32:36 -03:00
angie
b5f4df9c1a
Add explanations to most stuff on InstrDescriptor
2022-10-13 14:24:34 -03:00
angie
ba09c10925
format tables
2022-10-13 13:32:22 -03:00
Angie
4ebd49711b
add missing operand to trap instructions
2022-10-09 18:29:31 -03:00
Angie
874863ab77
add userdefined instructionId placeholders
2022-10-09 17:48:46 -03:00
Angie
4effc73851
add missing bal metadata
2022-10-09 16:11:04 -03:00
angie
9bf973e82d
Add extern "C" in all the headers
2022-10-04 08:31:02 -03:00
Angie
15b254bf03
Add bal support
2022-09-27 22:52:57 -03:00
Angie
69fe5ff69a
Use . + 4 + (X << 2) notation for branches when no immOverride was given
2022-09-27 22:06:28 -03:00
Angie
2c77b650a1
undo typo
2022-09-17 17:23:10 -03:00
angie
baf3ce83ee
Fix missing braces warning
2022-09-09 23:19:45 -04:00
angie
ea935b8358
refactor operand names
2022-09-09 23:13:23 -04:00
Anghelo Carvajal
136fb7a09a
Add R5900 support ( #5 )
...
* starting r5900 stuff
* operands of pmaddh
* expose R5900 to python
* fix merge issues
* move to subtables
* mmi0 and mmi3
* the rest of mmi instructions
* normal, special, regimm and cop0
* fpu_s
* cop2 special1
* starting cop2 special2
* the rest of special2
* operands for normal, special, mmi and mmi0
* mmi1 and mmi2
* Fix mmi
* sync.p
* mmi3 and cop1
* add r5900 opcodes to InstrId.pyi
* add invalid bits to unknown instruction comment
* progress on cop2 special1
* kinda finish cop2 special1
* cop2 special2 progress
* Special case for R5900 cvt.w.s -> trunc.w.s
* R5900 c.olt.s and c.ole.s
* Fix a bunch of VU0 instructions
* I'm getting tired of this bullshit
* vlqi, vsqi, vlqd, vsqd
* fix some operands
* fix div1
* lqc2 and sqc2
* sqrt.s and mult
* fix mtsa and bc2
* Remove redundant .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN
* RabbitizerInstrSuffix
* Impleme instr suffix type
* add instr suffix to remaining instructions
* ifdef out xyzw suffix from registers
* format
* fix warnings
* uncomment stuff on InstrId.pyi
* readme
2022-08-27 12:22:48 -04:00
Angie
d4cb445cc1
Add -Wpedantic to makefile
2022-08-23 15:12:55 -04:00
Angie
c9a9845a65
finish up rsp tables
2022-08-23 15:07:25 -04:00
Angie
75e129b3dd
make tables for rsp normal, special, regimm and cop0
2022-08-23 14:06:52 -04:00
Angie
5b59b2dff7
finish up cpu instructions
2022-08-23 12:31:03 -04:00
Angie
2ebb5f7712
Tables for cpu except cop1
2022-08-23 10:55:14 -04:00
Angie
5ec08f914d
Start including the case bits on the tables themselves
2022-08-23 09:32:24 -04:00
Anghelo Carvajal
f8979ede3e
Fix RSP instruction decoding ( #4 )
...
* Use the proper registers on RSP GPR instructions
* Add IMM_base operand to RSP instructions
* Use `ra` on RSP GPR registers
* Fix RABBITIZER_OPERAND_TYPE_RSP_rd
* ??
* fix vector register element index
* fix RSP mfc2 and mtc2
* fix vmov and similar instructions
* format
* update readme
* version pump
2022-08-22 16:27:51 -04:00
angie
a539a8a39d
Annotate functions with attributes
2022-07-09 19:19:53 -04:00
