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set .readsR* for every instruction

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This commit is contained in:
angie 2022-12-14 20:53:32 -03:00
parent 77dda82424
commit 920c79d700
18 changed files with 568 additions and 179 deletions
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7
include/instructions/instr_id/cpu/cpu_cop0.inc
View File

@ -25,15 +25,18 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x04, mtc0,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_cop0d},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.readsRt=true,
.notEmitedByCompilers=true
) // Move word to CP0
RABBITIZER_DEF_INSTR_ID(
cpu, 0x05, dmtc0,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_cop0d},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.readsRt=true
) // Doubleword Move To CP0
RABBITIZER_DEF_INSTR_ID(
cpu, 0x06, ctc0,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_cop0d},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.readsRt=true
) // Move control word To CP0

9
include/instructions/instr_id/cpu/cpu_cop1.inc
View File

@ -20,13 +20,15 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x04, mtc1,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_fs},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.isFloat=true
.isFloat=true,
.readsRt=true
) // Move Word to Floating-Point
RABBITIZER_DEF_INSTR_ID(
cpu, 0x05, dmtc1,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_fs},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.isFloat=true
.isFloat=true,
.readsRt=true
) // Doubleword Move To Floating-Point
// OP rt, cop1cs
@ -41,5 +43,6 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x06, ctc1,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_cop1cs},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.isFloat=true
.isFloat=true,
.readsRt=true
) // Move Control Word to Floating-Point

58
include/instructions/instr_id/cpu/cpu_normal.inc
View File

@ -23,27 +23,35 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x04, beq,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true
.isBranch=true,
.readsRs=true,
.readsRt=true
) // Branch on EQual
RABBITIZER_DEF_INSTR_ID(
cpu, 0x05, bne,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true
.isBranch=true,
.readsRs=true,
.readsRt=true
) // Branch on Not Equal
RABBITIZER_DEF_INSTR_ID(
cpu, 0x14, beql,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true,
.readsRt=true
) // Branch on EQual Likely
RABBITIZER_DEF_INSTR_ID(
cpu, 0x15, bnel,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true,
.readsRt=true
) // Branch on Not Equal Likely
// OP rs, IMM
@ -51,27 +59,31 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x06, blez,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true
.isBranch=true,
.readsRs=true
) // Branch on Less than or Equal to Zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x16, blezl,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true
) // Branch on Less than or Equal to Zero Likely
RABBITIZER_DEF_INSTR_ID(
cpu, 0x07, bgtz,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true
.isBranch=true,
.readsRs=true
) // Branch on Greater Than Zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x17, bgtzl,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true
) // Branch on Greater Than Zero Likely
// OP rt, rs, IMM
@ -80,6 +92,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.notEmitedByCompilers=true,
.canBeLo=true
) // Add Immediate
@ -88,26 +101,30 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Add Immediate Unsigned Word
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0A, slti,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // Set on Less Than Immediate
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0B, sltiu,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // Set on Less Than Immediate Unsigned
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0C, andi,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // And Immediate
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0D, ori,
@ -115,6 +132,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Or Immediate
RABBITIZER_DEF_INSTR_ID(
@ -122,13 +140,15 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // eXclusive OR Immediate
RABBITIZER_DEF_INSTR_ID(
cpu, 0x18, daddi,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Doubleword add Immediate
RABBITIZER_DEF_INSTR_ID(
@ -136,6 +156,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Doubleword add Immediate Unsigned
@ -253,6 +274,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x28, sb,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -262,6 +284,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x29, sh,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -271,6 +294,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x2A, swl,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -279,6 +303,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x2B, sw,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -288,6 +313,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x2C, sdl,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -296,6 +322,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x2D, sdr,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -304,6 +331,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x2E, swr,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -312,6 +340,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x30, ll,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.modifiesRt=true,
.canBeLo=true,
.doesDereference=true,
@ -348,6 +377,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x38, sc,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -356,6 +386,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x3C, scd,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true
@ -364,6 +395,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x3F, sd,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -473,6 +505,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, -0x04, beqz,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.isBranch=true,
.isPseudo=true
) // Branch on EQual Zero
@ -480,6 +513,7 @@ RABBITIZER_DEF_INSTR_ID(
cpu, -0x05, bnez,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.isBranch=true,
.isPseudo=true
) // Branch on Not Equal Zero

34
include/instructions/instr_id/cpu/cpu_regimm.inc
View File

@ -6,64 +6,74 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x00, bltz,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true
.isBranch=true,
.readsRs=true
) // Branch on Less Than Zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x01, bgez,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true
.isBranch=true,
.readsRs=true
) // Branch on Greater than or Equal to Zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x02, bltzl,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true
) // Branch on Less Than Zero Likely
RABBITIZER_DEF_INSTR_ID(
cpu, 0x03, bgezl,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.isBranchLikely=true
.isBranchLikely=true,
.readsRs=true
) // Branch on Greater than or Equal to Zero Likely
RABBITIZER_DEF_INSTR_ID(
cpu, 0x08, tgei,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
cpu, 0x09, tgeiu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0A, tlti,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0B, tltiu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0C, teqi,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0E, tnei,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isTrap=true
.isTrap=true,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
@ -71,6 +81,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.readsRs=true,
.doesLink=true
) // Branch on Less Than Zero and Link
RABBITIZER_DEF_INSTR_ID(
@ -78,6 +89,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.readsRs=true,
.doesLink=true
) // Branch on Greater Than or Equal to Zero and Link
RABBITIZER_DEF_INSTR_ID(
@ -86,6 +98,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.isBranchLikely=true,
.readsRs=true,
.doesLink=true
) // Branch on Less Than Zero and Link Likely
RABBITIZER_DEF_INSTR_ID(
@ -94,6 +107,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.isBranch=true,
.isBranchLikely=true,
.readsRs=true,
.doesLink=true
) // Branch on Greater Than or Equal to Zero and Link Likely

157
include/instructions/instr_id/cpu/cpu_special.inc
View File

@ -6,55 +6,64 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x00, sll,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Left Logical
RABBITIZER_DEF_INSTR_ID(
cpu, 0x02, srl,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Right Logical
RABBITIZER_DEF_INSTR_ID(
cpu, 0x03, sra,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Right Arithmetic
RABBITIZER_DEF_INSTR_ID(
cpu, 0x38, dsll,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Left Logical
RABBITIZER_DEF_INSTR_ID(
cpu, 0x3A, dsrl,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Right Logical
RABBITIZER_DEF_INSTR_ID(
cpu, 0x3B, dsra,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Right Arithmetic
RABBITIZER_DEF_INSTR_ID(
cpu, 0x3C, dsll32,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Left Logical plus 32
RABBITIZER_DEF_INSTR_ID(
cpu, 0x3E, dsrl32,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Right Logical plus 32
RABBITIZER_DEF_INSTR_ID(
cpu, 0x3F, dsra32,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Doubleword Shift Right Arithmetic plus 32
// OP rd, rt, rs
@ -62,37 +71,49 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x14, dsllv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword Shift Left Logical Variable
RABBITIZER_DEF_INSTR_ID(
cpu, 0x16, dsrlv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword Shift Right Logical Variable
RABBITIZER_DEF_INSTR_ID(
cpu, 0x17, dsrav,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword Shift Right Arithmetic Variable
RABBITIZER_DEF_INSTR_ID(
cpu, 0x04, sllv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Left Logical Variable
RABBITIZER_DEF_INSTR_ID(
cpu, 0x06, srlv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Right Logical Variable
RABBITIZER_DEF_INSTR_ID(
cpu, 0x07, srav,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Right Arithmetic Variable
// OP rs
@ -100,18 +121,21 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x11, mthi,
.operands={RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.modifiesHI=true
) // Move To HI register
RABBITIZER_DEF_INSTR_ID(
cpu, 0x13, mtlo,
.operands={RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.modifiesLO=true
) // Move To LO register
RABBITIZER_DEF_INSTR_ID(
cpu, 0x08, jr,
.operands={RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.isJump=true
) // Jump Register
RABBITIZER_DEF_INSTR_ID(
@ -120,6 +144,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_R,
.isJump=true,
.modifiesRd=true,
.readsRs=true,
.doesLink=true
) // Jump And Link Register
@ -130,6 +155,7 @@ RABBITIZER_DEF_INSTR_ID_ALTNAME(
.instrType=RABBITIZER_INSTR_TYPE_R,
.isJump=true,
.modifiesRd=true,
.readsRs=true,
.doesLink=true
) // Jump And Link Register // Special case for rd != 31
@ -154,18 +180,25 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x0A, movz,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MOVe conditional on Zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x0B, movn,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MOVe conditional on Not zero
RABBITIZER_DEF_INSTR_ID(
cpu, 0x1A, div,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.readsRd=true,
.modifiesHI=true,
.modifiesLO=true
) // DIVide word
@ -173,6 +206,9 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x1B, divu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.readsRd=true,
.modifiesHI=true,
.modifiesLO=true
) // DIVide Unsigned word
@ -181,6 +217,8 @@ RABBITIZER_DEF_INSTR_ID_ALTNAME(
cpu, -0x1A, sn64_div, div,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // DIVide word
@ -188,6 +226,8 @@ RABBITIZER_DEF_INSTR_ID_ALTNAME(
cpu, -0x1B, sn64_divu, divu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // DIVide Unsigned word
@ -196,6 +236,9 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x1E, ddiv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.readsRd=true,
.modifiesHI=true,
.modifiesLO=true
) // Doubleword DIVide
@ -203,6 +246,9 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x1F, ddivu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.readsRd=true,
.modifiesHI=true,
.modifiesLO=true
) // Doubleword DIVide Unsigned
@ -212,6 +258,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, , ddiv,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
)
@ -221,6 +269,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, , ddivu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
)
@ -231,6 +281,8 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.readsRt=true,
.notEmitedByCompilers=true
) // ADD word
RABBITIZER_DEF_INSTR_ID(
@ -238,81 +290,107 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.readsRt=true,
.maybeIsMove=true
) // ADD Unsigned word
RABBITIZER_DEF_INSTR_ID(
cpu, 0x22, sub,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Subtract word
RABBITIZER_DEF_INSTR_ID(
cpu, 0x23, subu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // SUBtract Unsigned word
RABBITIZER_DEF_INSTR_ID(
cpu, 0x24, and,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // AND
RABBITIZER_DEF_INSTR_ID(
cpu, 0x25, or,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.maybeIsMove=true
.maybeIsMove=true,
.readsRs=true,
.readsRt=true
) // OR
RABBITIZER_DEF_INSTR_ID(
cpu, 0x26, xor,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // eXclusive OR
RABBITIZER_DEF_INSTR_ID(
cpu, 0x27, nor,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Not OR
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2A, slt,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Set on Less Than
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2B, sltu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Set on Less Than Unsigned
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2C, dadd,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword Add
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2D, daddu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.readsRt=true,
.maybeIsMove=true
) // Doubleword Add Unsigned
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2E, dsub,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword SUBtract
RABBITIZER_DEF_INSTR_ID(
cpu, 0x2F, dsubu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Doubleword SUBtract Unsigned
// OP code
@ -337,6 +415,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x18, mult,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // MULTtiply word
@ -344,6 +424,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x19, multu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // MULTtiply Unsigned word
@ -351,6 +433,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x1C, dmult,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // Doubleword MULTiply
@ -358,6 +442,8 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x1D, dmultu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.modifiesHI=true,
.modifiesLO=true
) // Doubleword MULTiply Unsigned
@ -366,36 +452,48 @@ RABBITIZER_DEF_INSTR_ID(
cpu, 0x30, tge,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if Greater or Equal
RABBITIZER_DEF_INSTR_ID(
cpu, 0x31, tgeu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if Greater or Equal Unsigned
RABBITIZER_DEF_INSTR_ID(
cpu, 0x32, tlt,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if Less Than
RABBITIZER_DEF_INSTR_ID(
cpu, 0x33, tltu,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if Less Than Unsigned
RABBITIZER_DEF_INSTR_ID(
cpu, 0x34, teq,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if EQual
RABBITIZER_DEF_INSTR_ID(
cpu, 0x36, tne,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_code_lower},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.readsRt=true,
.isTrap=true
) // Trap if Not Equal
@ -416,6 +514,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.maybeIsMove=true,
.isPseudo=true
) // Move
@ -424,6 +523,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.isPseudo=true
) // Not
@ -433,5 +533,6 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.isPseudo=true
)

65
include/instructions/instr_id/r5900/r5900_mmi.inc
View File

@ -22,17 +22,22 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x00, madd,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Multiply-ADD word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x01, maddu,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Multiply-ADD Unsigned word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x04, plzcw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true
) // Parallel Leading Zero or one Count Word
RABBITIZER_DEF_INSTR_ID(
@ -42,45 +47,60 @@ RABBITIZER_DEF_INSTR_ID(
) // Move From HI1 register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x11, mthi1,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Move To HI1 register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x12, mflo1,
.operands={RAB_OPERAND_cpu_rd}
.operands={RAB_OPERAND_cpu_rd},
.readsRd=true
) // Move From LO1 register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x13, mtlo1,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Move To LO1 register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x18, mult1,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MULTiply word pipeline 1
RABBITIZER_DEF_INSTR_ID(
r5900, 0x19, multu1,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MULTiply Unsigned word pipeline 1
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1A, div1,
.operands={RAB_OPERAND_cpu_zero, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}
.operands={RAB_OPERAND_cpu_zero, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.readsRs=true,
.readsRt=true
) // DIVide word pipeline 1
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1B, divu1,
.operands={RAB_OPERAND_cpu_zero, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}
.operands={RAB_OPERAND_cpu_zero, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.readsRs=true,
.readsRt=true
) // DIVide Unsigned word pipeline 1
RABBITIZER_DEF_INSTR_ID(
r5900, 0x20, madd1,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Multiply-ADD word pipeline 1
RABBITIZER_DEF_INSTR_ID(
r5900, 0x21, maddu1,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Multiply-ADD Unsigned word pipeline 1
// TODO: check this two instruction, it is supposed to have an extra .fmt
@ -91,37 +111,44 @@ RABBITIZER_DEF_INSTR_ID(
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x31, pmthl,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Parallel Move To Hi/Lo register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x34, psllh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Left Logical Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x36, psrlh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Right Logical Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x37, psrah,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Right Arithmetic Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x3C, psllw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Left Logical Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x3E, psrlw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Right Logical Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x3F, psraw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel Shift Right Arithmetic Word

98
include/instructions/instr_id/r5900/r5900_mmi_0.inc
View File

@ -20,131 +20,179 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x00, paddw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x01, psubw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x02, pcgtw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for Greater Than Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x03, pmaxw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MAXimum Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x04, paddh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x05, psubh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x06, pcgth,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for Greater Than Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x07, pmaxh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MAXimum Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x08, paddb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x09, psubb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0A, pcgtb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for Greater Than Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x10, paddsw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD with Signed saturation Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x11, psubsw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract with Signed saturation Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x12, pextlw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Lower from Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x13, ppacw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel PACk to Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x14, paddsh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD with Signed saturation Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x15, psubsh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract with Signed saturation Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x16, pextlh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Lower from Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x17, ppach,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel PACk to Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x18, paddsb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD with Signed saturation Bytes
RABBITIZER_DEF_INSTR_ID(
r5900, 0x19, psubsb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract with Signed saturation Bytes
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1A, pextlb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Lower from Bytes
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1B, ppacb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel PACk to Bytes
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1E, pext5,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel EXTend from 5-bits
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1F, ppac5,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel PACk to 5-bits

70
include/instructions/instr_id/r5900/r5900_mmi_1.inc
View File

@ -21,95 +21,129 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x01, pabsw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel ABSolute Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x02, pceqw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for EQual Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x03, pminw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MINimum Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x04, padsbh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADd/SuBtract Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x05, pabsh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel ABSolute Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x06, pceqh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for EQual Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x07, pminh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MINimum Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0A, pceqb,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Compare for EQual Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x10, padduw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Unsigned saturation Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x11, psubuw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Unsigned saturation Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x12, pextuw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Upper from Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x14, padduh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Unsigned saturation Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x15, psubuh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Unsigned saturation Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x16, pextuh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Upper from Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x18, paddub,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel ADD Unsigned saturation Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x19, psubub,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel SUBtract Unsigned saturation Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1A, pextub,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel EXTend Upper from Byte
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1B, qfsrv,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Quadword Funnel Shift Right Variable

75
include/instructions/instr_id/r5900/r5900_mmi_2.inc
View File

@ -20,23 +20,31 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x00, pmaddw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply-ADD Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x02, psllvw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Shift Left Logical Variable Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x03, psrlvw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Shift Right Logical Variable Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x04, pmsubw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply-SUBtract Word
RABBITIZER_DEF_INSTR_ID(
@ -52,84 +60,111 @@ RABBITIZER_DEF_INSTR_ID(
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0A, pinth,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel INTerleave Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0C, pmultw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MULTiply Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0D, pdivw,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.readsRs=true,
.readsRt=true
) // Parallel DIVide Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0E, pcpyld,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel CoPY Lower Doubleword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x10, pmaddh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply-ADD Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x11, phmadh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Horizontal Multiply-ADd Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x12, pand,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel AND
RABBITIZER_DEF_INSTR_ID(
r5900, 0x13, pxor,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel eXclusive OR
RABBITIZER_DEF_INSTR_ID(
r5900, 0x14, pmsubh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply-SUBtract Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x15, phmsbh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Horizontal Multiply-Subtract Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1A, pexeh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel EXchange Even Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1B, prevh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel REVerse Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1C, pmulth,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1D, pdivbw,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel DIVide Broadcast Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1E, pexew,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel EXchange Even Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1F, prot3w,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel ROTate 3 Words left

47
include/instructions/instr_id/r5900/r5900_mmi_3.inc
View File

@ -20,67 +20,88 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x00, pmadduw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Multiply-ADD Unsigned Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x03, psravw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Shift Right Arithmetic Variable Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x08, pmthi,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Parallel Move To HI register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x09, pmtlo,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Parallel Move To LO register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0A, pinteh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel INTerleave Even Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0C, pmultuw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel MULTiply Unsigned Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0D, pdivuw,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.readsRs=true,
.readsRt=true
) // Prallel DIVide Unsigned Word
RABBITIZER_DEF_INSTR_ID(
r5900, 0x0E, pcpyud,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel CoPY Upper Doubleword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x12, por,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel OR
RABBITIZER_DEF_INSTR_ID(
r5900, 0x13, pnor,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Parallel Not OR
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1A, pexch,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel EXchange Center Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1B, pcpyh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel CoPY Halfword
RABBITIZER_DEF_INSTR_ID(
r5900, 0x1E, pexcw,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt},
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Parallel EXchange Center Word

1
include/instructions/instr_id/r5900/r5900_normal.inc
View File

@ -36,6 +36,7 @@ RABBITIZER_DEF_INSTR_ID(
r5900, 0x1F, sq,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true

6
include/instructions/instr_id/r5900/r5900_regimm.inc
View File

@ -19,10 +19,12 @@
RABBITIZER_DEF_INSTR_ID(
r5900, 0x18, mtsab,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true
)
RABBITIZER_DEF_INSTR_ID(
r5900, 0x19, mtsah,
.operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true
)

7
include/instructions/instr_id/r5900/r5900_special.inc
View File

@ -29,7 +29,9 @@ RABBITIZER_DEF_INSTR_ID(
r5900, 0x18, mult,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MULTtiply word
RABBITIZER_DEF_INSTR_ID(
@ -39,5 +41,6 @@ RABBITIZER_DEF_INSTR_ID(
) // Move From Shift Amount register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x29, mtsa,
.operands={RAB_OPERAND_cpu_rs}
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Move To Shift Amount register

1
include/instructions/instr_id/rsp/rsp_cop0.inc
View File

@ -13,5 +13,6 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x04, mtc0,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_cop0d},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.readsRt=true,
.notEmitedByCompilers=true
) // Move word to CP0

3
include/instructions/instr_id/rsp/rsp_cop2.inc
View File

@ -20,5 +20,6 @@ RABBITIZER_DEF_INSTR_ID(
)
RABBITIZER_DEF_INSTR_ID(
rsp, 0x06, ctc2,
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_rsp_cop2cd}
.operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_rsp_cop2cd},
.readsRt=true
)

26
include/instructions/instr_id/rsp/rsp_normal.inc
View File

@ -23,12 +23,16 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x04, beq,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.readsRt=true,
.isBranch=true
) // Branch on EQual
RABBITIZER_DEF_INSTR_ID(
rsp, 0x05, bne,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.readsRt=true,
.isBranch=true
) // Branch on Not Equal
@ -37,12 +41,14 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x06, blez,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on Less than or Equal to Zero
RABBITIZER_DEF_INSTR_ID(
rsp, 0x07, bgtz,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on Greater Than Zero
@ -52,6 +58,7 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.notEmitedByCompilers=true,
.canBeLo=true
) // Add Immediate
@ -60,26 +67,30 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Add Immediate Unsigned Word
RABBITIZER_DEF_INSTR_ID(
rsp, 0x0A, slti,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // Set on Less Than Immediate
RABBITIZER_DEF_INSTR_ID(
rsp, 0x0B, sltiu,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // Set on Less Than Immediate Unsigned
RABBITIZER_DEF_INSTR_ID(
rsp, 0x0C, andi,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // And Immediate
RABBITIZER_DEF_INSTR_ID(
rsp, 0x0D, ori,
@ -87,6 +98,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true,
.readsRs=true,
.canBeLo=true
) // Or Immediate
RABBITIZER_DEF_INSTR_ID(
@ -94,7 +106,8 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_immediate},
.instrType=RABBITIZER_INSTR_TYPE_I,
.isUnsigned=true,
.modifiesRt=true
.modifiesRt=true,
.readsRs=true
) // eXclusive OR Immediate
// OP rt, IMM
@ -164,6 +177,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x28, sb,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -173,6 +187,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x29, sh,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -182,6 +197,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x2B, sw,
.operands={RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_immediate_base},
.instrType=RABBITIZER_INSTR_TYPE_I,
.readsRt=true,
.canBeLo=true,
.doesDereference=true,
.doesStore=true,
@ -212,11 +228,13 @@ RABBITIZER_DEF_INSTR_ID(
rsp, -0x04, beqz,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on EQual Zero
RABBITIZER_DEF_INSTR_ID(
rsp, -0x05, bnez,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on Not Equal Zero

4
include/instructions/instr_id/rsp/rsp_regimm.inc
View File

@ -6,12 +6,14 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x00, bltz,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on Less Than Zero
RABBITIZER_DEF_INSTR_ID(
rsp, 0x01, bgez,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true
) // Branch on Greater than or Equal to Zero
@ -19,6 +21,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x10, bltzal,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true,
.doesLink=true
) // Branch on Less Than Zero and Link
@ -26,6 +29,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x11, bgezal,
.operands={RAB_OPERAND_rsp_rs, RAB_OPERAND_cpu_branch_target_label},
.instrType=RABBITIZER_INSTR_TYPE_REGIMM,
.readsRs=true,
.isBranch=true,
.doesLink=true
) // Branch on Greater Than or Equal to Zero and Link

79
include/instructions/instr_id/rsp/rsp_special.inc
View File

@ -6,19 +6,22 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x00, sll,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Left Logical
RABBITIZER_DEF_INSTR_ID(
rsp, 0x02, srl,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Right Logical
RABBITIZER_DEF_INSTR_ID(
rsp, 0x03, sra,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_cpu_sa},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRt=true
) // Shift word Right Arithmetic
// OP rd, rt, rs
@ -26,19 +29,25 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x04, sllv,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Left Logical Variable
RABBITIZER_DEF_INSTR_ID(
rsp, 0x06, srlv,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Right Logical Variable
RABBITIZER_DEF_INSTR_ID(
rsp, 0x07, srav,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt, RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Shift word Right Arithmetic Variable
// OP rs
@ -46,6 +55,7 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x08, jr,
.operands={RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.readsRs=true,
.isJump=true
) // Jump Register
RABBITIZER_DEF_INSTR_ID(
@ -54,6 +64,7 @@ RABBITIZER_DEF_INSTR_ID(
.instrType=RABBITIZER_INSTR_TYPE_R,
.isJump=true,
.modifiesRd=true,
.readsRs=true,
.doesLink=true
) // Jump And Link Register
@ -64,6 +75,7 @@ RABBITIZER_DEF_INSTR_ID_ALTNAME(
.instrType=RABBITIZER_INSTR_TYPE_R,
.isJump=true,
.modifiesRd=true,
.readsRs=true,
.doesLink=true
) // Jump And Link Register // Special case for rd != 31
@ -72,13 +84,17 @@ RABBITIZER_DEF_INSTR_ID(
rsp, 0x0A, movz,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MOVe conditional on Zero
RABBITIZER_DEF_INSTR_ID(
rsp, 0x0B, movn,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // MOVe conditional on Not zero
RABBITIZER_DEF_INSTR_ID(
@ -86,61 +102,81 @@ RABBITIZER_DEF_INSTR_ID(
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true,
.readsRs=true,
.readsRt=true,
.notEmitedByCompilers=true
) // ADD word
RABBITIZER_DEF_INSTR_ID(
rsp, 0x21, addu,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // ADD Unsigned word
RABBITIZER_DEF_INSTR_ID(
rsp, 0x22, sub,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Subtract word
RABBITIZER_DEF_INSTR_ID(
rsp, 0x23, subu,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // SUBtract Unsigned word
RABBITIZER_DEF_INSTR_ID(
rsp, 0x24, and,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // AND
RABBITIZER_DEF_INSTR_ID(
rsp, 0x25, or,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // OR
RABBITIZER_DEF_INSTR_ID(
rsp, 0x26, xor,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // eXclusive OR
RABBITIZER_DEF_INSTR_ID(
rsp, 0x27, nor,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Not OR
RABBITIZER_DEF_INSTR_ID(
rsp, 0x2A, slt,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Set on Less Than
RABBITIZER_DEF_INSTR_ID(
rsp, 0x2B, sltu,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true,
.readsRt=true
) // Set on Less Than Unsigned
// OP code
@ -164,13 +200,15 @@ RABBITIZER_DEF_INSTR_ID(
rsp, -0x25, move,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true
) // Move
RABBITIZER_DEF_INSTR_ID(
rsp, -0x27, not,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rs},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true
) // Not
// OP rd, rt
@ -178,5 +216,6 @@ RABBITIZER_DEF_INSTR_ID(
rsp, -0x23, negu,
.operands={RAB_OPERAND_rsp_rd, RAB_OPERAND_rsp_rt},
.instrType=RABBITIZER_INSTR_TYPE_R,
.modifiesRd=true
.modifiesRd=true,
.readsRs=true
)