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mirror of https://github.com/CTCaer/hekate.git synced 2024-12-27 12:16:43 +00:00
hekate/bdk/mem
CTCaer df80339060 mc: Simplify clock enable/reset
Additionally utilize the redirect flag.
2020-12-27 12:50:20 +02:00
..
emc.h sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
heap.c Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
heap.h Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
mc_t210.h sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
mc.c mc: Simplify clock enable/reset 2020-12-27 12:50:20 +02:00
mc.h Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
minerva.c fuse: Move more parsing into its specific object 2020-12-26 16:34:12 +02:00
minerva.h Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
mtc_table.h Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
sdram_config_lz.inl Introducing Bootloader Development Kit (BDK) 2020-06-14 15:25:21 +03:00
sdram_config_t210b01.inl sdram: Correct some dram names 2020-12-02 22:26:06 +02:00
sdram_config.inl sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
sdram_lp0_param_t210.h sc7: Add T210B01 SC7/LP0 (deep sleep) support 2020-06-26 19:00:30 +03:00
sdram_lp0_param_t210b01.h sc7: Add T210B01 SC7/LP0 (deep sleep) support 2020-06-26 19:00:30 +03:00
sdram_lp0.c sc7: Add T210B01 SC7/LP0 (deep sleep) support 2020-06-26 19:00:30 +03:00
sdram_param_t210.h sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
sdram_param_t210b01.h sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
sdram.c fuse: Move more parsing into its specific object 2020-12-26 16:34:12 +02:00
sdram.h sdram: Correct some dram names 2020-12-02 22:26:06 +02:00
smmu.c Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
smmu.h Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00