1
0
mirror of https://github.com/CTCaer/hekate.git synced 2024-12-25 15:17:19 +00:00

sdram: Correct some dram names

This commit is contained in:
CTCaer 2020-12-02 22:26:06 +02:00
parent d4d6730c20
commit cf1f94662c
4 changed files with 16 additions and 11 deletions

View File

@ -1439,12 +1439,12 @@ void *sdram_get_params_t210b01()
case LPDDR4X_HOAG_4GB_SAMSUNG_1Y_X:
case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_Y:
case LPDDR4X_IOWA_8GB_SAMSUNG_1Y_Y:
case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_A:
case LPDDR4X_SDS_4GB_SAMSUNG_1Y_A:
case LPDDR4X_SDS_8GB_SAMSUNG_1Y_X:
case LPDDR4X_SDS_4GB_SAMSUNG_1Y_X:
case LPDDR4X_CALSIO_4GB_SAMSUNG_UNK0:
case LPDDR4X_CALSIO_4GB_SAMSUNG_UNK1:
case LPDDR4X_CALSIO_4GB_SAMSUNG_UNK2:
case LPDDR4X_IOWA_4GB_MICRON_1Y_A:
case LPDDR4X_HOAG_4GB_MICRON_1Y_A:
case LPDDR4X_SDS_4GB_MICRON_1Y_A:
_sdram_patch_model_params_t210b01(dramid, (u32 *)buf);
break;
}

View File

@ -76,14 +76,14 @@ enum sdram_ids_mariko
LPDDR4X_IOWA_4GB_SAMSUNG_1Y_Y = 20,
LPDDR4X_IOWA_8GB_SAMSUNG_1Y_Y = 21,
LPDDR4X_IOWA_4GB_SAMSUNG_1Y_A = 22,
LPDDR4X_SDS_4GB_SAMSUNG_1Y_A = 22,
LPDDR4X_SDS_8GB_SAMSUNG_1Y_X = 23,
LPDDR4X_SDS_4GB_SAMSUNG_1Y_X = 24,
LPDDR4X_CALSIO_4GB_SAMSUNG_UNK0 = 25,
LPDDR4X_CALSIO_4GB_SAMSUNG_UNK1 = 26,
LPDDR4X_CALSIO_4GB_SAMSUNG_UNK2 = 27
LPDDR4X_IOWA_4GB_MICRON_1Y_A = 25,
LPDDR4X_HOAG_4GB_MICRON_1Y_A = 26,
LPDDR4X_SDS_4GB_MICRON_1Y_A = 27
};
void sdram_init();

View File

@ -922,7 +922,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = {
{ 0x2A800000, 0x6DC / 4, DRAM_ID2(21) }, // mc_video_protect_gpu_override0.
{ 0x00000002, 0x6E0 / 4, DRAM_ID2(21) }, // mc_video_protect_gpu_override1.
// Samsung LPDDR4X 4GB 10nm-class (1y) Die-A for Unknown Iowa.
// Samsung LPDDR4X 4GB 10nm-class (1y) Die-A for Unknown SDS.
{ 0x05500000, 0x0D4 / 4, DRAM_ID2(22) }, // emc_auto_cal_config2.
{ 0xC9AFBCBC, 0x0F4 / 4, DRAM_ID2(22) }, // emc_auto_cal_vref_sel0.
{ 0x00000008, 0x24C / 4, DRAM_ID2(22) }, // emc_tfaw.
@ -986,7 +986,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = {
{ 0x00000002, 0x6E0 / 4, DRAM_ID2(22) }, // mc_video_protect_gpu_override1.
{ 0x0000009C, 0x814 / 4, DRAM_ID2(22) }, // swizzle_rank_byte_encode.
// Calcio prototype, probably Samsung/Hynix/Micron timing configs.
// Micron LPDDR4X 4GB 10nm-class (1y) Die-A for Unknown Iowa/Hoag/SDS.
{ 0x05500000, 0x0D4 / 4, DRAM_ID2(25) | DRAM_ID2(26) | DRAM_ID2(27) }, // emc_auto_cal_config2.
{ 0xC9AFBCBC, 0x0F4 / 4, DRAM_ID2(25) | DRAM_ID2(26) | DRAM_ID2(27) }, // emc_auto_cal_vref_sel0.
{ 0x00000006, 0x1CC / 4, DRAM_ID2(25) | DRAM_ID2(26) | DRAM_ID2(27) }, // emc_quse.

View File

@ -638,9 +638,14 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
case LPDDR4X_IOWA_8GB_SAMSUNG_1Y_Y:
strcpy(dram_man, "Samsung 1y Y 8GB");
break;
case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_A:
case LPDDR4X_SDS_4GB_SAMSUNG_1Y_A:
strcpy(dram_man, "Samsung 1y A 4GB");
break;
case LPDDR4X_IOWA_4GB_MICRON_1Y_A:
case LPDDR4X_HOAG_4GB_MICRON_1Y_A:
case LPDDR4X_SDS_4GB_MICRON_1Y_A:
strcpy(dram_man, "Micron 1y A 4GB");
break;
default:
strcpy(dram_man, "Unknown");
break;