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mirror of https://github.com/CTCaer/hekate.git synced 2024-10-03 13:12:05 +00:00
Commit Graph

197 Commits

Author SHA1 Message Date
CTCaer
96654d9620 nyx: Throw a warning if SD Card in 1 bit mode 2020-04-30 01:05:22 +03:00
CTCaer
ce97b97c8d sdmmc v2: Add full SD card fallback initialization
hekate main always runs in compatibility mode (SDR82).
This ensures speed on boot process.

Nyx will first try SDR104.
If the sd card is a sandisk U1 and fails, it will try the compatibility mode.
After that it fallbacks to lower bus speeds.

Both support 1bit mode for broken sd card readers.

Having the new error checking in the sdmmc driver, allows for all that to work.
It can now fail instead of continuing, like how HOS reacts.
2020-04-30 00:00:00 +03:00
CTCaer
034f680a8e sd fs: Move sd init/mount/helpers to their own object 2020-04-29 23:20:18 +03:00
CTCaer
7d17e34dee sdmmc v2: Add eMMC overclocking 2020-04-29 22:11:23 +03:00
CTCaer
d0a16a49b6 sdmmc v2: Add error checking for all cases 2020-04-29 22:09:36 +03:00
CTCaer
5442547a59 sdmmc v2: Name eMMC physical partitions 2020-04-29 22:06:33 +03:00
CTCaer
10e7e06048 sdmmc v2: Move address alignment check in driver 2020-04-29 21:46:25 +03:00
CTCaer
eac6426125 sdmmc v2: Driver fixes 2020-04-29 21:43:07 +03:00
CTCaer
88b01994bd sdmmc v2: HW driver fixes 2020-04-29 21:39:03 +03:00
CTCaer
66780bb4c2 sdmmc v2: Refactor and fix registers 2020-04-29 21:23:28 +03:00
CTCaer
7f26981fa1 sdmmc v2: Refactor function names and vars 2020-04-29 21:16:44 +03:00
CTCaer
5b0a0070c7 sdmmc v2: Refactor everything 2020-04-29 18:53:29 +03:00
CTCaer
0462f3b252 Add simple exception handling
This adds support for exception handling.
It should provide simple and fast reporting of crucial info and full restoration without powering off.
2020-04-27 09:56:19 +03:00
CTCaer
9a5cfdff4c gpio: Upgrade GPIO driver
Use macros to get bank addresses and add full configuration support.
2020-04-27 09:51:25 +03:00
CTCaer
cb3b1bf6e1 irq: Add Legacy Interrupt Controller driver 2020-04-27 09:49:00 +03:00
CTCaer
b4d2df8111 Name various t210 registers 2020-04-27 09:47:47 +03:00
CTCaer
4160037c81 emummc: Add boot entry emuMMC selection
Using the key `emupath` on a boot entry will load the selected emuMMC.
This can also be forced by using the correct boot cfg storage bit and writing the path at the emummc path offset. Check readme for these.

This can only be used if the emuMMC was created via Nyx. because of the raw_based and file_based files that have emuMMC info.
(emupath=emuMMC/RAW1, emupath=emuMMC/SD00, etc)
2020-04-27 09:30:53 +03:00
CTCaer
3fa537e54a nyx: Move emummc cfg load function 2020-04-27 09:18:31 +03:00
CTCaer
f35c18a0c2 nyx: Refresh emuMMC status after a creation 2020-04-27 09:13:22 +03:00
CTCaer
aff137ac34 nyx: Allow partition selection for emuMMC raw 2020-04-27 09:09:52 +03:00
CTCaer
6236b0ab00 nyx: Use mbr context for emuMMC partition 2020-04-27 09:06:53 +03:00
CTCaer
ae656a0f81 types: User a proper struct for MBR partition table 2020-04-27 08:58:37 +03:00
CTCaer
6a6648d3b3 nyx: Change many lvgl static labels to dynamic 2020-04-27 08:47:00 +03:00
CTCaer
da149c296f touch: Reinitialize up to 3 times if failed 2020-04-14 17:52:22 +03:00
CTCaer
9af4c717a8 util: Add btn_read_vol 2020-04-14 17:51:42 +03:00
CTCaer
281e5a138e sept: Create sept folder if missing 2020-04-14 17:45:34 +03:00
CTCaer
e7f8b2c6c2 hos: Add HOS 10.0.0 support 2020-04-14 17:43:43 +03:00
CTCaer
3d9c64d548 hos: Use a new method to get kernel/ini1 offsets 2020-04-14 17:40:41 +03:00
CTCaer
5f142b4c86 main: Add empty battery screen
This disables low battery monitor shutdown (LBM shutdown) on boot and checks if battery is enough.

The logic is as follows:

If battery is not enough:
- If not charging and 15s pass, it will re enable LBM shutdown and power off.
- If charging, it will wait until it is charged above the limit.
 Screen will auto turn off to save power. A press on Power button or a change on charger, will enable it for another 15s.

If battery is enough:
- Enables LBM shutdown and continues with the boot process.
2020-04-06 05:54:45 +03:00
CTCaer
dc9c7fd95c touch: Do a panel HW test before calibration
In case the panel or the panel connection has issues, abort the calibration.
2020-03-25 01:38:16 +02:00
CTCaer
4ec7befe82 touch: Small refactor 2020-03-25 01:31:58 +02:00
CTCaer
a39ba2cd71 lvgl: Fix edge case in lv_label_set_text
This fixes an edge case where the original label set was done with set_static_text, the next one with set_text and the text is at the same address.

The incomplete check would think that the text resides on heap and it would reallocate it as such, effectively corrupting .data on the next sets.
2020-03-22 04:48:50 +02:00
CTCaer
9c6931a17c Bugfixes
The fan driver change ensures power off in any situation where a chainload software re-enables the 5V regulator.
2020-03-21 22:28:50 +02:00
CTCaer
976925c697 nyx: Allow cancellation of emuMMC creation 2020-03-21 22:27:17 +02:00
CTCaer
d50af46b03 chnldr: Support variable sizes of coreboot.rom 2020-03-21 22:18:40 +02:00
CTCaer
52874f9113 minerva: More protections 2020-03-21 22:10:06 +02:00
CTCaer
91a241dafa touch: Add Tuning Calibration
This, for now, can be done at Nyx boot by holding VOL- and VOL+.

Make sure that you don't touch the touchscreen.
2020-03-21 22:03:51 +02:00
CTCaer
76676f3a2e nyx: Allow for big filepaths for archive bit fixer
It also fixes corruptions/hangs when path is bigger than 255 chars
2020-03-18 06:30:11 +02:00
CTCaer
f5040f1e41 Update and add missing copyrights
Probably more need to change.
2020-03-14 09:24:24 +02:00
CTCaer
c9c3c8f716 touch: Add context based ready checks on init 2020-03-13 17:36:44 +02:00
CTCaer
144d6fd3f6 i2c: Update drivers
Adds support for 8 byte transfers needed by touch driver changes.
2020-03-13 10:25:27 +02:00
CTCaer
9697067466 touch: Add fw info 2020-03-13 08:48:20 +02:00
CTCaer
8539095bdb touch: Proper init
This patch applies the simpler init from HOS driver.

The most important change is enabling a feature that the fw supports:
Automatic tuning and calibration based on saved tuning values (running HOS only once saves these).
2020-03-13 08:39:38 +02:00
CTCaer
95e3159fe9 touch: Correct pressure calculation
Fingertip S for Nintendo Switch uses a custom spatial calculation. It now allows to identify area of touch.
2020-03-13 08:34:16 +02:00
CTCaer
8d5c52f087 lvgl heap: Fix critical issue with node header size
This fixes a critical issue where the node header was 28 bytes instead of 32, causing misalignment and heap corruption.
2020-03-09 08:39:31 +02:00
CTCaer
e6c1d9bf66 nyx: Simplify label sets
- Use only lv_label_set_text to simplify label sets
- Fix an issue with a label cut
- Add more maintenance functions for DRAM training
2020-03-09 08:37:41 +02:00
CTCaer
a52af1bf41 Fix building on make 4.3 2020-03-04 01:34:35 +02:00
CTCaer
ac92ca220f fan: Better thermal logic based on HOS patterns 2020-03-03 04:37:59 +02:00
CTCaer
ab8801d0de touch: Add edge compensation
Switch touch panels have a 10-15px offset around the edges.
(10-1269, 10-709) / (15-1264, 15-704)
This allows touch driver to report a max of 0-1279, 0-719.
2020-03-03 04:28:12 +02:00
CTCaer
f3802ec464 lists: Fix list member iteration with no entries 2020-03-03 04:24:38 +02:00
CTCaer
bc7a7bcfa0 info: Allow dumping of battery characterization table 2020-03-03 04:22:59 +02:00
CTCaer
6a52d44da6 heap: Fix edge case of reusing first node
There is an edge case fixed where the whole would be freed and this would make use of a nullptr.

Additionally, remove usage of reserved names for vars and add comments on how it works.
2020-03-03 04:16:20 +02:00
CTCaer
03a8a11933 Small fixes and changes
- Allow printing of more log on HOS boot when LOGS are OFF.
- A small name refactoring
- Add battery warning symbol when battery < 3200mV
2020-03-03 04:11:13 +02:00
CTCaer
4c1f67d022 Fix build errors 2020-01-19 15:22:59 +02:00
CTCaer
2a161b572b sdmmc: Set power cycle wait to 0 at boot 2020-01-17 09:19:58 +02:00
CTCaer
422852795f ini: Remove \r stripping as is done by FatFS 2020-01-17 09:18:31 +02:00
CTCaer
4d53f21387 mtc: Clear init magic on chainload
Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition.

L4T does not overwrite the nyx storage where the Minerva configuration is stored.
This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP.
2020-01-14 23:41:15 +02:00
CTCaer
9263e2192f nyx: Fix low battery voltage color 2020-01-07 06:50:33 +02:00
CTCaer
c99a87dd09 clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
CTCaer
009db77426 bpmp: Switch to PLLC for SCLK/BPMP clock source 2020-01-07 06:26:29 +02:00
CTCaer
2f43145131 uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00
CTCaer
e3fca2bce5 uart: Add timeout and len report to uart receive 2019-12-16 22:15:21 +02:00
CTCaer
da112a0ae9 uart: Proper uart init 2019-12-16 22:12:09 +02:00
CTCaer
90060d1d83 mtc: Don't rely on clean BSS for Minerva lib 2019-12-16 22:06:13 +02:00
CTCaer
1ccce5f1a2 gfx: Fix off-by-one in right half of 16px rendering 2019-12-16 21:49:54 +02:00
CTCaer
2aaa0331ac rtc: Add epoch convertion functions
Thanks @shchmue for the HOS conversion
2019-12-14 22:27:07 +02:00
CTCaer
7604239237 bpmp: Update driver to latest 2019-12-14 22:21:42 +02:00
CTCaer
1e4d63731b nyx: Fix about screen 2nd pane left margin 2019-12-12 00:20:14 +02:00
CTCaer
a664118fc7 r2p: Update r2p payload
2 modes:
- With updater2p; Forces the reboot to payload binary to be hekate
- Without; Checks if hekate and then if old
2019-12-12 00:13:32 +02:00
CTCaer
c6e92311f9 Add error printing for issues with libraries
It will now show erros for the following:
- Missing or old libsys_minerva.bso (DRAM training).
- Missing libsys_lp0.bso (LP0 sleep mode).
- Missing or old Nyx version
2019-12-11 11:22:11 +02:00
CTCaer
24d30a40f9 hos: Add Atmosphere's system mem increase patches 2019-12-10 19:20:02 +02:00
CTCaer
e4f7928513 minerva: Fix compatibility check for hekate main
Init now also returns status.
2019-12-09 22:27:01 +02:00
CTCaer
bd8a5ece58 heap: Fix type for heap monitor memset size 2019-12-09 19:30:45 +02:00
CTCaer
d0850516ab Bump hekate to v5.1.0 and Nyx to v0.8.3 2019-12-08 18:59:00 +02:00
CTCaer
4c5a78de6f hos: Fix pkg2 keygen with newer sept
This change also adds support for older sept binaries.
2019-12-08 18:32:09 +02:00
CTCaer
c12c696e53 hos: Add 9.1.0 support 2019-12-08 03:01:21 +02:00
CTCaer
f256bd5909 Move all I/DRAM addresses into a memory map
Many addresses were moved around to pack the memory usage!
2019-12-08 02:23:03 +02:00
CTCaer
0290892b23 nyx hw reconfig: Add fan and 5V regulators deinit
Additionally re-arrange minerva and mmu after these.
2019-12-08 01:41:57 +02:00
CTCaer
643a8ea8f9 fan: Update driver
Make use of 5V regulator driver and fixe some bugs
2019-12-08 01:38:12 +02:00
CTCaer
a6d8854499 power: Add 5V regulator driver 2019-12-08 01:36:35 +02:00
CTCaer
96bafd8bd7 nyx: Use color when battery voltage < 3200mV
For status bar and Battery Info.
2019-12-08 01:32:26 +02:00
CTCaer
65ee728939 nyx: Enable fan when temps are high 2019-12-08 01:26:26 +02:00
CTCaer
e1748a0727 nyx: Boost eMMC backup/restore verification times
This change allows SE to start verifying the first buffer while the 2nd is populated. Effectively cutting verification down to almost half.
2019-12-08 01:20:05 +02:00
CTCaer
35e853fd03 touch: Change I2C4 pinmuxing as per HOS 2019-12-07 23:23:01 +02:00
CTCaer
7e26be6587 lvgl: Optimize color blending
The manual optimization done dramatically increases performance in software color blending.
Isolated gains reach 20-30%.

Color blending calculates 2 +1 color channels instead of the expensive 1+1+1 calculations.

This is as best as it gets without going in asm optimizations.
2019-12-07 20:47:19 +02:00
CTCaer
733da0f4d5 nyx: Remove compiler flags to gain extra perf
- Removing no-inline produces 30-50% performance gains on specific real time sensitive functions used for rendering.
On overall, this will give 5-10% observed performance gains.

- Strict aliasing produces some extra small gains.
2019-12-07 20:35:17 +02:00
Kostas Missos
a357395cc6 nyx: Remove LTO in order to increase performance
Perf gains from removing LTO linker flag amounts to actually more than 5% average in real usage scenarios in Nyx.
(These include overall timings with static waits included. So basically as observed by user.)

Gains observed, on many isolated cases, were between 15-35%.

Additionally, this will make compiling fast again.
2019-12-07 20:26:51 +02:00
Kostas Missos
48c15a8fde nyx: Release the shackles 2019-12-07 20:16:38 +02:00
Kostas Missos
0b45a5a11a bpmp: Reduce freq to 589MHz
3 users had issues with 602MHz.
This will probably bring the SoC binning compatibility to 100%.

Additionally, make it easy to change default boost frequency.

The tiny loss in perf, will be mitigated in Nyx. (It's actually even faster)
2019-12-07 02:01:29 +02:00
Kostas Missos
bc7dec2e61 bpmp: Add forcable maintenance
+ Fix build issues
2019-12-07 01:47:44 +02:00
CTCaer
9811ba53e0 pmic: Enable Low Battery Shutdown for 2.8V
There's an increasing ammount of users that kill their batteries when forgetting their devices into AutoRCM / RCM mode.

This will now force a shutdown the moment the battery reaches 2.8V. Even if device is inside RCM mode.

Notice: We might need to increase the limit.
2019-12-04 22:06:34 +02:00
CTCaer
a16b1af698 pmic: Always ensure that values were written 2019-12-04 22:02:17 +02:00
CTCaer
641a57a4f6 hos/mtc: Add FSP WAR and boost HOS booting times
By implementing FSP WAR we can allow HOS to boot in 1600MHz and be able to switch frequency without hanging.
2019-12-04 21:59:58 +02:00
CTCaer
84328aa676 minerva: Make use of new minerva
- Training and switch is now faster
- Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva
- MTC table is now in a safe region
- Periodic training period increased to every 250ms
2019-12-04 21:56:45 +02:00
CTCaer
dd8ec0d28b clock: Always wait 2us before deasserting reset 2019-12-04 21:32:51 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer
168de9ddd8 sdmmc: Ensure aligned DMA buffers 2019-12-04 19:42:25 +02:00
CTCaer
b61b212218 lvgl heap: Align addresses & sizes to cache line size 2019-12-04 19:04:11 +02:00
CTCaer
ec10b572d1 heap: Quality updates to heap management
- Allow reuse of unused sections that fit exactly to selected allocation size. Decreases fragmentation dramatically.
- Always allocate and align mapped memory to selected alignment. Avoids having fragmented unused maps that are not aligned.
- Use a static alignment based on BPMP and generally average cache line size. Boosts performance when MMU is used.
2019-12-04 19:02:28 +02:00
CTCaer
d1e50c558e sdram: Refactor and fix some bugs in init 2019-12-04 18:53:36 +02:00