shader_decode: fix by suggestion

This commit is contained in:
Nguyen Dac Nam 2020-03-31 08:02:44 +07:00 committed by GitHub
parent cb0a4151f8
commit defb9642da
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GPG Key ID: 4AEE18F83AFDEB23

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@ -27,32 +27,27 @@ using Tegra::Shader::StoreType;
namespace { namespace {
Node getAtomOperation(AtomicOp op, bool is_signed, Node memory, Node data) { Node GetAtomOperation(AtomicOp op, bool is_signed, Node memory, Node data) {
const OperationCode operation_code = [op] {
switch (op) { switch (op) {
case AtomicOp::Add: case AtomicOp::Add:
return SignedOperation(OperationCode::AtomicIAdd, is_signed, std::move(memory), return OperationCode::AtomicIAdd;
std::move(data));
case AtomicOp::Min: case AtomicOp::Min:
return SignedOperation(OperationCode::AtomicIMin, is_signed, std::move(memory), return OperationCode::AtomicIMin;
std::move(data));
case AtomicOp::Max: case AtomicOp::Max:
return SignedOperation(OperationCode::AtomicIMax, is_signed, std::move(memory), return OperationCode::AtomicIMax;
std::move(data));
case AtomicOp::And: case AtomicOp::And:
return SignedOperation(OperationCode::AtomicIAnd, is_signed, std::move(memory), return OperationCode::AtomicIAnd;
std::move(data));
case AtomicOp::Or: case AtomicOp::Or:
return SignedOperation(OperationCode::AtomicIOr, is_signed, std::move(memory), return OperationCode::AtomicIOr;
std::move(data));
case AtomicOp::Xor: case AtomicOp::Xor:
return SignedOperation(OperationCode::AtomicIXor, is_signed, std::move(memory), return OperationCode::AtomicIXor;
std::move(data));
case AtomicOp::Exch: case AtomicOp::Exch:
return SignedOperation(OperationCode::AtomicIExchange, is_signed, std::move(memory), return OperationCode::AtomicIExchange;
std::move(data));
default:
return Immediate(0);
} }
}();
return SignedOperation(operation_code, is_signed, std::move(memory),
std::move(data));
} }
bool IsUnaligned(Tegra::Shader::UniformType uniform_type) { bool IsUnaligned(Tegra::Shader::UniformType uniform_type) {
@ -408,7 +403,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
const bool is_signed = const bool is_signed =
instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64; instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor); Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
Node value = getAtomOperation(static_cast<AtomicOp>(instr.atom.operation), is_signed, gmem, Node value = GetAtomOperation(static_cast<AtomicOp>(instr.atom.operation), is_signed, gmem,
GetRegister(instr.gpr20)); GetRegister(instr.gpr20));
SetRegister(bb, instr.gpr0, std::move(value)); SetRegister(bb, instr.gpr0, std::move(value));
break; break;
@ -426,7 +421,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
Node address = GetRegister(instr.gpr8); Node address = GetRegister(instr.gpr8);
address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset)); address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset));
Node value = Node value =
getAtomOperation(static_cast<AtomicOp>(instr.atoms.operation), is_signed, GetAtomOperation(static_cast<AtomicOp>(instr.atoms.operation), is_signed,
GetSharedMemory(std::move(address)), GetRegister(instr.gpr20)); GetSharedMemory(std::move(address)), GetRegister(instr.gpr20));
SetRegister(bb, instr.gpr0, std::move(value)); SetRegister(bb, instr.gpr0, std::move(value));
break; break;