GPU/TIC: Added the pitch and block height fields to the TIC structure.

This commit is contained in:
Subv 2018-04-15 19:52:25 -05:00
parent c93ea96366
commit db5f2bfa7e

View File

@ -4,6 +4,7 @@
#pragma once #pragma once
#include "common/assert.h"
#include "common/bit_field.h" #include "common/bit_field.h"
#include "common/common_funcs.h" #include "common/common_funcs.h"
#include "common/common_types.h" #include "common/common_types.h"
@ -57,6 +58,8 @@ union TextureHandle {
static_assert(sizeof(TextureHandle) == 4, "TextureHandle has wrong size"); static_assert(sizeof(TextureHandle) == 4, "TextureHandle has wrong size");
struct TICEntry { struct TICEntry {
static constexpr u32 DefaultBlockHeight = 16;
union { union {
u32 raw; u32 raw;
BitField<0, 7, TextureFormat> format; BitField<0, 7, TextureFormat> format;
@ -70,7 +73,12 @@ struct TICEntry {
BitField<0, 16, u32> address_high; BitField<0, 16, u32> address_high;
BitField<21, 3, TICHeaderVersion> header_version; BitField<21, 3, TICHeaderVersion> header_version;
}; };
INSERT_PADDING_BYTES(4); union {
BitField<3, 3, u32> block_height;
// High 16 bits of the pitch value
BitField<0, 16, u32> pitch_high;
};
union { union {
BitField<0, 16, u32> width_minus_1; BitField<0, 16, u32> width_minus_1;
BitField<23, 4, TextureType> texture_type; BitField<23, 4, TextureType> texture_type;
@ -82,6 +90,13 @@ struct TICEntry {
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low); return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
} }
u32 Pitch() const {
ASSERT(header_version == TICHeaderVersion::Pitch ||
header_version == TICHeaderVersion::PitchColorKey);
// The pitch value is 21 bits, and is 32B aligned.
return pitch_high << 5;
}
u32 Width() const { u32 Width() const {
return width_minus_1 + 1; return width_minus_1 + 1;
} }