common: add cache management functions

This commit is contained in:
Liam 2022-11-12 11:26:56 -05:00
parent c973029374
commit 70ea1c2000
3 changed files with 89 additions and 0 deletions

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@ -34,6 +34,8 @@ add_library(common STATIC
bit_util.h
cityhash.cpp
cityhash.h
cache_management.cpp
cache_management.h
common_funcs.h
common_types.h
concepts.h

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@ -0,0 +1,60 @@
// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
#include <cstring>
#include "alignment.h"
#include "cache_management.h"
#include "common_types.h"
namespace Common {
#if defined(ARCHITECTURE_x86_64)
// Most cache operations are no-ops on x86
void DataCacheLineCleanByVAToPoU(void* start, size_t size) {}
void DataCacheLineCleanAndInvalidateByVAToPoC(void* start, size_t size) {}
void DataCacheLineCleanByVAToPoC(void* start, size_t size) {}
void DataCacheZeroByVA(void* start, size_t size) {
std::memset(start, 0, size);
}
#elif defined(ARCHITECTURE_arm64)
// BS/DminLine is log2(cache size in words), we want size in bytes
#define EXTRACT_DMINLINE(ctr_el0) (1 << ((((ctr_el0) >> 16) & 0xf) + 2))
#define EXTRACT_BS(dczid_el0) (1 << (((dczid_el0)&0xf) + 2))
#define DEFINE_DC_OP(op_name, function_name) \
void function_name(void* start, size_t size) { \
size_t ctr_el0; \
asm volatile("mrs %[ctr_el0], ctr_el0\n\t" : [ctr_el0] "=r"(ctr_el0)); \
size_t cacheline_size = EXTRACT_DMINLINE(ctr_el0); \
uintptr_t va_start = reinterpret_cast<uintptr_t>(start); \
uintptr_t va_end = va_start + size; \
for (uintptr_t va = va_start; va < va_end; va += cacheline_size) { \
asm volatile("dc " #op_name ", %[va]\n\t" : : [va] "r"(va) : "memory"); \
} \
}
#define DEFINE_DC_OP_DCZID(op_name, function_name) \
void function_name(void* start, size_t size) { \
size_t dczid_el0; \
asm volatile("mrs %[dczid_el0], dczid_el0\n\t" : [dczid_el0] "=r"(dczid_el0)); \
size_t cacheline_size = EXTRACT_BS(dczid_el0); \
uintptr_t va_start = reinterpret_cast<uintptr_t>(start); \
uintptr_t va_end = va_start + size; \
for (uintptr_t va = va_start; va < va_end; va += cacheline_size) { \
asm volatile("dc " #op_name ", %[va]\n\t" : : [va] "r"(va) : "memory"); \
} \
}
DEFINE_DC_OP(cvau, DataCacheLineCleanByVAToPoU);
DEFINE_DC_OP(civac, DataCacheLineCleanAndInvalidateByVAToPoC);
DEFINE_DC_OP(cvac, DataCacheLineCleanByVAToPoC);
DEFINE_DC_OP_DCZID(zva, DataCacheZeroByVA);
#endif
} // namespace Common

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@ -0,0 +1,27 @@
// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once
#include "stdlib.h"
namespace Common {
// Data cache instructions enabled at EL0 by SCTLR_EL1.UCI.
// VA = virtual address
// PoC = point of coherency
// PoU = point of unification
// dc cvau
void DataCacheLineCleanByVAToPoU(void* start, size_t size);
// dc civac
void DataCacheLineCleanAndInvalidateByVAToPoC(void* start, size_t size);
// dc cvac
void DataCacheLineCleanByVAToPoC(void* start, size_t size);
// dc zva
void DataCacheZeroByVA(void* start, size_t size);
} // namespace Common