diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp
index b8f63922f..20a953379 100644
--- a/src/video_core/shader/decode/memory.cpp
+++ b/src/video_core/shader/decode/memory.cpp
@@ -27,29 +27,26 @@ using Tegra::Shader::StoreType;
 
 namespace {
 
-Node GetAtomOperation(AtomicOp op, bool is_signed, Node memory, Node data) {
-    const OperationCode operation_code = [op] {
-        switch (op) {
-        case AtomicOp::Add:
-            return OperationCode::AtomicIAdd;
-        case AtomicOp::Min:
-            return OperationCode::AtomicIMin;
-        case AtomicOp::Max:
-            return OperationCode::AtomicIMax;
-        case AtomicOp::And:
-            return OperationCode::AtomicIAnd;
-        case AtomicOp::Or:
-            return OperationCode::AtomicIOr;
-        case AtomicOp::Xor:
-            return OperationCode::AtomicIXor;
-        case AtomicOp::Exch:
-            return OperationCode::AtomicIExchange;
-        default:
-            UNIMPLEMENTED_MSG("op={}", static_cast<int>(op));
-            return OperationCode::AtomicIAdd;
-        }
-    }();
-    return SignedOperation(operation_code, is_signed, std::move(memory), std::move(data));
+OperationCode GetAtomOperation(AtomicOp op) {
+    switch (op) {
+    case AtomicOp::Add:
+        return OperationCode::AtomicIAdd;
+    case AtomicOp::Min:
+        return OperationCode::AtomicIMin;
+    case AtomicOp::Max:
+        return OperationCode::AtomicIMax;
+    case AtomicOp::And:
+        return OperationCode::AtomicIAnd;
+    case AtomicOp::Or:
+        return OperationCode::AtomicIOr;
+    case AtomicOp::Xor:
+        return OperationCode::AtomicIXor;
+    case AtomicOp::Exch:
+        return OperationCode::AtomicIExchange;
+    default:
+        UNIMPLEMENTED_MSG("op={}", static_cast<int>(op));
+        return OperationCode::AtomicIAdd;
+    }
 }
 
 bool IsUnaligned(Tegra::Shader::UniformType uniform_type) {
@@ -392,7 +389,9 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
                                  instr.atom.operation == AtomicOp::SafeAdd,
                              "operation={}", static_cast<int>(instr.atom.operation.Value()));
         UNIMPLEMENTED_IF_MSG(instr.atom.type == GlobalAtomicType::S64 ||
-                                 instr.atom.type == GlobalAtomicType::U64,
+                                 instr.atom.type == GlobalAtomicType::U64 ||
+                                 instr.atom.type == GlobalAtomicType::F16x2_FTZ_RN ||
+                                 instr.atom.type == GlobalAtomicType::F32_FTZ_RN,
                              "type={}", static_cast<int>(instr.atom.type.Value()));
 
         const auto [real_address, base_address, descriptor] =
@@ -403,11 +402,11 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         }
 
         const bool is_signed =
-            instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
+            instr.atom.type == GlobalAtomicType::S32 || instr.atom.type == GlobalAtomicType::S64;
         Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
-        Node value = GetAtomOperation(static_cast<AtomicOp>(instr.atom.operation), is_signed, gmem,
-                                      GetRegister(instr.gpr20));
-        SetRegister(bb, instr.gpr0, std::move(value));
+        SetRegister(bb, instr.gpr0,
+                    SignedOperation(GetAtomOperation(instr.atom.operation), is_signed, gmem,
+                                    GetRegister(instr.gpr20)));
         break;
     }
     case OpCode::Id::ATOMS: {
@@ -422,10 +421,9 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         const s32 offset = instr.atoms.GetImmediateOffset();
         Node address = GetRegister(instr.gpr8);
         address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset));
-        Node value =
-            GetAtomOperation(static_cast<AtomicOp>(instr.atoms.operation), is_signed,
-                             GetSharedMemory(std::move(address)), GetRegister(instr.gpr20));
-        SetRegister(bb, instr.gpr0, std::move(value));
+        SetRegister(bb, instr.gpr0,
+                    SignedOperation(GetAtomOperation(instr.atoms.operation), is_signed,
+                                    GetSharedMemory(std::move(address)), GetRegister(instr.gpr20)));
         break;
     }
     case OpCode::Id::AL2P: {