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https://github.com/hathach/tinyusb.git
synced 2025-04-03 16:20:21 +00:00
implement split for slave, got mouse working
This commit is contained in:
hathach
parent
fbc193647a
commit
fe79a93594
@ -438,6 +438,12 @@ typedef struct TU_ATTR_PACKED {
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} dwc2_channel_tsize_t;
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TU_VERIFY_STATIC(sizeof(dwc2_channel_tsize_t) == 4, "incorrect size");
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typedef struct TU_ATTR_PACKED {
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uint32_t num : 16; // 0..15 Frame number
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uint32_t remainning : 16; // 16..31 Frame remaining
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} dwc2_hfnum_t;
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TU_VERIFY_STATIC(sizeof(dwc2_hfnum_t) == 4, "incorrect size");
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// Host Channel
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typedef struct {
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union {
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@ -592,7 +598,10 @@ typedef struct {
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//------------ Host -------------//
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volatile uint32_t hcfg; // 400 Host Configuration
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volatile uint32_t hfir; // 404 Host Frame Interval
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union {
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volatile uint32_t hfnum; // 408 Host Frame Number / Frame Remaining
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volatile dwc2_hfnum_t hfnum_bm;
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};
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uint32_t reserved40c; // 40C
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union {
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volatile uint32_t hptxsts; // 410 Host Periodic TX FIFO / Queue Status
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@ -73,7 +73,10 @@ typedef struct {
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struct TU_ATTR_PACKED {
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uint32_t uframe_interval : 18; // micro-frame interval
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uint32_t speed : 2;
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uint32_t next_pid : 2;
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uint32_t do_ping : 1;
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// uint32_t : 9;
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};
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uint32_t uframe_countdown; // micro-frame count down to transfer for periodic, only need 18-bit
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@ -89,14 +92,14 @@ typedef struct {
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struct TU_ATTR_PACKED {
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uint8_t err_count : 3;
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uint8_t period_split_nyet_count : 3;
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uint8_t do_ping : 1;
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uint8_t sof_schedule : 1;
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uint8_t halted_nyet : 1;
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uint8_t halted_sof_schedule : 1;
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};
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uint8_t result;
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uint16_t xferred_bytes; // bytes that accumulate transferred though USB bus for the whole hcd_edpt_xfer(), which can
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// be composed of multiple channel_xfer_start() (retry with NAK/NYET)
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uint16_t txfifo_bytes; // bytes written to TX FIFO (may not be transferred on USB bus).
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uint16_t fifo_bytes; // bytes written/read from/to FIFO (may not be transferred on USB bus).
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} hcd_xfer_t;
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typedef struct {
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@ -470,6 +473,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t*
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hcsplt_bm->split_compl = 0;
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hcsplt_bm->split_en = (rh_speed == TUSB_SPEED_HIGH && devtree_info.speed != TUSB_SPEED_HIGH) ? 1 : 0;
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edpt->speed = devtree_info.speed;
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edpt->next_pid = HCTSIZ_PID_DATA0;
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if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) {
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edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
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@ -505,7 +509,7 @@ static void channel_xfer_out_wrapup(dwc2_regs_t* dwc2, uint8_t ch_id) {
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const uint16_t total_packets = cal_packet_count(edpt->buflen, channel->hcchar_bm.ep_size);
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const uint16_t actual_bytes = (total_packets - remain_packets) * channel->hcchar_bm.ep_size;
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xfer->txfifo_bytes = 0;
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xfer->fifo_bytes = 0;
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xfer->xferred_bytes += actual_bytes;
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edpt->buffer += actual_bytes;
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edpt->buflen -= actual_bytes;
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@ -519,7 +523,7 @@ static bool channel_xfer_start(dwc2_regs_t* dwc2, uint8_t ch_id) {
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bool const is_period = edpt_is_periodic(hcchar_bm->ep_type);
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// clear previous state
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xfer->txfifo_bytes = 0;
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xfer->fifo_bytes = 0;
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// hchar: restore but don't enable yet
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if (is_period) {
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@ -530,15 +534,12 @@ static bool channel_xfer_start(dwc2_regs_t* dwc2, uint8_t ch_id) {
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// hctsiz: zero length packet still count as 1
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const uint16_t packet_count = cal_packet_count(edpt->buflen, hcchar_bm->ep_size);
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uint32_t hctsiz = (edpt->next_pid << HCTSIZ_PID_Pos) | (packet_count << HCTSIZ_PKTCNT_Pos) | edpt->buflen;
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if (xfer->do_ping && edpt->next_pid != HCTSIZ_PID_SETUP && hcchar_bm->ep_dir == TUSB_DIR_OUT) {
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hcd_devtree_info_t devtree_info;
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hcd_devtree_get_info(hcchar_bm->dev_addr, &devtree_info);
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if (devtree_info.speed == TUSB_SPEED_HIGH) {
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hctsiz |= HCTSIZ_DOPING;
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}
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xfer->do_ping = 0;
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if (edpt->do_ping && edpt->speed == TUSB_SPEED_HIGH &&
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edpt->next_pid != HCTSIZ_PID_SETUP && hcchar_bm->ep_dir == TUSB_DIR_OUT) {
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hctsiz |= HCTSIZ_DOPING;
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}
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channel->hctsiz = hctsiz;
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edpt->do_ping = 0;
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// pre-calculate next PID based on packet count, adjusted in transfer complete interrupt if short packet
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if (hcchar_bm->ep_num == 0) {
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@ -565,9 +566,12 @@ static bool channel_xfer_start(dwc2_regs_t* dwc2, uint8_t ch_id) {
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} else {
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uint32_t hcintmsk = HCINT_NAK | HCINT_XACT_ERR | HCINT_STALL | HCINT_XFER_COMPLETE | HCINT_DATATOGGLE_ERR;
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if (hcchar_bm->ep_dir == TUSB_DIR_IN) {
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hcintmsk |= HCINT_BABBLE_ERR | HCINT_DATATOGGLE_ERR;
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hcintmsk |= HCINT_BABBLE_ERR | HCINT_DATATOGGLE_ERR | HCINT_ACK;
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} else {
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hcintmsk |= HCINT_NYET;
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if (edpt->hcsplt_bm.split_en) {
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hcintmsk |= HCINT_ACK;
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}
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}
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channel->hcintmsk = hcintmsk;
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dwc2->haintmsk |= TU_BIT(ch_id);
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@ -680,9 +684,10 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
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hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
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if (edpt_is_periodic(channel->hcchar_bm.ep_type)){
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// retry immediately for periodic split nyet if haven't reach max retry
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if (channel->hcsplt_bm.split_en && channel->hcsplt_bm.split_compl && (hcint & HCINT_NYET)) {
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// retry immediately for periodic split NYET if we haven't reach max retry
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if (channel->hcsplt_bm.split_en && channel->hcsplt_bm.split_compl && (hcint & HCINT_NYET || xfer->halted_nyet)) {
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xfer->period_split_nyet_count++;
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xfer->halted_nyet = 0;
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if (xfer->period_split_nyet_count < HCD_XFER_PERIOD_SPLIT_NYET_MAX) {
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channel->hcchar_bm.odd_frame = 1 - (dwc2->hfnum & 1); // transfer on next frame
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channel_send_in_token(dwc2, channel);
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@ -703,7 +708,7 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
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channel_dealloc(dwc2, ch_id);
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} else {
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// disable channel first if not halted (called slave isr)
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xfer->sof_schedule = 1;
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xfer->halted_sof_schedule = 1;
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channel_disable(dwc2, channel);
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}
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} else {
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@ -712,6 +717,24 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
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}
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}
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#if CFG_TUSB_DEBUG
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TU_ATTR_ALWAYS_INLINE static inline void print_hcint(uint32_t hcint) {
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const char* str[] = {
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"XFRC", "HALTED", "AHBERR", "STALL",
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"NAK", "ACK", "NYET", "XERR",
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"BBLERR", "FRMOR", "DTERR", "BNA",
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"XCSERR", "DESC_LST"
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};
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for(uint32_t i=0; i<14; i++) {
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if (hcint & TU_BIT(i)) {
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TU_LOG1("%s ", str[i]);
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}
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}
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TU_LOG1("\r\n");
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}
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#endif
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#if CFG_TUH_DWC2_SLAVE_ENABLE
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static void handle_rxflvl_irq(uint8_t rhport) {
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dwc2_regs_t* dwc2 = DWC2_REG(rhport);
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@ -719,11 +742,11 @@ static void handle_rxflvl_irq(uint8_t rhport) {
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// Pop control word off FIFO
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const dwc2_grxstsp_t grxstsp_bm = dwc2->grxstsp_bm;
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const uint8_t ch_id = grxstsp_bm.ep_ch_num;
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dwc2_channel_t* channel = &dwc2->channel[ch_id];
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// dwc2_channel_t* channel = &dwc2->channel[ch_id];
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switch (grxstsp_bm.packet_status) {
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case GRXSTS_PKTSTS_RX_DATA: {
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// In packet received
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// In packet received, pop this entry --> ACK interrupt
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const uint16_t byte_count = grxstsp_bm.byte_count;
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hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
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TU_ASSERT(xfer->ep_id < CFG_TUH_DWC2_ENDPOINT_MAX,);
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@ -732,14 +755,7 @@ static void handle_rxflvl_irq(uint8_t rhport) {
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if (byte_count) {
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dfifo_read_packet(dwc2, edpt->buffer + xfer->xferred_bytes, byte_count);
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xfer->xferred_bytes += byte_count;
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const uint16_t remain_packets = channel->hctsiz_bm.packet_count;
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if (byte_count < edpt->hcchar_bm.ep_size) {
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// short packet: update PID based on remain packets count
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edpt->next_pid = cal_next_pid(edpt->next_pid, remain_packets);
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} if (remain_packets) {
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channel_send_in_token(dwc2, channel); // still more packet to send
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}
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xfer->fifo_bytes = byte_count;
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}
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break;
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}
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@ -778,7 +794,7 @@ static bool handle_txfifo_empty(dwc2_regs_t* dwc2, bool is_periodic) {
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const uint16_t remain_packets = channel->hctsiz_bm.packet_count;
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for (uint16_t i = 0; i < remain_packets; i++) {
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const uint16_t remain_bytes = edpt->buflen - xfer->txfifo_bytes;
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const uint16_t remain_bytes = edpt->buflen - xfer->fifo_bytes;
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const uint16_t xact_bytes = tu_min16(remain_bytes, channel->hcchar_bm.ep_size);
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// skip if there is not enough space in FIFO and RequestQueue.
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@ -787,26 +803,41 @@ static bool handle_txfifo_empty(dwc2_regs_t* dwc2, bool is_periodic) {
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return true;
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}
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dfifo_write_packet(dwc2, ch_id, edpt->buffer + xfer->txfifo_bytes, xact_bytes);
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xfer->txfifo_bytes += xact_bytes;
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dfifo_write_packet(dwc2, ch_id, edpt->buffer + xfer->fifo_bytes, xact_bytes);
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xfer->fifo_bytes += xact_bytes;
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}
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}
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}
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return false; // all data written
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return false; // no channel has pending data
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}
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static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hcint) {
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hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
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dwc2_channel_t* channel = &dwc2->channel[ch_id];
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hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
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bool is_done = false;
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// TU_LOG1("ch%u: ep = %u, hcint = 0x%04lX\r\n", ch_id, channel->hcchar_bm.ep_num, hcint);
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// if (channel->hcsplt_bm.split_en) {
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// if (edpt->hcchar_bm.ep_num == 1) {
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// TU_LOG1("Frame %u, ch %u: ep %u, hcint 0x%04lX ", dwc2->hfnum_bm.num, ch_id, channel->hcchar_bm.ep_num, hcint);
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// print_hcint(hcint);
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// }
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if (hcint & HCINT_XFER_COMPLETE) {
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xfer->result = XFER_RESULT_SUCCESS;
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if (edpt->hcchar_bm.ep_num != 0) {
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edpt->next_pid = channel->hctsiz_bm.pid; // save pid (already toggled)
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}
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const uint16_t remain_packets = channel->hctsiz_bm.packet_count;
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if (channel->hcsplt_bm.split_en && remain_packets && xfer->fifo_bytes == edpt->hcchar_bm.ep_size) {
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// Split can only complete 1 transaction (up to 1 packet) at a time, schedule more
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channel->hcsplt_bm.split_compl = 0;
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} else {
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xfer->result = XFER_RESULT_SUCCESS;
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}
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channel_disable(dwc2, channel);
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channel->hcintmsk &= ~HCINT_ACK;
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} else if (hcint & (HCINT_XACT_ERR | HCINT_BABBLE_ERR | HCINT_STALL)) {
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if (hcint & HCINT_STALL) {
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xfer->result = XFER_RESULT_STALLED;
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@ -816,37 +847,66 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
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xfer->err_count++;
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channel->hcintmsk |= HCINT_ACK;
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}
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channel_disable(dwc2, channel);
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} else if (hcint & HCINT_NYET) {
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// restart complete split
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channel->hcsplt_bm.split_compl = 1;
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xfer->halted_nyet = 1;
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channel_disable(dwc2, channel);
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} else if (hcint & HCINT_NAK) {
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// NAK received, re-enable channel if request queue is available
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if (channel->hcsplt_bm.split_en) {
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channel->hcsplt_bm.split_compl = 0; // restart with start-split
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}
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channel_disable(dwc2, channel);
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} else if (hcint & HCINT_ACK) {
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xfer->err_count = 0;
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if (channel->hcsplt_bm.split_en) {
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if (!channel->hcsplt_bm.split_compl) {
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// start split is ACK --> do complete split
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channel->hcintmsk |= HCINT_NYET;
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channel->hcsplt_bm.split_compl = 1;
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channel_send_in_token(dwc2, channel);
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} else {
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// do nothing for complete split with DATA, this will trigger XferComplete and handled there
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}
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} else {
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// ACK with data
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const uint16_t remain_packets = channel->hctsiz_bm.packet_count;
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if (remain_packets) {
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// still more packet to receive, also reset to start split
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channel->hcsplt_bm.split_compl = 0;
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channel_send_in_token(dwc2, channel);
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}
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}
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} else if (hcint & HCINT_HALTED) {
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channel->hcintmsk &= ~HCINT_HALTED;
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if (xfer->sof_schedule) {
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if (xfer->halted_sof_schedule) {
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// de-allocate channel but does not complete xfer, we schedule it in the SOF interrupt
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channel_dealloc(dwc2, ch_id);
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} else if (xfer->result != XFER_RESULT_INVALID) {
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is_done = true;
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} else if (channel->hcchar_bm.err_multi_count == HCD_XFER_ERROR_MAX) {
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} else if (xfer->err_count == HCD_XFER_ERROR_MAX) {
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xfer->result = XFER_RESULT_FAILED;
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is_done = true;
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} else {
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// got here due to NAK or NYET
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channel_xfer_in_retry(dwc2, ch_id, hcint);
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}
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} else if (hcint & HCINT_DATATOGGLE_ERR) {
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xfer->err_count = 0;
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TU_ASSERT(false);
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} else if (hcint & HCINT_NAK) {
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// NAK received, re-enable channel if request queue is available
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channel_xfer_in_retry(dwc2, ch_id, hcint);
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} else if (hcint & HCINT_ACK) {
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xfer->err_count = 0;
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channel->hcintmsk &= ~HCINT_ACK;
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}
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return is_done;
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}
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static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hcint) {
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hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
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dwc2_channel_t* channel = &dwc2->channel[ch_id];
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hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
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bool is_done = false;
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if (hcint & HCINT_XFER_COMPLETE) {
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@ -856,7 +916,18 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
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} else if (hcint & HCINT_STALL) {
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xfer->result = XFER_RESULT_STALLED;
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channel_disable(dwc2, channel);
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} else if (hcint & (HCINT_NAK | HCINT_XACT_ERR | HCINT_NYET)) {
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} else if (hcint & HCINT_NYET) {
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xfer->err_count = 0;
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if (channel->hcsplt_bm.split_en) {
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// retry complete split
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channel->hcsplt_bm.split_compl = 1;
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channel->hcchar |= HCCHAR_CHENA;
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} else {
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edpt->do_ping = 1;
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channel_xfer_out_wrapup(dwc2, ch_id);
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channel_disable(dwc2, channel);
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}
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} else if (hcint & (HCINT_NAK | HCINT_XACT_ERR)) {
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// clean up transfer so far, disable and start again later
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channel_xfer_out_wrapup(dwc2, ch_id);
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channel_disable(dwc2, channel);
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@ -864,29 +935,34 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
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xfer->err_count++;
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channel->hcintmsk |= HCINT_ACK;
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} else {
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// NAK/NYET disable channel to flush all posted request and try again
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// NAK disable channel to flush all posted request and try again
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edpt->do_ping = 1;
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xfer->err_count = 0;
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}
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} else if (hcint & HCINT_HALTED) {
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||||
channel->hcintmsk &= ~HCINT_HALTED;
|
||||
if (xfer->result != XFER_RESULT_INVALID) {
|
||||
is_done = true;
|
||||
} else if (channel->hcchar_bm.err_multi_count == HCD_XFER_ERROR_MAX) {
|
||||
} else if (xfer->err_count == HCD_XFER_ERROR_MAX) {
|
||||
xfer->result = XFER_RESULT_FAILED;
|
||||
is_done = true;
|
||||
} else {
|
||||
// Got here due to NAK or NYET -> Retry transfer with do PING (for highspeed)
|
||||
xfer->do_ping = 1;
|
||||
// Got here due to NAK or NYET
|
||||
TU_ASSERT(channel_xfer_start(dwc2, ch_id));
|
||||
}
|
||||
} else if (hcint & HCINT_ACK) {
|
||||
xfer->err_count = 0;
|
||||
channel->hcintmsk &= ~HCINT_ACK;
|
||||
if (channel->hcsplt_bm.split_en && !channel->hcsplt_bm.split_compl) {
|
||||
// start split is ACK --> do complete split
|
||||
channel->hcsplt_bm.split_compl = 1;
|
||||
channel->hcchar |= HCCHAR_CHENA;
|
||||
}
|
||||
}
|
||||
|
||||
if (is_done) {
|
||||
xfer->xferred_bytes += xfer->txfifo_bytes;
|
||||
xfer->txfifo_bytes = 0;
|
||||
xfer->xferred_bytes += xfer->fifo_bytes;
|
||||
xfer->fifo_bytes = 0;
|
||||
}
|
||||
|
||||
return is_done;
|
||||
@ -1230,7 +1306,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
|
||||
}
|
||||
|
||||
#if CFG_TUH_DWC2_SLAVE_ENABLE
|
||||
// RxFIFO non-empty interrupt handling, must be handled before HCINT
|
||||
// RxFIFO non-empty interrupt handling
|
||||
if (gintsts & GINTSTS_RXFLVL) {
|
||||
// RXFLVL bit is read-only
|
||||
dwc2->gintmsk &= ~GINTSTS_RXFLVL; // disable RXFLVL interrupt while reading
|
||||
|
||||
@ -261,7 +261,7 @@
|
||||
|
||||
// Enable DWC2 DMA for host
|
||||
#ifndef CFG_TUH_DWC2_DMA_ENABLE
|
||||
#define CFG_TUH_DWC2_DMA_ENABLE 1
|
||||
#define CFG_TUH_DWC2_DMA_ENABLE 0
|
||||
#endif
|
||||
|
||||
// Enable PIO-USB software host controller
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user