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pass test for setup TD

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This commit is contained in:
hathach 2013-03-06 15:39:37 +07:00
parent 685fb97086
commit f38fed3529
2 changed files with 35 additions and 2 deletions
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8
tests/test/host/ehci/test_ehci_pipe_xfer.c
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@ -134,6 +134,8 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
p_data = &ehci_data.addr0.qtd[1];
p_status = &ehci_data.addr0.qtd[2];
TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
@ -148,6 +150,8 @@ void test_control_xfer_get(void)
//------------- Code Under TEST -------------//
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
@ -171,7 +175,9 @@ void test_control_xfer_get(void)
TEST_ASSERT_EQUAL(8, p_qtd->total_bytes);
TEST_ASSERT_FALSE(p_qtd->data_toggle);
// TEST_ASSERT_EQUAL_HEX(request)
uint8_t *p_data = (uint8_t *) &ehci_data.device[dev_addr].control.request;
TEST_ASSERT_EQUAL_HEX(p_data, p_qtd->buffer[0]);
TEST_ASSERT_EQUAL_MEMORY(&request_get_dev_desc, p_data, sizeof(tusb_std_request_t));
TEST_ASSERT_EQUAL(EHCI_PID_SETUP, p_qtd->pid);
}

29
tinyusb/host/ehci/ehci.c
View File

@ -248,6 +248,7 @@ tusb_error_t hcd_controller_reset(uint8_t hostid)
static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type);
static inline ehci_qhd_t* const get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline tusb_std_request_t* const get_control_request_ptr(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
{
@ -308,8 +309,17 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
ehci_qtd_t *p_data = p_setup + 1;
ehci_qtd_t *p_status = p_setup + 2;
p_qhd->p_qtd_list = p_setup;
memclr_(p_setup, sizeof(ehci_qtd_t));
p_setup->next.address = (uint32_t) p_data;
p_setup->active = 1;
p_setup->cerr = 3; // TODO 3 consecutive errors tolerance
p_setup->data_toggle = 0;
p_setup->total_bytes = 8; // sizeof (tusb_std_request_t)
p_setup->buffer[0] = (uint32_t) get_control_request_ptr(dev_addr);
*(get_control_request_ptr(dev_addr)) = *p_request;
p_setup->pid = EHCI_PID_SETUP;
if (p_request->wLength > 0)
{
@ -318,9 +328,19 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
{
p_data = p_setup;
}
p_data->next.address = (uint32_t) p_status;
p_status->next.terminate = 1;
//------------- alternate link is not used -------------//
p_data->alternate.terminate = 1;
p_setup->alternate.terminate = 1;
p_data->alternate.terminate = 1;
//------------- hook TD List to Queue Head -------------//
p_qhd->p_qtd_list = p_setup;
p_qhd->qtd_overlay.next.address = (uint32_t) p_setup;
return TUSB_ERROR_NONE;
}
@ -342,6 +362,13 @@ static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
}
static inline tusb_std_request_t* const get_control_request_ptr(uint8_t dev_addr)
{
return (dev_addr == 0) ?
&ehci_data.addr0.request :
&ehci_data.device[ dev_addr ].control.request;
}
static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type)
{
p_qhd->device_address = dev_addr;