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use standard EHCI USB INT instead of chipidea async/period interrupt to be compatible with other EHCI implementation

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hathach 2023-07-25 12:03:54 +07:00
parent 9554283b03
commit ef69da054e
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GPG Key ID: F5D50C6D51D17CBA
2 changed files with 9 additions and 21 deletions
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24
src/portable/ehci/ehci.c
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@ -307,8 +307,8 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
regs->status = (EHCI_INT_MASK_ALL & ~EHCI_INT_MASK_PORT_CHANGE); regs->status = (EHCI_INT_MASK_ALL & ~EHCI_INT_MASK_PORT_CHANGE);
// Enable interrupts // Enable interrupts
regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE | regs->inten = EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER; EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
//------------- Asynchronous List -------------// //------------- Asynchronous List -------------//
ehci_qhd_t * const async_head = list_get_async_head(rhport); ehci_qhd_t * const async_head = list_get_async_head(rhport);
@ -768,28 +768,20 @@ void hcd_int_handler(uint8_t rhport)
regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
} }
// A USB transfer is completed with error
if (int_status & EHCI_INT_MASK_ERROR) { if (int_status & EHCI_INT_MASK_ERROR) {
xfer_error_isr(rhport); xfer_error_isr(rhport);
regs->status = EHCI_INT_MASK_ERROR; // Acknowledge regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
} }
//------------- some QTD/SITD/ITD with IOC set is completed -------------// // A USB transfer is completed
if (int_status & EHCI_INT_MASK_NXP_ASYNC) { if (int_status & EHCI_INT_MASK_USB) {
async_list_xfer_complete_isr(list_get_async_head(rhport)); for ( uint32_t i = 1; i <= FRAMELIST_SIZE; i *= 2 ) {
regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
}
if (int_status & EHCI_INT_MASK_NXP_PERIODIC)
{
for (uint32_t i=1; i <= FRAMELIST_SIZE; i *= 2)
{
period_list_xfer_complete_isr(rhport, i); period_list_xfer_complete_isr(rhport, i);
} }
regs->status = EHCI_INT_MASK_NXP_PERIODIC; // Acknowledge
}
if (int_status & EHCI_INT_MASK_USB) { async_list_xfer_complete_isr(list_get_async_head(rhport));
// TODO standard EHCI xfer complete
regs->status = EHCI_INT_MASK_USB; // Acknowledge regs->status = EHCI_INT_MASK_USB; // Acknowledge
} }

6
src/portable/ehci/ehci.h
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@ -278,14 +278,10 @@ enum {
EHCI_INT_MASK_PERIODIC_SCHED_STATUS = TU_BIT(14), EHCI_INT_MASK_PERIODIC_SCHED_STATUS = TU_BIT(14),
EHCI_INT_MASK_ASYNC_SCHED_STATUS = TU_BIT(15), EHCI_INT_MASK_ASYNC_SCHED_STATUS = TU_BIT(15),
EHCI_INT_MASK_NXP_ASYNC = TU_BIT(18),
EHCI_INT_MASK_NXP_PERIODIC = TU_BIT(19),
EHCI_INT_MASK_ALL = EHCI_INT_MASK_ALL =
EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR | EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR |
EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF | EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF
EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
}; };
enum { enum {