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Merge pull request #1847 from HiFiPhile/dwc2_iar
dwc2: fix iar warnings
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commit
ea098aeda1
@ -529,8 +529,10 @@ void dcd_init (uint8_t rhport)
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dwc2->dcfg |= DCFG_NZLSOHSK;
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dwc2->dcfg |= DCFG_NZLSOHSK;
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// Clear all interrupts
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// Clear all interrupts
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dwc2->gintsts |= dwc2->gintsts;
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uint32_t int_mask = dwc2->gintsts;
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dwc2->gotgint |= dwc2->gotgint;
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dwc2->gintsts |= int_mask;
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int_mask = dwc2->gotgint;
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dwc2->gotgint |= int_mask;
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// Required as part of core initialization.
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// Required as part of core initialization.
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// TODO: How should mode mismatch be handled? It will cause
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// TODO: How should mode mismatch be handled? It will cause
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@ -1219,7 +1221,8 @@ void dcd_int_handler(uint8_t rhport)
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{
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{
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dwc2_regs_t *dwc2 = DWC2_REG(rhport);
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dwc2_regs_t *dwc2 = DWC2_REG(rhport);
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uint32_t const int_status = dwc2->gintsts & dwc2->gintmsk;
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uint32_t const int_mask = dwc2->gintmsk;
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uint32_t const int_status = dwc2->gintsts & int_mask;
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if(int_status & GINTSTS_USBRST)
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if(int_status & GINTSTS_USBRST)
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{
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{
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@ -122,13 +122,13 @@ static const dwc2_controller_t _dwc2_controller[] =
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TU_ATTR_ALWAYS_INLINE
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TU_ATTR_ALWAYS_INLINE
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static inline void dwc2_dcd_int_enable(uint8_t rhport)
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static inline void dwc2_dcd_int_enable(uint8_t rhport)
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{
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{
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NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
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NVIC_EnableIRQ((IRQn_Type)_dwc2_controller[rhport].irqnum);
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}
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}
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TU_ATTR_ALWAYS_INLINE
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TU_ATTR_ALWAYS_INLINE
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static inline void dwc2_dcd_int_disable (uint8_t rhport)
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static inline void dwc2_dcd_int_disable (uint8_t rhport)
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{
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{
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NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
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NVIC_DisableIRQ((IRQn_Type)_dwc2_controller[rhport].irqnum);
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}
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}
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TU_ATTR_ALWAYS_INLINE
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TU_ATTR_ALWAYS_INLINE
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