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https://github.com/hathach/tinyusb.git
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add stm32f103ze_iar
This commit is contained in:
hathach
parent
e180d915c6
commit
e9a5af3512
@ -399,6 +399,11 @@ function(family_flash_jlink TARGET)
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set(JLINK_IF swd)
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endif ()
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if (NOT DEFINED JLINK_OPTION)
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set(JLINK_OPTION "")
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endif ()
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separate_arguments(OPTION_LIST UNIX_COMMAND ${JLINK_OPTION})
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file(GENERATE
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OUTPUT $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
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CONTENT "halt
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@ -410,7 +415,8 @@ exit"
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add_custom_target(${TARGET}-jlink
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DEPENDS ${TARGET}
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COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
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COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} ${OPTION_LIST} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
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VERBATIM
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)
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endfunction()
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14
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
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14
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
Normal file
@ -0,0 +1,14 @@
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set(MCU_VARIANT stm32f103xe)
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set(JLINK_DEVICE stm32f103ze)
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string(TOUPPER ${MCU_VARIANT} MCU_VARIANT_UPPER)
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set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
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set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32F103xE
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HSE_VALUE=8000000U
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)
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endfunction()
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97
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h
Normal file
97
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h
Normal file
@ -0,0 +1,97 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// LED
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#define LED_PORT GPIOF
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#define LED_PIN GPIO_PIN_6
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#define LED_STATE_ON 1
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// Button
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#define BUTTON_PORT GPIOG
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#define BUTTON_PIN GPIO_PIN_8
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#define BUTTON_STATE_ACTIVE 0
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// USB Connect
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#define USB_CONNECT_PORT GPIOG
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#define USB_CONNECT_PIN GPIO_PIN_11
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#define USB_CONNECT_STATE 0
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// UART
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//#define UART_DEV USART1
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//#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
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//#define UART_GPIO_PORT GPIOA
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//#define UART_GPIO_AF GPIO_AF1_USART1
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//#define UART_TX_PIN GPIO_PIN_9
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//#define UART_RX_PIN GPIO_PIN_10
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void board_stm32f1_clock_init(void)
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{
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RCC_ClkInitTypeDef clkinitstruct = {0};
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RCC_OscInitTypeDef oscinitstruct = {0};
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RCC_PeriphCLKInitTypeDef rccperiphclkinit = {0};
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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oscinitstruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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oscinitstruct.HSEState = RCC_HSE_ON;
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oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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oscinitstruct.PLL.PLLMUL = RCC_PLL_MUL9;
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oscinitstruct.PLL.PLLState = RCC_PLL_ON;
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oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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HAL_RCC_OscConfig(&oscinitstruct);
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/* USB clock selection */
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rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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rccperiphclkinit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
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HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
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clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2);
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}
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static inline void board_vbus_sense_init(void)
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{
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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13
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
Normal file
13
hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
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@ -0,0 +1,13 @@
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MCU_VARIANT = stm32f103xe
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CFLAGS += -DSTM32F103xE -DHSE_VALUE=8000000U
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# Linker
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LD_FILE_GCC = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
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LD_FILE_IAR = ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f103ze
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# flash target ROM bootloader
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flash: flash-jlink
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@ -57,6 +57,19 @@ void board_init(void) {
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
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__HAL_RCC_GPIOE_CLK_ENABLE();
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#endif
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#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
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__HAL_RCC_GPIOF_CLK_ENABLE();
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#endif
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#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
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__HAL_RCC_GPIOG_CLK_ENABLE();
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#endif
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#if CFG_TUSB_OS == OPT_OS_NONE
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// 1ms tick timer
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SysTick_Config(SystemCoreClock / 1000);
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@ -107,10 +120,18 @@ void board_init(void) {
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HAL_UART_Init(&UartHandle);
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#endif
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#ifdef USB_CONNECT_PIN
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GPIO_InitStruct.Pin = USB_CONNECT_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(USB_CONNECT_PORT, &GPIO_InitStruct);
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#endif
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// USB Pins
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// Configure USB DM and DP pins.
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GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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@ -119,6 +140,18 @@ void board_init(void) {
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__HAL_RCC_USB_CLK_ENABLE();
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}
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#ifdef USB_CONNECT_PIN
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void dcd_disconnect(uint8_t rhport) {
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(void)rhport;
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HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, 1-USB_CONNECT_STATE);
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}
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void dcd_connect(uint8_t rhport) {
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(void)rhport;
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HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, USB_CONNECT_STATE);
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}
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#endif
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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@ -1,10 +1,10 @@
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ST_FAMILY = f1
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DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_${ST_FAMILY} hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver
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ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
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ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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ST_CMSIS = hw/mcu/st/cmsis_device_${ST_FAMILY}
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ST_HAL_DRIVER = hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver
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include $(TOP)/$(BOARD_PATH)/board.mk
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include ${TOP}/${BOARD_PATH}/board.mk
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CPU_CORE ?= cortex-m3
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# --------------
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@ -29,23 +29,23 @@ LDFLAGS_GCC += \
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# ------------------------
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SRC_C += \
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src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
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$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
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${ST_CMSIS}/Source/Templates/system_stm32${ST_FAMILY}xx.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_cortex.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc_ex.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_gpio.c \
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${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_uart.c
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
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$(TOP)/$(ST_CMSIS)/Include \
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$(TOP)/$(ST_HAL_DRIVER)/Inc
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${TOP}/${BOARD_PATH} \
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${TOP}/lib/CMSIS_5/CMSIS/Core/Include \
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${TOP}/${ST_CMSIS}/Include \
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${TOP}/${ST_HAL_DRIVER}/Inc
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# Startup
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SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
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SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
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SRC_S_GCC += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
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SRC_S_IAR += ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s
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# flash target ROM bootloader: flash-dfu-util
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DFU_UTIL_OPTION = -a 0 --dfuse-address 0x08000000
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