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implement dcd_edpt_close_all(), pass chapter9 test suite (without remote wakeup)
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@ -92,11 +92,12 @@ static void bus_reset(void)
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USB0.out_ep_reg[ep_num].doepctl |= USB_DO_SNAK0_M; // DOEPCTL0_SNAK
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}
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USB0.dcfg &= ~USB_DEVADDR_M; // reset address
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// clear device address
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USB0.dcfg &= ~USB_DEVADDR_M;
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USB0.daintmsk |= USB_OUTEPMSK0_M | USB_INEPMSK0_M;
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USB0.doepmsk |= USB_SETUPMSK_M | USB_XFERCOMPLMSK;
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USB0.diepmsk |= USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M /*| USB_INTKNTXFEMPMSK_M*/;
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USB0.daintmsk = USB_OUTEPMSK0_M | USB_INEPMSK0_M;
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USB0.doepmsk = USB_SETUPMSK_M | USB_XFERCOMPLMSK;
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USB0.diepmsk = USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M /*| USB_INTKNTXFEMPMSK_M*/;
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// "USB Data FIFOs" section in reference manual
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// Peripheral FIFO architecture
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@ -260,9 +261,10 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt)
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xfer->max_size = desc_edpt->wMaxPacketSize.size;
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if (dir == TUSB_DIR_OUT) {
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out_ep[epnum].doepctl |= USB_USBACTEP0_M |
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desc_edpt->bmAttributes.xfer << USB_EPTYPE0_S |
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desc_edpt->wMaxPacketSize.size << USB_MPS0_S;
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out_ep[epnum].doepctl |= USB_USBACTEP1_M |
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desc_edpt->bmAttributes.xfer << USB_EPTYPE1_S |
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(desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_DO_SETD0PID1_M : 0) |
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desc_edpt->wMaxPacketSize.size << USB_MPS1_S;
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USB0.daintmsk |= (1 << (16 + epnum));
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} else {
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// "USB Data FIFOs" section in reference manual
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@ -315,7 +317,25 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt)
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void dcd_edpt_close_all(uint8_t rhport)
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{
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(void) rhport;
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// TODO implement dcd_edpt_close_all()
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usb_out_endpoint_t *out_ep = &(USB0.out_ep_reg[0]);
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usb_in_endpoint_t *in_ep = &(USB0.in_ep_reg[0]);
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// Disable non-control interrupt
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USB0.daintmsk = USB_OUTEPMSK0_M | USB_INEPMSK0_M;
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for(uint8_t n = 1; n < EP_MAX; n++)
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{
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// disable OUT endpoint
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out_ep[n].doepctl = 0;
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xfer_status[n][TUSB_DIR_OUT].max_size = 0;
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// disable IN endpoint
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in_ep[n].diepctl = 0;
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xfer_status[n][TUSB_DIR_IN].max_size = 0;
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}
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_allocated_fifos = 1;
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}
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bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
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@ -367,49 +387,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
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bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
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{
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(void)rhport;
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// USB buffers always work in bytes so to avoid unnecessary divisions we demand item_size = 1
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TU_ASSERT(ff->item_size == 1);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
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xfer->buffer = NULL;
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xfer->ff = ff;
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xfer->total_len = total_bytes;
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xfer->queued_len = 0;
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xfer->short_packet = false;
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uint16_t num_packets = (total_bytes / xfer->max_size);
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uint8_t short_packet_size = total_bytes % xfer->max_size;
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// Zero-size packet is special case.
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if (short_packet_size > 0 || (total_bytes == 0)) {
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num_packets++;
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}
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ESP_LOGV(TAG, "Transfer <-> EP%i, %s, pkgs: %i, bytes: %i",
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epnum, ((dir == TUSB_DIR_IN) ? "USB0.HOST (in)" : "HOST->DEV (out)"),
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num_packets, total_bytes);
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// IN and OUT endpoint xfers are interrupt-driven, we just schedule them
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// here.
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if (dir == TUSB_DIR_IN) {
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// A full IN transfer (multiple packets, possibly) triggers XFRC.
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USB0.in_ep_reg[epnum].dieptsiz = (num_packets << USB_D_PKTCNT0_S) | total_bytes;
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USB0.in_ep_reg[epnum].diepctl |= USB_D_EPENA1_M | USB_D_CNAK1_M; // Enable | CNAK
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// Enable fifo empty interrupt only if there are something to put in the fifo.
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if(total_bytes != 0) {
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USB0.dtknqr4_fifoemptymsk |= (1 << epnum);
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}
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} else {
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// Each complete packet for OUT xfers triggers XFRC.
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USB0.out_ep_reg[epnum].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S);
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USB0.out_ep_reg[epnum].doepctl |= USB_EPENA0_M | USB_CNAK0_M;
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}
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return true;
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}
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#endif
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