default CFG_TUH_DWC2_DMA_ENABLE to 0

This commit is contained in:
hathach 2024-11-27 11:54:11 +07:00
parent 9e4b855e53
commit d9ef3cd1b3
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GPG Key ID: 26FAB84F615C3C52
2 changed files with 9 additions and 5 deletions

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@ -354,9 +354,12 @@
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_ESP32
#define TUP_DCD_ENDPOINT_MAX 7 // only 5 TX FIFO for endpoint IN
#define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
#define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
// Disable slave if DMA is enabled
#define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
#elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_ESP32
@ -365,10 +368,11 @@
#define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
// #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 1
// #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT 0
// Disable slave if DMA is enabled
#define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
// Enable host/device dcache if DMA is enabled
// Enable dcache if DMA is enabled
#define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
#define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64

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@ -277,7 +277,7 @@
// Enable DWC2 DMA for host
#ifndef CFG_TUH_DWC2_DMA_ENABLE
#ifndef CFG_TUH_DWC2_DMA_ENABLE_DEFAULT
#define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 1
#define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
#endif
#define CFG_TUH_DWC2_DMA_ENABLE CFG_TUH_DWC2_DMA_ENABLE_DEFAULT