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Merge remote-tracking branch 'mainline/master' into HEAD

Browse Source 
Update fsp to 4.0.0
This commit is contained in:
Martino Facchin 2023-06-05 09:12:50 +02:00
commit cdbd3a0b4e
186 changed files with 7961 additions and 2023 deletions
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3
.github/workflows/build_aarch64.yml vendored
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@ -1,6 +1,7 @@
name: Build AArch64
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -69,7 +70,7 @@ jobs:
run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }}

87
.github/workflows/build_arm.yml vendored
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@ -1,6 +1,7 @@
name: Build ARM
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -33,21 +34,19 @@ jobs:
family:
# Alphabetical order
- 'broadcom_32bit'
- 'imxrt'
- 'kinetis_k32 kinetis_kl'
- 'lpc11 lpc13 lpc15 lpc17 lpc18'
- 'kinetis_k32l kinetis_kl'
- 'lpc11 lpc13 lpc15 lpc17'
- 'lpc51 lpc54 lpc55'
- 'mm32 msp432e4'
- 'nrf'
- 'ra'
- 'rp2040'
- 'samd11 samd21'
- 'samd51 same5x'
- 'saml2x'
- 'stm32f0 stm32f1 stm32f2 stm32f3'
- 'stm32f4'
- 'stm32f7'
- 'stm32g4 stm32h7'
- 'stm32h7'
- 'stm32l0 stm32l4 stm32u5 stm32wb'
- 'tm4c123 xmc4000'
steps:
@ -77,7 +76,7 @@ jobs:
echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }}
@ -91,24 +90,11 @@ jobs:
find ${ex} -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"'
done
# Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted
- name: Prepare rp2040 Artifacts
if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
run: find examples/ -name "*.elf" -exec mv {} . \;
# Upload binaries for hardware test with self-hosted
- name: Prepare stm32l412nucleo Artifacts
if: contains(matrix.family, 'stm32l4')
run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
- name: Upload Artifacts for rp2040
if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
uses: actions/upload-artifact@v3
with:
name: rp2040
path: |
*.elf
- name: Upload Artifacts for stm32l412nucleo
if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
uses: actions/upload-artifact@v3
@ -117,67 +103,6 @@ jobs:
path: |
*.elf
# ---------------------------------------
# Hardware in the loop (HIL)
# Current self-hosted instance is running on an RPI4 with
# - pico + pico-probe connected via USB
# - pico-probe is /dev/ttyACM0
# ---------------------------------------
hw-rp2040-test:
# run only with hathach's commit due to limited resource on RPI4
if: github.repository_owner == 'hathach'
needs: build-arm
runs-on: [self-hosted, Linux, ARM64, rp2040]
steps:
- name: Clean workspace
run: |
echo "Cleaning up previous run"
rm -rf "${{ github.workspace }}"
mkdir -p "${{ github.workspace }}"
- name: Download rp2040 Artifacts
uses: actions/download-artifact@v3
with:
name: rp2040
- name: Create flash.sh
run: |
#echo > flash.sh 'cmdout=$(openocd -f "interface/picoprobe.cfg" -f "target/rp2040.cfg" -c "program $1 reset exit")'
echo > flash.sh 'pyocd flash -t rp2040 $1'
echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
chmod +x flash.sh
- name: Test cdc_dual_ports
run: |
./flash.sh cdc_dual_ports.elf
while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
test -e /dev/ttyACM1 && echo "ttyACM1 exists"
test -e /dev/ttyACM2 && echo "ttyACM2 exists"
- name: Test cdc_msc
run: |
./flash.sh cdc_msc.elf
readme='/media/pi/TinyUSB MSC/README.TXT'
while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
test -e /dev/ttyACM1 && echo "ttyACM1 exists"
test -f "$readme" && echo "$readme exists"
cat "$readme"
- name: Test dfu
run: |
./flash.sh dfu.elf
while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
dfu-util -d cafe -a 0 -U dfu0
dfu-util -d cafe -a 1 -U dfu1
grep "TinyUSB DFU! - Partition 0" dfu0
grep "TinyUSB DFU! - Partition 1" dfu1
- name: Test dfu_runtime
run: |
./flash.sh dfu_runtime.elf
while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
# ---------------------------------------
# Hardware in the loop (HIL)
# Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user

1
.github/workflows/build_esp.yml vendored
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@ -1,6 +1,7 @@
name: Build ESP
on:
workflow_dispatch:
push:
paths:
- 'src/**'

31
.github/workflows/build_iar.yml vendored
View File

@ -1,6 +1,7 @@
name: Build IAR
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -22,7 +23,7 @@ concurrency:
cancel-in-progress: true
jobs:
build-arm:
makefile:
runs-on: [self-hosted, Linux, X64, hifiphile]
strategy:
fail-fast: false
@ -43,7 +44,33 @@ jobs:
uses: actions/checkout@v3
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
cmake:
runs-on: [self-hosted, Linux, X64, hifiphile]
strategy:
fail-fast: false
matrix:
family:
# Alphabetical order
# Note: bundle multiple families into a matrix since there is only one self-hosted instance can
# run IAR build. Too many matrix can hurt due to setup/teardown overhead.
- 'stm32g0 stm32g4'
steps:
- name: Clean workspace
run: |
echo "Cleaning up previous run"
rm -rf "${{ github.workspace }}"
mkdir -p "${{ github.workspace }}"
- name: Checkout TinyUSB
uses: actions/checkout@v3
- name: Get Dependencies
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iccarm

3
.github/workflows/build_msp430.yml vendored
View File

@ -1,6 +1,7 @@
name: Build MSP430
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -67,7 +68,7 @@ jobs:
run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }}

3
.github/workflows/build_renesas.yml vendored
View File

@ -1,6 +1,7 @@
name: Build Renesas
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -67,7 +68,7 @@ jobs:
run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }}

3
.github/workflows/build_riscv.yml vendored
View File

@ -1,6 +1,7 @@
name: Build RISC-V
on:
workflow_dispatch:
push:
paths:
- 'src/**'
@ -68,7 +69,7 @@ jobs:
run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
- name: Get Dependencies
run: python3 tools/get_family_deps.py ${{ matrix.family }}
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python3 tools/build_family.py ${{ matrix.family }}

1
.github/workflows/build_win_mac.yml vendored
View File

@ -1,6 +1,7 @@
name: Build Windows/MacOS
on:
workflow_dispatch:
push:
paths:
- 'src/**'

1
.github/workflows/cifuzz.yml vendored
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@ -1,5 +1,6 @@
name: CIFuzz
on:
workflow_dispatch:
pull_request:
branches:
- master

151
.github/workflows/cmake_arm.yml vendored Normal file
View File

@ -0,0 +1,151 @@
name: CMake ARM
on:
workflow_dispatch:
push:
paths:
- 'src/**'
- 'examples/**'
- 'lib/**'
- 'hw/**'
- '.github/workflows/cmake_arm.yml'
pull_request:
branches: [ master ]
paths:
- 'src/**'
- 'examples/**'
- 'lib/**'
- 'hw/**'
- '.github/workflows/cmake_arm.yml'
concurrency:
group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }}
cancel-in-progress: true
jobs:
# ---------------------------------------
# Build ARM family
# ---------------------------------------
build-arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
family:
# Alphabetical order
- 'lpc18'
- 'mcx'
- 'imxrt'
- 'rp2040'
- 'stm32g0'
- 'stm32g4'
steps:
- name: Setup Python
uses: actions/setup-python@v4
with:
python-version: '3.x'
- name: Install ARM GCC
uses: carlosperate/arm-none-eabi-gcc-action@v1
with:
release: '11.2-2022.02'
- name: Install Ninja
run: sudo apt install -y ninja-build
- name: Checkout TinyUSB
uses: actions/checkout@v3
- name: Checkout pico-sdk for rp2040
if: matrix.family == 'rp2040'
uses: actions/checkout@v3
with:
repository: raspberrypi/pico-sdk
ref: develop
path: pico-sdk
- name: Get Dependencies
run: python3 tools/get_deps.py ${{ matrix.family }}
- name: Build
run: python tools/build_cmake.py ${{ matrix.family }}
env:
# for rp2040, there is no harm if defined for other families
PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk
# Upload binaries for hardware test with self-hosted
- name: Prepare rp2040 Artifacts
if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
working-directory: ${{github.workspace}}/cmake-build/cmake-build-raspberry_pi_pico
run: |
find device/ -name "*.elf" -exec mv {} ../../ \;
# find host/ -name "*.elf" -exec mv {} ../../ \;
# find dual/ -name "*.elf" -exec mv {} ../../ \;
- name: Upload Artifacts for rp2040
if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
uses: actions/upload-artifact@v3
with:
name: rp2040
path: |
*.elf
# ---------------------------------------
# Hardware in the loop (HIL)
# Current self-hosted instance is running on an RPI4 with
# - pico + pico-probe connected via USB
# - pico-probe is /dev/ttyACM0
# ---------------------------------------
hw-rp2040-test:
# run only with hathach's commit due to limited resource on RPI4
if: github.repository_owner == 'hathach'
needs: build-arm
runs-on: [self-hosted, Linux, ARM64, rp2040]
steps:
- name: Clean workspace
run: |
echo "Cleaning up previous run"
rm -rf "${{ github.workspace }}"
mkdir -p "${{ github.workspace }}"
- name: Download rp2040 Artifacts
uses: actions/download-artifact@v3
with:
name: rp2040
- name: Create flash.sh
run: |
echo > flash.sh 'cmdout=$(openocd -f "interface/cmsis-dap.cfg" -f "target/rp2040.cfg" -c "adapter speed 5000" -c "program $1 reset exit")'
echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
chmod +x flash.sh
- name: Test cdc_dual_ports
run: |
./flash.sh cdc_dual_ports.elf
while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
test -e /dev/ttyACM1 && echo "ttyACM1 exists"
test -e /dev/ttyACM2 && echo "ttyACM2 exists"
- name: Test cdc_msc
run: |
./flash.sh cdc_msc.elf
readme='/media/pi/TinyUSB MSC/README.TXT'
while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
test -e /dev/ttyACM1 && echo "ttyACM1 exists"
test -f "$readme" && echo "$readme exists"
cat "$readme"
- name: Test dfu
run: |
./flash.sh dfu.elf
while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
dfu-util -d cafe -a 0 -U dfu0
dfu-util -d cafe -a 1 -U dfu1
grep "TinyUSB DFU! - Partition 0" dfu0
grep "TinyUSB DFU! - Partition 1" dfu1
- name: Test dfu_runtime
run: |
./flash.sh dfu_runtime.elf
while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done

1
.github/workflows/pre-commit.yml vendored
View File

@ -1,6 +1,7 @@
name: pre-commit
on:
workflow_dispatch:
push:
pull_request:
branches: [ master ]

1
.github/workflows/trigger.yml vendored
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@ -1,6 +1,7 @@
name: Trigger Repos
on:
workflow_dispatch:
push:
branches: master
release:

15
.idea/cmake.xml generated
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@ -2,6 +2,11 @@
<project version="4">
<component name="CMakeSharedSettings">
<configurations>
<configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
<configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
<configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
<configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
<configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
<configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
<ADDITIONAL_GENERATION_ENVIRONMENT>
<envs>
@ -22,8 +27,14 @@
</envs>
</ADDITIONAL_GENERATION_ENVIRONMENT>
</configuration>
<configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
<configuration PROFILE_NAME="rt1010 evk" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
<configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
<configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
<configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
<configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800" />
<configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
<configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo" />
<configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=stm32g474nucleo" />
<configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1" />
</configurations>
</component>
</project>

10
.idea/runConfigurations/rp2040.xml generated Normal file
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@ -0,0 +1,10 @@
<component name="ProjectRunConfigurationManager">
<configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc">
<openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
<debugger kind="GDB" isBundled="true" />
</openocd>
<method v="2">
<option name="CLION.COMPOUND.BUILD" enabled="true" />
</method>
</configuration>
</component>

10
.idea/runConfigurations/rt1010_jlink.xml generated Normal file
View File

@ -0,0 +1,10 @@
<component name="ProjectRunConfigurationManager">
<configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcxn947" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
<custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
<debugger kind="GDB" isBundled="true" />
</custom-gdb-server>
<method v="2">
<option name="CLION.COMPOUND.BUILD" enabled="true" />
</method>
</configuration>
</component>

10
.idea/runConfigurations/rt1060_jlink.xml generated Normal file
View File

@ -0,0 +1,10 @@
<component name="ProjectRunConfigurationManager">
<configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="host_hid_to_device_cdc" TARGET_NAME="host_hid_to_device_cdc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="host_hid_to_device_cdc" RUN_TARGET_NAME="host_hid_to_device_cdc">
<custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
<debugger kind="GDB" isBundled="true" />
</custom-gdb-server>
<method v="2">
<option name="CLION.COMPOUND.BUILD" enabled="true" />
</method>
</configuration>
</component>

5
.idea/runConfigurations/tinyusb_examples.xml generated
View File

@ -1,5 +0,0 @@
<component name="ProjectRunConfigurationManager">
<configuration default="false" name="tinyusb_examples" type="CMakeListConfigurationType" factoryName="CMakeListConfigurationFactory">
<method v="2" />
</configuration>
</component>

59
.idea/vcs.xml generated
View File

@ -1,65 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="VcsDirectoryMappings">
<mapping directory="$PROJECT_DIR$/../pico/pico-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/allwinner" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/bridgetek/ft9xx/ft90x-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/broadcom" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/gd/nuclei-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/infineon/mtb-xmclib-cat3" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/microchip" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/mindmotion/mm32sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/nordic/nrfx" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/nuvoton" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/nxp/lpcopen" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/nxp/mcux-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/nxp/nxp_sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/Pico-PIO-USB" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/cyw43-driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/lwip" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/tinyusb" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/renesas/fsp" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/renesas/rx" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/silabs/cmsis-dfp-efm32gg12b" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/sony/cxd56/spresense-exported-sdk" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f0" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f1" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f2" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f3" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f4" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f7" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g0" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g4" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_h7" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l0" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l1" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l4" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l5" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_u5" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_wb" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f0xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f1xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f2xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f3xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f4xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f7xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g0xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g4xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32h7xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l0xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l1xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l4xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l5xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32u5xx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32wbxx_hal_driver" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/ti" vcs="Git" />
<mapping directory="$PROJECT_DIR$/hw/mcu/wch/ch32v307" vcs="Git" />
<mapping directory="$PROJECT_DIR$/lib/CMSIS_5" vcs="Git" />
<mapping directory="$PROJECT_DIR$/lib/FreeRTOS-Kernel" vcs="Git" />
<mapping directory="$PROJECT_DIR$/lib/lwip" vcs="Git" />
<mapping directory="$PROJECT_DIR$/lib/sct_neopixel" vcs="Git" />
<mapping directory="$PROJECT_DIR$/tools/uf2" vcs="Git" />
</component>
</project>

16
.pre-commit-config.yaml
View File

@ -8,8 +8,16 @@ repos:
hooks:
- id: check-yaml
- id: trailing-whitespace
exclude: |
(?x)^(
hw/bsp/mcx/sdk/
)
- id: end-of-file-fixer
exclude: ^.idea/
exclude: |
(?x)^(
.idea/|
hw/bsp/mcx/sdk/
)
- id: forbid-submodules
- repo: https://github.com/codespell-project/codespell
@ -17,7 +25,11 @@ repos:
hooks:
- id: codespell
args: [-w]
exclude: ^lib/
exclude: |
(?x)^(
lib/|
hw/bsp/mcx/sdk/
)
- repo: local
hooks:

9
.readthedocs.yaml
View File

@ -4,11 +4,18 @@
version: 2
# Set the version of Python and other tools you might need
build:
os: ubuntu-22.04
tools:
python: "3.11"
# Build documentation in the docs/ directory with Sphinx
sphinx:
configuration: docs/conf.py
# Optionally declare the Python requirements required to build your docs
python:
version: 3.8
install:
- requirements: docs/requirements.txt

2
README.rst
View File

@ -55,7 +55,7 @@ The stack supports the following MCUs:
- **Silabs:** EFM32GG
- **Sony:** CXD56
- **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G4, L0, L1, L4, L4+, WB
- **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G0, G4, L0, L1, L4, L4+, WB
- **TI:** MSP430, MSP432E4, TM4C123
- **ValentyUSB:** eptri
- **WCH:** CH32V307

6
cmake/cpu/cortex-m7.cmake
View File

@ -1,6 +0,0 @@
set(TOOLCHAIN_COMMON_FLAGS
-mthumb
-mcpu=cortex-m7
-mfloat-abi=hard
-mfpu=fpv5-d16
)

20
cmake/toolchain/set_flags.cmake
View File

@ -1,20 +0,0 @@
include(CMakePrintHelpers)
foreach(LANG IN ITEMS C CXX ASM)
# join the toolchain flags into a single string
list(APPEND TOOLCHAIN_${LANG}_FLAGS ${TOOLCHAIN_COMMON_FLAGS})
list(JOIN TOOLCHAIN_${LANG}_FLAGS " " TOOLCHAIN_${LANG}_FLAGS)
set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_${LANG}_FLAGS}")
#cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
# optimization flags
set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
endforeach()
# try_compile is cmake test compiling its own example,
# pass -nostdlib to skip stdlib linking
get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
if(IS_IN_TRY_COMPILE)
set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
endif()

2
docs/info/changelog.rst
View File

@ -93,7 +93,7 @@ Controller Driver (DCD & HCD)
- CFG_TUD_ENABLED/CFG_TUH_ENABLED, CFG_TUD_MAX_SPEED/CFG_TUH_MAX_SPEED can be used to replace CFG_TUSB_RHPORT0_MODE/CFG_TUSB_RHPORT1_MODE
- tud_init(rphort), tuh_init(rhport) can be used to init stack on specified roothub port (controller) instead of tusb_init(void)
- Add dcd/hcd port specific defines TUP_ (stand for tinyusb port-specific)
- Add dcd/hcd port specific defines `TUP_` (stand for tinyusb port-specific)
- [dwc2]
- Update to support stm32 h72x, h73x with only 1 otg controller

4
docs/requirements.txt
View File

@ -1,4 +1,4 @@
sphinx~=3.0
sphinx>=5.0
furo>=2020.12.30.b24
sphinx-autodoc-typehints>=1.10
jinja2==3.0.3
jinja2>=3.0.3

4
examples/CMakeLists.txt
View File

@ -1,9 +1,9 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
#set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
project(tinyusb_examples)
project(tinyusb_examples C CXX ASM)
add_subdirectory(device)
add_subdirectory(dual)

4
examples/device/CMakeLists.txt
View File

@ -1,8 +1,8 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
project(tinyusb_device_examples)
project(tinyusb_device_examples C CXX ASM)
family_initialize_project(tinyusb_device_examples ${CMAKE_CURRENT_LIST_DIR})
# family_add_subdirectory will filter what to actually add based on selected FAMILY

1
examples/device/cdc_msc/CMakeLists.txt
View File

@ -1,4 +1,5 @@
cmake_minimum_required(VERSION 3.17)
set_property(GLOBAL PROPERTY USE_FOLDERS ON)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)

10
examples/device/cdc_msc_freertos/CMakeLists.txt
View File

@ -34,11 +34,5 @@ target_include_directories(${PROJECT} PUBLIC
# in hw/bsp/FAMILY/family.cmake for details.
family_configure_device_example(${PROJECT})
if (NOT TARGET freertos_kernel)
family_add_freertos_config(${PROJECT})
add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
endif()
target_link_libraries(${PROJECT} PUBLIC
freertos_kernel
)
# Add FreeRTOS for this example
family_add_freertos(${PROJECT})

10
examples/device/hid_composite_freertos/CMakeLists.txt
View File

@ -33,11 +33,5 @@ target_include_directories(${PROJECT} PUBLIC
# in hw/bsp/FAMILY/family.cmake for details.
family_configure_device_example(${PROJECT})
if (NOT TARGET freertos_kernel)
family_add_freertos_config(${PROJECT})
add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
endif()
target_link_libraries(${PROJECT} PUBLIC
freertos_kernel
)
# Add FreeRTOS for this example
family_add_freertos(${PROJECT})

96
examples/device/net_lwip_webserver/CMakeLists.txt
View File

@ -1,10 +1,12 @@
cmake_minimum_required(VERSION 3.17)
set(TOP "../../..")
get_filename_component(TOP "${TOP}" REALPATH)
include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
if (EXISTS ${TOP}/lib/lwip/src)
include(${TOP}/hw/bsp/family_support.cmake)
set(LWIP ${TOP}/lib/lwip)
if (NOT EXISTS ${LWIP}/src)
MESSAGE(WARNING "lib/lwip submodule not found, please run 'python tools/get_deps.py lib/lwip' to fetch it")
return()
endif()
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
@ -18,66 +20,74 @@ if (EXISTS ${TOP}/lib/lwip/src)
# Example source
target_sources(${PROJECT} PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
${CMAKE_CURRENT_LIST_DIR}/src/main.c
${CMAKE_CURRENT_LIST_DIR}/src/usb_descriptors.c
)
# Example include
target_include_directories(${PROJECT} PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/src
${TOP}/lib/lwip/src/include
${TOP}/lib/lwip/src/include/ipv4
${TOP}/lib/lwip/src/include/lwip/apps
${CMAKE_CURRENT_LIST_DIR}/src
${LWIP}/src/include
${LWIP}/src/include/ipv4
${LWIP}/src/include/lwip/apps
${TOP}/lib/networking
)
# lib/networking sources
target_sources(${PROJECT} PUBLIC
${TOP}/lib/lwip/src/core/altcp.c
${TOP}/lib/lwip/src/core/altcp_alloc.c
${TOP}/lib/lwip/src/core/altcp_tcp.c
${TOP}/lib/lwip/src/core/def.c
${TOP}/lib/lwip/src/core/dns.c
${TOP}/lib/lwip/src/core/inet_chksum.c
${TOP}/lib/lwip/src/core/init.c
${TOP}/lib/lwip/src/core/ip.c
${TOP}/lib/lwip/src/core/mem.c
${TOP}/lib/lwip/src/core/memp.c
${TOP}/lib/lwip/src/core/netif.c
${TOP}/lib/lwip/src/core/pbuf.c
${TOP}/lib/lwip/src/core/raw.c
${TOP}/lib/lwip/src/core/stats.c
${TOP}/lib/lwip/src/core/sys.c
${TOP}/lib/lwip/src/core/tcp.c
${TOP}/lib/lwip/src/core/tcp_in.c
${TOP}/lib/lwip/src/core/tcp_out.c
${TOP}/lib/lwip/src/core/timeouts.c
${TOP}/lib/lwip/src/core/udp.c
${TOP}/lib/lwip/src/core/ipv4/autoip.c
${TOP}/lib/lwip/src/core/ipv4/dhcp.c
${TOP}/lib/lwip/src/core/ipv4/etharp.c
${TOP}/lib/lwip/src/core/ipv4/icmp.c
${TOP}/lib/lwip/src/core/ipv4/igmp.c
${TOP}/lib/lwip/src/core/ipv4/ip4.c
${TOP}/lib/lwip/src/core/ipv4/ip4_addr.c
${TOP}/lib/lwip/src/core/ipv4/ip4_frag.c
${TOP}/lib/lwip/src/netif/ethernet.c
${TOP}/lib/lwip/src/netif/slipif.c
${TOP}/lib/lwip/src/apps/http/httpd.c
${TOP}/lib/lwip/src/apps/http/fs.c
${TOP}/lib/networking/dhserver.c
${TOP}/lib/networking/dnserver.c
${TOP}/lib/networking/rndis_reports.c
)
# lwip sources
target_sources(${PROJECT} PUBLIC
${LWIP}/src/core/altcp.c
${LWIP}/src/core/altcp_alloc.c
${LWIP}/src/core/altcp_tcp.c
${LWIP}/src/core/def.c
${LWIP}/src/core/dns.c
${LWIP}/src/core/inet_chksum.c
${LWIP}/src/core/init.c
${LWIP}/src/core/ip.c
${LWIP}/src/core/mem.c
${LWIP}/src/core/memp.c
${LWIP}/src/core/netif.c
${LWIP}/src/core/pbuf.c
${LWIP}/src/core/raw.c
${LWIP}/src/core/stats.c
${LWIP}/src/core/sys.c
${LWIP}/src/core/tcp.c
${LWIP}/src/core/tcp_in.c
${LWIP}/src/core/tcp_out.c
${LWIP}/src/core/timeouts.c
${LWIP}/src/core/udp.c
${LWIP}/src/core/ipv4/autoip.c
${LWIP}/src/core/ipv4/dhcp.c
${LWIP}/src/core/ipv4/etharp.c
${LWIP}/src/core/ipv4/icmp.c
${LWIP}/src/core/ipv4/igmp.c
${LWIP}/src/core/ipv4/ip4.c
${LWIP}/src/core/ipv4/ip4_addr.c
${LWIP}/src/core/ipv4/ip4_frag.c
${LWIP}/src/netif/ethernet.c
${LWIP}/src/netif/slipif.c
${LWIP}/src/apps/http/httpd.c
${LWIP}/src/apps/http/fs.c
)
# due to warnings from other net source, we need to prevent error from some of the warnings options
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_compile_options(${PROJECT} PUBLIC
-Wno-error=null-dereference
-Wno-error=conversion
-Wno-error=sign-conversion
-Wno-error=sign-compare
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
endif ()
# Configure compilation flags and libraries for the example... see the corresponding function
# in hw/bsp/FAMILY/family.cmake for details.
family_configure_device_example(${PROJECT})
endif()

5
examples/dual/CMakeLists.txt
View File

@ -1,9 +1,10 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
project(tinyusb_dual_examples)
project(tinyusb_dual_examples C CXX ASM)
family_initialize_project(tinyusb_dual_examples ${CMAKE_CURRENT_LIST_DIR})
if (FAMILY STREQUAL "rp2040" AND NOT TARGET tinyusb_pico_pio_usb)
message("Skipping dual host/device mode examples as Pico-PIO-USB is not available")
else ()

4
examples/dual/host_hid_to_device_cdc/CMakeLists.txt
View File

@ -1,11 +1,11 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

4
examples/dual/host_hid_to_device_cdc/src/tusb_config.h
View File

@ -84,10 +84,6 @@
#define CFG_TUH_RPI_PIO_USB 1
#endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
// #define CFG_TUSB_DEBUG 0
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section.

4
examples/host/CMakeLists.txt
View File

@ -1,8 +1,8 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
project(tinyusb_host_examples)
project(tinyusb_host_examples C CXX ASM)
family_initialize_project(tinyusb_host_examples ${CMAKE_CURRENT_LIST_DIR})
# family_add_subdirectory will filter what to actually add based on selected FAMILY

4
examples/host/bare_api/CMakeLists.txt
View File

@ -1,11 +1,11 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

2
examples/host/cdc_msc_hid/CMakeLists.txt
View File

@ -5,7 +5,7 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

2
examples/host/cdc_msc_hid/src/hid_app.c
View File

@ -263,7 +263,7 @@ static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t c
if (!rpt_info)
{
printf("Couldn't find the report info for this report !\r\n");
printf("Couldn't find report info !\r\n");
return;
}

4
examples/host/hid_controller/CMakeLists.txt
View File

@ -1,11 +1,11 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

4
examples/host/msc_file_explorer/CMakeLists.txt
View File

@ -1,11 +1,11 @@
cmake_minimum_required(VERSION 3.5)
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

3
examples/make.mk
View File

@ -2,6 +2,8 @@
# Common make definition for all examples
# ---------------------------------------
TOOLCHAIN ?= gcc
#-------------- TOP and CURRENT_PATH ------------
# Set TOP to be the path to get from the current directory (where make was
@ -75,6 +77,7 @@ else
endif
#-------------- Cross Compiler ------------
# Can be set by board, default to ARM GCC
CROSS_COMPILE ?= arm-none-eabi-

24
examples/rules.mk
View File

@ -72,6 +72,11 @@ endif
LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
# Some toolchain such as renesas rx does not support --print-memory-usage flags
ifneq ($(FAMILY),rx)
LDFLAGS += -Wl,--print-memory-usage
endif
ifdef LD_FILE
LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
endif
@ -81,7 +86,7 @@ LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE)
endif
ifneq ($(SKIP_NANOLIB), 1)
LDFLAGS += -specs=nosys.specs -specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
endif
ASFLAGS += $(CFLAGS)
@ -222,14 +227,19 @@ endif
# Jlink Interface
JLINK_IF ?= swd
# Jlink script
define jlink_script
halt
loadfile $^
r
go
exit
endef
export jlink_script
# Flash using jlink
flash-jlink: $(BUILD)/$(PROJECT).hex
@echo halt > $(BUILD)/$(BOARD).jlink
@echo r > $(BUILD)/$(BOARD).jlink
@echo loadfile $^ >> $(BUILD)/$(BOARD).jlink
@echo r >> $(BUILD)/$(BOARD).jlink
@echo go >> $(BUILD)/$(BOARD).jlink
@echo exit >> $(BUILD)/$(BOARD).jlink
@echo "$$jlink_script" > $(BUILD)/$(BOARD).jlink
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
# Flash STM32 MCU using stlink with STM32 Cube Programmer CLI

49
hw/bsp/board.c
View File

@ -25,55 +25,6 @@
#include "board.h"
#if 0
#define LED_PHASE_MAX 8
static struct
{
uint32_t phase[LED_PHASE_MAX];
uint8_t phase_count;
bool led_state;
uint8_t current_phase;
uint32_t current_ms;
}led_pattern;
void board_led_pattern(uint32_t const phase_ms[], uint8_t count)
{
memcpy(led_pattern.phase, phase_ms, 4*count);
led_pattern.phase_count = count;
// reset with 1st phase is on
led_pattern.current_ms = board_millis();
led_pattern.current_phase = 0;
led_pattern.led_state = true;
board_led_on();
}
void board_led_task(void)
{
if ( led_pattern.phase_count == 0 ) return;
uint32_t const duration = led_pattern.phase[led_pattern.current_phase];
// return if not enough time
if (board_millis() - led_pattern.current_ms < duration) return;
led_pattern.led_state = !led_pattern.led_state;
board_led_write(led_pattern.led_state);
led_pattern.current_ms += duration;
led_pattern.current_phase++;
if (led_pattern.current_phase == led_pattern.phase_count)
{
led_pattern.current_phase = 0;
led_pattern.led_state = true;
board_led_on();
}
}
#endif
//--------------------------------------------------------------------+
// newlib read()/write() retarget
//--------------------------------------------------------------------+

5
hw/bsp/board_mcu.h
View File

@ -44,7 +44,7 @@
TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX)
#include "chip.h"
#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX)
#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9)
#include "fsl_device_registers.h"
#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
@ -101,6 +101,9 @@
#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
#include "stm32u5xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
#include "stm32g0xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_CXD56
// no header needed

196
hw/bsp/family_support.cmake
View File

@ -1,13 +1,15 @@
if (NOT TARGET _family_support_marker)
include_guard()
include(CMakePrintHelpers)
# TOP is path to root directory
set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
# Default to gcc
if (NOT DEFINED TOOLCHAIN)
set(TOOLCHAIN gcc)
endif ()
add_library(_family_support_marker INTERFACE)
if (NOT FAMILY)
message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
endif ()
@ -16,6 +18,7 @@ if (NOT TARGET _family_support_marker)
message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
endif()
function(family_filter RESULT DIR)
get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
@ -23,12 +26,13 @@ if (NOT TARGET _family_support_marker)
file(READ "${DIR}/only.txt" ONLYS)
# Replace newlines with semicolon so that it is treated as a list by CMake
string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
# For each mcu
foreach(MCU IN LISTS FAMILY_MCUS)
# For each line in only.txt
foreach(_line ${ONLYS_LINES})
# If mcu:xxx exists for this mcu then include
if (${_line} STREQUAL "mcu:${MCU}")
# If mcu:xxx exists for this mcu or board:xxx then include
if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
set(${RESULT} 1 PARENT_SCOPE)
return()
endif()
@ -42,6 +46,7 @@ if (NOT TARGET _family_support_marker)
file(READ "${DIR}/skip.txt" SKIPS)
# Replace newlines with semicolon so that it is treated as a list by CMake
string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
# For each mcu
foreach(MCU IN LISTS FAMILY_MCUS)
# For each line in only.txt
@ -56,16 +61,14 @@ if (NOT TARGET _family_support_marker)
# Didn't find in skip file so build
set(${RESULT} 1 PARENT_SCOPE)
else()
# Didn't find skip or only file so build
set(${RESULT} 1 PARENT_SCOPE)
endif()
endfunction()
function(family_add_subdirectory DIR)
family_filter(SHOULD_ADD "${DIR}")
if (SHOULD_ADD)
@ -73,12 +76,19 @@ if (NOT TARGET _family_support_marker)
endif()
endfunction()
function(family_get_project_name OUTPUT_NAME DIR)
get_filename_component(SHORT_NAME ${DIR} NAME)
set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
endfunction()
function(family_initialize_project PROJECT DIR)
# set output suffix to .elf (skip espressif and rp2040)
if(NOT FAMILY STREQUAL "espressif" AND NOT FAMILY STREQUAL "rp2040")
set(CMAKE_EXECUTABLE_SUFFIX .elf PARENT_SCOPE)
endif()
family_filter(ALLOWED "${DIR}")
if (NOT ALLOWED)
get_filename_component(SHORT_NAME ${DIR} NAME)
@ -86,6 +96,88 @@ if (NOT TARGET _family_support_marker)
endif()
endfunction()
#------------------------------------
# Main target configure
#------------------------------------
# Add common configuration to example
function(family_configure_common TARGET)
# run size after build
add_custom_command(TARGET ${TARGET} POST_BUILD
COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
# Generate map file
target_link_options(${TARGET} PUBLIC
# link map
"LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
)
endif()
endfunction()
# configure an executable target to link to tinyusb in device mode, and add the board implementation
function(family_configure_device_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
endfunction()
# configure an executable target to link to tinyusb in host mode, and add the board implementation
function(family_configure_host_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
endfunction()
# Add tinyusb to example
function(family_add_tinyusb TARGET OPT_MCU)
# tinyusb target is built for each example since it depends on example's tusb_config.h
set(TINYUSB_TARGET_PREFIX ${TARGET}-)
add_library(${TARGET}-tinyusb_config INTERFACE)
target_include_directories(${TARGET}-tinyusb_config INTERFACE
${CMAKE_CURRENT_SOURCE_DIR}/src
)
target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
CFG_TUSB_MCU=${OPT_MCU}
)
# tinyusb's CMakeList.txt
add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
endfunction()
# Add freeRTOS support to example
function(family_add_freertos TARGET)
# freeros config
if (NOT TARGET freertos_config)
add_library(freertos_config INTERFACE)
target_include_directories(freertos_config INTERFACE
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
)
endif()
# freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
# such as CMAKE_C_COMPILE_OBJECT
if (NOT TARGET freertos_kernel)
add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
endif ()
# Add FreeRTOS option to tinyusb_config
target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
CFG_TUSB_OS=OPT_OS_FREERTOS
)
# link tinyusb with freeRTOS kernel
target_link_libraries(${TARGET}-tinyusb PUBLIC
freertos_kernel
)
target_link_libraries(${TARGET} PUBLIC
freertos_kernel
)
endfunction()
function(family_add_default_example_warnings TARGET)
target_compile_options(${TARGET} PUBLIC
-Wall
@ -111,6 +203,10 @@ if (NOT TARGET _family_support_marker)
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
endif()
# GCC 10
if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
target_compile_options(${TARGET} PUBLIC -Wconversion)
@ -128,16 +224,87 @@ if (NOT TARGET _family_support_marker)
endif()
endfunction()
# configure an executable target to link to tinyusb in device mode, and add the board implementation
function(family_configure_device_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
# Add bin/hex output
function(family_add_bin_hex TARGET)
add_custom_command(TARGET ${TARGET} POST_BUILD
COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
VERBATIM)
endfunction()
# configure an executable target to link to tinyusb in host mode, and add the board implementation
function(family_configure_host_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
#----------------------------------
# Flashing target
#----------------------------------
# Add flash jlink target
function(family_flash_jlink TARGET)
if (NOT DEFINED JLINKEXE)
set(JLINKEXE JLinkExe)
endif ()
file(GENERATE
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
CONTENT "halt
loadfile $<TARGET_FILE:${TARGET}>
r
go
exit"
)
add_custom_target(${TARGET}-jlink
DEPENDS ${TARGET}
COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
)
endfunction()
# Add flash stlink target
function(family_flash_stlink TARGET)
if (NOT DEFINED STM32_PROGRAMMER_CLI)
set(STM32_PROGRAMMER_CLI STM32_Programmer_CLI)
endif ()
add_custom_target(${TARGET}-stlink
DEPENDS ${TARGET}
COMMAND ${STM32_PROGRAMMER_CLI} --connect port=swd --write $<TARGET_FILE:${TARGET}> --go
)
endfunction()
# Add flash pycod target
function(family_flash_pyocd TARGET)
if (NOT DEFINED PYOC)
set(PYOCD pyocd)
endif ()
add_custom_target(${TARGET}-pyocd
DEPENDS ${TARGET}
COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
)
endfunction()
# Add flash using NXP's LinkServer (redserver)
# https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
function(family_flash_nxplink TARGET)
if (NOT DEFINED LINKSERVER)
set(LINKSERVER LinkServer)
endif ()
# LinkServer has a bug that can only execute with full path otherwise it throws:
# realpath error: No such file or directory
execute_process(COMMAND which ${LINKSERVER} OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
add_custom_target(${TARGET}-nxplink
DEPENDS ${TARGET}
COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
)
endfunction()
# family specific: can override above functions
include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
if (NOT FAMILY_MCUS)
@ -146,4 +313,3 @@ if (NOT TARGET _family_support_marker)
# save it in case of re-inclusion
set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
endif()

15
hw/bsp/imxrt/boards/metro_m7_1011/board.cmake Normal file
View File

@ -0,0 +1,15 @@
set(MCU_VARIANT MIMXRT1011)
set(JLINK_DEVICE MIMXRT1011DAE5A)
set(PYOCD_TARGET mimxrt1010)
set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1011DAE5A
CFG_EXAMPLE_VIDEO_READONLY
)
endfunction()

13
hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
View File

@ -1,10 +1,15 @@
set(MCU_VARIANT MIMXRT1011)
target_sources(${PROJECT} PUBLIC
${CMAKE_CURRENT_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
)
set(JLINK_DEVICE MIMXRT1011DAE5A)
set(PYOCD_TARGET mimxrt1010)
set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
target_compile_definitions(${PROJECT} PUBLIC
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1011DAE5A
CFG_EXAMPLE_VIDEO_READONLY
)
endfunction()

15
hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake Normal file
View File

@ -0,0 +1,15 @@
set(MCU_VARIANT MIMXRT1015)
set(JLINK_DEVICE MIMXRT1015DAF5A)
set(PYOCD_TARGET mimxrt1015)
set(NXPLINK_DEVICE MIMXRT1015xxxxx:EVK-MIMXRT1015)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1015_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1015DAF5A
CFG_EXAMPLE_VIDEO_READONLY
)
endfunction()

14
hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake Normal file
View File

@ -0,0 +1,14 @@
set(MCU_VARIANT MIMXRT1021)
set(JLINK_DEVICE MIMXRT1021DAG5A)
set(PYOCD_TARGET mimxrt1020)
set(NXPLINK_DEVICE MIMXRT1021xxxxx:EVK-MIMXRT1020)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1020_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1021DAG5A
)
endfunction()

16
hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake Normal file
View File

@ -0,0 +1,16 @@
set(MCU_VARIANT MIMXRT1024)
set(JLINK_DEVICE MIMXRT1024DAG5A)
set(PYOCD_TARGET mimxrt1024)
set(NXPLINK_DEVICE MIMXRT1024xxxxx:MIMXRT1024-EVK)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1024_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1024DAG5A
CFG_EXAMPLE_VIDEO_READONLY
#-Wno-error=array-bounds
)
endfunction()

16
hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake Normal file
View File

@ -0,0 +1,16 @@
set(MCU_VARIANT MIMXRT1052)
set(JLINK_DEVICE MIMXRT1052xxxxB)
set(PYOCD_TARGET mimxrt1050)
set(NXPLINK_DEVICE MIMXRT1052xxxxB:EVK-MIMXRT1050)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbimxrt1050_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1052DVL6B
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
endfunction()

16
hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake Normal file
View File

@ -0,0 +1,16 @@
set(MCU_VARIANT MIMXRT1062)
set(JLINK_DEVICE MIMXRT1062xxx6A)
set(PYOCD_TARGET mimxrt1060)
set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1060_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1062DVL6A
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
endfunction()

4
hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
View File

@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1062xxx6A
# For flash-pyocd target
PYOCD_TARGET = mimxrt1060
BOARD_TUD_RHPORT = 1
BOARD_TUH_RHPORT = 0
BOARD_TUD_RHPORT = 0
BOARD_TUH_RHPORT = 1
# flash using pyocd
flash: flash-pyocd

16
hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake Normal file
View File

@ -0,0 +1,16 @@
set(MCU_VARIANT MIMXRT1064)
set(JLINK_DEVICE MIMXRT1064xxx6A)
set(PYOCD_TARGET mimxrt1064)
set(NXPLINK_DEVICE MIMXRT1064xxxxA:EVK-MIMXRT1064)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1064_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1064DVL6A
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
endfunction()

4
hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
View File

@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1064xxx6A
# For flash-pyocd target
PYOCD_TARGET = mimxrt1064
BOARD_TUD_RHPORT = 1
BOARD_TUH_RHPORT = 0
BOARD_TUD_RHPORT = 0
BOARD_TUH_RHPORT = 1
# flash using pyocd
flash: flash-pyocd

21
hw/bsp/imxrt/boards/teensy_40/board.cmake Normal file
View File

@ -0,0 +1,21 @@
set(MCU_VARIANT MIMXRT1062)
set(JLINK_DEVICE MIMXRT1062xxx6A)
set(PYOCD_TARGET mimxrt1060)
set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/teensy40_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1062DVL6A
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
endfunction()
# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
# Make sure it is in your PATH
# flash: $(BUILD)/$(PROJECT).hex
# teensy_loader_cli --mcu=imxrt1062 -v -w $<

2
hw/bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.c
View File

@ -5,7 +5,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.h>
#include "teensy40_flexspi_nor_config.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID

21
hw/bsp/imxrt/boards/teensy_41/board.cmake Normal file
View File

@ -0,0 +1,21 @@
set(MCU_VARIANT MIMXRT1062)
set(JLINK_DEVICE MIMXRT1062xxx6A)
set(PYOCD_TARGET mimxrt1060)
set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/teensy41_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1062DVL6A
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
endfunction()
# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
# Make sure it is in your PATH
# flash: $(BUILD)/$(PROJECT).hex
# teensy_loader_cli --mcu=imxrt1062 -v -w $<

2
hw/bsp/imxrt/boards/teensy_41/teensy41_flexspi_nor_config.c
View File

@ -5,7 +5,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.h>
#include "teensy41_flexspi_nor_config.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID

84
hw/bsp/imxrt/family.c
View File

@ -47,12 +47,28 @@
#endif
// needed by fsl_flexspi_nor_boot
TU_ATTR_USED
const uint8_t dcd_data[] = { 0x00 };
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
static void init_usb_phy(USBPHY_Type* usb_phy) {
// Enable PHY support for Low speed device + LS via FS Hub
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
// Enable all power for normal operation
// TODO may not be needed since it is called within CLOCK_EnableUsbhs0PhyPllClock()
usb_phy->PWD = 0;
// TX Timing
uint32_t phytx = usb_phy->TX;
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
usb_phy->TX = phytx;
}
void board_init(void)
{
// make sure the dcache is on.
@ -70,6 +86,7 @@ void board_init(void)
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
@ -114,54 +131,29 @@ void board_init(void)
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
LPUART_Init(UART_PORT, &uart_config, freq);
if ( kStatus_Success != LPUART_Init(UART_PORT, &uart_config, freq) ) {
// failed to init uart, probably baudrate is not supported
// TU_BREAKPOINT();
}
//------------- USB0 -------------//
//------------- USB -------------//
// Note: RT105x RT106x and later have dual USB controllers.
// Clock
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
USBPHY_Type* usb_phy;
// RT105x RT106x have dual USB controller.
#ifdef USBPHY1
usb_phy = USBPHY1;
init_usb_phy(USBPHY1);
#else
usb_phy = USBPHY;
init_usb_phy(USBPHY);
#endif
// Enable PHY support for Low speed device + LS via FS Hub
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
// Enable all power for normal operation
usb_phy->PWD = 0;
// TX Timing
uint32_t phytx = usb_phy->TX;
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
usb_phy->TX = phytx;
// RT105x RT106x have dual USB controller.
#ifdef USBPHY2
// USB1
CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
usb_phy = USBPHY2;
// Enable PHY support for Low speed device + LS via FS Hub
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
// Enable all power for normal operation
usb_phy->PWD = 0;
// TX Timing
phytx = usb_phy->TX;
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
usb_phy->TX = phytx;
init_usb_phy(USBPHY2);
#endif
}
@ -207,8 +199,28 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
LPUART_ReadBlocking(UART_PORT, buf, len);
return len;
int count = 0;
while( count < len )
{
uint8_t const rx_count = LPUART_GetRxFifoCount(UART_PORT);
if (!rx_count)
{
// clear all error flag if any
uint32_t status_flags = LPUART_GetStatusFlags(UART_PORT);
status_flags &= (kLPUART_RxOverrunFlag | kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag);
LPUART_ClearStatusFlags(UART_PORT, status_flags);
break;
}
for(int i=0; i<rx_count; i++)
{
buf[count] = LPUART_ReadByte(UART_PORT);
count++;
}
}
return count;
}
int board_uart_write(void const * buf, int len)

171
hw/bsp/imxrt/family.cmake
View File

@ -1,44 +1,36 @@
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
include_guard()
function(family_configure_target TARGET)
if (NOT BOARD)
message(FATAL_ERROR "BOARD not specified")
endif ()
# set output name to .elf
set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
# TOP is absolute path to root directory of TinyUSB git repo
set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
get_filename_component(TOP "${TOP}" REALPATH)
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(DEPS_SUBMODULES ${SDK_DIR})
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
include(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.cmake)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
target_compile_definitions(${TARGET} PUBLIC
CFG_TUSB_MCU=OPT_MCU_MIMXRT
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
target_link_options(${TARGET} PUBLIC
--specs=nosys.specs
--specs=nano.specs
)
set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
target_sources(${TARGET} PUBLIC
# TinyUSB
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
${TOP}/src/portable/ehci/ehci.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/drivers/common/fsl_common.c
${SDK_DIR}/drivers/igpio/fsl_gpio.c
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
@ -47,24 +39,14 @@ function(family_configure_target TARGET)
${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
)
if (TOOLCHAIN STREQUAL "gcc")
target_sources(${TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
target_compile_definitions(${BOARD_TARGET} PUBLIC
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
)
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
)
else ()
# TODO support IAR
endif ()
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
${SDK_DIR}/CMSIS/Include
target_include_directories(${BOARD_TARGET} PUBLIC
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/project_template
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
@ -73,28 +55,89 @@ function(family_configure_target TARGET)
${SDK_DIR}/drivers/lpuart
)
# include tinyusb cmake
include(${TOP}/src/CMakeLists.txt)
add_tinyusb(${TARGET})
update_board(${BOARD_TARGET})
endfunction()
# LD_FILE and STARTUP_FILE can be defined in board.cmake
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
#set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
endif ()
function(family_add_freertos_config TARGET)
add_library(freertos_config INTERFACE)
if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
#set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
endif ()
# add path to FreeRTOSConfig.h
target_include_directories(freertos_config SYSTEM INTERFACE
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig
target_sources(${BOARD_TARGET} PUBLIC
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
# select freertos port
if (TOOLCHAIN STREQUAL "gcc")
set(FREERTOS_PORT "GCC_ARM_CM7" CACHE INTERNAL "")
else ()
# TODO support IAR
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
# force linker to look for these symbols
-Wl,-uimage_vector_table
-Wl,-ug_boot_data
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endfunction()
function(family_configure_device_example TARGET)
family_configure_target(${TARGET})
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# TinyUSB Port
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
${TOP}/src/portable/ehci/ehci.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB
family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
#family_flash_nxplink(${TARGET})
endfunction()
function(family_configure_device_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_host_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_dual_usb_example TARGET)
family_configure_example(${TARGET})
endfunction()

0
hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h → hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
View File

0
hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk → hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
View File

0
hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c → hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
View File

0
hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h → hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
View File

0
hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk → hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
View File

0
hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c → hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c
View File

0
hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld → hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld
View File

0
hw/bsp/kinetis_k32/boards/kuiic/board.h → hw/bsp/kinetis_k32l/boards/kuiic/board.h
View File

0
hw/bsp/kinetis_k32/boards/kuiic/board.mk → hw/bsp/kinetis_k32l/boards/kuiic/board.mk
View File

0
hw/bsp/kinetis_k32/boards/kuiic/kuiic.c → hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c
View File

0
hw/bsp/kinetis_k32/family.mk → hw/bsp/kinetis_k32l/family.mk
View File

166
hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h Normal file
View File

@ -0,0 +1,166 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// IAR assembler have limited preprocessor support and it only need following macros:
#ifndef __IASMARM__
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 0
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 2
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 0
#define configSUPPORT_DYNAMIC_ALLOCATION 1
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* Define to trap errors during development. */
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
#define configASSERT(_exp) \
do {\
if ( !(_exp) ) { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
taskDISABLE_INTERRUPTS(); \
__asm("BKPT #0\n"); \
}\
}\
} while(0)
#else
#define configASSERT( x )
#endif
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS 3
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

11
hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake Normal file
View File

@ -0,0 +1,11 @@
set(MCU_VARIANT LPC18S37)
set(JLINK_DEVICE LPC18S37)
set(PYOCD_TARGET LPC18S37)
set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
function(update_board TARGET)
# nothing to do
endfunction()

11
hw/bsp/lpc18/boards/mcb1800/board.cmake Normal file
View File

@ -0,0 +1,11 @@
set(MCU_VARIANT LPC1857)
set(JLINK_DEVICE LPC1857)
set(PYOCD_TARGET LPC1857)
set(NXPLINK_DEVICE LPC1857:MCB1857)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
function(update_board TARGET)
# nothing to do
endfunction()

119
hw/bsp/lpc18/family.cmake Normal file
View File

@ -0,0 +1,119 @@
include_guard()
if (NOT BOARD)
message(FATAL_ERROR "BOARD not specified")
endif ()
set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
${SDK_DIR}/src/chip_18xx_43xx.c
${SDK_DIR}/src/clock_18xx_43xx.c
${SDK_DIR}/src/gpio_18xx_43xx.c
${SDK_DIR}/src/sysinit_18xx_43xx.c
${SDK_DIR}/src/uart_18xx_43xx.c
)
target_compile_options(${BOARD_TARGET} PUBLIC
-nostdlib
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN
CORE_M3
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc
${SDK_DIR}/inc/config_18xx
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# TinyUSB Port
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
${TOP}/src/portable/ehci/ehci.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB
family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
#family_flash_nxplink(${TARGET})
endfunction()
function(family_configure_device_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_host_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_dual_usb_example TARGET)
family_configure_example(${TARGET})
endfunction()

166
hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h Normal file
View File

@ -0,0 +1,166 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// IAR assembler have limited preprocessor support and it only need following macros:
#ifndef __IASMARM__
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 2
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 0
#define configSUPPORT_DYNAMIC_ALLOCATION 1
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* Define to trap errors during development. */
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
#define configASSERT(_exp) \
do {\
if ( !(_exp) ) { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
taskDISABLE_INTERRUPTS(); \
__asm("BKPT #0\n"); \
}\
}\
} while(0)
#else
#define configASSERT( x )
#endif
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS 3
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

16
hw/bsp/lpc55/boards/double_m33_express/board.cmake Normal file
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@ -0,0 +1,16 @@
set(MCU_VARIANT LPC55S69)
set(MCU_CORE LPC55S69_cm33_core0)
set(JLINK_DEVICE LPC55S69)
set(PYOCD_TARGET LPC55S69)
set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_LPC55S69JBD100_cm33_core0
# port 1 is highspeed
BOARD_TUD_RHPORT=1
)
endfunction()

12
hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake Normal file
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@ -0,0 +1,12 @@
set(MCU_VARIANT LPC55S28)
set(MCU_CORE LPC55S28)
set(JLINK_DEVICE LPC55S28)
set(PYOCD_TARGET LPC55S28)
set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_LPC55S28JBD100
)
endfunction()

14
hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake Normal file
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@ -0,0 +1,14 @@
set(MCU_VARIANT LPC55S69)
set(MCU_CORE LPC55S69_cm33_core0)
set(JLINK_DEVICE LPC55S69)
set(PYOCD_TARGET LPC55S69)
set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_LPC55S69JBD100_cm33_core0
# port 1 is highspeed
# BOARD_TUD_RHPORT=1
)
endfunction()

14
hw/bsp/lpc55/boards/mcu_link/board.cmake Normal file
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@ -0,0 +1,14 @@
set(MCU_VARIANT LPC55S69)
set(MCU_CORE LPC55S69_cm33_core0)
set(JLINK_DEVICE LPC55S69)
set(PYOCD_TARGET LPC55S69)
set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_LPC55S69JBD100_cm33_core0
# port 1 is highspeed
# BOARD_TUD_RHPORT=1
)
endfunction()

3
hw/bsp/lpc55/family.c
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@ -31,8 +31,11 @@
#include "fsl_power.h"
#include "fsl_iocon.h"
#include "fsl_usart.h"
#ifdef NEOPIXEL_PIN
#include "fsl_sctimer.h"
#include "sct_neopixel.h"
#endif
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)

147
hw/bsp/lpc55/family.cmake Normal file
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include_guard()
if (NOT BOARD)
message(FATAL_ERROR "BOARD not specified")
endif ()
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
#------------------------------------
# freertos
#------------------------------------
if (NOT TARGET freertos_config)
add_library(freertos_config INTERFACE)
target_include_directories(freertos_config SYSTEM INTERFACE
${CMAKE_CURRENT_LIST_DIR}/FreeRTOSConfig
)
endif()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
)
target_include_directories(${BOARD_TARGET} PUBLIC
${TOP}/lib/sct_neopixel
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/sctimer
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
update_board(${BOARD_TARGET})
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
endif ()
if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
endif ()
target_sources(${BOARD_TARGET} PUBLIC
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# TinyUSB Port
${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
# external driver
${TOP}/lib/sct_neopixel/sct_neopixel.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB
family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
family_flash_nxplink(${TARGET})
#family_flash_pyocd(${TARGET})
endfunction()
function(family_configure_device_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_host_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_dual_usb_example TARGET)
family_configure_example(${TARGET})
endfunction()

166
hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h Normal file
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/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// IAR assembler have limited preprocessor support and it only need following macros:
#ifndef __IASMARM__
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 2
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 0
#define configSUPPORT_DYNAMIC_ALLOCATION 1
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* Define to trap errors during development. */
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
#define configASSERT(_exp) \
do {\
if ( !(_exp) ) { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
taskDISABLE_INTERRUPTS(); \
__asm("BKPT #0\n"); \
}\
}\
} while(0)
#else
#define configASSERT( x )
#endif
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS 3
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

18
hw/bsp/mcx/boards/mcxn947brk/board.cmake Normal file
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@ -0,0 +1,18 @@
set(MCU_VARIANT MCXN947)
set(MCU_CORE MCXN947_cm33_core0)
set(JLINK_DEVICE MCXN947_M33_0)
set(PYOCD_TARGET MCXN947)
set(NXPLINK_DEVICE MCXN947:MCXN947)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_MCXN947VDF_cm33_core0
# port 1 is highspeed
BOARD_TUD_RHPORT=1
)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
)
endfunction()

66
hw/bsp/mcx/boards/mcxn947brk/board.h Normal file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2021, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// LED
#define LED_GPIO GPIO3
#define LED_CLK kCLOCK_Gpio3
#define LED_PIN 4 // red
#define LED_STATE_ON 0
// WAKE button (Dummy, use unused pin
#define BUTTON_GPIO GPIO0
#define BUTTON_CLK kCLOCK_Gpio0
#define BUTTON_PIN 6
#define BUTTON_STATE_ACTIVE 0
// UART
#define UART_DEV LPUART4
static inline void board_uart_init_clock(void) {
/* attach FRO 12M to FLEXCOMM4 */
CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u);
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn);
}
//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN
//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN
// XTAL
#define XTAL0_CLK_HZ (24 * 1000 * 1000U)
#ifdef __cplusplus
}
#endif
#endif

11
hw/bsp/mcx/boards/mcxn947brk/board.mk Normal file
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MCU_VARIANT = MCXN947
MCU_CORE = MCXN947_cm33_core0
PORT ?= 1
CFLAGS += -DCPU_MCXN947VDF_cm33_core0
JLINK_DEVICE = LPC55S69
PYOCD_TARGET = LPC55S69
# flash using pyocd
flash: flash-pyocd

338
hw/bsp/mcx/boards/mcxn947brk/clock_config.c Normal file
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@ -0,0 +1,338 @@
/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to setup clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up wait states of the flash.
*
* 3. Set up all dividers.
*
* 4. Set up all selectors to provide selected clocks.
*
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v10.0
processor: MCXN947
package_id: MCXN947VDF
mcu_data: ksdk2_0
processor_version: 0.12.3
board: MCX-N9XX-EVK
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "clock_config.h"
#include "fsl_clock.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
// extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockPLL150M();
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO12M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: MAIN_clock.outFreq, value: 12 MHz}
- {id: Slow_clock.outFreq, value: 3 MHz}
- {id: System_clock.outFreq, value: 12 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: SCGMode, value: SIRC}
- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO12M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO12M configuration
******************************************************************************/
void BOARD_BootClockFRO12M(void)
{
/*!< Enable SCG clock */
CLOCK_EnableClock(kCLOCK_Scg);
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF48M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 48 MHz}
- {id: Slow_clock.outFreq, value: 12 MHz}
- {id: System_clock.outFreq, value: 48 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF48M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF48M configuration
******************************************************************************/
void BOARD_BootClockFROHF48M(void)
{
/*!< Enable SCG clock */
CLOCK_EnableClock(kCLOCK_Scg);
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF144M ********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF144M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 144 MHz}
- {id: MAIN_clock.outFreq, value: 144 MHz}
- {id: Slow_clock.outFreq, value: 18 MHz}
- {id: System_clock.outFreq, value: 72 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true}
- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
sources:
- {id: SCG.FIRC.outFreq, value: 144 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF144M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF144M configuration
******************************************************************************/
void BOARD_BootClockFROHF144M(void)
{
/*!< Enable SCG clock */
CLOCK_EnableClock(kCLOCK_Scg);
CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
called_from_default_init: true
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 150 MHz}
- {id: PLL0_CLK_clock.outFreq, value: 150 MHz}
- {id: Slow_clock.outFreq, value: 37.5 MHz}
- {id: System_clock.outFreq, value: 150 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: PLL0_Mode, value: Normal}
- {id: RunPowerMode, value: OD}
- {id: SCGMode, value: PLL0}
- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true}
- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M}
- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true}
- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK}
- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
/*!< Enable SCG clock */
CLOCK_EnableClock(kCLOCK_Scg);
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
/*!< Set up PLL0 */
const pll_setup_t pll0Setup = {
.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U
};
CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL100M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL100M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CLK_IN_clock.outFreq, value: 24 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: MAIN_clock.outFreq, value: 100 MHz}
- {id: PLL1_CLK_clock.outFreq, value: 100 MHz}
- {id: Slow_clock.outFreq, value: 25 MHz}
- {id: System_clock.outFreq, value: 100 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: PLL1_Mode, value: Normal}
- {id: SCGMode, value: PLL1}
- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true}
- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true}
- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true}
- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK}
- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
sources:
- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL100M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL100M configuration
******************************************************************************/
void BOARD_BootClockPLL100M(void)
{
/*!< Enable SCG clock */
CLOCK_EnableClock(kCLOCK_Scg);
CLOCK_SetupExtClocking(24000000U);
CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */
/*!< Set up PLL1 */
const pll_setup_t pll1Setup = {
.pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U),
.pllndiv = SCG_SPLLNDIV_NDIV(6U),
.pllpdiv = SCG_SPLLPDIV_PDIV(2U),
.pllmdiv = SCG_SPLLMDIV_MDIV(100U),
.pllRate = 100000000U
};
CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */
CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
}

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/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF48M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF144M ********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF144M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */
#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFROHF144M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF144M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL150M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockPLL150M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL150M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL100M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL100M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */
#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockPLL100M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL100M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

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hw/bsp/mcx/boards/mcxn947brk/pin_mux.c Normal file
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/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v12.0
processor: MCXN947
package_id: MCXN947VDF
mcu_data: ksdk2_0
processor_version: 0.12.3
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_port.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8,
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable,
invert_input: normal}
- {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9,
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
- {pin_num: F14, peripheral: GPIO3, signal: 'GPIO, 4', pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, slew_rate: fast, open_drain: disable, drive_strength: low,
pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitPins(void)
{
/* Enables the clock for PORT1: Enables clock */
CLOCK_EnableClock(kCLOCK_Port1);
/* Enables the clock for PORT3: Enables clock */
CLOCK_EnableClock(kCLOCK_Port3);
const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as FC4_P0 */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT1_8 (pin A1) is configured as FC4_P0 */
PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config);
const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as FC4_P1 */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT1_9 (pin B1) is configured as FC4_P1 */
PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config);
const port_pin_config_t port3_4_pinF14_config = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO3_4 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT3_4 (pin F14) is configured as PIO3_4 */
PORT_SetPinConfig(PORT3, 4U, &port3_4_pinF14_config);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

51
hw/bsp/mcx/boards/mcxn947brk/pin_mux.h Normal file
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/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

262
hw/bsp/mcx/family.c Normal file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2018, hathach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include "fsl_device_registers.h"
#include "fsl_gpio.h"
#include "fsl_lpuart.h"
#include "board.h"
#include "pin_mux.h"
#include "clock_config.h"
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB0_FS_IRQHandler(void)
{
tud_int_handler(0);
}
void USB1_HS_IRQHandler(void)
{
tud_int_handler(1);
}
void board_init(void)
{
BOARD_InitPins();
BOARD_InitBootClocks();
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB1_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
#endif
// LED
CLOCK_EnableClock(LED_CLK);
gpio_pin_config_t led_config = {
kGPIO_DigitalOutput,
0,
};
GPIO_PinInit(LED_GPIO,LED_PIN, &led_config);
board_led_write(0);
#ifdef NEOPIXEL_PIN
// Neopixel
static uint32_t pixelData[NEOPIXEL_NUMBER];
IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN);
sctpix_init(NEOPIXEL_TYPE);
sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER);
sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010);
sctpix_show();
#endif
// Button
#ifdef BUTTON_GPIO
CLOCK_EnableClock(BUTTON_CLK);
gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
#endif
#ifdef UART_DEV
// UART
// IOCON_PinMuxSet(IOCON, UART_RX_PINMUX);
// IOCON_PinMuxSet(IOCON, UART_TX_PINMUX);
// Enable UART when debug log is on
board_uart_init_clock();
lpuart_config_t uart_config;
LPUART_GetDefaultConfig(&uart_config);
uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
uart_config.enableTx = true;
uart_config.enableRx = true;
LPUART_Init(UART_DEV, &uart_config, 12000000u);
#endif
// USB VBUS
/* PORT0 PIN22 configured as USB0_VBUS */
CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
#if PORT_SUPPORT_DEVICE(0)
// Port0 is Full Speed
/* Turn on USB0 Phy */
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
/* reset the IP to make sure it's in reset state. */
RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
// Enable USB Clock Adjustments to trim the FRO for the full speed controller
ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
/*According to reference manual, device mode setting has to be set by access usb host register */
CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock
USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
/* enable USB Device clock */
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
#endif
#if PORT_SUPPORT_DEVICE(1)
// Port1 is High Speed
// Power
SPC0->ACTIVE_VDELAY = 0x0500;
/* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, CORELDO is 1.0V) */
SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK;
SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) |
SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u);
/* Wait until it is done */
while (SPC0->SC & SPC_SC_BUSY_MASK) {}
if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) {
SCG0->TRIM_LOCK = 0x5a5a0001U;
SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK;
/* wait LDO ready */
while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK));
}
SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK;
SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK);
/* xtal = 20 ~ 30MHz */
SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT);
SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK;
while (1) {
if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) {
break;
}
}
// Clock
SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK;
CLOCK_EnableClock(kCLOCK_UsbHs);
CLOCK_EnableClock(kCLOCK_UsbHsPhy);
CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U);
CLOCK_EnableUsbhsClock();
// USB PHY
#if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT)))
USBPHY->TRIM_OVERRIDE_EN = 0x001fU; /* override IFR value */
#endif
// Enable PHY support for Low speed device + LS via FS Hub
USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
// Enable all power for normal operation
USBPHY->PWD = 0;
// TX Timing
uint32_t phytx = USBPHY->TX;
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
phytx |= USBPHY_TX_D_CAL(0x04) | USBPHY_TX_TXCAL45DP(0x07) | USBPHY_TX_TXCAL45DM(0x07);
//phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
USBPHY->TX = phytx;
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
#ifdef NEOPIXEL_PIN
if (state) {
sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010);
} else {
sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010);
}
sctpix_show();
#endif
}
uint32_t board_button_read(void)
{
#ifdef BUTTON_GPIO
return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
#endif
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
#ifdef UART_DEV
LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len);
return len;
#else
(void) buf; (void) len;
return 0;
#endif
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

127
hw/bsp/mcx/family.cmake Normal file
View File

@ -0,0 +1,127 @@
include_guard()
if (NOT BOARD)
message(FATAL_ERROR "BOARD not specified")
endif ()
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# external driver
#lib/sct_neopixel/sct_neopixel.c
# driver
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
)
# target_compile_definitions(${BOARD_TARGET} PUBLIC
# )
target_include_directories(${BOARD_TARGET} PUBLIC
# driver
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_sources(${BOARD_TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
)
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# TinyUSB Port
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB
family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
#family_flash_nxplink(${TARGET})
#family_flash_pyocd(${TARGET})
endfunction()
function(family_configure_device_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_host_example TARGET)
family_configure_example(${TARGET})
endfunction()
function(family_configure_dual_usb_example TARGET)
family_configure_example(${TARGET})
endfunction()

48
hw/bsp/mcx/family.mk Normal file
View File

@ -0,0 +1,48 @@
UF2_FAMILY_ID = 0x2abc77ec
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m33
include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
# Default to Highspeed PORT1
PORT ?= 1
CFLAGS += \
-flto \
-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
-DBOARD_TUD_RHPORT=$(PORT) \
ifeq ($(PORT), 1)
$(info "PORT1 High Speed")
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
else
$(info "PORT0 Full Speed")
endif
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
# All source paths should be relative to the top level.
LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
SRC_C += \
src/portable/chipidea/ci_hs/dcd_ci_hs.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \
SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S

166
hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h Normal file
View File

@ -0,0 +1,166 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// IAR assembler have limited preprocessor support and it only need following macros:
#ifndef __IASMARM__
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 2
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 0
#define configSUPPORT_DYNAMIC_ALLOCATION 1
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* Define to trap errors during development. */
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
#define configASSERT(_exp) \
do {\
if ( !(_exp) ) { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
taskDISABLE_INTERRUPTS(); \
__asm("BKPT #0\n"); \
}\
}\
} while(0)
#else
#define configASSERT( x )
#endif
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS 3
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

3
hw/bsp/nrf/boards/adafruit_clue/board.mk
View File

@ -1,6 +1,9 @@
MCU_VARIANT = nrf52840
CFLAGS += -DNRF52840_XXAA
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@

2
hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
View File

@ -29,4 +29,4 @@ SECTIONS
} > RAM
} INSERT AFTER .data;
INCLUDE "nrf52_common.ld"
INCLUDE "nrf_common.ld"

3
hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
View File

@ -1,6 +1,9 @@
MCU_VARIANT = nrf52840
CFLAGS += -DNRF52840_XXAA
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@

38
hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
View File

@ -1,38 +0,0 @@
/* Linker script to configure memory regions. */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
/* SRAM required by S132 depend on
* - Attribute Table Size
* - Vendor UUID count
* - Max ATT MTU
* - Concurrent connection peripheral + central + secure links
* - Event Len, HVN queue, Write CMD queue
*/
RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
}
SECTIONS
{
. = ALIGN(4);
.svc_data :
{
PROVIDE(__start_svc_data = .);
KEEP(*(.svc_data))
PROVIDE(__stop_svc_data = .);
} > RAM
.fs_data :
{
PROVIDE(__start_fs_data = .);
KEEP(*(.fs_data))
PROVIDE(__stop_fs_data = .);
} > RAM
} INSERT AFTER .data;
INCLUDE "nrf52_common.ld"

3
hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
View File

@ -1,6 +1,9 @@
MCU_VARIANT = nrf52840
CFLAGS += -DNRF52840_XXAA
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@

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