mirror of
https://github.com/hathach/tinyusb.git
synced 2025-02-19 06:40:45 +00:00
add verify_breakpoint hw independence
This commit is contained in:
parent
03a4f02b89
commit
ccf6f03817
@ -251,7 +251,7 @@ tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, tusb_event_t event, u
|
||||
}else
|
||||
{
|
||||
// unlikely error
|
||||
tusb_hal_dbg_breakpoint();
|
||||
verify_breakpoint();
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -54,8 +54,6 @@ extern "C"
|
||||
#include "tusb_option.h"
|
||||
#include "tusb_compiler.h"
|
||||
|
||||
#include "tusb_hal.h" // TODO find a way to break hal dependency
|
||||
|
||||
#define VOID_RETURN
|
||||
|
||||
//#if ( defined CFG_PRINTF_UART || defined CFG_PRINTF_USBCDC || defined CFG_PRINTF_DEBUG )
|
||||
@ -74,7 +72,7 @@ extern "C"
|
||||
do{\
|
||||
setup_statement;\
|
||||
if (!(condition)) {\
|
||||
tusb_hal_dbg_breakpoint();\
|
||||
verify_breakpoint();\
|
||||
_ASSERT_MESSAGE(format, __VA_ARGS__);\
|
||||
return error; /* Throw X for Test */\
|
||||
}\
|
||||
|
@ -63,6 +63,24 @@
|
||||
#define _ASSERT_MESS()
|
||||
#endif
|
||||
|
||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
||||
|
||||
// Cortex M CoreDebug->DHCSR
|
||||
#define ARM_CM_DHCSR (*((volatile uint32_t*) 0xE000EDF0UL))
|
||||
|
||||
static inline void verify_breakpoint(void)
|
||||
{
|
||||
// Only halt mcu if debugger is attached
|
||||
if ( ARM_CM_DHCSR & 1UL ) __asm("BKPT #0\n");
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define verify_breakpoint()
|
||||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* VERIFY STATUS
|
||||
* - VERIFY_STS_1ARGS : return status of condition if failed
|
||||
@ -95,13 +113,13 @@
|
||||
#define VERIFY_STS_HDLR_2ARGS(sts, _handler) \
|
||||
do { \
|
||||
uint32_t _status = (uint32_t)(sts); \
|
||||
if ( 0 != _status ) { tusb_hal_dbg_breakpoint(); _VERIFY_MESS(_status) _handler; return _status; }\
|
||||
if ( 0 != _status ) { verify_breakpoint(); _VERIFY_MESS(_status) _handler; return _status; }\
|
||||
} while(0)
|
||||
|
||||
#define VERIFY_STS_HDLR_3ARGS(sts, _handler, _error) \
|
||||
do { \
|
||||
uint32_t _status = (uint32_t)(sts); \
|
||||
if ( 0 != _status ) { tusb_hal_dbg_breakpoint(); _VERIFY_MESS(_status) _handler; return _error; }\
|
||||
if ( 0 != _status ) { verify_breakpoint(); _VERIFY_MESS(_status) _handler; return _error; }\
|
||||
} while(0)
|
||||
|
||||
#define VERIFY_STATUS_HDLR(...) GET_4TH_ARG(__VA_ARGS__, VERIFY_STS_HDLR_3ARGS, VERIFY_STS_HDLR_2ARGS)(__VA_ARGS__)
|
||||
@ -137,12 +155,12 @@
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* ASSERT
|
||||
* basically VERIFY with tusb_hal_dbg_breakpoint as handler
|
||||
* basically VERIFY with verify_breakpoint as handler
|
||||
* - 1 arg : return false if failed
|
||||
* - 2 arg : return error if failed
|
||||
*------------------------------------------------------------------*/
|
||||
#define ASSERT_1ARGS(cond) do { if (!(cond)) { tusb_hal_dbg_breakpoint(); _ASSERT_MESS() return false; } } while(0)
|
||||
#define ASSERT_2ARGS(cond, _error) do { if (!(cond)) { tusb_hal_dbg_breakpoint(); _ASSERT_MESS() return _error;} } while(0)
|
||||
#define ASSERT_1ARGS(cond) do { if (!(cond)) { verify_breakpoint(); _ASSERT_MESS() return false; } } while(0)
|
||||
#define ASSERT_2ARGS(cond, _error) do { if (!(cond)) { verify_breakpoint(); _ASSERT_MESS() return _error;} } while(0)
|
||||
|
||||
#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__)
|
||||
|
||||
|
@ -647,7 +647,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
|
||||
p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
|
||||
|
||||
|
||||
// if ( TUSB_EVENT_XFER_ERROR == error_event ) tusb_hal_dbg_breakpoint(); // TODO skip unplugged device
|
||||
// if ( TUSB_EVENT_XFER_ERROR == error_event ) verify_breakpoint(); // TODO skip unplugged device
|
||||
|
||||
p_qhd->p_qtd_list_head->used = 0; // free QTD
|
||||
qtd_remove_1st_from_qhd(p_qhd);
|
||||
|
@ -89,16 +89,4 @@ uint32_t tusb_hal_tick_get(void)
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
void tusb_hal_dbg_breakpoint(void)
|
||||
{
|
||||
// M0 cannot check if debugger is attached or not
|
||||
#if defined(__CORTEX_M) && (__CORTEX_M > 0)
|
||||
// check if debugger is attached
|
||||
if ( (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) == CoreDebug_DHCSR_C_DEBUGEN_Msk)
|
||||
{
|
||||
__asm("BKPT #0\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -69,18 +69,6 @@ uint32_t tusb_hal_tick_get(void)
|
||||
|
||||
#endif
|
||||
|
||||
void tusb_hal_dbg_breakpoint(void)
|
||||
{
|
||||
// M0 cannot check if debugger is attached or not
|
||||
#if defined(__CORTEX_M) && (__CORTEX_M > 0)
|
||||
// check if debugger is attached
|
||||
if ( (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) == CoreDebug_DHCSR_C_DEBUGEN_Msk)
|
||||
{
|
||||
__asm("BKPT #0\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void tusb_hal_int_enable(uint8_t rhport)
|
||||
{
|
||||
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
|
@ -77,9 +77,6 @@ void tusb_hal_int_disable(uint8_t rhport);
|
||||
|
||||
uint32_t tusb_hal_tick_get(void);
|
||||
|
||||
// for debug only, halt mcu if assert/verify is failed if debugger is attached
|
||||
void tusb_hal_dbg_breakpoint(void) ATTR_WEAK;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
Loading…
x
Reference in New Issue
Block a user