From 0ee74a71e27b86b89ca737f50a8e2c09753a3875 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Mon, 7 Mar 2022 14:09:08 +0000 Subject: [PATCH 001/142] add renesas fsp submodule Signed-off-by: Rafael Silva --- .gitmodules | 3 +++ hw/mcu/renesas/fsp | 1 + 2 files changed, 4 insertions(+) create mode 160000 hw/mcu/renesas/fsp diff --git a/.gitmodules b/.gitmodules index 044ac24ec..08ce4f447 100644 --- a/.gitmodules +++ b/.gitmodules @@ -149,3 +149,6 @@ [submodule "hw/mcu/raspberry_pi/Pico-PIO-USB"] path = hw/mcu/raspberry_pi/Pico-PIO-USB url = https://github.com/sekigon-gonnoc/Pico-PIO-USB.git +[submodule "hw/mcu/renesas/fsp"] + path = hw/mcu/renesas/fsp + url = https://github.com/renesas/fsp diff --git a/hw/mcu/renesas/fsp b/hw/mcu/renesas/fsp new file mode 160000 index 000000000..8dc14709f --- /dev/null +++ b/hw/mcu/renesas/fsp @@ -0,0 +1 @@ +Subproject commit 8dc14709f2a6518b43f71efad70d900b7718d9f1 From f2e8a60e6d910170bf514087e1de24088d712ba8 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Tue, 8 Mar 2022 15:29:58 +0000 Subject: [PATCH 002/142] add .vscode to gitignore Signed-off-by: Rafael Silva --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index 87a5faa80..4a12f6ab7 100644 --- a/.gitignore +++ b/.gitignore @@ -13,6 +13,7 @@ latex .env .settings/ .idea/ +.vscode/ .gdb_history /examples/*/*/build* test_old/ From dcadbf3364778814c8a0e7e73481d12e8687f1bd Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Tue, 8 Mar 2022 16:05:29 +0000 Subject: [PATCH 003/142] rename renesas driver to link link was chosen according to the name for the usb core on datasheets, LINK core Signed-off-by: Rafael Silva --- docs/reference/supported.rst | 6 +++--- hw/bsp/rx/family.mk | 4 ++-- src/portable/renesas/{usba/dcd_usba.c => link/dcd_link.c} | 0 src/portable/renesas/{usba/hcd_usba.c => link/hcd_link.c} | 0 4 files changed, 5 insertions(+), 5 deletions(-) rename src/portable/renesas/{usba/dcd_usba.c => link/dcd_link.c} (100%) rename src/portable/renesas/{usba/hcd_usba.c => link/hcd_link.c} (100%) diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index 7ce982713..3c1b94623 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -59,9 +59,9 @@ Supported MCUs | | | 55 | ✔ | | ✔ | lpc_ip3511 | | +--------------+---------+-------------+--------+------+-----------+-------------------+--------------+ | Raspberry Pi | RP2040 | ✔ | ✔ | ✖ | rp2040 | | -+--------------+-----------------------+--------+------+-----------+-------------------+--------------+ -| Renesas | RX 63N, 65N, 72N | ✔ | ✔ | ✖ | usba | | -+--------------+-----------------------+--------+------+-----------+-------------------+--------------+ ++--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ +| Renesas | RX | 63N, 65N, 72N | ✔ | ✔ | ✖ | link | | ++--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ | Silabs | EFM32GG12 | ✔ | | ✖ | dwc2 | | +--------------+-----------------------+--------+------+-----------+-------------------+--------------+ | Sony | CXD56 | ✔ | ✖ | ✔ | cxd56 | | diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk index aba05812d..22b9031b3 100644 --- a/hw/bsp/rx/family.mk +++ b/hw/bsp/rx/family.mk @@ -14,8 +14,8 @@ CFLAGS += \ -DSSIZE_MAX=__INT_MAX__ SRC_C += \ - src/portable/renesas/usba/dcd_usba.c \ - src/portable/renesas/usba/hcd_usba.c \ + src/portable/renesas/link/dcd_link.c \ + src/portable/renesas/link/hcd_link.c \ $(MCU_DIR)/vects.c INC += \ diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/link/dcd_link.c similarity index 100% rename from src/portable/renesas/usba/dcd_usba.c rename to src/portable/renesas/link/dcd_link.c diff --git a/src/portable/renesas/usba/hcd_usba.c b/src/portable/renesas/link/hcd_link.c similarity index 100% rename from src/portable/renesas/usba/hcd_usba.c rename to src/portable/renesas/link/hcd_link.c From 03777f4a467c7ff7e0e764cfcf79d04235a2659d Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 11:52:39 +0000 Subject: [PATCH 004/142] generalize renesas LINK core driver create local register access struct and move mcu specific code in preparation of support for other mcu families that use the LINK usb core Signed-off-by: Rafael Silva --- hw/bsp/rx/boards/gr_citrus/gr_citrus.c | 5 + hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 5 + src/portable/renesas/link/dcd_link.c | 357 ++-- src/portable/renesas/link/hcd_link.c | 421 ++--- src/portable/renesas/link/link_rx.h | 76 + src/portable/renesas/link/link_type.h | 1658 ++++++++++++++++++ 6 files changed, 2034 insertions(+), 488 deletions(-) create mode 100644 src/portable/renesas/link/link_rx.h create mode 100644 src/portable/renesas/link/link_type.h diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c index 633ddad16..9bd9399f6 100644 --- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c +++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c @@ -201,6 +201,11 @@ void board_init(void) IEN(SCI0, RXI0) = 1; IEN(SCI0, TXI0) = 1; IEN(SCI0, TEI0) = 1; + + /* Enable USB0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(USB0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; } //--------------------------------------------------------------------+ diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c index f189e40e4..3c729ad50 100644 --- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c +++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -248,6 +248,11 @@ void board_init(void) IEN(ICU,GROUPBL0) = 1; EN(SCI5, TEI5) = 1; + /* Enable USB0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(USB0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + /* setup USBI0 interrupt. */ IR(USB0, USBI0) = 0; IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index fa87c9f4d..3aeda9e4c 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -31,79 +31,29 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N ) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) + #include "device/dcd.h" -#include "iodefine.h" +#include "link_type.h" + +#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) +#include "link_rx.h" +#else +#error "Unsupported MCU" +#endif //--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION +// MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ -#define SYSTEM_PRCR_PRC1 (1<<1) -#define SYSTEM_PRCR_PRKEY (0xA5u<<8) -#define USB_FIFOSEL_TX ((uint16_t)(1u<<5)) -#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8)) -#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10)) -#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10)) -#define USB_IS0_CTSQ ((uint16_t)(7u)) -#define USB_IS0_DVSQ ((uint16_t)(7u<<4)) -#define USB_IS0_VALID ((uint16_t)(1u<<3)) -#define USB_IS0_BRDY ((uint16_t)(1u<<8)) -#define USB_IS0_NRDY ((uint16_t)(1u<<9)) -#define USB_IS0_BEMP ((uint16_t)(1u<<10)) -#define USB_IS0_CTRT ((uint16_t)(1u<<11)) -#define USB_IS0_DVST ((uint16_t)(1u<<12)) -#define USB_IS0_SOFR ((uint16_t)(1u<<13)) -#define USB_IS0_RESM ((uint16_t)(1u<<14)) -#define USB_IS0_VBINT ((uint16_t)(1u<<15)) -#define USB_IS1_SACK ((uint16_t)(1u<<4)) -#define USB_IS1_SIGN ((uint16_t)(1u<<5)) -#define USB_IS1_EOFERR ((uint16_t)(1u<<6)) -#define USB_IS1_ATTCH ((uint16_t)(1u<<11)) -#define USB_IS1_DTCH ((uint16_t)(1u<<12)) -#define USB_IS1_BCHG ((uint16_t)(1u<<14)) -#define USB_IS1_OVRCR ((uint16_t)(1u<<15)) +/* LINK core registers */ +#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) -#define USB_IS0_CTSQ_MSK (7u) -#define USB_IS0_CTSQ_SETUP (1u) -#define USB_IS0_DVSQ_DEF (1u<<4) -#define USB_IS0_DVSQ_ADDR (2u<<4) -#define USB_IS0_DVSQ_SUSP0 (4u<<4) -#define USB_IS0_DVSQ_SUSP1 (5u<<4) -#define USB_IS0_DVSQ_SUSP2 (6u<<4) -#define USB_IS0_DVSQ_SUSP3 (7u<<4) - -#define USB_PIPECTR_PID_NAK (0u) -#define USB_PIPECTR_PID_BUF (1u) -#define USB_PIPECTR_PID_STALL (2u) -#define USB_PIPECTR_CCPL (1u<<2) -#define USB_PIPECTR_SQMON (1u<<6) -#define USB_PIPECTR_SQCLR (1u<<8) -#define USB_PIPECTR_ACLRM (1u<<9) -#define USB_PIPECTR_INBUFM (1u<<14) -#define USB_PIPECTR_BSTS (1u<<15) - -#define USB_FIFOCTR_DTLN (0x1FF) -#define USB_FIFOCTR_FRDY (1u<<13) -#define USB_FIFOCTR_BCLR (1u<<14) -#define USB_FIFOCTR_BVAL (1u<<15) - -#define USB_PIPECFG_SHTNAK (1u<<7) -#define USB_PIPECFG_DBLB (1u<<9) -#define USB_PIPECFG_BULK (1u<<14) -#define USB_PIPECFG_ISO (3u<<14) -#define USB_PIPECFG_INT (2u<<14) - -#define FIFO_REQ_CLR (1u) -#define FIFO_COMPLETE (1u<<1) - -// Start of definition of packed structs (used by the CCRX toolchain) +/* Start of definition of packed structs (used by the CCRX toolchain) */ TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN -typedef struct { +typedef struct TU_ATTR_PACKED { union { struct { uint16_t : 8; @@ -116,7 +66,7 @@ typedef struct { uint16_t TRN; } reg_pipetre_t; -typedef union { +typedef union TU_ATTR_PACKED { struct { volatile uint16_t u8: 8; volatile uint16_t : 0; @@ -150,28 +100,6 @@ typedef struct //--------------------------------------------------------------------+ static dcd_data_t _dcd; -static uint32_t disable_interrupt(void) -{ - uint32_t pswi; -#if defined(__CCRX__) - pswi = get_psw() & 0x010000; - clrpsw_i(); -#else - pswi = __builtin_rx_mvfc(0) & 0x010000; - __builtin_rx_clrpsw('I'); -#endif - return pswi; -} - -static void enable_interrupt(uint32_t pswi) -{ -#if defined(__CCRX__) - set_psw(get_psw() | pswi); -#else - __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi); -#endif -} - static unsigned find_pipe(unsigned xfer) { switch (xfer) { @@ -202,22 +130,18 @@ static unsigned find_pipe(unsigned xfer) static volatile uint16_t* get_pipectr(unsigned num) { - volatile uint16_t *ctr = NULL; if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; + return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return (volatile uint16_t*)&(LINK_REG->DCPCTR); } - return ctr; } static volatile reg_pipetre_t* get_pipetre(unsigned num) { volatile reg_pipetre_t* tre = NULL; if ((1 <= num) && (num <= 5)) { - tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD; - tre += num - 1; + tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E); } return tre; } @@ -225,36 +149,31 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num) static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) { (void)rhport; - volatile uint16_t *ctr = NULL; - const unsigned epn = tu_edpt_number(ep_addr); + const unsigned epn = tu_edpt_number(ep_addr); if (epn) { const unsigned dir = tu_edpt_dir(ep_addr); const unsigned num = _dcd.ep[dir][epn]; - if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; - } + return get_pipectr(num); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return get_pipectr(0); } - return ctr; } static unsigned edpt0_max_packet_size(void) { - return USB0.DCPMAXP.BIT.MXPS; + return LINK_REG->DCPMAXP_b.MXPS; } static unsigned edpt_max_packet_size(unsigned num) { - USB0.PIPESEL.WORD = num; - return USB0.PIPEMAXP.WORD; + LINK_REG->PIPESEL = num; + return LINK_REG->PIPEMAXP; } static inline void pipe_wait_for_ready(unsigned num) { - while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ; - while (!USB0.D0FIFOCTR.BIT.FRDY) ; + while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ; + while (!LINK_REG->D0FIFOCTR_b.FRDY) ; } static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) @@ -316,13 +235,14 @@ static bool pipe0_xfer_in(void) void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_IN); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_IN); } else { - pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL; + if (len < mps) + LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; pipe->remaining = rem - len; return false; } @@ -333,18 +253,19 @@ static bool pipe0_xfer_out(void) const unsigned rem = pipe->remaining; const unsigned mps = edpt0_max_packet_size(); - const unsigned vld = USB0.CFIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_OUT); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_OUT); } else { - pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; + if (len < mps) + LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -363,22 +284,23 @@ static bool pipe_xfer_in(unsigned num) return true; } - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_IN); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_IN); } else { - pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + if (len < mps) + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -388,24 +310,25 @@ static bool pipe_xfer_out(unsigned num) pipe_state_t *pipe = &_dcd.pipe[num]; const unsigned rem = pipe->remaining; - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8; + LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); - const unsigned vld = USB0.D0FIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_OUT); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_OUT); } else { - pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - pipe->remaining = rem - len; + if (len < mps) + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return NULL != buf; @@ -416,13 +339,13 @@ static bool pipe_xfer_out(unsigned num) static void process_setup_packet(uint8_t rhport) { uint16_t setup_packet[4]; - if (0 == (USB0.INTSTS0.WORD & USB_IS0_VALID)) return; - USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; - setup_packet[0] = tu_le16toh(USB0.USBREQ.WORD); - setup_packet[1] = USB0.USBVAL; - setup_packet[2] = USB0.USBINDX; - setup_packet[3] = USB0.USBLENG; - USB0.INTSTS0.WORD = ~USB_IS0_VALID; + if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID)) return; + LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + setup_packet[0] = tu_le16toh(LINK_REG->USBREQ); + setup_packet[1] = LINK_REG->USBVAL; + setup_packet[2] = LINK_REG->USBINDX; + setup_packet[3] = LINK_REG->USBLENG; + LINK_REG->INTSTS0 = ~USB_IS0_VALID; dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true); } @@ -430,7 +353,7 @@ static void process_status_completion(uint8_t rhport) { uint8_t ep_addr; /* Check the data stage direction */ - if (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) { + if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) { /* IN transfer. */ ep_addr = tu_edpt_addr(0, TUSB_DIR_IN); } else { @@ -444,11 +367,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u { /* configure fifo direction and access unit settings */ if (ep_addr) { /* IN, 2 bytes */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); - while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ; - } else { /* OUT, a byte */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8; - while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ; + LINK_REG->CFIFOSEL = + USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ; + } else { /* OUT, a byte */ + LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8; + while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ; } pipe_state_t *pipe = &_dcd.pipe[0]; @@ -458,14 +382,14 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u if (total_bytes) { pipe->buf = buffer; if (ep_addr) { /* IN */ - TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80)); + TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); pipe0_xfer_in(); } - USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; } else { /* ZLP */ pipe->buf = NULL; - USB0.DCPCTR.WORD = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF; } return true; } @@ -487,11 +411,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui if (total_bytes) { pipe_xfer_in(num); } else { /* ZLP */ - USB0.D0FIFOSEL.WORD = num; + LINK_REG->D0FIFOSEL = num; pipe_wait_for_ready(num); - USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ } } else { #if defined(__CCRX__) @@ -558,18 +482,18 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) static void process_bus_reset(uint8_t rhport) { - USB0.BEMPENB.WORD = 1; - USB0.BRDYENB.WORD = 1; - USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - USB0.D1FIFOSEL.WORD = 0; - while (USB0.D1FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1CTR.WORD)); - volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1TRE.WORD)); + LINK_REG->BEMPENB = 1; + LINK_REG->BRDYENB = 1; + LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + LINK_REG->D1FIFOSEL = 0; + while (LINK_REG->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_CTR[0])); + volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_TR[0].E)); for (int i = 1; i <= 5; ++i) { - USB0.PIPESEL.WORD = i; - USB0.PIPECFG.WORD = 0; + LINK_REG->PIPESEL = i; + LINK_REG->PIPECFG = 0; *ctr = USB_PIPECTR_ACLRM; *ctr = 0; ++ctr; @@ -577,8 +501,8 @@ static void process_bus_reset(uint8_t rhport) tre += 2; } for (int i = 6; i <= 9; ++i) { - USB0.PIPESEL.WORD = i; - USB0.PIPECFG.WORD = 0; + LINK_REG->PIPESEL = i; + LINK_REG->PIPECFG = 0; *ctr = USB_PIPECTR_ACLRM; *ctr = 0; ++ctr; @@ -589,7 +513,7 @@ static void process_bus_reset(uint8_t rhport) static void process_set_address(uint8_t rhport) { - const uint32_t addr = USB0.USBADDR.BIT.USBADDR; + const uint32_t addr = LINK_REG->USBADDR_b.USBADDR; if (!addr) return; const tusb_control_request_t setup_packet = { #if defined(__CCRX__) @@ -611,56 +535,39 @@ static void process_set_address(uint8_t rhport) void dcd_init(uint8_t rhport) { (void)rhport; - /* Enable USB0 */ - uint32_t pswi = disable_interrupt(); - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; - MSTP(USB0) = 0; - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; - enable_interrupt(pswi); - USB0.SYSCFG.BIT.SCKE = 1; - while (!USB0.SYSCFG.BIT.SCKE) ; - USB0.SYSCFG.BIT.DRPD = 0; - USB0.SYSCFG.BIT.DCFM = 0; - USB0.SYSCFG.BIT.USBE = 1; - USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */ -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - USB0.PHYSLEW.LONG = 0x5; - IR(PERIB, INTB185) = 0; -#else - IR(USB0, USBI0) = 0; -#endif + LINK_REG->SYSCFG_b.SCKE = 1; + while (!LINK_REG->SYSCFG_b.SCKE) ; + LINK_REG->SYSCFG_b.DRPD = 0; + LINK_REG->SYSCFG_b.DCFM = 0; + LINK_REG->SYSCFG_b.USBE = 1; + + // MCU specific PHY init + link_phy_init(); + + LINK_REG->PHYSLEW = 0x5; + LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */ /* Setup default control pipe */ - USB0.DCPMAXP.BIT.MXPS = 64; - USB0.INTENB0.WORD = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | - USB_IS0_DVST | USB_IS0_CTRT | (USE_SOF ? USB_IS0_SOFR: 0) | USB_IS0_RESM; - USB0.BEMPENB.WORD = 1; - USB0.BRDYENB.WORD = 1; + LINK_REG->DCPMAXP_b.MXPS = 64; + LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT | + (USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM; + LINK_REG->BEMPENB = 1; + LINK_REG->BRDYENB = 1; - if (USB0.INTSTS0.BIT.VBSTS) { + if (LINK_REG->INTSTS0_b.VBSTS) { dcd_connect(rhport); } } void dcd_int_enable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 1; -#else - IEN(USB0, USBI0) = 1; -#endif + link_int_enable(rhport); } void dcd_int_disable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 0; -#else - IEN(USB0, USBI0) = 0; -#endif + link_int_disable(rhport); } void dcd_set_address(uint8_t rhport, uint8_t dev_addr) @@ -672,19 +579,19 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { (void)rhport; - USB0.DVSTCTR0.BIT.WKUP = 1; + LINK_REG->DVSTCTR0_b.WKUP = 1; } void dcd_connect(uint8_t rhport) { (void)rhport; - USB0.SYSCFG.BIT.DPRPU = 1; + LINK_REG->SYSCFG_b.DPRPU = 1; } void dcd_disconnect(uint8_t rhport) { (void)rhport; - USB0.SYSCFG.BIT.DPRPU = 0; + LINK_REG->SYSCFG_b.DPRPU = 0; } void dcd_sof_enable(uint8_t rhport, bool en) @@ -720,8 +627,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) /* setup pipe */ dcd_int_disable(rhport); - USB0.PIPESEL.WORD = num; - USB0.PIPEMAXP.WORD = mps; + LINK_REG->PIPESEL = num; + LINK_REG->PIPEMAXP = mps; volatile uint16_t *ctr = get_pipectr(num); *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR; *ctr = 0; @@ -733,13 +640,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) } else { cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB); } - USB0.PIPECFG.WORD = cfg; - USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num); - USB0.BRDYENB.WORD |= TU_BIT(num); + LINK_REG->PIPECFG = cfg; + LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); + LINK_REG->BRDYENB |= TU_BIT(num); if (dir || (xfer != TUSB_XFER_BULK)) { *ctr = USB_PIPECTR_PID_BUF; } - // TU_LOG1("O %d %x %x\r\n", USB0.PIPESEL.WORD, USB0.PIPECFG.WORD, USB0.PIPEMAXP.WORD); + // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP); dcd_int_enable(rhport); return true; @@ -764,11 +671,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) const unsigned dir = tu_edpt_dir(ep_addr); const unsigned num = _dcd.ep[dir][epn]; - USB0.BRDYENB.WORD &= ~TU_BIT(num); + LINK_REG->BRDYENB &= ~TU_BIT(num); volatile uint16_t *ctr = get_pipectr(num); *ctr = 0; - USB0.PIPESEL.WORD = num; - USB0.PIPECFG.WORD = 0; + LINK_REG->PIPESEL = num; + LINK_REG->PIPECFG = 0; _dcd.pipe[num].ep = 0; _dcd.ep[dir][epn] = 0; } @@ -815,8 +722,8 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) *ctr = USB_PIPECTR_PID_BUF; } else { const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)]; - USB0.PIPESEL.WORD = num; - if (USB0.PIPECFG.BIT.TYPE != 1) { + LINK_REG->PIPESEL = num; + if (LINK_REG->PIPECFG_b.TYPE != 1) { *ctr = USB_PIPECTR_PID_BUF; } } @@ -830,11 +737,11 @@ void dcd_int_handler(uint8_t rhport) { (void)rhport; - unsigned is0 = USB0.INTSTS0.WORD; + unsigned is0 = LINK_REG->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - USB0.INTSTS0.WORD = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID; + LINK_REG->INTSTS0 = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID; if (is0 & USB_IS0_VBINT) { - if (USB0.INTSTS0.BIT.VBSTS) { + if (LINK_REG->INTSTS0_b.VBSTS) { dcd_connect(rhport); } else { dcd_disconnect(rhport); @@ -843,14 +750,14 @@ void dcd_int_handler(uint8_t rhport) if (is0 & USB_IS0_RESM) { dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); #if (0==USE_SOF) - USB0.INTENB0.BIT.SOFE = 0; + LINK_REG->INTENB0_b.SOFE = 0; #endif } - if ((is0 & USB_IS0_SOFR) && USB0.INTENB0.BIT.SOFE) { + if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_b.SOFE) { // USBD will exit suspended mode when SOF event is received dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); -#if (0==USE_SOF) - USB0.INTENB0.BIT.SOFE = 0; +#if (0 == USE_SOF) + LINK_REG->INTENB0_b.SOFE = 0; #endif } if (is0 & USB_IS0_DVST) { @@ -867,7 +774,7 @@ void dcd_int_handler(uint8_t rhport) case USB_IS0_DVSQ_SUSP3: dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); #if (0==USE_SOF) - USB0.INTENB0.BIT.SOFE = 1; + LINK_REG->INTENB0_b.SOFE = 1; #endif default: break; @@ -883,17 +790,17 @@ void dcd_int_handler(uint8_t rhport) } } if (is0 & USB_IS0_BEMP) { - const unsigned s = USB0.BEMPSTS.WORD; - USB0.BEMPSTS.WORD = 0; + const unsigned s = LINK_REG->BEMPSTS; + LINK_REG->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } if (is0 & USB_IS0_BRDY) { - const unsigned m = USB0.BRDYENB.WORD; - unsigned s = USB0.BRDYSTS.WORD & m; + const unsigned m = LINK_REG->BRDYENB; + unsigned s = LINK_REG->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ - USB0.BRDYSTS.WORD = ~s; + LINK_REG->BRDYSTS = ~s; while (s) { #if defined(__CCRX__) static const int Mod37BitPosition[] = { diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 5246ecb94..46a4aae8f 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -27,86 +27,28 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N ) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) + #include "host/hcd.h" -#include "iodefine.h" +#include "link_type.h" + +#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) +#include "link_rx.h" +#else +#error "Unsupported MCU" +#endif //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -#define SYSTEM_PRCR_PRC1 (1<<1) -#define SYSTEM_PRCR_PRKEY (0xA5u<<8) -#define USB_DVSTCTR0_LOW (1u) -#define USB_DVSTCTR0_FULL (2u) +/* LINK core registers */ +#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) -#define USB_FIFOSEL_TX ((uint16_t)(1u<<5)) -#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8)) -#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10)) -#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10)) -#define USB_IS0_CTSQ ((uint16_t)(7u)) -#define USB_IS0_DVSQ ((uint16_t)(7u<<4)) -#define USB_IS0_VALID ((uint16_t)(1u<<3)) -#define USB_IS0_BRDY ((uint16_t)(1u<<8)) -#define USB_IS0_NRDY ((uint16_t)(1u<<9)) -#define USB_IS0_BEMP ((uint16_t)(1u<<10)) -#define USB_IS0_CTRT ((uint16_t)(1u<<11)) -#define USB_IS0_DVST ((uint16_t)(1u<<12)) -#define USB_IS0_SOFR ((uint16_t)(1u<<13)) -#define USB_IS0_RESM ((uint16_t)(1u<<14)) -#define USB_IS0_VBINT ((uint16_t)(1u<<15)) -#define USB_IS1_SACK ((uint16_t)(1u<<4)) -#define USB_IS1_SIGN ((uint16_t)(1u<<5)) -#define USB_IS1_EOFERR ((uint16_t)(1u<<6)) -#define USB_IS1_ATTCH ((uint16_t)(1u<<11)) -#define USB_IS1_DTCH ((uint16_t)(1u<<12)) -#define USB_IS1_BCHG ((uint16_t)(1u<<14)) -#define USB_IS1_OVRCR ((uint16_t)(1u<<15)) - -#define USB_IS0_CTSQ_MSK (7u) -#define USB_IS0_CTSQ_SETUP (1u) -#define USB_IS0_DVSQ_DEF (1u<<4) -#define USB_IS0_DVSQ_ADDR (2u<<4) -#define USB_IS0_DVSQ_SUSP0 (4u<<4) -#define USB_IS0_DVSQ_SUSP1 (5u<<4) -#define USB_IS0_DVSQ_SUSP2 (6u<<4) -#define USB_IS0_DVSQ_SUSP3 (7u<<4) - -#define USB_PIPECTR_PID_MSK (3u) -#define USB_PIPECTR_PID_NAK (0u) -#define USB_PIPECTR_PID_BUF (1u) -#define USB_PIPECTR_PID_STALL (2u) -#define USB_PIPECTR_CCPL (1u<<2) -#define USB_PIPECTR_SQMON (1u<<6) -#define USB_PIPECTR_SQCLR (1u<<8) -#define USB_PIPECTR_ACLRM (1u<<9) -#define USB_PIPECTR_INBUFM (1u<<14) -#define USB_PIPECTR_BSTS (1u<<15) - -#define USB_FIFOCTR_DTLN (0x1FF) -#define USB_FIFOCTR_FRDY (1u<<13) -#define USB_FIFOCTR_BCLR (1u<<14) -#define USB_FIFOCTR_BVAL (1u<<15) - -#define USB_PIPECFG_SHTNAK (1u<<7) -#define USB_PIPECFG_DBLB (1u<<9) -#define USB_PIPECFG_BULK (1u<<14) -#define USB_PIPECFG_ISO (3u<<14) -#define USB_PIPECFG_INT (2u<<14) - -#define USB_DEVADD_LOW (1u<<6) -#define USB_DEVADD_FULL (2u<<6) - -#define FIFO_REQ_CLR (1u) -#define FIFO_COMPLETE (1u<<1) - -// Start of definition of packed structs (used by the CCRX toolchain) TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN -typedef struct { +typedef struct TU_ATTR_PACKED { union { struct { uint16_t : 8; @@ -119,7 +61,7 @@ typedef struct { uint16_t TRN; } reg_pipetre_t; -typedef union { +typedef union TU_ATTR_PACKED { struct { volatile uint16_t u8: 8; volatile uint16_t : 0; @@ -127,8 +69,7 @@ typedef union { volatile uint16_t u16; } hw_fifo_t; -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { void *buf; /* the start address of a transfer data buffer */ uint16_t length; /* the number of bytes in the buffer */ uint16_t remaining; /* the number of bytes remaining in the buffer */ @@ -156,28 +97,6 @@ typedef struct //--------------------------------------------------------------------+ static hcd_data_t _hcd; -static uint32_t disable_interrupt(void) -{ - uint32_t pswi; -#if defined(__CCRX__) - pswi = get_psw() & 0x010000; - clrpsw_i(); -#else - pswi = __builtin_rx_mvfc(0) & 0x010000; - __builtin_rx_clrpsw('I'); -#endif - return pswi; -} - -static void enable_interrupt(uint32_t pswi) -{ -#if defined(__CCRX__) - set_psw(get_psw() | pswi); -#else - __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi); -#endif -} - static unsigned find_pipe(unsigned xfer) { switch (xfer) { @@ -208,58 +127,49 @@ static unsigned find_pipe(unsigned xfer) static volatile uint16_t* get_pipectr(unsigned num) { - volatile uint16_t *ctr = NULL; if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; + return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return (volatile uint16_t*)&(LINK_REG->DCPCTR); } - return ctr; } static volatile reg_pipetre_t* get_pipetre(unsigned num) { volatile reg_pipetre_t* tre = NULL; if ((1 <= num) && (num <= 5)) { - tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD; - tre += num - 1; + tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E); } return tre; } static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr) { - volatile uint16_t *ctr = NULL; - const unsigned epn = tu_edpt_number(ep_addr); + const unsigned epn = tu_edpt_number(ep_addr); if (epn) { const unsigned dir_in = tu_edpt_dir(ep_addr); - const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1]; - if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; - } + const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1]; + return get_pipectr(num); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return get_pipectr(0); } - return ctr; } static unsigned edpt0_max_packet_size(void) { - return USB0.DCPMAXP.BIT.MXPS; + return LINK_REG->DCPMAXP_b.MXPS; } static unsigned edpt_max_packet_size(unsigned num) { - USB0.PIPESEL.WORD = num; - return USB0.PIPEMAXP.BIT.MXPS; + LINK_REG->PIPESEL = num; + return LINK_REG->PIPEMAXP_b.MXPS; } static inline void pipe_wait_for_ready(unsigned num) { - while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ; - while (!USB0.D0FIFOCTR.BIT.FRDY) ; + while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ; + while (!LINK_REG->D0FIFOCTR_b.FRDY) ; } static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) @@ -290,21 +200,22 @@ static bool pipe0_xfer_in(void) const unsigned rem = pipe->remaining; const unsigned mps = edpt0_max_packet_size(); - const unsigned vld = USB0.CFIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; - pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; + if (len < mps) + LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return true; } - USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; return false; } @@ -320,10 +231,11 @@ static bool pipe0_xfer_out(void) const unsigned len = TU_MIN(mps, rem); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL; + if (len < mps) + LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; pipe->remaining = rem - len; return false; } @@ -333,20 +245,21 @@ static bool pipe_xfer_in(unsigned num) pipe_state_t *pipe = &_hcd.pipe[num]; const unsigned rem = pipe->remaining; - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8; + LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); - const unsigned vld = USB0.D0FIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - pipe->remaining = rem - len; + if (len < mps) + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return NULL != buf; @@ -364,18 +277,19 @@ static bool pipe_xfer_out(unsigned num) return true; } - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + if (len < mps) + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -387,11 +301,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, /* configure fifo direction and access unit settings */ if (dir_in) { /* IN, a byte */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8; - while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ; - } else { /* OUT, 2 bytes */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); - while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ; + LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8; + while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ; + } else { /* OUT, 2 bytes */ + LINK_REG->CFIFOSEL = + USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ; } pipe_state_t *pipe = &_hcd.pipe[0]; @@ -401,25 +316,25 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, if (buflen) { pipe->buf = buffer; if (!dir_in) { /* OUT */ - TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80)); + TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); pipe0_xfer_out(); } } else { /* ZLP */ pipe->buf = NULL; if (!dir_in) { /* OUT */ - USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL; + LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; } - if (dir_in == USB0.DCPCFG.BIT.DIR) { - TU_ASSERT(USB_PIPECTR_PID_NAK == USB0.DCPCTR.BIT.PID); - USB0.DCPCTR.BIT.SQSET = 1; - USB0.DCPCFG.BIT.DIR = dir_in ^ 1; + if (dir_in == LINK_REG->DCPCFG_b.DIR) { + TU_ASSERT(USB_PIPECTR_PID_NAK == LINK_REG->DCPCTR_b.PID); + LINK_REG->DCPCTR_b.SQSET = 1; + LINK_REG->DCPCFG_b.DIR = dir_in ^ 1; } } - USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; return true; } -static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen) +static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen) { const unsigned epn = tu_edpt_number(ep_addr); const unsigned dir_in = tu_edpt_dir(ep_addr); @@ -435,11 +350,11 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, u if (buflen) { pipe_xfer_out(num); } else { /* ZLP */ - USB0.D0FIFOSEL.WORD = num; + LINK_REG->D0FIFOSEL = num; pipe_wait_for_ready(num); - USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ } } else { volatile uint16_t *ctr = get_pipectr(num); @@ -520,69 +435,51 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) } } - /*------------------------------------------------------------------*/ /* Host API *------------------------------------------------------------------*/ bool hcd_init(uint8_t rhport) { (void)rhport; - /* Enable USB0 */ - uint32_t pswi = disable_interrupt(); - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; - MSTP(USB0) = 0; - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; - enable_interrupt(pswi); - USB0.SYSCFG.BIT.SCKE = 1; - while (!USB0.SYSCFG.BIT.SCKE) ; - USB0.SYSCFG.BIT.DPRPU = 0; - USB0.SYSCFG.BIT.DRPD = 0; - USB0.SYSCFG.BIT.DCFM = 1; - USB0.DVSTCTR0.BIT.VBUSEN = 1; + LINK_REG->SYSCFG_b.SCKE = 1; + while (!LINK_REG->SYSCFG_b.SCKE) ; + LINK_REG->SYSCFG_b.DPRPU = 0; + LINK_REG->SYSCFG_b.DRPD = 0; + LINK_REG->SYSCFG_b.DCFM = 1; - USB0.SYSCFG.BIT.DRPD = 1; + LINK_REG->DVSTCTR0_b.VBUSEN = 1; + + LINK_REG->SYSCFG_b.DRPD = 1; for (volatile int i = 0; i < 30000; ++i) ; - USB0.SYSCFG.BIT.USBE = 1; + LINK_REG->SYSCFG_b.USBE = 1; - USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */ -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - USB0.PHYSLEW.LONG = 0x5; - IR(PERIB, INTB185) = 0; -#else - IR(USB0, USBI0) = 0; -#endif + // MCU specific PHY init + link_phy_init(); + + LINK_REG->PHYSLEW = 0x5; + LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ /* Setup default control pipe */ - USB0.DCPCFG.WORD = USB_PIPECFG_SHTNAK; - USB0.DCPMAXP.WORD = 64; - USB0.INTENB0.WORD = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP; - USB0.INTENB1.WORD = USB_IS1_SACK | USB_IS1_SIGN | - USB_IS1_ATTCH | USB_IS1_DTCH; - USB0.BEMPENB.WORD = 1; - USB0.NRDYENB.WORD = 1; - USB0.BRDYENB.WORD = 1; + LINK_REG->DCPCFG = USB_PIPECFG_SHTNAK; + LINK_REG->DCPMAXP = 64; + LINK_REG->INTENB0 = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP; + LINK_REG->INTENB1 = USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH; + LINK_REG->BEMPENB = 1; + LINK_REG->NRDYENB = 1; + LINK_REG->BRDYENB = 1; + return true; } void hcd_int_enable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 1; -#else - IEN(USB0, USBI0) = 1; -#endif + link_int_enable(rhport); } void hcd_int_disable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 0; -#else - IEN(USB0, USBI0) = 0; -#endif + link_int_disable(rhport); } uint32_t hcd_frame_number(uint8_t rhport) @@ -591,7 +488,7 @@ uint32_t hcd_frame_number(uint8_t rhport) /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); - return USB0.FRMNUM.BIT.FRNM; + return LINK_REG->FRMNUM_b.FRNM; } /*--------------------------------------------------------------------+ @@ -600,23 +497,23 @@ uint32_t hcd_frame_number(uint8_t rhport) bool hcd_port_connect_status(uint8_t rhport) { (void)rhport; - return USB0.INTSTS1.BIT.ATTCH ? true: false; + return LINK_REG->INTSTS1_b.ATTCH ? true : false; } void hcd_port_reset(uint8_t rhport) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; - while (USB0.DCPCTR.BIT.PBUSY) ; + LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + while (LINK_REG->DCPCTR_b.PBUSY) ; hcd_int_disable(rhport); - USB0.DVSTCTR0.BIT.UACT = 0; - if (USB0.DCPCTR.BIT.SUREQ) - USB0.DCPCTR.BIT.SUREQCLR = 1; + LINK_REG->DVSTCTR0_b.UACT = 0; + if (LINK_REG->DCPCTR_b.SUREQ) + LINK_REG->DCPCTR_b.SUREQCLR = 1; hcd_int_enable(rhport); /* Reset should be asserted 10-20ms. */ - USB0.DVSTCTR0.BIT.USBRST = 1; + LINK_REG->DVSTCTR0_b.USBRST = 1; for (volatile int i = 0; i < 2400000; ++i) ; - USB0.DVSTCTR0.BIT.USBRST = 0; - USB0.DVSTCTR0.BIT.UACT = 1; + LINK_REG->DVSTCTR0_b.USBRST = 0; + LINK_REG->DVSTCTR0_b.UACT = 1; _hcd.need_reset = false; } @@ -628,7 +525,7 @@ void hcd_port_reset_end(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; - switch (USB0.DVSTCTR0.BIT.RHST) { + switch (LINK_REG->DVSTCTR0_b.RHST) { default: return TUSB_SPEED_INVALID; case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL; case USB_DVSTCTR0_LOW: return TUSB_SPEED_LOW; @@ -647,13 +544,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) unsigned num = *ep; if (!num || dev_addr != _hcd.pipe[num].dev) continue; - ctr = (uint16_t volatile*)&USB0.PIPE1CTR.WORD + num - 1; + ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1]; *ctr = 0; - USB0.NRDYENB.WORD &= ~TU_BIT(num); - USB0.BRDYENB.WORD &= ~TU_BIT(num); - USB0.PIPESEL.WORD = num; - USB0.PIPECFG.WORD = 0; - USB0.PIPEMAXP.WORD = 0; + LINK_REG->NRDYENB &= ~TU_BIT(num); + LINK_REG->BRDYENB &= ~TU_BIT(num); + LINK_REG->PIPESEL = num; + LINK_REG->PIPECFG = 0; + LINK_REG->PIPEMAXP = 0; _hcd.pipe[num].ep = 0; _hcd.pipe[num].dev = 0; @@ -667,36 +564,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void)rhport; - // TU_LOG1("S %d %x\n", dev_addr, USB0.DCPCTR.WORD); + // TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR); TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ - TU_ASSERT(0 == USB0.DCPCTR.BIT.SUREQ); + TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ); - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; - _hcd.pipe[0].buf = NULL; - _hcd.pipe[0].length = 8; + _hcd.pipe[0].buf = NULL; + _hcd.pipe[0].length = 8; _hcd.pipe[0].remaining = 0; - _hcd.pipe[0].dev = dev_addr; + _hcd.pipe[0].dev = dev_addr; - while (USB0.DCPCTR.BIT.PBUSY) ; - USB0.DCPMAXP.WORD = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; + while (LINK_REG->DCPCTR_b.PBUSY) ; + LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; /* Set direction in advance for DATA stage */ uint8_t const bmRequesttype = setup_packet[0]; - USB0.DCPCFG.BIT.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; + LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0]; - USB0.USBREQ.WORD = tu_htole16(p[0]); - USB0.USBVAL = p[1]; - USB0.USBINDX = p[2]; - USB0.USBLENG = p[3]; + LINK_REG->USBREQ = tu_htole16(p[0]); + LINK_REG->USBVAL = p[1]; + LINK_REG->USBINDX = p[2]; + LINK_REG->USBLENG = p[3]; - USB0.DCPCTR.BIT.SUREQ = 1; + LINK_REG->DCPCTR_b.SUREQ = 1; return true; } -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc) { (void)rhport; TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ @@ -705,13 +602,13 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const const unsigned epn = tu_edpt_number(ep_addr); const unsigned mps = tu_edpt_packet_size(ep_desc); if (0 == epn) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; hcd_devtree_info_t devtree; hcd_devtree_get_info(dev_addr, &devtree); - uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t)&USB0.DEVADD0.WORD; + uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0]; devadd += dev_addr; - while (USB0.DCPCTR.BIT.PBUSY) ; - USB0.DCPMAXP.WORD = (dev_addr << 12) | mps; + while (LINK_REG->DCPCTR_b.PBUSY) ; + LINK_REG->DCPMAXP = (dev_addr << 12) | mps; *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW; _hcd.ctl_mps[dev_addr] = mps; return true; @@ -731,8 +628,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const /* setup pipe */ hcd_int_disable(rhport); - USB0.PIPESEL.WORD = num; - USB0.PIPEMAXP.WORD = (dev_addr << 12) | mps; + LINK_REG->PIPESEL = num; + LINK_REG->PIPEMAXP = (dev_addr << 12) | mps; volatile uint16_t *ctr = get_pipectr(num); *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR; *ctr = 0; @@ -744,10 +641,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const } else { cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB; } - USB0.PIPECFG.WORD = cfg; - USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num); - USB0.NRDYENB.WORD |= TU_BIT(num); - USB0.BRDYENB.WORD |= TU_BIT(num); + LINK_REG->PIPECFG = cfg; + LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); + LINK_REG->NRDYENB |= TU_BIT(num); + LINK_REG->BRDYENB |= TU_BIT(num); if (!dir_in) { *ctr = USB_PIPECTR_PID_BUF; } @@ -799,52 +696,50 @@ void hcd_int_handler(uint8_t rhport) 20, 8, 19, 18}; #endif - unsigned is1 = USB0.INTSTS1.WORD; - unsigned is0 = USB0.INTSTS0.WORD; + unsigned is1 = LINK_REG->INTSTS1; + unsigned is0 = LINK_REG->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - USB0.INTSTS1.WORD = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1); - USB0.INTSTS0.WORD = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0); + LINK_REG->INTSTS1 = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1); + LINK_REG->INTSTS0 = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0); // TU_LOG1("IS %04x %04x\n", is0, is1); - is1 &= USB0.INTENB1.WORD; - is0 &= USB0.INTENB0.WORD; + is1 &= LINK_REG->INTENB1; + is0 &= LINK_REG->INTENB0; if (is1 & USB_IS1_SACK) { /* Set DATA1 in advance for the next transfer. */ - USB0.DCPCTR.BIT.SQSET = 1; - hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL, - tu_edpt_addr(0, TUSB_DIR_OUT), - 8, XFER_RESULT_SUCCESS, true); + LINK_REG->DCPCTR_b.SQSET = 1; + hcd_event_xfer_complete( + LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); } if (is1 & USB_IS1_SIGN) { - hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL, - tu_edpt_addr(0, TUSB_DIR_OUT), - 8, XFER_RESULT_FAILED, true); + hcd_event_xfer_complete( + LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); } if (is1 & USB_IS1_ATTCH) { - USB0.DVSTCTR0.BIT.UACT = 1; + LINK_REG->DVSTCTR0_b.UACT = 1; _hcd.need_reset = true; - USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_ATTCH) | USB_IS1_DTCH; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_ATTCH) | USB_IS1_DTCH; hcd_event_device_attach(rhport, true); } if (is1 & USB_IS1_DTCH) { - USB0.DVSTCTR0.BIT.UACT = 0; - if (USB0.DCPCTR.BIT.SUREQ) - USB0.DCPCTR.BIT.SUREQCLR = 1; - USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_DTCH) | USB_IS1_ATTCH; + LINK_REG->DVSTCTR0_b.UACT = 0; + if (LINK_REG->DCPCTR_b.SUREQ) + LINK_REG->DCPCTR_b.SUREQCLR = 1; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_DTCH) | USB_IS1_ATTCH; hcd_event_device_remove(rhport, true); } if (is0 & USB_IS0_BEMP) { - const unsigned s = USB0.BEMPSTS.WORD; - USB0.BEMPSTS.WORD = 0; + const unsigned s = LINK_REG->BEMPSTS; + LINK_REG->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } if (is0 & USB_IS0_NRDY) { - const unsigned m = USB0.NRDYENB.WORD; - unsigned s = USB0.NRDYSTS.WORD & m; - USB0.NRDYSTS.WORD = ~s; + const unsigned m = LINK_REG->NRDYENB; + unsigned s = LINK_REG->NRDYSTS & m; + LINK_REG->NRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; @@ -856,10 +751,10 @@ void hcd_int_handler(uint8_t rhport) } } if (is0 & USB_IS0_BRDY) { - const unsigned m = USB0.BRDYENB.WORD; - unsigned s = USB0.BRDYSTS.WORD & m; + const unsigned m = LINK_REG->BRDYENB; + unsigned s = LINK_REG->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ - USB0.BRDYSTS.WORD = ~s; + LINK_REG->BRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h new file mode 100644 index 000000000..b15084bb3 --- /dev/null +++ b/src/portable/renesas/link/link_rx.h @@ -0,0 +1,76 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Koji Kitayama + * Portions copyrighted (c) 2021 Roland Winistoerfer + * Copyright (c) 2022 Rafael Silva (@perigoso) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _LINK_RX_H_ +#define _LINK_RX_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "link_type.h" + +#include "iodefine.h" + +#define LINK_REG_BASE (0x000A0000) + +static inline void link_int_enable(uint8_t rhport) +{ + (void) rhport; +#if (CFG_TUSB_MCU == OPT_MCU_RX72N) + IEN(PERIB, INTB185) = 1; +#else + IEN(USB0, USBI0) = 1; +#endif +} + +static inline void link_int_disable(uint8_t rhport) +{ + (void) rhport; +#if (CFG_TUSB_MCU == OPT_MCU_RX72N) + IEN(PERIB, INTB185) = 0; +#else + IEN(USB0, USBI0) = 0; +#endif +} + +// MCU specific PHY init +static inline void link_phy_init(void) +{ +#if (CFG_TUSB_MCU == OPT_MCU_RX72N) + IR(PERIB, INTB185) = 0; +#else + IR(USB0, USBI0) = 0; +#endif +} + +#ifdef __cplusplus +} +#endif + +#endif /* _LINK_RX_H_ */ diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h new file mode 100644 index 000000000..33cf7879e --- /dev/null +++ b/src/portable/renesas/link/link_type.h @@ -0,0 +1,1658 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Rafael Silva (@perigoso) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_LINK_TYPE_H_ +#define _TUSB_LINK_TYPE_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +#define USB_DVSTCTR0_LOW (1u) +#define USB_DVSTCTR0_FULL (2u) + +#define USB_FIFOSEL_TX ((uint16_t) (1u << 5)) +#define USB_FIFOSEL_BIGEND ((uint16_t) (1u << 8)) +#define USB_FIFOSEL_MBW_8 ((uint16_t) (0u << 10)) +#define USB_FIFOSEL_MBW_16 ((uint16_t) (1u << 10)) +#define USB_IS0_CTSQ ((uint16_t) (7u)) +#define USB_IS0_DVSQ ((uint16_t) (7u << 4)) +#define USB_IS0_VALID ((uint16_t) (1u << 3)) +#define USB_IS0_BRDY ((uint16_t) (1u << 8)) +#define USB_IS0_NRDY ((uint16_t) (1u << 9)) +#define USB_IS0_BEMP ((uint16_t) (1u << 10)) +#define USB_IS0_CTRT ((uint16_t) (1u << 11)) +#define USB_IS0_DVST ((uint16_t) (1u << 12)) +#define USB_IS0_SOFR ((uint16_t) (1u << 13)) +#define USB_IS0_RESM ((uint16_t) (1u << 14)) +#define USB_IS0_VBINT ((uint16_t) (1u << 15)) +#define USB_IS1_SACK ((uint16_t) (1u << 4)) +#define USB_IS1_SIGN ((uint16_t) (1u << 5)) +#define USB_IS1_EOFERR ((uint16_t) (1u << 6)) +#define USB_IS1_ATTCH ((uint16_t) (1u << 11)) +#define USB_IS1_DTCH ((uint16_t) (1u << 12)) +#define USB_IS1_BCHG ((uint16_t) (1u << 14)) +#define USB_IS1_OVRCR ((uint16_t) (1u << 15)) + +#define USB_IS0_CTSQ_MSK (7u) +#define USB_IS0_CTSQ_SETUP (1u) +#define USB_IS0_DVSQ_DEF (1u << 4) +#define USB_IS0_DVSQ_ADDR (2u << 4) +#define USB_IS0_DVSQ_SUSP0 (4u << 4) +#define USB_IS0_DVSQ_SUSP1 (5u << 4) +#define USB_IS0_DVSQ_SUSP2 (6u << 4) +#define USB_IS0_DVSQ_SUSP3 (7u << 4) + +#define USB_PIPECTR_PID_MSK (3u) +#define USB_PIPECTR_PID_NAK (0u) +#define USB_PIPECTR_PID_BUF (1u) +#define USB_PIPECTR_PID_STALL (2u) +#define USB_PIPECTR_CCPL (1u << 2) +#define USB_PIPECTR_SQMON (1u << 6) +#define USB_PIPECTR_SQCLR (1u << 8) +#define USB_PIPECTR_ACLRM (1u << 9) +#define USB_PIPECTR_INBUFM (1u << 14) +#define USB_PIPECTR_BSTS (1u << 15) + +#define USB_FIFOCTR_DTLN (0x1FF) +#define USB_FIFOCTR_FRDY (1u << 13) +#define USB_FIFOCTR_BCLR (1u << 14) +#define USB_FIFOCTR_BVAL (1u << 15) + +#define USB_PIPECFG_SHTNAK (1u << 7) +#define USB_PIPECFG_DBLB (1u << 9) +#define USB_PIPECFG_BULK (1u << 14) +#define USB_PIPECFG_ISO (3u << 14) +#define USB_PIPECFG_INT (2u << 14) + +#define FIFO_REQ_CLR (1u) +#define FIFO_COMPLETE (1u << 1) + +#define USB_DEVADD_LOW (1u << 6) +#define USB_DEVADD_FULL (2u << 6) + +/*--------------------------------------------------------------------*/ +/* Register Definitions */ +/*--------------------------------------------------------------------*/ + +/* Start of definition of packed structs (used by the CCRX toolchain) */ +TU_ATTR_PACKED_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN + +typedef struct TU_ATTR_PACKED { + union { + volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */ + + struct { + uint16_t : 8; + volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */ + volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */ + uint16_t : 6; + } E_b; + }; + + union { + volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */ + + struct { + volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */ + } N_b; + }; +} LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */ + +TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size"); + +/* LINK_REG Structure */ +typedef struct TU_ATTR_PACKED { + union { + volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */ + + struct { + volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ + uint16_t : 2; + volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */ + volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */ + volatile uint16_t DRPD : 1; /* [5..5] D+/D- Line Resistor Control */ + volatile uint16_t DCFM : 1; /* [6..6] Controller Function Select */ + uint16_t : 1; + volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */ + uint16_t : 1; + volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */ + uint16_t : 5; + } SYSCFG_b; + }; + + union { + volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */ + + struct { + volatile uint16_t + BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ + uint16_t : 12; + } BUSWAIT_b; + }; + + union { + volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */ + + struct { + volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ + volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ + uint16_t : 2; + volatile const uint16_t + SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */ + volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */ + uint16_t : 7; + volatile const uint16_t + OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */ + } SYSSTS0_b; + }; + + union { + volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */ + + struct { + volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */ + uint16_t : 15; + } PLLSTA_b; + }; + + union { + volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */ + + struct { + volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */ + uint16_t : 1; + volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ + volatile uint16_t RESUME : 1; /* [5..5] Resume Output */ + volatile uint16_t USBRST : 1; /* [6..6] USB Bus Reset Output */ + volatile uint16_t RWUPE : 1; /* [7..7] Wakeup Detection Enable */ + volatile uint16_t WKUP : 1; /* [8..8] Wakeup Output */ + volatile uint16_t VBUSEN : 1; /* [9..9] USB_VBUSEN Output Pin Control */ + volatile uint16_t EXICEN : 1; /* [10..10] USB_EXICEN Output Pin Control */ + volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */ + uint16_t : 4; + } DVSTCTR0_b; + }; + volatile const uint16_t RESERVED; + + union { + volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */ + + struct { + volatile uint16_t UTST : 4; /* [3..0] Test Mode */ + uint16_t : 12; + } TESTMODE_b; + }; + volatile const uint16_t RESERVED1; + volatile const uint32_t RESERVED2; + + union { + volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */ + + struct { + union { + volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */ + volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */ + }; + + union { + volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED3; + volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */ + + struct { + union { + volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */ + volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */ + }; + + union { + volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED4; + volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */ + + struct { + union { + volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */ + volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */ + }; + + union { + volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED5; + volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */ + uint16_t : 1; + volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ + uint16_t : 2; + volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */ + uint16_t : 2; + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } CFIFOSEL_b; + }; + + union { + volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } CFIFOCTR_b; + }; + volatile const uint32_t RESERVED6; + + union { + volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t + DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } D0FIFOSEL_b; + }; + + union { + volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } D0FIFOCTR_b; + }; + + union { + volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t + DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } D1FIFOSEL_b; + }; + + union { + volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } D1FIFOCTR_b; + }; + + union { + volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */ + + struct { + uint16_t : 8; + volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */ + volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */ + volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */ + volatile uint16_t CTRE : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */ + volatile uint16_t DVSE : 1; /* [12..12] Device State Transition Interrupt Enable */ + volatile uint16_t SOFE : 1; /* [13..13] Frame Number Update Interrupt Enable */ + volatile uint16_t RSME : 1; /* [14..14] Resume Interrupt Enable */ + volatile uint16_t VBSE : 1; /* [15..15] VBUS Interrupt Enable */ + } INTENB0_b; + }; + + union { + volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */ + + struct { + volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */ + uint16_t : 3; + volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ + volatile uint16_t SIGNE : 1; /* [5..5] Setup Transaction Error Interrupt Enable */ + volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */ + uint16_t : 4; + volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */ + volatile uint16_t DTCHE : 1; /* [12..12] Disconnection Detection Interrupt Enable */ + uint16_t : 1; + volatile uint16_t BCHGE : 1; /* [14..14] USB Bus Change Interrupt Enable */ + volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */ + } INTENB1_b; + }; + volatile const uint16_t RESERVED7; + + union { + volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */ + uint16_t : 6; + } BRDYENB_b; + }; + + union { + volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */ + uint16_t : 6; + } NRDYENB_b; + }; + + union { + volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */ + uint16_t : 6; + } BEMPENB_b; + }; + + union { + volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */ + + struct { + uint16_t : 4; + volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */ + volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ + volatile uint16_t BRDYM : 1; /* [6..6] BRDY Interrupt Status Clear Timing */ + uint16_t : 1; + volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */ + uint16_t : 7; + } SOFCFG_b; + }; + + union { + volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */ + + struct { + volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ + volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */ + uint16_t : 1; + volatile uint16_t CDPEN : 1; /* [3..3] Charging Downstream Port Enable */ + volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */ + uint16_t : 2; + volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */ + uint16_t : 1; + volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */ + uint16_t : 3; + volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */ + } PHYSET_b; + }; + + union { + volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */ + + struct { + volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ + volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ + volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ + volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */ + volatile const uint16_t BRDY : 1; /* [8..8] Buffer Ready Interrupt Status */ + volatile const uint16_t NRDY : 1; /* [9..9] Buffer Not Ready Interrupt Status */ + volatile const uint16_t BEMP : 1; /* [10..10] Buffer Empty Interrupt Status */ + volatile uint16_t CTRT : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */ + volatile uint16_t DVST : 1; /* [12..12] Device State Transition Interrupt Status */ + volatile uint16_t SOFR : 1; /* [13..13] Frame Number Refresh Interrupt Status */ + volatile uint16_t RESM : 1; /* [14..14] Resume Interrupt Status */ + volatile uint16_t VBINT : 1; /* [15..15] VBUS Interrupt Status */ + } INTSTS0_b; + }; + + union { + volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */ + + struct { + volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */ + uint16_t : 3; + volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ + volatile uint16_t SIGN : 1; /* [5..5] Setup Transaction Error Interrupt Status */ + volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t LPMEND : 1; /* [8..8] LPM Transaction End Interrupt Status */ + volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */ + uint16_t : 1; + volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ + volatile uint16_t DTCH : 1; /* [12..12] USB Disconnection Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t BCHG : 1; /* [14..14] USB Bus Change Interrupt Status */ + volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */ + } INTSTS1_b; + }; + volatile const uint16_t RESERVED8; + + union { + volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */ + uint16_t : 6; + } BRDYSTS_b; + }; + + union { + volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */ + uint16_t : 6; + } NRDYSTS_b; + }; + + union { + volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */ + uint16_t : 6; + } BEMPSTS_b; + }; + + union { + volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */ + + struct { + volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */ + uint16_t : 3; + volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ + volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */ + } FRMNUM_b; + }; + + union { + volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */ + + struct { + volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */ + uint16_t : 12; + volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ + } UFRMNUM_b; + }; + + union { + volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */ + + struct { + volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */ + uint16_t : 1; + volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ + uint16_t : 5; + } USBADDR_b; + }; + volatile const uint16_t RESERVED9; + + union { + volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */ + + struct { + volatile uint16_t + BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ + volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ + } USBREQ_b; + }; + + union { + volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */ + + struct { + volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */ + } USBVAL_b; + }; + + union { + volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */ + + struct { + volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */ + } USBINDX_b; + }; + + union { + volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */ + + struct { + volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */ + } USBLENG_b; + }; + + union { + volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */ + + struct { + uint16_t : 4; + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; + volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ + volatile uint16_t CNTMD : 1; /* [8..8] Continuous Transfer Mode */ + uint16_t : 7; + } DCPCFG_b; + }; + + union { + volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */ + + struct { + volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ + uint16_t : 5; + volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ + } DCPMAXP_b; + }; + + union { + volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */ + + struct { + volatile uint16_t PID : 2; /* [1..0] Response PID */ + volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ + uint16_t : 2; + volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ + volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQ : 1; /* [14..14] Setup Token Transmission */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + } DCPCTR_b; + }; + volatile const uint16_t RESERVED10; + + union { + volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */ + + struct { + volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */ + uint16_t : 12; + } PIPESEL_b; + }; + volatile const uint16_t RESERVED11; + + union { + volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ + + struct { + volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; + volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ + uint16_t : 1; + volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */ + volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */ + uint16_t : 3; + volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */ + } PIPECFG_b; + }; + volatile const uint16_t RESERVED12; + + union { + volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */ + + struct { + volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ + uint16_t : 3; + volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ + } PIPEMAXP_b; + }; + + union { + volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */ + + struct { + volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */ + uint16_t : 9; + volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */ + uint16_t : 3; + } PIPEPERI_b; + }; + + union { + volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ + + struct { + volatile uint16_t PID : 2; /* [1..0] Response PID */ + uint16_t : 3; + volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ + volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + volatile uint16_t ACLRM : 1; /* [9..9] Auto Buffer Clear Mode */ + volatile uint16_t ATREPM : 1; /* [10..10] Auto Response Mode */ + uint16_t : 1; + volatile const uint16_t CSSTS : 1; /* [12..12] CSSTS Status */ + volatile uint16_t CSCLR : 1; /* [13..13] CSPLIT Status Clear */ + volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + } PIPE_CTR_b[9]; + }; + volatile const uint16_t RESERVED13; + volatile const uint32_t RESERVED14[3]; + volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */ + volatile const uint32_t RESERVED15[3]; + + union { + volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ + + struct { + volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ + volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ + volatile uint16_t + IDMSINKE0 : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */ + volatile uint16_t + IDPSINKE0 : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */ + uint16_t : 1; + volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */ + volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */ + volatile const uint16_t PDDETSTS0 : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */ + uint16_t : 6; + } USBBCCTRL0_b; + }; + volatile const uint16_t RESERVED16; + volatile const uint32_t RESERVED17[4]; + + union { + volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */ + + struct { + volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */ + uint16_t : 15; + } UCKSEL_b; + }; + volatile const uint16_t RESERVED18; + volatile const uint32_t RESERVED19; + + union { + volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */ + + struct { + volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */ + uint16_t : 6; + volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ + uint16_t : 8; + } USBMC_b; + }; + volatile const uint16_t RESERVED20; + + union { + volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */ + + struct { + uint16_t : 6; + volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ + volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */ + volatile uint16_t UPPHUB : 4; /* [14..11] Communication Target Connecting Hub Register */ + uint16_t : 1; + } DEVADD_b[10]; + }; + volatile const uint32_t RESERVED21[3]; + + union { + volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */ + + struct { + volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */ + volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */ + volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */ + volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */ + uint32_t : 28; + } PHYSLEW_b; + }; + volatile const uint32_t RESERVED22[3]; + + union { + volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */ + + struct { + uint16_t : 7; + volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */ + uint16_t : 8; + } LPCTRL_b; + }; + + union { + volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */ + + struct { + uint16_t : 14; + volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */ + uint16_t : 1; + } LPSTS_b; + }; + volatile const uint32_t RESERVED23[15]; + + union { + volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */ + + struct { + volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ + volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ + volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ + volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */ + volatile uint16_t VDMSRCE : 1; /* [4..4] VDMSRC Control */ + volatile uint16_t DCPMODE : 1; /* [5..5] DCP Mode Control */ + uint16_t : 2; + volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */ + volatile const uint16_t PDDETSTS : 1; /* [9..9] PDDET Status */ + uint16_t : 6; + } BCCTRL_b; + }; + volatile const uint16_t RESERVED24; + + union { + volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */ + + struct { + volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ + volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ + volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ + volatile const uint16_t + DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */ + volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */ + uint16_t : 2; + volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */ + uint16_t : 1; + } PL1CTRL1_b; + }; + + union { + volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */ + + struct { + uint16_t : 8; + volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */ + volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ + uint16_t : 3; + } PL1CTRL2_b; + }; + + union { + volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */ + + struct { + volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ + volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */ + uint16_t : 13; + } HL1CTRL1_b; + }; + + union { + volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */ + + struct { + volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */ + uint16_t : 4; + volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ + volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */ + uint16_t : 2; + volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */ + } HL1CTRL2_b; + }; + volatile const uint32_t RESERVED25[5]; + + union { + volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */ + + struct { + uint32_t : 20; + volatile const uint32_t + DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ + volatile const uint32_t + DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ + uint32_t : 1; + volatile const uint32_t + DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */ + uint32_t : 8; + } DPUSR0R_b; + }; + + union { + volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */ + + struct { + uint32_t : 4; + volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ + volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ + uint32_t : 1; + volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */ + uint32_t : 12; + volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */ + volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */ + uint32_t : 1; + volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */ + uint32_t : 8; + } DPUSR1R_b; + }; + + union { + volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */ + + struct { + volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */ + volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */ + uint16_t : 2; + volatile const uint16_t + DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */ + volatile const uint16_t + DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */ + uint16_t : 2; + volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */ + volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */ + uint16_t : 6; + } DPUSR2R_b; + }; + + union { + volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */ + + struct { + volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ + volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */ + uint16_t : 14; + } DPUSRCR_b; + }; + volatile const uint32_t RESERVED26[165]; + + union { + volatile uint32_t + DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */ + + struct { + volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ + volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ + uint32_t : 1; + volatile uint32_t DRPD0 : 1; /* [3..3] D+/D- Pull-Down Resistor Control */ + volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */ + uint32_t : 11; + volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */ + volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */ + uint32_t : 2; + volatile const uint32_t + DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */ + volatile const uint32_t + DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */ + uint32_t : 1; + volatile const uint32_t + DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */ + uint32_t : 8; + } DPUSR0R_FS_b; + }; + + union { + volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */ + + struct { + volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ + volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ + uint32_t : 2; + volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */ + volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */ + uint32_t : 1; + volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */ + uint32_t : 8; + volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */ + volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */ + uint32_t : 2; + volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */ + volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */ + uint32_t : 1; + volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */ + uint32_t : 8; + } DPUSR1R_FS_b; + }; +} LINK_REG_t; /* Size = 1032 (0x408) */ + +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT) == 0x00000002, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0) == 0x00000004, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA) == 0x00000006, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0) == 0x00000008, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE) == 0x0000000C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO) == 0x00000014, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO) == 0x00000018, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO) == 0x0000001C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL) == 0x00000020, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR) == 0x00000022, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL) == 0x00000028, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR) == 0x0000002A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL) == 0x0000002C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR) == 0x0000002E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0) == 0x00000030, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1) == 0x00000032, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB) == 0x00000036, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB) == 0x00000038, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB) == 0x0000003A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG) == 0x0000003C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET) == 0x0000003E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0) == 0x00000040, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1) == 0x00000042, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS) == 0x00000046, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS) == 0x00000048, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS) == 0x0000004A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM) == 0x0000004C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM) == 0x0000004E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR) == 0x00000050, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ) == 0x00000054, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL) == 0x00000056, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX) == 0x00000058, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG) == 0x0000005A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG) == 0x0000005C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP) == 0x0000005E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR) == 0x00000060, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL) == 0x00000064, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG) == 0x00000068, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP) == 0x0000006C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI) == 0x0000006E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR) == 0x00000070, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR) == 0x00000090, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0) == 0x000000B0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL) == 0x000000C4, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC) == 0x000000CC, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD) == 0x000000D0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW) == 0x000000F0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL) == 0x00000100, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS) == 0x00000102, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL) == 0x00000140, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1) == 0x00000144, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2) == 0x00000146, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1) == 0x00000148, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2) == 0x0000014A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R) == 0x00000160, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R) == 0x00000164, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R) == 0x00000168, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR) == 0x0000016A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset"); + +TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */ + TU_ATTR_BIT_FIELD_ORDER_END + +/*--------------------------------------------------------------------*/ +/* Register Bit Definitions */ +/*--------------------------------------------------------------------*/ + +/* PIPE_TR */ +/* E */ +#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL) /* TRENB (Bit 9) */ +#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL) /* TRCLR (Bit 8) */ +#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */ +/* N */ +#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL) /* TRNCNT (Bit 0) */ +#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */ + +/* LINK_REG */ +/* SYSCFG */ +#define LINK_REG_SYSCFG_SCKE_Pos (10UL) /* SCKE (Bit 10) */ +#define LINK_REG_SYSCFG_SCKE_Msk (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_CNEN_Pos (8UL) /* CNEN (Bit 8) */ +#define LINK_REG_SYSCFG_CNEN_Msk (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DCFM_Pos (6UL) /* DCFM (Bit 6) */ +#define LINK_REG_SYSCFG_DCFM_Msk (0x40UL) /* DCFM (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DRPD_Pos (5UL) /* DRPD (Bit 5) */ +#define LINK_REG_SYSCFG_DRPD_Msk (0x20UL) /* DRPD (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DPRPU_Pos (4UL) /* DPRPU (Bit 4) */ +#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL) /* DPRPU (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DMRPU_Pos (3UL) /* DMRPU (Bit 3) */ +#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL) /* DMRPU (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_USBE_Pos (0UL) /* USBE (Bit 0) */ +#define LINK_REG_SYSCFG_USBE_Msk (0x1UL) /* USBE (Bitfield-Mask: 0x01) */ +/* BUSWAIT */ +#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL) /* BWAIT (Bit 0) */ +#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */ +/* SYSSTS0 */ +#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL) /* OVCMON (Bit 14) */ +#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */ +#define LINK_REG_SYSSTS0_HTACT_Pos (6UL) /* HTACT (Bit 6) */ +#define LINK_REG_SYSSTS0_HTACT_Msk (0x40UL) /* HTACT (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_SOFEA_Pos (5UL) /* SOFEA (Bit 5) */ +#define LINK_REG_SYSSTS0_SOFEA_Msk (0x20UL) /* SOFEA (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_IDMON_Pos (2UL) /* IDMON (Bit 2) */ +#define LINK_REG_SYSSTS0_IDMON_Msk (0x4UL) /* IDMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_LNST_Pos (0UL) /* LNST (Bit 0) */ +#define LINK_REG_SYSSTS0_LNST_Msk (0x3UL) /* LNST (Bitfield-Mask: 0x03) */ +/* PLLSTA */ +#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL) /* PLLLOCK (Bit 0) */ +#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */ +/* DVSTCTR0 */ +#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL) /* HNPBTOA (Bit 11) */ +#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_EXICEN_Pos (10UL) /* EXICEN (Bit 10) */ +#define LINK_REG_DVSTCTR0_EXICEN_Msk (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_VBUSEN_Pos (9UL) /* VBUSEN (Bit 9) */ +#define LINK_REG_DVSTCTR0_VBUSEN_Msk (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_WKUP_Pos (8UL) /* WKUP (Bit 8) */ +#define LINK_REG_DVSTCTR0_WKUP_Msk (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RWUPE_Pos (7UL) /* RWUPE (Bit 7) */ +#define LINK_REG_DVSTCTR0_RWUPE_Msk (0x80UL) /* RWUPE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_USBRST_Pos (6UL) /* USBRST (Bit 6) */ +#define LINK_REG_DVSTCTR0_USBRST_Msk (0x40UL) /* USBRST (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RESUME_Pos (5UL) /* RESUME (Bit 5) */ +#define LINK_REG_DVSTCTR0_RESUME_Msk (0x20UL) /* RESUME (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_UACT_Pos (4UL) /* UACT (Bit 4) */ +#define LINK_REG_DVSTCTR0_UACT_Msk (0x10UL) /* UACT (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RHST_Pos (0UL) /* RHST (Bit 0) */ +#define LINK_REG_DVSTCTR0_RHST_Msk (0x7UL) /* RHST (Bitfield-Mask: 0x07) */ +/* TESTMODE */ +#define LINK_REG_TESTMODE_UTST_Pos (0UL) /* UTST (Bit 0) */ +#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */ +/* CFIFOSEL */ +#define LINK_REG_CFIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_CFIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_CFIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_CFIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_CFIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_CFIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_ISEL_Pos (5UL) /* ISEL (Bit 5) */ +#define LINK_REG_CFIFOSEL_ISEL_Msk (0x20UL) /* ISEL (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +/* CFIFOCTR */ +#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +/* D0FIFOSEL */ +#define LINK_REG_D0FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_D0FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_D0FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define LINK_REG_D0FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define LINK_REG_D0FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_D0FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_D0FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_D0FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +/* D0FIFOCTR */ +#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +/* D1FIFOSEL */ +#define LINK_REG_D1FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_D1FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_D1FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define LINK_REG_D1FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define LINK_REG_D1FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_D1FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_D1FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_D1FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +/* D1FIFOCTR */ +#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +/* INTENB0 */ +#define LINK_REG_INTENB0_VBSE_Pos (15UL) /* VBSE (Bit 15) */ +#define LINK_REG_INTENB0_VBSE_Msk (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_RSME_Pos (14UL) /* RSME (Bit 14) */ +#define LINK_REG_INTENB0_RSME_Msk (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_SOFE_Pos (13UL) /* SOFE (Bit 13) */ +#define LINK_REG_INTENB0_SOFE_Msk (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_DVSE_Pos (12UL) /* DVSE (Bit 12) */ +#define LINK_REG_INTENB0_DVSE_Msk (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_CTRE_Pos (11UL) /* CTRE (Bit 11) */ +#define LINK_REG_INTENB0_CTRE_Msk (0x800UL) /* CTRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_BEMPE_Pos (10UL) /* BEMPE (Bit 10) */ +#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL) /* BEMPE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_NRDYE_Pos (9UL) /* NRDYE (Bit 9) */ +#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL) /* NRDYE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_BRDYE_Pos (8UL) /* BRDYE (Bit 8) */ +#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL) /* BRDYE (Bitfield-Mask: 0x01) */ +/* INTENB1 */ +#define LINK_REG_INTENB1_OVRCRE_Pos (15UL) /* OVRCRE (Bit 15) */ +#define LINK_REG_INTENB1_OVRCRE_Msk (0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_BCHGE_Pos (14UL) /* BCHGE (Bit 14) */ +#define LINK_REG_INTENB1_BCHGE_Msk (0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_DTCHE_Pos (12UL) /* DTCHE (Bit 12) */ +#define LINK_REG_INTENB1_DTCHE_Msk (0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_ATTCHE_Pos (11UL) /* ATTCHE (Bit 11) */ +#define LINK_REG_INTENB1_ATTCHE_Msk (0x800UL) /* ATTCHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_EOFERRE_Pos (6UL) /* EOFERRE (Bit 6) */ +#define LINK_REG_INTENB1_EOFERRE_Msk (0x40UL) /* EOFERRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_SIGNE_Pos (5UL) /* SIGNE (Bit 5) */ +#define LINK_REG_INTENB1_SIGNE_Msk (0x20UL) /* SIGNE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_SACKE_Pos (4UL) /* SACKE (Bit 4) */ +#define LINK_REG_INTENB1_SACKE_Msk (0x10UL) /* SACKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL) /* PDDETINTE0 (Bit 0) */ +#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL) /* PDDETINTE0 (Bitfield-Mask: 0x01) */ +/* BRDYENB */ +#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL) /* PIPEBRDYE (Bit 0) */ +#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */ +/* NRDYENB */ +#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL) /* PIPENRDYE (Bit 0) */ +#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */ +/* BEMPENB */ +#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL) /* PIPEBEMPE (Bit 0) */ +#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */ +/* SOFCFG */ +#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL) /* TRNENSEL (Bit 8) */ +#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_BRDYM_Pos (6UL) /* BRDYM (Bit 6) */ +#define LINK_REG_SOFCFG_BRDYM_Msk (0x40UL) /* BRDYM (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_INTL_Pos (5UL) /* INTL (Bit 5) */ +#define LINK_REG_SOFCFG_INTL_Msk (0x20UL) /* INTL (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_EDGESTS_Pos (4UL) /* EDGESTS (Bit 4) */ +#define LINK_REG_SOFCFG_EDGESTS_Msk (0x10UL) /* EDGESTS (Bitfield-Mask: 0x01) */ +/* PHYSET */ +#define LINK_REG_PHYSET_HSEB_Pos (15UL) /* HSEB (Bit 15) */ +#define LINK_REG_PHYSET_HSEB_Msk (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_REPSTART_Pos (11UL) /* REPSTART (Bit 11) */ +#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL) /* REPSTART (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_REPSEL_Pos (8UL) /* REPSEL (Bit 8) */ +#define LINK_REG_PHYSET_REPSEL_Msk (0x300UL) /* REPSEL (Bitfield-Mask: 0x03) */ +#define LINK_REG_PHYSET_CLKSEL_Pos (4UL) /* CLKSEL (Bit 4) */ +#define LINK_REG_PHYSET_CLKSEL_Msk (0x30UL) /* CLKSEL (Bitfield-Mask: 0x03) */ +#define LINK_REG_PHYSET_CDPEN_Pos (3UL) /* CDPEN (Bit 3) */ +#define LINK_REG_PHYSET_CDPEN_Msk (0x8UL) /* CDPEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_PLLRESET_Pos (1UL) /* PLLRESET (Bit 1) */ +#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL) /* PLLRESET (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_DIRPD_Pos (0UL) /* DIRPD (Bit 0) */ +#define LINK_REG_PHYSET_DIRPD_Msk (0x1UL) /* DIRPD (Bitfield-Mask: 0x01) */ +/* INTSTS0 */ +#define LINK_REG_INTSTS0_VBINT_Pos (15UL) /* VBINT (Bit 15) */ +#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_RESM_Pos (14UL) /* RESM (Bit 14) */ +#define LINK_REG_INTSTS0_RESM_Msk (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_SOFR_Pos (13UL) /* SOFR (Bit 13) */ +#define LINK_REG_INTSTS0_SOFR_Msk (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_DVST_Pos (12UL) /* DVST (Bit 12) */ +#define LINK_REG_INTSTS0_DVST_Msk (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_CTRT_Pos (11UL) /* CTRT (Bit 11) */ +#define LINK_REG_INTSTS0_CTRT_Msk (0x800UL) /* CTRT (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_BEMP_Pos (10UL) /* BEMP (Bit 10) */ +#define LINK_REG_INTSTS0_BEMP_Msk (0x400UL) /* BEMP (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_NRDY_Pos (9UL) /* NRDY (Bit 9) */ +#define LINK_REG_INTSTS0_NRDY_Msk (0x200UL) /* NRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_BRDY_Pos (8UL) /* BRDY (Bit 8) */ +#define LINK_REG_INTSTS0_BRDY_Msk (0x100UL) /* BRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_VBSTS_Pos (7UL) /* VBSTS (Bit 7) */ +#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL) /* VBSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define LINK_REG_INTSTS0_DVSQ_Msk (0x70UL) /* DVSQ (Bitfield-Mask: 0x07) */ +#define LINK_REG_INTSTS0_VALID_Pos (3UL) /* VALID (Bit 3) */ +#define LINK_REG_INTSTS0_VALID_Msk (0x8UL) /* VALID (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_CTSQ_Pos (0UL) /* CTSQ (Bit 0) */ +#define LINK_REG_INTSTS0_CTSQ_Msk (0x7UL) /* CTSQ (Bitfield-Mask: 0x07) */ +/* INTSTS1 */ +#define LINK_REG_INTSTS1_OVRCR_Pos (15UL) /* OVRCR (Bit 15) */ +#define LINK_REG_INTSTS1_OVRCR_Msk (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_BCHG_Pos (14UL) /* BCHG (Bit 14) */ +#define LINK_REG_INTSTS1_BCHG_Msk (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_DTCH_Pos (12UL) /* DTCH (Bit 12) */ +#define LINK_REG_INTSTS1_DTCH_Msk (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ +#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_L1RSMEND_Pos (9UL) /* L1RSMEND (Bit 9) */ +#define LINK_REG_INTSTS1_L1RSMEND_Msk (0x200UL) /* L1RSMEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_LPMEND_Pos (8UL) /* LPMEND (Bit 8) */ +#define LINK_REG_INTSTS1_LPMEND_Msk (0x100UL) /* LPMEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_EOFERR_Pos (6UL) /* EOFERR (Bit 6) */ +#define LINK_REG_INTSTS1_EOFERR_Msk (0x40UL) /* EOFERR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_SIGN_Pos (5UL) /* SIGN (Bit 5) */ +#define LINK_REG_INTSTS1_SIGN_Msk (0x20UL) /* SIGN (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_SACK_Pos (4UL) /* SACK (Bit 4) */ +#define LINK_REG_INTSTS1_SACK_Msk (0x10UL) /* SACK (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL) /* PDDETINT0 (Bit 0) */ +#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL) /* PDDETINT0 (Bitfield-Mask: 0x01) */ +/* BRDYSTS */ +#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL) /* PIPEBRDY (Bit 0) */ +#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */ +/* NRDYSTS */ +#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL) /* PIPENRDY (Bit 0) */ +#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */ +/* BEMPSTS */ +#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL) /* PIPEBEMP (Bit 0) */ +#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */ +/* FRMNUM */ +#define LINK_REG_FRMNUM_OVRN_Pos (15UL) /* OVRN (Bit 15) */ +#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */ +#define LINK_REG_FRMNUM_CRCE_Pos (14UL) /* CRCE (Bit 14) */ +#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_FRMNUM_FRNM_Pos (0UL) /* FRNM (Bit 0) */ +#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL) /* FRNM (Bitfield-Mask: 0x7ff) */ +/* UFRMNUM */ +#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL) /* DVCHG (Bit 15) */ +#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */ +#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL) /* UFRNM (Bit 0) */ +#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL) /* UFRNM (Bitfield-Mask: 0x07) */ +/* USBADDR */ +#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL) /* STSRECOV0 (Bit 8) */ +#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */ +#define LINK_REG_USBADDR_USBADDR_Pos (0UL) /* USBADDR (Bit 0) */ +#define LINK_REG_USBADDR_USBADDR_Msk (0x7fUL) /* USBADDR (Bitfield-Mask: 0x7f) */ +/* USBREQ */ +#define LINK_REG_USBREQ_BREQUEST_Pos (8UL) /* BREQUEST (Bit 8) */ +#define LINK_REG_USBREQ_BREQUEST_Msk (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */ +#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL) /* BMREQUESTTYPE (Bit 0) */ +#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL) /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */ +/* USBVAL */ +#define LINK_REG_USBVAL_WVALUE_Pos (0UL) /* WVALUE (Bit 0) */ +#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */ +/* USBINDX */ +#define LINK_REG_USBINDX_WINDEX_Pos (0UL) /* WINDEX (Bit 0) */ +#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */ +/* USBLENG */ +#define LINK_REG_USBLENG_WLENGTH_Pos (0UL) /* WLENGTH (Bit 0) */ +#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */ +/* DCPCFG */ +#define LINK_REG_DCPCFG_CNTMD_Pos (8UL) /* CNTMD (Bit 8) */ +#define LINK_REG_DCPCFG_CNTMD_Msk (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define LINK_REG_DCPCFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ +/* DCPMAXP */ +#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define LINK_REG_DCPMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define LINK_REG_DCPMAXP_MXPS_Msk (0x7fUL) /* MXPS (Bitfield-Mask: 0x7f) */ +/* DCPCTR */ +#define LINK_REG_DCPCTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define LINK_REG_DCPCTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SUREQ_Pos (14UL) /* SUREQ (Bit 14) */ +#define LINK_REG_DCPCTR_SUREQ_Msk (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL) /* SUREQCLR (Bit 11) */ +#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL) /* SUREQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define LINK_REG_DCPCTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define LINK_REG_DCPCTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define LINK_REG_DCPCTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define LINK_REG_DCPCTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_CCPL_Pos (2UL) /* CCPL (Bit 2) */ +#define LINK_REG_DCPCTR_CCPL_Msk (0x4UL) /* CCPL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define LINK_REG_DCPCTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ +/* PIPESEL */ +#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL) /* PIPESEL (Bit 0) */ +#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */ +/* PIPECFG */ +#define LINK_REG_PIPECFG_TYPE_Pos (14UL) /* TYPE (Bit 14) */ +#define LINK_REG_PIPECFG_TYPE_Msk (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */ +#define LINK_REG_PIPECFG_BFRE_Pos (10UL) /* BFRE (Bit 10) */ +#define LINK_REG_PIPECFG_BFRE_Msk (0x400UL) /* BFRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_DBLB_Pos (9UL) /* DBLB (Bit 9) */ +#define LINK_REG_PIPECFG_DBLB_Msk (0x200UL) /* DBLB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define LINK_REG_PIPECFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_EPNUM_Pos (0UL) /* EPNUM (Bit 0) */ +#define LINK_REG_PIPECFG_EPNUM_Msk (0xfUL) /* EPNUM (Bitfield-Mask: 0x0f) */ +/* PIPEMAXP */ +#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PIPEMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define LINK_REG_PIPEMAXP_MXPS_Msk (0x1ffUL) /* MXPS (Bitfield-Mask: 0x1ff) */ +/* PIPEPERI */ +#define LINK_REG_PIPEPERI_IFIS_Pos (12UL) /* IFIS (Bit 12) */ +#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPEPERI_IITV_Pos (0UL) /* IITV (Bit 0) */ +#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL) /* IITV (Bitfield-Mask: 0x07) */ +/* PIPE_CTR */ +#define LINK_REG_PIPE_CTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define LINK_REG_PIPE_CTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL) /* INBUFM (Bit 14) */ +#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_CSCLR_Pos (13UL) /* CSCLR (Bit 13) */ +#define LINK_REG_PIPE_CTR_CSCLR_Msk (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_CSSTS_Pos (12UL) /* CSSTS (Bit 12) */ +#define LINK_REG_PIPE_CTR_CSSTS_Msk (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL) /* ATREPM (Bit 10) */ +#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL) /* ATREPM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_ACLRM_Pos (9UL) /* ACLRM (Bit 9) */ +#define LINK_REG_PIPE_CTR_ACLRM_Msk (0x200UL) /* ACLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define LINK_REG_PIPE_CTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define LINK_REG_PIPE_CTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define LINK_REG_PIPE_CTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define LINK_REG_PIPE_CTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define LINK_REG_PIPE_CTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ +/* DEVADD */ +#define LINK_REG_DEVADD_UPPHUB_Pos (11UL) /* UPPHUB (Bit 11) */ +#define LINK_REG_DEVADD_UPPHUB_Msk (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */ +#define LINK_REG_DEVADD_HUBPORT_Pos (8UL) /* HUBPORT (Bit 8) */ +#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL) /* HUBPORT (Bitfield-Mask: 0x07) */ +#define LINK_REG_DEVADD_USBSPD_Pos (6UL) /* USBSPD (Bit 6) */ +#define LINK_REG_DEVADD_USBSPD_Msk (0xc0UL) /* USBSPD (Bitfield-Mask: 0x03) */ +/* USBBCCTRL0 */ +#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos (9UL) /* PDDETSTS0 (Bit 9) */ +#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL) /* CHGDETSTS0 (Bit 8) */ +#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos (7UL) /* BATCHGE0 (Bit 7) */ +#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk (0x80UL) /* BATCHGE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos (5UL) /* VDMSRCE0 (Bit 5) */ +#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk (0x20UL) /* VDMSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos (4UL) /* IDPSINKE0 (Bit 4) */ +#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk (0x10UL) /* IDPSINKE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos (3UL) /* VDPSRCE0 (Bit 3) */ +#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk (0x8UL) /* VDPSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos (2UL) /* IDMSINKE0 (Bit 2) */ +#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk (0x4UL) /* IDMSINKE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos (1UL) /* IDPSRCE0 (Bit 1) */ +#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk (0x2UL) /* IDPSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_RPDME0_Pos (0UL) /* RPDME0 (Bit 0) */ +#define LINK_REG_USBBCCTRL0_RPDME0_Msk (0x1UL) /* RPDME0 (Bitfield-Mask: 0x01) */ +/* UCKSEL */ +#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL) /* UCKSELC (Bit 0) */ +#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */ +/* USBMC */ +#define LINK_REG_USBMC_VDCEN_Pos (7UL) /* VDCEN (Bit 7) */ +#define LINK_REG_USBMC_VDCEN_Msk (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBMC_VDDUSBE_Pos (0UL) /* VDDUSBE (Bit 0) */ +#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL) /* VDDUSBE (Bitfield-Mask: 0x01) */ +/* PHYSLEW */ +#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL) /* SLEWF01 (Bit 3) */ +#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL) /* SLEWF00 (Bit 2) */ +#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL) /* SLEWR01 (Bit 1) */ +#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL) /* SLEWR00 (Bit 0) */ +#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */ +/* LPCTRL */ +#define LINK_REG_LPCTRL_HWUPM_Pos (7UL) /* HWUPM (Bit 7) */ +#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */ +/* LPSTS */ +#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL) /* SUSPENDM (Bit 14) */ +#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */ +/* BCCTRL */ +#define LINK_REG_BCCTRL_PDDETSTS_Pos (9UL) /* PDDETSTS (Bit 9) */ +#define LINK_REG_BCCTRL_PDDETSTS_Msk (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL) /* CHGDETSTS (Bit 8) */ +#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_DCPMODE_Pos (5UL) /* DCPMODE (Bit 5) */ +#define LINK_REG_BCCTRL_DCPMODE_Msk (0x20UL) /* DCPMODE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_VDMSRCE_Pos (4UL) /* VDMSRCE (Bit 4) */ +#define LINK_REG_BCCTRL_VDMSRCE_Msk (0x10UL) /* VDMSRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDPSINKE_Pos (3UL) /* IDPSINKE (Bit 3) */ +#define LINK_REG_BCCTRL_IDPSINKE_Msk (0x8UL) /* IDPSINKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_VDPSRCE_Pos (2UL) /* VDPSRCE (Bit 2) */ +#define LINK_REG_BCCTRL_VDPSRCE_Msk (0x4UL) /* VDPSRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDMSINKE_Pos (1UL) /* IDMSINKE (Bit 1) */ +#define LINK_REG_BCCTRL_IDMSINKE_Msk (0x2UL) /* IDMSINKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDPSRCE_Pos (0UL) /* IDPSRCE (Bit 0) */ +#define LINK_REG_BCCTRL_IDPSRCE_Msk (0x1UL) /* IDPSRCE (Bitfield-Mask: 0x01) */ +/* PL1CTRL1 */ +#define LINK_REG_PL1CTRL1_L1EXTMD_Pos (14UL) /* L1EXTMD (Bit 14) */ +#define LINK_REG_PL1CTRL1_L1EXTMD_Msk (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL1_HIRDTHR_Pos (8UL) /* HIRDTHR (Bit 8) */ +#define LINK_REG_PL1CTRL1_HIRDTHR_Msk (0xf00UL) /* HIRDTHR (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PL1CTRL1_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define LINK_REG_PL1CTRL1_DVSQ_Msk (0xf0UL) /* DVSQ (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL) /* L1NEGOMD (Bit 3) */ +#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL) /* L1NEGOMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL) /* L1RESPMD (Bit 1) */ +#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL) /* L1RESPMD (Bitfield-Mask: 0x03) */ +#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL) /* L1RESPEN (Bit 0) */ +#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL) /* L1RESPEN (Bitfield-Mask: 0x01) */ +/* PL1CTRL2 */ +#define LINK_REG_PL1CTRL2_RWEMON_Pos (12UL) /* RWEMON (Bit 12) */ +#define LINK_REG_PL1CTRL2_RWEMON_Msk (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL) /* HIRDMON (Bit 8) */ +#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL) /* HIRDMON (Bitfield-Mask: 0x0f) */ +/* HL1CTRL1 */ +#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL) /* L1STATUS (Bit 1) */ +#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */ +#define LINK_REG_HL1CTRL1_L1REQ_Pos (0UL) /* L1REQ (Bit 0) */ +#define LINK_REG_HL1CTRL1_L1REQ_Msk (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */ +/* HL1CTRL2 */ +#define LINK_REG_HL1CTRL2_BESL_Pos (15UL) /* BESL (Bit 15) */ +#define LINK_REG_HL1CTRL2_BESL_Msk (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */ +#define LINK_REG_HL1CTRL2_L1RWE_Pos (12UL) /* L1RWE (Bit 12) */ +#define LINK_REG_HL1CTRL2_L1RWE_Msk (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */ +#define LINK_REG_HL1CTRL2_HIRD_Pos (8UL) /* HIRD (Bit 8) */ +#define LINK_REG_HL1CTRL2_HIRD_Msk (0xf00UL) /* HIRD (Bitfield-Mask: 0x0f) */ +#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL) /* L1ADDR (Bit 0) */ +#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL) /* L1ADDR (Bitfield-Mask: 0x0f) */ +/* DPUSR0R */ +#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL) /* DVBSTSHM (Bit 23) */ +#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_DOVCBHM_Pos (21UL) /* DOVCBHM (Bit 21) */ +#define LINK_REG_DPUSR0R_DOVCBHM_Msk (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_DOVCAHM_Pos (20UL) /* DOVCAHM (Bit 20) */ +#define LINK_REG_DPUSR0R_DOVCAHM_Msk (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */ +/* DPUSR1R */ +#define LINK_REG_DPUSR1R_DVBSTSH_Pos (23UL) /* DVBSTSH (Bit 23) */ +#define LINK_REG_DPUSR1R_DVBSTSH_Msk (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCBH_Pos (21UL) /* DOVCBH (Bit 21) */ +#define LINK_REG_DPUSR1R_DOVCBH_Msk (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCAH_Pos (20UL) /* DOVCAH (Bit 20) */ +#define LINK_REG_DPUSR1R_DOVCAH_Msk (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL) /* DVBSTSHE (Bit 7) */ +#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL) /* DVBSTSHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCBHE_Pos (5UL) /* DOVCBHE (Bit 5) */ +#define LINK_REG_DPUSR1R_DOVCBHE_Msk (0x20UL) /* DOVCBHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCAHE_Pos (4UL) /* DOVCAHE (Bit 4) */ +#define LINK_REG_DPUSR1R_DOVCAHE_Msk (0x10UL) /* DOVCAHE (Bitfield-Mask: 0x01) */ +/* DPUSR2R */ +#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL) /* DMINTE (Bit 9) */ +#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL) /* DPINTE (Bit 8) */ +#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DMVAL_Pos (5UL) /* DMVAL (Bit 5) */ +#define LINK_REG_DPUSR2R_DMVAL_Msk (0x20UL) /* DMVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPVAL_Pos (4UL) /* DPVAL (Bit 4) */ +#define LINK_REG_DPUSR2R_DPVAL_Msk (0x10UL) /* DPVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DMINT_Pos (1UL) /* DMINT (Bit 1) */ +#define LINK_REG_DPUSR2R_DMINT_Msk (0x2UL) /* DMINT (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPINT_Pos (0UL) /* DPINT (Bit 0) */ +#define LINK_REG_DPUSR2R_DPINT_Msk (0x1UL) /* DPINT (Bitfield-Mask: 0x01) */ +/* DPUSRCR */ +#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL) /* FIXPHYPD (Bit 1) */ +#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSRCR_FIXPHY_Pos (0UL) /* FIXPHY (Bit 0) */ +#define LINK_REG_DPUSRCR_FIXPHY_Msk (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */ +/* DPUSR0R_FS */ +#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL) /* DVBSTS0 (Bit 23) */ +#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos (21UL) /* DOVCB0 (Bit 21) */ +#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos (20UL) /* DOVCA0 (Bit 20) */ +#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DM0_Pos (17UL) /* DM0 (Bit 17) */ +#define LINK_REG_DPUSR0R_FS_DM0_Msk (0x20000UL) /* DM0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DP0_Pos (16UL) /* DP0 (Bit 16) */ +#define LINK_REG_DPUSR0R_FS_DP0_Msk (0x10000UL) /* DP0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL) /* FIXPHY0 (Bit 4) */ +#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL) /* FIXPHY0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DRPD0_Pos (3UL) /* DRPD0 (Bit 3) */ +#define LINK_REG_DPUSR0R_FS_DRPD0_Msk (0x8UL) /* DRPD0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_RPUE0_Pos (1UL) /* RPUE0 (Bit 1) */ +#define LINK_REG_DPUSR0R_FS_RPUE0_Msk (0x2UL) /* RPUE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_SRPC0_Pos (0UL) /* SRPC0 (Bit 0) */ +#define LINK_REG_DPUSR0R_FS_SRPC0_Msk (0x1UL) /* SRPC0 (Bitfield-Mask: 0x01) */ +/* DPUSR1R_FS */ +#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos (23UL) /* DVBINT0 (Bit 23) */ +#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos (21UL) /* DOVRCRB0 (Bit 21) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos (20UL) /* DOVRCRA0 (Bit 20) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DMINT0_Pos (17UL) /* DMINT0 (Bit 17) */ +#define LINK_REG_DPUSR1R_FS_DMINT0_Msk (0x20000UL) /* DMINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DPINT0_Pos (16UL) /* DPINT0 (Bit 16) */ +#define LINK_REG_DPUSR1R_FS_DPINT0_Msk (0x10000UL) /* DPINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos (7UL) /* DVBSE0 (Bit 7) */ +#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk (0x80UL) /* DVBSE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL) /* DOVRCRBE0 (Bit 5) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL) /* DOVRCRBE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL) /* DOVRCRAE0 (Bit 4) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL) /* DOVRCRAE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos (1UL) /* DMINTE0 (Bit 1) */ +#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk (0x2UL) /* DMINTE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ +#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ + +#ifdef __cplusplus +} +#endif + +#endif /* _TUSB_LINK_TYPE_H_ */ From 2a17a7e8f851c1a29d7e06ff520d15f36b7a652c Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 12:14:55 +0000 Subject: [PATCH 005/142] rework make freertos port handling this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible Signed-off-by: Rafael Silva --- examples/device/cdc_msc_freertos/Makefile | 7 ++++--- examples/device/hid_composite_freertos/Makefile | 7 ++++--- hw/bsp/d5035_01/board.mk | 2 +- hw/bsp/da14695_dk_usb/board.mk | 2 +- hw/bsp/da1469x_dk_pro/board.mk | 2 +- hw/bsp/ea4088qs/board.mk | 2 +- hw/bsp/ea4357/board.mk | 2 +- hw/bsp/fomu/family.mk | 2 +- hw/bsp/frdm_k32l2b/board.mk | 2 +- hw/bsp/frdm_kl25z/board.mk | 2 +- hw/bsp/gd32vf103/family.mk | 2 +- hw/bsp/imxrt/family.mk | 2 +- hw/bsp/kuiic/board.mk | 2 +- hw/bsp/lpc15/family.mk | 2 +- hw/bsp/lpc18/family.mk | 2 +- hw/bsp/lpc54/family.mk | 2 +- hw/bsp/lpc55/family.mk | 2 +- hw/bsp/lpcxpresso11u37/board.mk | 2 +- hw/bsp/lpcxpresso11u68/board.mk | 2 +- hw/bsp/lpcxpresso1347/board.mk | 2 +- hw/bsp/lpcxpresso1769/board.mk | 2 +- hw/bsp/lpcxpresso51u68/board.mk | 2 +- hw/bsp/mbed1768/board.mk | 2 +- hw/bsp/mm32/family.mk | 2 +- hw/bsp/msp432e4/family.mk | 2 +- hw/bsp/ngx4330/board.mk | 2 +- hw/bsp/nrf/family.mk | 2 +- hw/bsp/nutiny_nuc121s/board.mk | 2 +- hw/bsp/nutiny_nuc125s/board.mk | 2 +- hw/bsp/nutiny_nuc126v/board.mk | 2 +- hw/bsp/nutiny_sdk_nuc120/board.mk | 2 +- hw/bsp/nutiny_sdk_nuc505/board.mk | 2 +- hw/bsp/rx/boards/gr_citrus/board.mk | 2 +- hw/bsp/rx/boards/rx65n_target/board.mk | 2 +- hw/bsp/samd11/family.mk | 2 +- hw/bsp/samd21/family.mk | 2 +- hw/bsp/samd51/family.mk | 2 +- hw/bsp/same54xplainedpro/board.mk | 2 +- hw/bsp/same70_qmtech/board.mk | 2 +- hw/bsp/same70_xplained/board.mk | 2 +- hw/bsp/samg55xplained/board.mk | 2 +- hw/bsp/saml2x/family.mk | 2 +- hw/bsp/sltb009a/board.mk | 2 +- hw/bsp/stm32f0/family.mk | 2 +- hw/bsp/stm32f1/family.mk | 2 +- hw/bsp/stm32f207nucleo/board.mk | 2 +- hw/bsp/stm32f303disco/board.mk | 2 +- hw/bsp/stm32f4/family.mk | 2 +- hw/bsp/stm32f7/family.mk | 2 +- hw/bsp/stm32g4/family.mk | 2 +- hw/bsp/stm32h7/family.mk | 2 +- hw/bsp/stm32l0538disco/board.mk | 2 +- hw/bsp/stm32l4/family.mk | 2 +- hw/bsp/stm32wb/family.mk | 2 +- hw/bsp/tm4c123/family.mk | 2 +- hw/bsp/xmc4000/family.mk | 2 +- 56 files changed, 62 insertions(+), 60 deletions(-) diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index a155d6cb7..368bc8cfa 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -4,14 +4,15 @@ include ../../../tools/top.mk include ../../make.mk FREERTOS_SRC = lib/FreeRTOS-Kernel +FREERTOS_PORT_PATH = lib/FreeRTOS-Kernel/portable/GCC INC += \ src \ src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ - $(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT) - + $(TOP)/$(FREERTOS_PORT) + # Example source EXAMPLE_SOURCE = \ src/freertos_hook.c \ @@ -27,7 +28,7 @@ SRC_C += \ $(FREERTOS_SRC)/queue.c \ $(FREERTOS_SRC)/tasks.c \ $(FREERTOS_SRC)/timers.c \ - $(subst ../../../,,$(wildcard ../../../$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)/*.c)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) # Suppress FreeRTOS warnings CFLAGS += -Wno-error=cast-qual diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index c9b7abdf5..f2e0210ae 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -4,20 +4,21 @@ include ../../../tools/top.mk include ../../make.mk FREERTOS_SRC = lib/FreeRTOS-Kernel +FREERTOS_PORT_PATH = lib/FreeRTOS-Kernel/portable/GCC INC += \ src \ src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ - $(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT) + $(TOP)/$(FREERTOS_PORT) # Example source EXAMPLE_SOURCE = \ src/freertos_hook.c \ src/main.c \ src/usb_descriptors.c - + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) # FreeRTOS source, all files in port folder @@ -26,7 +27,7 @@ SRC_C += \ $(FREERTOS_SRC)/queue.c \ $(FREERTOS_SRC)/tasks.c \ $(FREERTOS_SRC)/timers.c \ - $(subst ../../../,,$(wildcard ../../../$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)/*.c)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) # Suppress FreeRTOS warnings CFLAGS += -Wno-error=cast-qual diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk index b7796b9d8..cefd8c935 100644 --- a/hw/bsp/d5035_01/board.mk +++ b/hw/bsp/d5035_01/board.mk @@ -52,7 +52,7 @@ INC += \ $(TOP)/hw/mcu/microchip/same51/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAME51J19 diff --git a/hw/bsp/da14695_dk_usb/board.mk b/hw/bsp/da14695_dk_usb/board.mk index e969c79c2..2ca7f8529 100644 --- a/hw/bsp/da14695_dk_usb/board.mk +++ b/hw/bsp/da14695_dk_usb/board.mk @@ -31,7 +31,7 @@ INC += \ $(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include # For freeRTOS port source -FREERTOS_PORT = ARM_CM33_NTZ/non_secure +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure # For flash-jlink target JLINK_DEVICE = DA14695 diff --git a/hw/bsp/da1469x_dk_pro/board.mk b/hw/bsp/da1469x_dk_pro/board.mk index 980fc422f..d9dd5cd65 100644 --- a/hw/bsp/da1469x_dk_pro/board.mk +++ b/hw/bsp/da1469x_dk_pro/board.mk @@ -31,7 +31,7 @@ INC += \ $(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include # For freeRTOS port source -FREERTOS_PORT = ARM_CM33_NTZ/non_secure +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure # For flash-jlink target JLINK_DEVICE = DA14699 diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk index b325dfeb4..54195b20c 100644 --- a/hw/bsp/ea4088qs/board.mk +++ b/hw/bsp/ea4088qs/board.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4088 diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk index 6f243c6a2..4556e98f6 100644 --- a/hw/bsp/ea4357/board.mk +++ b/hw/bsp/ea4357/board.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_43xx # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4357_M4 diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk index 165535c6b..8f8f3d011 100644 --- a/hw/bsp/fomu/family.mk +++ b/hw/bsp/fomu/family.mk @@ -19,7 +19,7 @@ INC += \ $(TOP)/$(FAMILY_PATH)/include # For freeRTOS port source -FREERTOS_PORT = RISC-V +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V # flash using dfu-util $(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk index 56df553da..407e5805d 100644 --- a/hw/bsp/frdm_k32l2b/board.mk +++ b/hw/bsp/frdm_k32l2b/board.mk @@ -39,7 +39,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk index 3585b8b03..0a2ddad9f 100644 --- a/hw/bsp/frdm_kl25z/board.mk +++ b/hw/bsp/frdm_kl25z/board.mk @@ -40,7 +40,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/gd32vf103/family.mk b/hw/bsp/gd32vf103/family.mk index 49bacdf1b..c0c144f5c 100644 --- a/hw/bsp/gd32vf103/family.mk +++ b/hw/bsp/gd32vf103/family.mk @@ -57,7 +57,7 @@ INC += \ $(TOP)/$(GD32VF103_SDK_SOC)/Common/Include/Usb # For freeRTOS port source -FREERTOS_PORT = RISC-V +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V # For flash-jlink target JLINK_IF = jtag diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0bf4a0d15..850e54202 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -59,5 +59,5 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S # For freeRTOS port source -FREERTOS_PORT = ARM_CM7/r0p1 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk index 39e9d9deb..94646dbde 100644 --- a/hw/bsp/kuiic/board.mk +++ b/hw/bsp/kuiic/board.mk @@ -40,7 +40,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk index c7dd3f8be..fee0e0106 100644 --- a/hw/bsp/lpc15/family.mk +++ b/hw/bsp/lpc15/family.mk @@ -36,4 +36,4 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk index 7aa36abc4..8ba05c9c9 100644 --- a/hw/bsp/lpc18/family.mk +++ b/hw/bsp/lpc18/family.mk @@ -34,4 +34,4 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_18xx # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk index 600df6fd0..3c1059eff 100644 --- a/hw/bsp/lpc54/family.mk +++ b/hw/bsp/lpc54/family.mk @@ -51,4 +51,4 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk index 4e8d65ce9..94e7fea41 100644 --- a/hw/bsp/lpc55/family.mk +++ b/hw/bsp/lpc55/family.mk @@ -64,4 +64,4 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a # For freeRTOS port source -FREERTOS_PORT = ARM_CM33_NTZ/non_secure +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index b736eebe1..97ac6c01a 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -36,7 +36,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = LPC11U37/401 diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index 922414f82..9647b8b8f 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -32,7 +32,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = LPC11U68 diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index 62135c274..38679a66f 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -36,7 +36,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1347 diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk index 34b4d6dc0..ecafccc49 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -34,7 +34,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1769 diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 98bef6758..6e39bbcad 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -43,7 +43,7 @@ SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 JLINK_DEVICE = LPC51U68 PYOCD_TARGET = LPC51U68 diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk index b0d885866..a65d6eacb 100644 --- a/hw/bsp/mbed1768/board.mk +++ b/hw/bsp/mbed1768/board.mk @@ -34,7 +34,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1768 diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk index 1a9f51191..c1147b4e9 100644 --- a/hw/bsp/mm32/family.mk +++ b/hw/bsp/mm32/family.mk @@ -30,7 +30,7 @@ INC += \ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # flash target using on-board flash: flash-jlink diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk index e3cb90abc..7f823b1aa 100644 --- a/hw/bsp/msp432e4/family.mk +++ b/hw/bsp/msp432e4/family.mk @@ -34,7 +34,7 @@ INC += \ SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = MSP432E401Y diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk index 3e901567c..26f8ae760 100644 --- a/hw/bsp/ngx4330/board.mk +++ b/hw/bsp/ngx4330/board.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_43xx # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4330 diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index d8283a9e6..c79d7e654 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -42,7 +42,7 @@ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S ASFLAGS += -D__HEAP_SIZE=0 # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = $(MCU_VARIANT)_xxaa diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk index ff1d5aa3a..da0226afe 100644 --- a/hw/bsp/nutiny_nuc121s/board.mk +++ b/hw/bsp/nutiny_nuc121s/board.mk @@ -32,7 +32,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC121SC2AE diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk index bb56e42ab..32cb56df1 100644 --- a/hw/bsp/nutiny_nuc125s/board.mk +++ b/hw/bsp/nutiny_nuc125s/board.mk @@ -28,7 +28,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC125SC2AE diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk index 4f0ebf201..d24fdb6e2 100644 --- a/hw/bsp/nutiny_nuc126v/board.mk +++ b/hw/bsp/nutiny_nuc126v/board.mk @@ -34,7 +34,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC126VG4AE diff --git a/hw/bsp/nutiny_sdk_nuc120/board.mk b/hw/bsp/nutiny_sdk_nuc120/board.mk index 4d7aac7f5..b06d4873e 100644 --- a/hw/bsp/nutiny_sdk_nuc120/board.mk +++ b/hw/bsp/nutiny_sdk_nuc120/board.mk @@ -30,7 +30,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC120LE3 diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk index e8514347e..357cdec51 100644 --- a/hw/bsp/nutiny_sdk_nuc505/board.mk +++ b/hw/bsp/nutiny_sdk_nuc505/board.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = NUC505YO13Y diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk index 0eba94610..4f2770725 100644 --- a/hw/bsp/rx/boards/gr_citrus/board.mk +++ b/hw/bsp/rx/boards/gr_citrus/board.mk @@ -11,7 +11,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx63n LD_FILE = $(BOARD_PATH)/r5f5631fd.ld # For freeRTOS port source -FREERTOS_PORT = RX600 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600 # For flash-jlink target JLINK_DEVICE = R5F5631F diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk index fc76d79fa..18c7d354d 100644 --- a/hw/bsp/rx/boards/rx65n_target/board.mk +++ b/hw/bsp/rx/boards/rx65n_target/board.mk @@ -12,7 +12,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx65n LD_FILE = $(BOARD_PATH)/r5f565ne.ld # For freeRTOS port source -FREERTOS_PORT = RX600 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600 # For flash-jlink target JLINK_DEVICE = R5F565NE diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk index ae55be75b..fcc163c02 100644 --- a/hw/bsp/samd11/family.mk +++ b/hw/bsp/samd11/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 208f23789..a4935e442 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/hw/mcu/microchip/samd21/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk index 783bed82a..aa3af5318 100644 --- a/hw/bsp/samd51/family.mk +++ b/hw/bsp/samd51/family.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/hw/mcu/microchip/samd51/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk index 2d0d928ff..7d7ede0f0 100644 --- a/hw/bsp/same54xplainedpro/board.mk +++ b/hw/bsp/same54xplainedpro/board.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/hw/mcu/microchip/same54/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAME54P20 diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk index ba7088e44..5f53004ed 100644 --- a/hw/bsp/same70_qmtech/board.mk +++ b/hw/bsp/same70_qmtech/board.mk @@ -44,7 +44,7 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM7 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7 # For flash-jlink target JLINK_DEVICE = SAME70N19B diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk index cb2decf50..138e27b44 100644 --- a/hw/bsp/same70_xplained/board.mk +++ b/hw/bsp/same70_xplained/board.mk @@ -44,7 +44,7 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM7 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7 # For flash-jlink target JLINK_DEVICE = SAME70Q21B diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk index deff6944c..1d228239e 100644 --- a/hw/bsp/samg55xplained/board.mk +++ b/hw/bsp/samg55xplained/board.mk @@ -42,7 +42,7 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAMG55J19 diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index bb1faeb7f..958b271ad 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk index f5c240ca2..a5011cce2 100644 --- a/hw/bsp/sltb009a/board.mk +++ b/hw/bsp/sltb009a/board.mk @@ -35,7 +35,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = EFM32GG12B810F1024 diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk index 39831e154..75d14d22c 100644 --- a/hw/bsp/stm32f0/family.mk +++ b/hw/bsp/stm32f0/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk index 3fb2e6e70..a9c6f4ec4 100644 --- a/hw/bsp/stm32f1/family.mk +++ b/hw/bsp/stm32f1/family.mk @@ -35,7 +35,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = stm32f103c8 diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f207nucleo/board.mk index fa7d28399..f418c6c04 100644 --- a/hw/bsp/stm32f207nucleo/board.mk +++ b/hw/bsp/stm32f207nucleo/board.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = ARM_CM3 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = stm32f207zg diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index 9dd27a857..371aba0f3 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -40,7 +40,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = stm32f303vc diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk index 9811d3371..48cf1427b 100644 --- a/hw/bsp/stm32f4/family.mk +++ b/hw/bsp/stm32f4/family.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 8482e6dd2..59e421180 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -51,4 +51,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM7/r0p1 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk index 04222f3bb..72993bc66 100644 --- a/hw/bsp/stm32g4/family.mk +++ b/hw/bsp/stm32g4/family.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index 096d04d0c..d2dda3c1b 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -53,5 +53,5 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM7/r0p1 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk index e19101d64..434c94ef2 100644 --- a/hw/bsp/stm32l0538disco/board.mk +++ b/hw/bsp/stm32l0538disco/board.mk @@ -41,7 +41,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = STM32L053R8 diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk index d6f55e5f9..59d214673 100644 --- a/hw/bsp/stm32l4/family.mk +++ b/hw/bsp/stm32l4/family.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/$(BOARD_PATH) # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk index f85c5badd..66f8ff4e2 100644 --- a/hw/bsp/stm32wb/family.mk +++ b/hw/bsp/stm32wb/family.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk index 751076196..73b65f00c 100644 --- a/hw/bsp/tm4c123/family.mk +++ b/hw/bsp/tm4c123/family.mk @@ -33,4 +33,4 @@ SRC_C += \ $(MCU_DIR)/Source/GCC/tm4c123_startup.c # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk index 0b32bdeb5..134098dac 100644 --- a/hw/bsp/xmc4000/family.mk +++ b/hw/bsp/xmc4000/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/$(MCU_DIR)/XMCLib/inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F From a936bafb8c1e0c6f125fdae90ffe57bf0deed57c Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 12:19:45 +0000 Subject: [PATCH 006/142] add support for renesas ra family of mcus Signed-off-by: Rafael Silva --- src/common/tusb_mcu.h | 2 +- src/portable/renesas/link/dcd_link.c | 5 ++- src/portable/renesas/link/hcd_link.c | 5 ++- src/portable/renesas/link/link_ra.h | 64 ++++++++++++++++++++++++++++ src/tusb_option.h | 2 + 5 files changed, 75 insertions(+), 3 deletions(-) create mode 100644 src/portable/renesas/link/link_ra.h diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index c1cf2a810..5daa37f04 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -236,7 +236,7 @@ #define TUP_DCD_ENDPOINT_MAX 7 //------------- Renesas -------------// -#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX) #define TUP_DCD_ENDPOINT_MAX 10 //------------- GigaDevice -------------// diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index 3aeda9e4c..19fbfe293 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -31,13 +31,16 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "device/dcd.h" #include "link_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #include "link_rx.h" +#elif TU_CHECK_MCU(OPT_MCU_RAXXX) +#include "link_ra.h" #else #error "Unsupported MCU" #endif diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 46a4aae8f..2ada28105 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -27,13 +27,16 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "host/hcd.h" #include "link_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #include "link_rx.h" +#elif TU_CHECK_MCU(OPT_MCU_RAXXX) +#include "link_ra.h" #else #error "Unsupported MCU" #endif diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/link/link_ra.h new file mode 100644 index 000000000..b42def368 --- /dev/null +++ b/src/portable/renesas/link/link_ra.h @@ -0,0 +1,64 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Rafael Silva (@perigoso) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _LINK_RA_H_ +#define _LINK_RA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "link_type.h" + +/* renesas fsp api */ +#include "bsp_api.h" + +#define LINK_REG_BASE (0x40090000) + +TU_ATTR_ALWAYS_INLINE +static inline void link_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(TU_IRQn); +} + +TU_ATTR_ALWAYS_INLINE +static inline void link_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(TU_IRQn); +} + +// MCU specific PHY init +static inline void link_phy_init(void) +{ +} + +#ifdef __cplusplus +} +#endif + +#endif /* _LINK_RA_H_ */ diff --git a/src/tusb_option.h b/src/tusb_option.h index 3b054fc78..16bdedce5 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -127,6 +127,8 @@ typedef int make_iso_compilers_happy ; #define OPT_MCU_RX63X 1400 ///< Renesas RX63N/631 #define OPT_MCU_RX65X 1401 ///< Renesas RX65N/RX651 #define OPT_MCU_RX72N 1402 ///< Renesas RX72N +#define OPT_MCU_RAXXX 1403 ///< Renesas RAxxx families + // Mind Motion #define OPT_MCU_MM32F327X 1500 ///< Mind Motion MM32F327 From 0bf0e0b35f55e6906daeeb3615aa1e35503ee8e6 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 12:22:18 +0000 Subject: [PATCH 007/142] add renesas ra mcu family to supported devices docs Signed-off-by: Rafael Silva --- README.rst | 6 +++++- docs/reference/supported.rst | 2 ++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/README.rst b/README.rst index 5b994c357..0877c14d1 100644 --- a/README.rst +++ b/README.rst @@ -48,7 +48,11 @@ The stack supports the following MCUs: - LPC Series: 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55 - **Raspberry Pi:** RP2040 -- **Renesas:** RX63N, RX65N, RX72N +- **Renesas:** + + - RX Series: 63N, 65N, 72N + - RA Series: RA2A1, RA2E1, RA2E2, RA2l1, RA4E1, RA4M1, RA4M2, RA4M3, RA4W1, RA6E1, RA6M1, RA6M2, RA6M3, RA6M4, RA6M5, RA6T1, RA6T2 + - **Silabs:** EFM32GG - **Sony:** CXD56 - **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G4, L0, L1, L4, L4+ diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index 3c1b94623..02da501eb 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -61,6 +61,8 @@ Supported MCUs | Raspberry Pi | RP2040 | ✔ | ✔ | ✖ | rp2040 | | +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ | Renesas | RX | 63N, 65N, 72N | ✔ | ✔ | ✖ | link | | +| +-----+-----------------+--------+------+-----------+-------------------+--------------+ +| | RA | XXX | ✔ | ✔ | | link | | +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ | Silabs | EFM32GG12 | ✔ | | ✖ | dwc2 | | +--------------+-----------------------+--------+------+-----------+-------------------+--------------+ From 4c89776a275b9ae002d5f1dfe5a30fe538bae27e Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 12:58:15 +0000 Subject: [PATCH 008/142] add renesas ek-ra4m3 board port Signed-off-by: Rafael Silva --- .github/workflows/build_arm.yml | 1 + hw/bsp/board_mcu.h | 5 +- hw/bsp/ra/boards/ek_ra4m3/board.mk | 15 + hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c | 210 +++++++ hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld | 575 ++++++++++++++++++ hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h | 35 ++ .../boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h | 27 + .../ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h | 260 ++++++++ .../ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h | 7 + .../ra/boards/ek_ra4m3/fsp_cfg/vector_data.h | 5 + hw/bsp/ra/family.mk | 55 ++ 11 files changed, 1194 insertions(+), 1 deletion(-) create mode 100644 hw/bsp/ra/boards/ek_ra4m3/board.mk create mode 100644 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c create mode 100755 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld create mode 100755 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h create mode 100755 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h create mode 100644 hw/bsp/ra/family.mk diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 5a796a49b..935e83141 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -48,6 +48,7 @@ jobs: - 'mm32' - 'msp432e4' - 'nrf' + - 'ra' - 'rp2040' - 'samd11' - 'samd21' diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index b911e1e53..c8dccd3c5 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -127,13 +127,16 @@ #elif CFG_TUSB_MCU == OPT_MCU_RP2040 #include "pico.h" - + #elif CFG_TUSB_MCU == OPT_MCU_EFM32GG #include "em_device.h" #elif CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X // no header needed +#elif CFG_TUSB_MCU == OPT_MCU_RAXXX + #include "bsp_api.h" + #elif CFG_TUSB_MCU == OPT_MCU_GD32VF103 #include "gd32vf103.h" diff --git a/hw/bsp/ra/boards/ek_ra4m3/board.mk b/hw/bsp/ra/boards/ek_ra4m3/board.mk new file mode 100644 index 000000000..19f293e54 --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/board.mk @@ -0,0 +1,15 @@ +CFLAGS += \ + -mcpu=cortex-m33 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -DCFG_TUSB_MCU=OPT_MCU_RAXXX + +FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3 +FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/ek_ra4m3.ld + +# For flash-jlink target +JLINK_DEVICE = R7FA4M3AF +JLINK_IF = SWD diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c new file mode 100644 index 000000000..d79d7b425 --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c @@ -0,0 +1,210 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Rafael Silva + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include + +#include "bsp/board.h" +#include "bsp_api.h" +#include "r_ioport.h" +#include "r_ioport_api.h" +#include "renesas.h" + +/* Key code for writing PRCR register. */ +#define BSP_PRV_PRCR_KEY (0xA500U) +#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) +#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) + +#define SW1 (BSP_IO_PORT_00_PIN_05) +#define SW2 (BSP_IO_PORT_00_PIN_06) +#define LED1 (BSP_IO_PORT_04_PIN_15) +#define LED3 (BSP_IO_PORT_04_PIN_00) +#define LED2 (BSP_IO_PORT_04_PIN_04) + +/* ISR prototypes */ +void usbfs_interrupt_handler(void); +void usbfs_resume_handler(void); +void usbfs_d0fifo_handler(void); +void usbfs_d1fifo_handler(void); + +BSP_DONT_REMOVE const + fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { + [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ + [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ + [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ +}; +const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { + [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ + [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ + [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ +}; + +const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { + {.pin = BSP_IO_PORT_04_PIN_07, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_00, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_01, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, + {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}}; + +const ioport_cfg_t g_bsp_pin_cfg = { + .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], +}; +ioport_instance_ctrl_t g_ioport_ctrl; +const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void usbfs_interrupt_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + + tud_int_handler(0); +} +void usbfs_resume_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + + tud_int_handler(0); +} +void usbfs_d0fifo_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + + tud_int_handler(0); +} +void usbfs_d1fifo_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + + tud_int_handler(0); +} + +void board_init(void) +{ + /* Configure pins. */ + R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); + + /* Enable USB_BASE */ + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; + R_MSTP->MSTPCRB &= ~(1U << 11U); + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + +#if CFG_TUSB_OS == OPT_OS_NONE + /* Init systick */ + SysTick_Config(SystemCoreClock / 1000); +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state); + R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state); + R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state); +} + +uint32_t board_button_read(void) +{ + bsp_io_level_t lvl; + R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); + return lvl; +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +#endif + +int close(int fd) +{ + (void) fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void) fd; + (void) pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void) fd; + (void) pos; + (void) whence; + return 0; +} +int isatty(int fd) +{ + (void) fd; + return 1; +} diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld new file mode 100755 index 000000000..5bc335cb4 --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld @@ -0,0 +1,575 @@ +/* generated memory regions file - do not edit */ +RAM_START = 0x20000000; +RAM_LENGTH = 0x20000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x100000; +DATA_FLASH_START = 0x08000000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x0100A100; +OPTION_SETTING_LENGTH = 0x100; +OPTION_SETTING_S_START = 0x0100A200; +OPTION_SETTING_S_LENGTH = 0x100; +ID_CODE_START = 0x00000000; +ID_CODE_LENGTH = 0x0; +SDRAM_START = 0x90000000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x4000000; +OSPI_DEVICE_0_START = 0x68000000; +OSPI_DEVICE_0_LENGTH = 0x0; +OSPI_DEVICE_1_START = 0x70000000; +OSPI_DEVICE_1_LENGTH = 0x0; + +/* + Linker File for Renesas FSP +*/ + +QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH); +OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH); +OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH); + +/* This is a non-secure project if the OPTION_SETTING region is non-zero and it does not start at the base address for + * secure option settings (meaning the secure option settings were already allocated in the secure project). */ +__TZ_NS_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) != ORIGIN(OPTION_SETTING)); + +/* This is a secure project if the option setting base address matches the option setting base address for secure + * option settings. This is also set for flat projects because the CPU runs in secure mode for flat projects. + * This is not defined for projects that do not support TrustZone. */ +__TZ_S_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) == ORIGIN(OPTION_SETTING)); + +/* If a flat (secure) project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */ +__RESERVE_NS_RAM = __TZ_S_PROJECT && DEFINED(RAM_NS_BUFFER_LENGTH); + +RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0; +RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0; +RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH; +RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH; + +/* Define memory regions. */ +MEMORY +{ + FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_LENGTH + RAM (rwx) : ORIGIN = RAM_START, LENGTH = RAM_LENGTH + DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START, LENGTH = DATA_FLASH_LENGTH + QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH + OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH + OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH + SDRAM (rwx) : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH + OPTION_SETTING (r): ORIGIN = OPTION_SETTING_START, LENGTH = OPTION_SETTING_LENGTH + OPTION_SETTING_S (r): ORIGIN = OPTION_SETTING_S_START, LENGTH = OPTION_SETTING_S_LENGTH + ID_CODE (rx) : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH +} + +OPTION_SETTING_START_NS = 0x0100A180; +OPTION_SETTING_START_S = 0x0100A100; + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + * __qspi_flash_start__ + * __qspi_flash_end__ + * __qspi_flash_code_size__ + * __qspi_region_max_size__ + * __qspi_region_start_address__ + * __qspi_region_end_address__ + * __ospi_device_0_start__ + * __ospi_device_0_end__ + * __ospi_device_0_code_size__ + * __ospi_device_0_region_max_size__ + * __ospi_device_0_region_start_address__ + * __ospi_device_0_region_end_address__ + * __ospi_device_1_start__ + * __ospi_device_1_end__ + * __ospi_device_1_code_size__ + * __ospi_device_1_region_max_size__ + * __ospi_device_1_region_start_address__ + * __ospi_device_1_region_end_address__ + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + __tz_FLASH_S = ABSOLUTE(FLASH_START); + __ROM_Start = .; + + /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much + * space because ROM registers are at address 0x400 and there is very little space + * in between. */ + KEEP(*(.fixed_vectors*)) + KEEP(*(.application_vectors*)) + __Vectors_End = .; + + /* ROM Registers start at address 0x00000400 */ + . = __ROM_Start + 0x400; + KEEP(*(.rom_registers*)) + + /* Reserving 0x100 bytes of space for ROM registers. */ + . = __ROM_Start + 0x500; + + *(.text*) + + KEEP(*(.version)) + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + __usb_dev_descriptor_start_fs = .; + KEEP(*(.usb_device_desc_fs*)) + __usb_cfg_descriptor_start_fs = .; + KEEP(*(.usb_config_desc_fs*)) + __usb_interface_descriptor_start_fs = .; + KEEP(*(.usb_interface_desc_fs*)) + __usb_descriptor_end_fs = .; + __usb_dev_descriptor_start_hs = .; + KEEP(*(.usb_device_desc_hs*)) + __usb_cfg_descriptor_start_hs = .; + KEEP(*(.usb_config_desc_hs*)) + __usb_interface_descriptor_start_hs = .; + KEEP(*(.usb_interface_desc_hs*)) + __usb_descriptor_end_hs = .; + + KEEP(*(.eh_frame*)) + + __ROM_End = .; + } > FLASH = 0xFF + + __Vectors_Size = __Vectors_End - __Vectors; + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ + /* + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) + __copy_table_end__ = .; + } > FLASH + */ + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ + /* + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) + __zero_table_end__ = .; + } > FLASH + */ + + __etext = .; + + __tz_RAM_S = ORIGIN(RAM); + + /* If DTC is used, put the DTC vector table at the start of SRAM. + This avoids memory holes due to 1K alignment required by it. */ + .fsp_dtc_vector_table (NOLOAD) : + { + . = ORIGIN(RAM); + *(.fsp_dtc_vector_table) + } > RAM + + /* Initialized data section. */ + .data : + { + __data_start__ = .; + . = ALIGN(4); + + __Code_In_RAM_Start = .; + + KEEP(*(.code_in_ram*)) + __Code_In_RAM_End = .; + + *(vtable) + /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */ + *(.data.*) + *(.data) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + + . = ALIGN(4); + + /* All data end */ + __data_end__ = .; + + } > RAM AT > FLASH + + + /* TrustZone Secure Gateway Stubs Section. */ + .gnu.sgstubs : ALIGN (1024) + { + . = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(1024); + __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024); + _start_sg = .; + *(.gnu.sgstubs*) + . = ALIGN(32); + _end_sg = .; + } > FLASH + + __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(32768); + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH); + + /* QSPI_FLASH section to be downloaded via debugger */ + .qspi_flash : + { + __qspi_flash_start__ = .; + KEEP(*(.qspi_flash*)) + KEEP(*(.code_in_qspi*)) + __qspi_flash_end__ = .; + } > QSPI_FLASH + __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__; + + /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */ + __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__); + .qspi_non_retentive : AT (__qspi_flash_code_addr__) + { + __qspi_non_retentive_start__ = .; + KEEP(*(.qspi_non_retentive*)) + __qspi_non_retentive_end__ = .; + } > QSPI_FLASH + __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__; + + __qspi_region_max_size__ = 0x4000000; /* Must be the same as defined in MEMORY above */ + __qspi_region_start_address__ = __qspi_flash_start__; + __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_QSPI_FLASH_N = __qspi_non_retentive_end__; + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0); + + /* OSPI_DEVICE_0 section to be downloaded via debugger */ + .OSPI_DEVICE_0 : + { + __ospi_device_0_start__ = .; + KEEP(*(.ospi_device_0*)) + KEEP(*(.code_in_ospi_device_0*)) + __ospi_device_0_end__ = .; + } > OSPI_DEVICE_0 + __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__; + + /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ + __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__); + .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__) + { + __ospi_device_0_non_retentive_start__ = .; + KEEP(*(.ospi_device_0_non_retentive*)) + __ospi_device_0_non_retentive_end__ = .; + } > OSPI_DEVICE_0 + __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__; + + __ospi_device_0_region_max_size__ = 0x8000000; /* Must be the same as defined in MEMORY above */ + __ospi_device_0_region_start_address__ = __ospi_device_0_start__; + __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1); + + /* OSPI_DEVICE_1 section to be downloaded via debugger */ + .OSPI_DEVICE_1 : + { + __ospi_device_1_start__ = .; + KEEP(*(.ospi_device_1*)) + KEEP(*(.code_in_ospi_device_1*)) + __ospi_device_1_end__ = .; + } > OSPI_DEVICE_1 + __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__; + + /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ + __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__); + .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__) + { + __ospi_device_1_non_retentive_start__ = .; + KEEP(*(.ospi_device_1_non_retentive*)) + __ospi_device_1_non_retentive_end__ = .; + } > OSPI_DEVICE_1 + __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__; + + __ospi_device_1_region_max_size__ = 0x10000000; /* Must be the same as defined in MEMORY above */ + __ospi_device_1_region_start_address__ = __ospi_device_1_start__; + __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__; + + .noinit (NOLOAD): + { + . = ALIGN(4); + __noinit_start = .; + KEEP(*(.noinit*)) + . = ALIGN(8); + /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */ + KEEP(*(.heap.*)) + __noinit_end = .; + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (NOLOAD): + { + . = ALIGN(8); + __HeapBase = .; + /* Place the STD heap here. */ + KEEP(*(.heap)) + __HeapLimit = .; + } > RAM + + /* Stacks are stored in this section. */ + .stack_dummy (NOLOAD): + { + . = ALIGN(8); + __StackLimit = .; + /* Main stack */ + KEEP(*(.stack)) + __StackTop = .; + /* Thread stacks */ + KEEP(*(.stack*)) + __StackTopAll = .; + } > RAM + + PROVIDE(__stack = __StackTopAll); + + /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used + at run time for things such as ThreadX memory pool allocations. */ + __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4); + + /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects. + * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary. + * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ + __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024); + + /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects. + * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not + * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary. + * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ + __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192); + + /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects. + * The EDMAC is a non-secure bus master and can only access non-secure RAM. */ + .ns_buffer (NOLOAD): + { + /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */ + . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .; + + KEEP(*(.ns_buffer*)) + } > RAM + + /* Data flash. */ + .data_flash : + { + . = ORIGIN(DATA_FLASH); + __tz_DATA_FLASH_S = .; + __Data_Flash_Start = .; + KEEP(*(.data_flash*)) + __Data_Flash_End = .; + + __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024); + } > DATA_FLASH + + /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ + __tz_SDRAM_S = ORIGIN(SDRAM); + + /* SDRAM */ + .sdram (NOLOAD): + { + __SDRAM_Start = .; + KEEP(*(.sdram*)) + KEEP(*(.frame*)) + __SDRAM_End = .; + } > SDRAM + + /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ + __tz_SDRAM_N = __SDRAM_End; + + /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ + __tz_ID_CODE_S = ORIGIN(ID_CODE); + + .id_code : + { + __ID_Code_Start = .; + KEEP(*(.id_code*)) + __ID_Code_End = .; + } > ID_CODE + + /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ + __tz_ID_CODE_N = __ID_Code_End; + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING); + + .option_setting : + { + __OPTION_SETTING_Start = .; + KEEP(*(.option_setting_ofs0)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start; + KEEP(*(.option_setting_dualsel)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start; + KEEP(*(.option_setting_sas)) + __OPTION_SETTING_End = .; + } > OPTION_SETTING = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_N = OPTION_SETTING_START_NS; + + .option_setting_ns : + { + __OPTION_SETTING_NS_Start = .; + KEEP(*(.option_setting_ofs1)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_banksel)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps0)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps1)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps2)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps0)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps1)) + . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps2)) + __OPTION_SETTING_NS_End = .; + } > OPTION_SETTING = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S); + + .option_setting_s : + { + __OPTION_SETTING_S_Start = .; + KEEP(*(.option_setting_ofs1_sec)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_banksel_sec)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec0)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec1)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec2)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec0)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec1)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec2)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_ofs1_sel)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_banksel_sel)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel0)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel1)) + . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel2)) + __OPTION_SETTING_S_End = .; + } > OPTION_SETTING_S = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End; +} diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h new file mode 100755 index 000000000..a84d81e8d --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h @@ -0,0 +1,35 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CFG_H_ +#define BSP_CFG_H_ + +#include "board.h" +#include "bsp_clock_cfg.h" +#include "bsp_mcu_family_cfg.h" + +#undef RA_NOT_DEFINED +#define BSP_CFG_RTOS (0) +#if defined(_RA_BOOT_IMAGE) +#define BSP_CFG_BOOT_IMAGE (1) +#endif +#define BSP_CFG_MCU_VCC_MV (3300) +#define BSP_CFG_STACK_MAIN_BYTES (0x400) +#define BSP_CFG_HEAP_BYTES (0x400) +#define BSP_CFG_PARAM_CHECKING_ENABLE (1) +#define BSP_CFG_ASSERT (0) +#define BSP_CFG_ERROR_LOG (0) + +#define BSP_CFG_PFS_PROTECT ((1)) + +#define BSP_CFG_C_RUNTIME_INIT ((1)) +#define BSP_CFG_EARLY_INIT ((0)) + +#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0)) + +#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) + +#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) +#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) +#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) +#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 + +#endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h new file mode 100644 index 000000000..4f490f340 --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h @@ -0,0 +1,27 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CLOCK_CFG_H_ +#define BSP_CLOCK_CFG_H_ + +#define BSP_CFG_CLOCKS_SECURE (0) +#define BSP_CFG_CLOCKS_OVERRIDE (0) +#define BSP_CFG_XTAL_HZ (24000000) /* XTAL 24000000Hz */ +#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */ +#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */ +#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL Div /3 */ +#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_24_0 /* PLL Mul x24.0 */ +#define BSP_CFG_PLL2_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */ +#define BSP_CFG_PLL2_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL2 Div /3 */ +#define BSP_CFG_PLL2_MUL BSP_CLOCKS_PLL_MUL_24_0 /* PLL2 Mul x24.0 */ +#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */ +#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */ +#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL2) /* UCLK Src: PLL2 */ +#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* ICLK Div /2 */ +#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */ +#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */ +#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */ +#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */ +#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */ +#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */ +#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_4) /* UCLK Div /4 */ + +#endif /* BSP_CLOCK_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h new file mode 100644 index 000000000..0449bb4bc --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h @@ -0,0 +1,260 @@ +/* generated configuration header file through renesas e2 studio */ +#ifndef BSP_MCU_FAMILY_CFG_H_ +#define BSP_MCU_FAMILY_CFG_H_ + +#include "bsp_clock_cfg.h" +#include "bsp_mcu_info.h" + +#define BSP_CFG_MCU_PART_SERIES (4) +#define BSP_MCU_R7FA4M3AF3CFB +#define BSP_ROM_SIZE_BYTES (1048576) +#define BSP_RAM_SIZE_BYTES (131072) +#define BSP_DATA_FLASH_SIZE_BYTES (8192) +#define BSP_PACKAGE_LQFP +#define BSP_PACKAGE_PINS (144) + +#define BSP_MCU_GROUP_RA4M3 (1) +#define BSP_LOCO_HZ (32768) +#define BSP_MOCO_HZ (8000000) +#define BSP_SUB_CLOCK_HZ (32768) +#if BSP_CFG_HOCO_FREQUENCY == 0 +#define BSP_HOCO_HZ (16000000) +#elif BSP_CFG_HOCO_FREQUENCY == 1 +#define BSP_HOCO_HZ (18000000) +#elif BSP_CFG_HOCO_FREQUENCY == 2 +#define BSP_HOCO_HZ (20000000) +#else +#error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h" +#endif + +#define BSP_CFG_FLL_ENABLE (0) + +#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) +#define BSP_VECTOR_TABLE_MAX_ENTRIES (112U) +#define BSP_MCU_VBATT_SUPPORT (1) + +#if defined(_RA_TZ_SECURE) +#define BSP_TZ_SECURE_BUILD (1) +#define BSP_TZ_NONSECURE_BUILD (0) +#elif defined(_RA_TZ_NONSECURE) +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (1) +#else +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (0) +#endif + +/* TrustZone Settings */ +#define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE)) +#define BSP_TZ_CFG_SKIP_INIT (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY) +#define BSP_TZ_CFG_EXCEPTION_RESPONSE (0) + +/* CMSIS TrustZone Settings */ +#define SCB_CSR_AIRCR_INIT (1) +#define SCB_AIRCR_BFHFNMINS_VAL (0) +#define SCB_AIRCR_SYSRESETREQS_VAL (1) +#define SCB_AIRCR_PRIS_VAL (0) +#define TZ_FPU_NS_USAGE (1) +#define SCB_NSACR_CP10_11_VAL (3U) + +#define FPU_FPCCR_TS_VAL (1U) +#define FPU_FPCCR_CLRONRETS_VAL (1) + +#define FPU_FPCCR_CLRONRET_VAL (1) + +/* The C-Cache line size that is configured during startup. */ +#define BSP_CFG_C_CACHE_LINE_SIZE (1U) + +/* Type 1 Peripheral Security Attribution */ + +/* Peripheral Security Attribution Register (PSAR) Settings */ +#define BSP_TZ_CFG_PSARB \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \ + (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */ +#define BSP_TZ_CFG_PSARC \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */ +#define BSP_TZ_CFG_PSARD \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \ + 0xffae07f0) /* Unused */ +#define BSP_TZ_CFG_PSARE \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \ + (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ | \ + (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */ +#define BSP_TZ_CFG_MSSAR \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \ + 0xfffffffc) /* Unused */ + +/* Type 2 Peripheral Security Attribution */ + +/* Security attribution for Cache registers. */ +#define BSP_TZ_CFG_CSAR (0xFFFFFFFFU) + +/* Security attribution for RSTSRn registers. */ +#define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU) + +/* Security attribution for registers of LVD channels. */ +#define BSP_TZ_CFG_LVDSAR \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \ + 0xFFFFFFFCU) + +/* Security attribution for LPM registers. */ +#define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU) +/* Deep Standby Interrupt Factor Security Attribution Register. */ +#define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU) + +/* Security attribution for CGC registers. */ +#if BSP_CFG_CLOCKS_SECURE +/* Protect all CGC registers from Non-secure write access. */ +#define BSP_TZ_CFG_CGFSAR (0xFFFCE402U) +#else +/* Allow Secure and Non-secure write access. */ +#define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU) +#endif + +/* Security attribution for Battery Backup registers. */ +#define BSP_TZ_CFG_BBFSAR (0x00FFFFFF) + +/* Security attribution for registers for IRQ channels. */ +#define BSP_TZ_CFG_ICUSARA \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \ + (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U) + +/* Security attribution for NMI registers. */ +#define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */ + +/* Security attribution for registers for DMAC channels */ +#define BSP_TZ_CFG_ICUSARC \ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U) + +/* Security attribution registers for SELSR0. */ +#define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU) + +/* Security attribution registers for WUPEN0. */ +#define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU) + +/* Security attribution registers for WUPEN1. */ +#define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU) + +/* Set DTCSTSAR if the Secure program uses the DTC. */ +// #if RA_NOT_DEFINED == RA_NOT_DEFINED +#define BSP_TZ_CFG_DTC_USED (0U) +// #else +// #define BSP_TZ_CFG_DTC_USED (1U) +// #endif + +/* Security attribution of FLWT and FCKMHZ registers. */ +/* If the CGC registers are only accessible in Secure mode, than there is no + * reason for nonsecure applications to access FLWT and FCKMHZ. */ +#if BSP_CFG_CLOCKS_SECURE +/* Protect FLWT and FCKMHZ registers from nonsecure write access. */ +#define BSP_TZ_CFG_FSAR (0xFEFEU) +#else +/* Allow Secure and Non-secure write access. */ +#define BSP_TZ_CFG_FSAR (0xFFFFU) +#endif + +/* Security attribution for SRAM registers. */ +/* If the CGC registers are only accessible in Secure mode, than there is no + * reason for Non Secure applications to access + * SRAM0WTEN and therefore there is no reason to access PRCR2. */ +#define BSP_TZ_CFG_SRAMSAR (1 | ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | 4 | 0xFFFFFFF8U) + +/* Security attribution for Standby RAM registers. */ +#define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U) + +/* Security attribution for the DMAC Bus Master MPU settings. */ +/* The DMAC Bus Master MPU settings should align with the DMAC channel settings. + */ +#define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC) + +/* Security Attribution Register A for BUS Control registers. */ +#define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU) +/* Security Attribution Register B for BUS Control registers. */ +#define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU) + +#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) +#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) +#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) +#define OFS_SEQ4 (3 << 18) | (15 << 20) | (3 << 24) | (3 << 26) +#define OFS_SEQ5 (1 << 28) | (1 << 30) +#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5) + +/* Option Function Select Register 1 Security Attribution */ +#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE) +#define BSP_CFG_ROM_REG_OFS1_SEL \ + (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U)) +#else +#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U) +#endif + +#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) + +/* Used to create IELS values for the interrupt initialization table + * g_interrupt_event_link_select. */ +#define BSP_PRV_IELS_ENUM(vector) (ELC_##vector) +/* Dual Mode Select Register */ +#define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFFFU) +/* Block Protection Register 0 */ +#define BSP_CFG_ROM_REG_BPS0 (~(0U)) +/* Block Protection Register 1 */ +#define BSP_CFG_ROM_REG_BPS1 (~(0U)) +/* Block Protection Register 2 */ +#define BSP_CFG_ROM_REG_BPS2 (0xFFFFFFFFU) +/* Permanent Block Protection Register 0 */ +#define BSP_CFG_ROM_REG_PBPS0 (~(0U)) +/* Permanent Block Protection Register 1 */ +#define BSP_CFG_ROM_REG_PBPS1 (~(0U)) +/* Permanent Block Protection Register 2 */ +#define BSP_CFG_ROM_REG_PBPS2 (0xFFFFFFFFU) +/* Security Attribution for Block Protection Register 0 (If any blocks are + * marked as protected in the secure application, then mark them as secure) */ +#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0) +/* Security Attribution for Block Protection Register 1 (If any blocks are + * marked as protected in the secure application, then mark them as secure) */ +#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1) +/* Security Attribution for Block Protection Register 2 (If any blocks are + * marked as protected in the secure application, then mark them as secure) */ +#define BSP_CFG_ROM_REG_BPS_SEL2 (0xFFFFFFFFU) +#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) + +#endif /* BSP_MCU_FAMILY_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h new file mode 100755 index 000000000..cb7c07932 --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h @@ -0,0 +1,7 @@ +/* generated configuration header file - do not edit */ +#ifndef R_IOPORT_CFG_H_ +#define R_IOPORT_CFG_H_ + +#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) + +#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h new file mode 100644 index 000000000..37739c12a --- /dev/null +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h @@ -0,0 +1,5 @@ +/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ +#define TU_IRQn 0 +#define USBFS_RESUME_IRQn 1 +#define USBFS_FIFO_0_IRQn 2 +#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk new file mode 100644 index 000000000..6b7f43345 --- /dev/null +++ b/hw/bsp/ra/family.mk @@ -0,0 +1,55 @@ +DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5 + +# Cross Compiler for RA +CROSS_COMPILE = arm-none-eabi- + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -Wno-error=undef \ + -Wno-error=strict-prototypes \ + -Wno-error=cast-align \ + -Wno-error=cast-qual \ + -Wno-error=unused-but-set-variable \ + -Wno-error=unused-variable \ + -mthumb \ + -nostdlib \ + -nostartfiles \ + -ffunction-sections \ + -fdata-sections \ + -ffreestanding + +SRC_C += \ + src/portable/renesas/link/dcd_link.c \ + src/portable/renesas/link/hcd_link.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_common.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_delay.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_group_irq.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_guard.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_io.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_irq.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_register_protection.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_sbrk.c \ + hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_security.c \ + hw/mcu/renesas/fsp/ra/fsp/src/r_ioport/r_ioport.c \ + $(FSP_BOARD_DIR)/board_init.c \ + $(FSP_BOARD_DIR)/board_leds.c + +INC += \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(BOARD_PATH)/fsp_cfg \ + $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \ + $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \ + $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \ + $(TOP)/$(FSP_MCU_DIR) \ + $(TOP)/$(FSP_BOARD_DIR) + +# For freeRTOS port source +# hack to use the port provided by renesas +FREERTOS_PORT = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port From e7027efe7a53fcc3eb383750b8837c91d1d2d31d Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 14:12:01 +0000 Subject: [PATCH 009/142] add contributions to docs Signed-off-by: Rafael Silva --- CONTRIBUTORS.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/CONTRIBUTORS.rst b/CONTRIBUTORS.rst index 5726169f8..50a33ae33 100644 --- a/CONTRIBUTORS.rst +++ b/CONTRIBUTORS.rst @@ -119,6 +119,7 @@ Notable contributors - Port DCD Synopsys to support Silabs EFM32GG12 with SLTB009A board - Rewrite documentation in rst and setup for readthedocs +- Generalize Renesas driver and support RA family with EK-RA4M3 board `Raspberry Pi Team `__ From c529d0b4405aa33b4793d03ce82568990c3f507c Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 15:55:35 +0000 Subject: [PATCH 010/142] remove duplicate link register bit macros Signed-off-by: Rafael Silva --- src/portable/renesas/link/dcd_link.c | 108 +++++++++++++------------- src/portable/renesas/link/hcd_link.c | 98 +++++++++++------------ src/portable/renesas/link/link_type.h | 98 ++++++++--------------- 3 files changed, 136 insertions(+), 168 deletions(-) diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index 19fbfe293..f2334140a 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -32,7 +32,7 @@ #define USE_SOF 0 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_RAXXX) + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "device/dcd.h" #include "link_type.h" @@ -245,7 +245,7 @@ static bool pipe0_xfer_in(void) } } if (len < mps) - LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; pipe->remaining = rem - len; return false; } @@ -268,7 +268,7 @@ static bool pipe0_xfer_out(void) } } if (len < mps) - LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -287,7 +287,7 @@ static bool pipe_xfer_in(unsigned num) return true; } - LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); @@ -301,7 +301,7 @@ static bool pipe_xfer_in(unsigned num) } } if (len < mps) - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; @@ -313,7 +313,7 @@ static bool pipe_xfer_out(unsigned num) pipe_state_t *pipe = &_dcd.pipe[num]; const unsigned rem = pipe->remaining; - LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8; + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; @@ -328,7 +328,7 @@ static bool pipe_xfer_out(unsigned num) } } if (len < mps) - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; @@ -342,13 +342,13 @@ static bool pipe_xfer_out(unsigned num) static void process_setup_packet(uint8_t rhport) { uint16_t setup_packet[4]; - if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID)) return; - LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + if (0 == (LINK_REG->INTSTS0 & LINK_REG_INTSTS0_VALID_Msk)) return; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; setup_packet[0] = tu_le16toh(LINK_REG->USBREQ); setup_packet[1] = LINK_REG->USBVAL; setup_packet[2] = LINK_REG->USBINDX; setup_packet[3] = LINK_REG->USBLENG; - LINK_REG->INTSTS0 = ~USB_IS0_VALID; + LINK_REG->INTSTS0 = ~((uint16_t)LINK_REG_INTSTS0_VALID_Msk); dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true); } @@ -356,7 +356,7 @@ static void process_status_completion(uint8_t rhport) { uint8_t ep_addr; /* Check the data stage direction */ - if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) { + if (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) { /* IN transfer. */ ep_addr = tu_edpt_addr(0, TUSB_DIR_IN); } else { @@ -370,12 +370,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u { /* configure fifo direction and access unit settings */ if (ep_addr) { /* IN, 2 bytes */ - LINK_REG->CFIFOSEL = - USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); - while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ; + LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; } else { /* OUT, a byte */ - LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8; - while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ; + LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; + while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; } pipe_state_t *pipe = &_dcd.pipe[0]; @@ -388,11 +388,11 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); pipe0_xfer_in(); } - LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; } else { /* ZLP */ pipe->buf = NULL; - LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_DCPCTR_CCPL_Msk | LINK_REG_PIPE_CTR_PID_BUF; } return true; } @@ -416,7 +416,7 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui } else { /* ZLP */ LINK_REG->D0FIFOSEL = num; pipe_wait_for_ready(num); - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ } @@ -429,11 +429,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui if (pt) { const unsigned mps = edpt_max_packet_size(num); volatile uint16_t *ctr = get_pipectr(num); - if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK; + if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK; pt->TRE = TU_BIT(8); pt->TRN = (total_bytes + mps - 1) / mps; pt->TRENB = 1; - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } } // TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type); @@ -487,7 +487,7 @@ static void process_bus_reset(uint8_t rhport) { LINK_REG->BEMPENB = 1; LINK_REG->BRDYENB = 1; - LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ LINK_REG->D1FIFOSEL = 0; @@ -497,7 +497,7 @@ static void process_bus_reset(uint8_t rhport) for (int i = 1; i <= 5; ++i) { LINK_REG->PIPESEL = i; LINK_REG->PIPECFG = 0; - *ctr = USB_PIPECTR_ACLRM; + *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk; *ctr = 0; ++ctr; *tre = TU_BIT(8); @@ -506,7 +506,7 @@ static void process_bus_reset(uint8_t rhport) for (int i = 6; i <= 9; ++i) { LINK_REG->PIPESEL = i; LINK_REG->PIPECFG = 0; - *ctr = USB_PIPECTR_ACLRM; + *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk; *ctr = 0; ++ctr; } @@ -553,8 +553,9 @@ void dcd_init(uint8_t rhport) /* Setup default control pipe */ LINK_REG->DCPMAXP_b.MXPS = 64; - LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT | - (USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM; + LINK_REG->INTENB0 = LINK_REG_INTSTS0_VBINT_Msk | LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk | + LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_CTRT_Msk | (USE_SOF ? LINK_REG_INTSTS0_SOFR_Msk : 0) | + LINK_REG_INTSTS0_RESM_Msk; LINK_REG->BEMPENB = 1; LINK_REG->BRDYENB = 1; @@ -633,21 +634,21 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) LINK_REG->PIPESEL = num; LINK_REG->PIPEMAXP = mps; volatile uint16_t *ctr = get_pipectr(num); - *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk; *ctr = 0; unsigned cfg = (dir << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= (USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB); + cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk); } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= USB_PIPECFG_INT; + cfg |= LINK_REG_PIPECFG_TYPE_ISO; } else { - cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB); + cfg |= (LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk); } LINK_REG->PIPECFG = cfg; LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); LINK_REG->BRDYENB |= TU_BIT(num); if (dir || (xfer != TUSB_XFER_BULK)) { - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP); dcd_int_enable(rhport); @@ -709,8 +710,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) if (!ctr) return; dcd_int_disable(rhport); const uint32_t pid = *ctr & 0x3; - *ctr = pid | USB_PIPECTR_PID_STALL; - *ctr = USB_PIPECTR_PID_STALL; + *ctr = pid | LINK_REG_PIPE_CTR_PID_STALL; + *ctr = LINK_REG_PIPE_CTR_PID_STALL; dcd_int_enable(rhport); } @@ -719,15 +720,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr); if (!ctr) return; dcd_int_disable(rhport); - *ctr = USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk; if (tu_edpt_dir(ep_addr)) { /* IN */ - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } else { const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)]; LINK_REG->PIPESEL = num; if (LINK_REG->PIPECFG_b.TYPE != 1) { - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } } dcd_int_enable(rhport); @@ -742,39 +743,40 @@ void dcd_int_handler(uint8_t rhport) unsigned is0 = LINK_REG->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->INTSTS0 = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID; - if (is0 & USB_IS0_VBINT) { + LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_CTRT_Msk | LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_SOFR_Msk | + LINK_REG_INTSTS0_RESM_Msk | LINK_REG_INTSTS0_VBINT_Msk) & is0) | LINK_REG_INTSTS0_VALID_Msk; + if (is0 & LINK_REG_INTSTS0_VBINT_Msk) { if (LINK_REG->INTSTS0_b.VBSTS) { dcd_connect(rhport); } else { dcd_disconnect(rhport); } } - if (is0 & USB_IS0_RESM) { + if (is0 & LINK_REG_INTSTS0_RESM_Msk) { dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); #if (0==USE_SOF) LINK_REG->INTENB0_b.SOFE = 0; #endif } - if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_b.SOFE) { + if ((is0 & LINK_REG_INTSTS0_SOFR_Msk) && LINK_REG->INTENB0_b.SOFE) { // USBD will exit suspended mode when SOF event is received dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); #if (0 == USE_SOF) LINK_REG->INTENB0_b.SOFE = 0; #endif } - if (is0 & USB_IS0_DVST) { - switch (is0 & USB_IS0_DVSQ) { - case USB_IS0_DVSQ_DEF: + if (is0 & LINK_REG_INTSTS0_DVST_Msk) { + switch (is0 & LINK_REG_INTSTS0_DVSQ_Msk) { + case LINK_REG_INTSTS0_DVSQ_STATE_DEF: process_bus_reset(rhport); break; - case USB_IS0_DVSQ_ADDR: + case LINK_REG_INTSTS0_DVSQ_STATE_ADDR: process_set_address(rhport); break; - case USB_IS0_DVSQ_SUSP0: - case USB_IS0_DVSQ_SUSP1: - case USB_IS0_DVSQ_SUSP2: - case USB_IS0_DVSQ_SUSP3: + case LINK_REG_INTSTS0_DVSQ_STATE_SUSP0: + case LINK_REG_INTSTS0_DVSQ_STATE_SUSP1: + case LINK_REG_INTSTS0_DVSQ_STATE_SUSP2: + case LINK_REG_INTSTS0_DVSQ_STATE_SUSP3: dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); #if (0==USE_SOF) LINK_REG->INTENB0_b.SOFE = 1; @@ -783,23 +785,23 @@ void dcd_int_handler(uint8_t rhport) break; } } - if (is0 & USB_IS0_CTRT) { - if (is0 & USB_IS0_CTSQ_SETUP) { + if (is0 & LINK_REG_INTSTS0_CTRT_Msk) { + if (is0 & LINK_REG_INTSTS0_CTSQ_CTRL_RDATA) { /* A setup packet has been received. */ process_setup_packet(rhport); - } else if (0 == (is0 & USB_IS0_CTSQ_MSK)) { + } else if (0 == (is0 & LINK_REG_INTSTS0_CTSQ_Msk)) { /* A ZLP has been sent/received. */ process_status_completion(rhport); } } - if (is0 & USB_IS0_BEMP) { + if (is0 & LINK_REG_INTSTS0_BEMP_Msk) { const unsigned s = LINK_REG->BEMPSTS; LINK_REG->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } - if (is0 & USB_IS0_BRDY) { + if (is0 & LINK_REG_INTSTS0_BRDY_Msk) { const unsigned m = LINK_REG->BRDYENB; unsigned s = LINK_REG->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 2ada28105..940013c86 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -207,18 +207,18 @@ static bool pipe0_xfer_in(void) const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } if (len < mps) - LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return true; } - LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; return false; } @@ -238,7 +238,7 @@ static bool pipe0_xfer_out(void) pipe->buf = (uint8_t*)buf + len; } if (len < mps) - LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; pipe->remaining = rem - len; return false; } @@ -248,7 +248,7 @@ static bool pipe_xfer_in(unsigned num) pipe_state_t *pipe = &_hcd.pipe[num]; const unsigned rem = pipe->remaining; - LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8; + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; @@ -259,7 +259,7 @@ static bool pipe_xfer_in(unsigned num) pipe->buf = (uint8_t*)buf + len; } if (len < mps) - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; @@ -280,7 +280,7 @@ static bool pipe_xfer_out(unsigned num) return true; } - LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); @@ -290,7 +290,7 @@ static bool pipe_xfer_out(unsigned num) pipe->buf = (uint8_t*)buf + len; } if (len < mps) - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; @@ -304,12 +304,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, /* configure fifo direction and access unit settings */ if (dir_in) { /* IN, a byte */ - LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8; - while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ; + LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; + while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; } else { /* OUT, 2 bytes */ - LINK_REG->CFIFOSEL = - USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); - while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ; + LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; } pipe_state_t *pipe = &_hcd.pipe[0]; @@ -325,15 +325,15 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, } else { /* ZLP */ pipe->buf = NULL; if (!dir_in) { /* OUT */ - LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; } if (dir_in == LINK_REG->DCPCFG_b.DIR) { - TU_ASSERT(USB_PIPECTR_PID_NAK == LINK_REG->DCPCTR_b.PID); + TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID); LINK_REG->DCPCTR_b.SQSET = 1; LINK_REG->DCPCFG_b.DIR = dir_in ^ 1; } } - LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; return true; } @@ -355,7 +355,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u } else { /* ZLP */ LINK_REG->D0FIFOSEL = num; pipe_wait_for_ready(num); - LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL; + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ } @@ -364,12 +364,12 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u volatile reg_pipetre_t *pt = get_pipetre(num); if (pt) { const unsigned mps = edpt_max_packet_size(num); - if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK; + if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK; pt->TRE = TU_BIT(8); pt->TRN = (buflen + mps - 1) / mps; pt->TRENB = 1; } - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } return true; } @@ -403,10 +403,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num) unsigned result; uint16_t volatile *ctr = get_pipectr(num); // TU_LOG1("NRDY %d %x\n", num, *ctr); - switch (*ctr & USB_PIPECTR_PID_MSK) { + switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) { default: return; - case USB_PIPECTR_PID_STALL: result = XFER_RESULT_STALLED; break; - case USB_PIPECTR_PID_NAK: result = XFER_RESULT_FAILED; break; + case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break; + case LINK_REG_PIPE_CTR_PID_NAK: result = XFER_RESULT_FAILED; break; } pipe_state_t *pipe = &_hcd.pipe[num]; hcd_event_xfer_complete(pipe->dev, pipe->ep, @@ -464,10 +464,10 @@ bool hcd_init(uint8_t rhport) LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ /* Setup default control pipe */ - LINK_REG->DCPCFG = USB_PIPECFG_SHTNAK; + LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk; LINK_REG->DCPMAXP = 64; - LINK_REG->INTENB0 = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP; - LINK_REG->INTENB1 = USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH; + LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk; + LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk; LINK_REG->BEMPENB = 1; LINK_REG->NRDYENB = 1; LINK_REG->BRDYENB = 1; @@ -505,7 +505,7 @@ bool hcd_port_connect_status(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { - LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; while (LINK_REG->DCPCTR_b.PBUSY) ; hcd_int_disable(rhport); LINK_REG->DVSTCTR0_b.UACT = 0; @@ -530,8 +530,8 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport) (void)rhport; switch (LINK_REG->DVSTCTR0_b.RHST) { default: return TUSB_SPEED_INVALID; - case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL; - case USB_DVSTCTR0_LOW: return TUSB_SPEED_LOW; + case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL; + case LINK_REG_DVSTCTR0_RHST_LS: return TUSB_SPEED_LOW; } } @@ -572,7 +572,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ); - LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; _hcd.pipe[0].buf = NULL; _hcd.pipe[0].length = 8; @@ -605,14 +605,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const const unsigned epn = tu_edpt_number(ep_addr); const unsigned mps = tu_edpt_packet_size(ep_desc); if (0 == epn) { - LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; hcd_devtree_info_t devtree; hcd_devtree_get_info(dev_addr, &devtree); uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0]; devadd += dev_addr; while (LINK_REG->DCPCTR_b.PBUSY) ; LINK_REG->DCPMAXP = (dev_addr << 12) | mps; - *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW; + *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS; _hcd.ctl_mps[dev_addr] = mps; return true; } @@ -634,22 +634,22 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const LINK_REG->PIPESEL = num; LINK_REG->PIPEMAXP = (dev_addr << 12) | mps; volatile uint16_t *ctr = get_pipectr(num); - *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk; *ctr = 0; unsigned cfg = ((1 ^ dir_in) << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB; + cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk; } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= USB_PIPECFG_INT; + cfg |= LINK_REG_PIPECFG_TYPE_ISO; } else { - cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB; + cfg |= LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk; } LINK_REG->PIPECFG = cfg; LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); LINK_REG->NRDYENB |= TU_BIT(num); LINK_REG->BRDYENB |= TU_BIT(num); if (!dir_in) { - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } hcd_int_enable(rhport); @@ -676,12 +676,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) *ctr = pid & 2; *ctr = 0; } - *ctr = USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk; unsigned const epn = tu_edpt_number(ep_addr); if (!epn) return true; if (!tu_edpt_dir(ep_addr)) { /* OUT */ - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } return true; } @@ -702,44 +702,44 @@ void hcd_int_handler(uint8_t rhport) unsigned is1 = LINK_REG->INTSTS1; unsigned is0 = LINK_REG->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->INTSTS1 = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1); - LINK_REG->INTSTS0 = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0); + LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1); + LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0); // TU_LOG1("IS %04x %04x\n", is0, is1); is1 &= LINK_REG->INTENB1; is0 &= LINK_REG->INTENB0; - if (is1 & USB_IS1_SACK) { + if (is1 & LINK_REG_INTSTS1_SACK_Msk) { /* Set DATA1 in advance for the next transfer. */ LINK_REG->DCPCTR_b.SQSET = 1; hcd_event_xfer_complete( LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); } - if (is1 & USB_IS1_SIGN) { + if (is1 & LINK_REG_INTSTS1_SIGN_Msk) { hcd_event_xfer_complete( LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); } - if (is1 & USB_IS1_ATTCH) { + if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) { LINK_REG->DVSTCTR0_b.UACT = 1; _hcd.need_reset = true; - LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_ATTCH) | USB_IS1_DTCH; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk; hcd_event_device_attach(rhport, true); } - if (is1 & USB_IS1_DTCH) { + if (is1 & LINK_REG_INTSTS1_DTCH_Msk) { LINK_REG->DVSTCTR0_b.UACT = 0; if (LINK_REG->DCPCTR_b.SUREQ) LINK_REG->DCPCTR_b.SUREQCLR = 1; - LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_DTCH) | USB_IS1_ATTCH; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk; hcd_event_device_remove(rhport, true); } - if (is0 & USB_IS0_BEMP) { + if (is0 & LINK_REG_INTSTS0_BEMP_Msk) { const unsigned s = LINK_REG->BEMPSTS; LINK_REG->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } - if (is0 & USB_IS0_NRDY) { + if (is0 & LINK_REG_INTSTS0_NRDY_Msk) { const unsigned m = LINK_REG->NRDYENB; unsigned s = LINK_REG->NRDYSTS & m; LINK_REG->NRDYSTS = ~s; @@ -753,7 +753,7 @@ void hcd_int_handler(uint8_t rhport) s &= ~TU_BIT(num); } } - if (is0 & USB_IS0_BRDY) { + if (is0 & LINK_REG_INTSTS0_BRDY_Msk) { const unsigned m = LINK_REG->BRDYENB; unsigned s = LINK_REG->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h index 33cf7879e..f1d0130cc 100644 --- a/src/portable/renesas/link/link_type.h +++ b/src/portable/renesas/link/link_type.h @@ -33,72 +33,6 @@ extern "C" { #endif -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -#define USB_DVSTCTR0_LOW (1u) -#define USB_DVSTCTR0_FULL (2u) - -#define USB_FIFOSEL_TX ((uint16_t) (1u << 5)) -#define USB_FIFOSEL_BIGEND ((uint16_t) (1u << 8)) -#define USB_FIFOSEL_MBW_8 ((uint16_t) (0u << 10)) -#define USB_FIFOSEL_MBW_16 ((uint16_t) (1u << 10)) -#define USB_IS0_CTSQ ((uint16_t) (7u)) -#define USB_IS0_DVSQ ((uint16_t) (7u << 4)) -#define USB_IS0_VALID ((uint16_t) (1u << 3)) -#define USB_IS0_BRDY ((uint16_t) (1u << 8)) -#define USB_IS0_NRDY ((uint16_t) (1u << 9)) -#define USB_IS0_BEMP ((uint16_t) (1u << 10)) -#define USB_IS0_CTRT ((uint16_t) (1u << 11)) -#define USB_IS0_DVST ((uint16_t) (1u << 12)) -#define USB_IS0_SOFR ((uint16_t) (1u << 13)) -#define USB_IS0_RESM ((uint16_t) (1u << 14)) -#define USB_IS0_VBINT ((uint16_t) (1u << 15)) -#define USB_IS1_SACK ((uint16_t) (1u << 4)) -#define USB_IS1_SIGN ((uint16_t) (1u << 5)) -#define USB_IS1_EOFERR ((uint16_t) (1u << 6)) -#define USB_IS1_ATTCH ((uint16_t) (1u << 11)) -#define USB_IS1_DTCH ((uint16_t) (1u << 12)) -#define USB_IS1_BCHG ((uint16_t) (1u << 14)) -#define USB_IS1_OVRCR ((uint16_t) (1u << 15)) - -#define USB_IS0_CTSQ_MSK (7u) -#define USB_IS0_CTSQ_SETUP (1u) -#define USB_IS0_DVSQ_DEF (1u << 4) -#define USB_IS0_DVSQ_ADDR (2u << 4) -#define USB_IS0_DVSQ_SUSP0 (4u << 4) -#define USB_IS0_DVSQ_SUSP1 (5u << 4) -#define USB_IS0_DVSQ_SUSP2 (6u << 4) -#define USB_IS0_DVSQ_SUSP3 (7u << 4) - -#define USB_PIPECTR_PID_MSK (3u) -#define USB_PIPECTR_PID_NAK (0u) -#define USB_PIPECTR_PID_BUF (1u) -#define USB_PIPECTR_PID_STALL (2u) -#define USB_PIPECTR_CCPL (1u << 2) -#define USB_PIPECTR_SQMON (1u << 6) -#define USB_PIPECTR_SQCLR (1u << 8) -#define USB_PIPECTR_ACLRM (1u << 9) -#define USB_PIPECTR_INBUFM (1u << 14) -#define USB_PIPECTR_BSTS (1u << 15) - -#define USB_FIFOCTR_DTLN (0x1FF) -#define USB_FIFOCTR_FRDY (1u << 13) -#define USB_FIFOCTR_BCLR (1u << 14) -#define USB_FIFOCTR_BVAL (1u << 15) - -#define USB_PIPECFG_SHTNAK (1u << 7) -#define USB_PIPECFG_DBLB (1u << 9) -#define USB_PIPECFG_BULK (1u << 14) -#define USB_PIPECFG_ISO (3u << 14) -#define USB_PIPECFG_INT (2u << 14) - -#define FIFO_REQ_CLR (1u) -#define FIFO_COMPLETE (1u << 1) - -#define USB_DEVADD_LOW (1u << 6) -#define USB_DEVADD_FULL (2u << 6) - /*--------------------------------------------------------------------*/ /* Register Definitions */ /*--------------------------------------------------------------------*/ @@ -1651,6 +1585,38 @@ TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX tool #define LINK_REG_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ #define LINK_REG_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ +/*--------------------------------------------------------------------*/ +/* Register Bit Utils */ +/*--------------------------------------------------------------------*/ +#define LINK_REG_PIPE_CTR_PID_NAK (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */ +#define LINK_REG_PIPE_CTR_PID_BUF (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */ +#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */ + +#define LINK_REG_DVSTCTR0_RHST_LS (1U << LINK_REG_DVSTCTR0_RHST_Pos) /* Low-speed connection */ +#define LINK_REG_DVSTCTR0_RHST_FS (2U << LINK_REG_DVSTCTR0_RHST_Pos) /* Full-speed connection */ + +#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */ +#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */ + +#define LINK_REG_CFIFOSEL_ISEL_WRITE (1U << LINK_REG_CFIFOSEL_ISEL_Pos) /* FIFO write AKA TX*/ + +#define LINK_REG_FIFOSEL_BIGEND (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */ +#define LINK_REG_FIFOSEL_MBW_8BIT (0U << LINK_REG_CFIFOSEL_MBW_Pos) /* 8-bit width */ +#define LINK_REG_FIFOSEL_MBW_16BIT (1U << LINK_REG_CFIFOSEL_MBW_Pos) /* 16-bit width */ + +#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos) + +#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ + +#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos) +#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos) +#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos) + #ifdef __cplusplus } #endif From e0220c6594f08d5b402994f92c12fc92482e9115 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Mon, 21 Mar 2022 15:59:08 +0000 Subject: [PATCH 011/142] fix int handling for host in ek_ra4m3 port --- hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c | 38 +++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c index d79d7b425..c2f2a0903 100644 --- a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c +++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c @@ -91,28 +91,52 @@ void usbfs_interrupt_handler(void) IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_int_handler(0); +#endif + +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE tud_int_handler(0); +#endif } void usbfs_resume_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_int_handler(0); +#endif + +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE tud_int_handler(0); +#endif } void usbfs_d0fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_int_handler(0); +#endif + +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE tud_int_handler(0); +#endif } void usbfs_d1fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_int_handler(0); +#endif + +#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE tud_int_handler(0); +#endif } void board_init(void) @@ -125,17 +149,17 @@ void board_init(void) R_MSTP->MSTPCRB &= ~(1U << 11U); R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif #if CFG_TUSB_OS == OPT_OS_NONE /* Init systick */ - SysTick_Config(SystemCoreClock / 1000); + SysTick_Config(SystemCoreClock / 1000); #endif } From 60aae59eeb1f656bddf87f026fdba48735e03280 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Mon, 21 Mar 2022 16:02:11 +0000 Subject: [PATCH 012/142] style code for consistency with existing codebase --- hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c | 152 +- .../ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h | 112 +- src/portable/renesas/link/dcd_link.c | 8 +- src/portable/renesas/link/hcd_link.c | 10 +- src/portable/renesas/link/link_ra.h | 8 +- src/portable/renesas/link/link_rx.h | 16 +- src/portable/renesas/link/link_type.h | 1838 ++++++++--------- 7 files changed, 1074 insertions(+), 1070 deletions(-) diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c index c2f2a0903..eab102de9 100644 --- a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c +++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c @@ -50,35 +50,35 @@ void usbfs_d0fifo_handler(void); void usbfs_d1fifo_handler(void); BSP_DONT_REMOVE const - fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { - [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ - [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ - [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ + fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { + [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ + [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ + [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ }; const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { - [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ - [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ - [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ + [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ + [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ + [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ }; const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { - {.pin = BSP_IO_PORT_04_PIN_07, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_00, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_01, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, - {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}}; + {.pin = BSP_IO_PORT_04_PIN_07, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_00, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_01, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, + {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}}; const ioport_cfg_t g_bsp_pin_cfg = { - .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), - .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], + .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], }; ioport_instance_ctrl_t g_ioport_ctrl; const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; @@ -88,78 +88,78 @@ const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_i //--------------------------------------------------------------------+ void usbfs_interrupt_handler(void) { - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + tuh_int_handler(0); #endif #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + tud_int_handler(0); #endif } void usbfs_resume_handler(void) { - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + tuh_int_handler(0); #endif #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + tud_int_handler(0); #endif } void usbfs_d0fifo_handler(void) { - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + tuh_int_handler(0); #endif #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + tud_int_handler(0); #endif } void usbfs_d1fifo_handler(void) { - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + tuh_int_handler(0); #endif #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + tud_int_handler(0); #endif } void board_init(void) { - /* Configure pins. */ - R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); + /* Configure pins. */ + R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); - /* Enable USB_BASE */ - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; - R_MSTP->MSTPCRB &= ~(1U << 11U); - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; + /* Enable USB_BASE */ + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; + R_MSTP->MSTPCRB &= ~(1U << 11U); + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; #if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif #if CFG_TUSB_OS == OPT_OS_NONE - /* Init systick */ - SysTick_Config(SystemCoreClock / 1000); + /* Init systick */ + SysTick_Config(SystemCoreClock / 1000); #endif } @@ -169,66 +169,66 @@ void board_init(void) void board_led_write(bool state) { - R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state); - R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state); - R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state); + R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state); + R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state); + R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state); } uint32_t board_button_read(void) { - bsp_io_level_t lvl; - R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); - return lvl; + bsp_io_level_t lvl; + R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); + return lvl; } int board_uart_read(uint8_t *buf, int len) { - (void) buf; - (void) len; - return 0; + (void) buf; + (void) len; + return 0; } int board_uart_write(void const *buf, int len) { - (void) buf; - (void) len; - return 0; + (void) buf; + (void) len; + return 0; } #if CFG_TUSB_OS == OPT_OS_NONE volatile uint32_t system_ticks = 0; void SysTick_Handler(void) { - system_ticks++; + system_ticks++; } uint32_t board_millis(void) { - return system_ticks; + return system_ticks; } #else #endif int close(int fd) { - (void) fd; - return -1; + (void) fd; + return -1; } int fstat(int fd, void *pstat) { - (void) fd; - (void) pstat; - return 0; + (void) fd; + (void) pstat; + return 0; } off_t lseek(int fd, off_t pos, int whence) { - (void) fd; - (void) pos; - (void) whence; - return 0; + (void) fd; + (void) pos; + (void) whence; + return 0; } int isatty(int fd) { - (void) fd; - return 1; + (void) fd; + return 1; } diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h index 0449bb4bc..4ecda1c66 100644 --- a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h +++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h @@ -69,40 +69,40 @@ /* Peripheral Security Attribution Register (PSAR) Settings */ #define BSP_TZ_CFG_PSARB \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \ - (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \ + (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */ #define BSP_TZ_CFG_PSARC \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */ #define BSP_TZ_CFG_PSARD \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \ - 0xffae07f0) /* Unused */ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \ + 0xffae07f0) /* Unused */ #define BSP_TZ_CFG_PSARE \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \ - (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ | \ - (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \ + (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ | \ + (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */ #define BSP_TZ_CFG_MSSAR \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \ - 0xfffffffc) /* Unused */ + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \ + 0xfffffffc) /* Unused */ /* Type 2 Peripheral Security Attribution */ @@ -114,9 +114,9 @@ /* Security attribution for registers of LVD channels. */ #define BSP_TZ_CFG_LVDSAR \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \ - 0xFFFFFFFCU) + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \ + 0xFFFFFFFCU) /* Security attribution for LPM registers. */ #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU) @@ -137,34 +137,34 @@ /* Security attribution for registers for IRQ channels. */ #define BSP_TZ_CFG_ICUSARA \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \ - (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U) + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \ + (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U) /* Security attribution for NMI registers. */ #define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */ /* Security attribution for registers for DMAC channels */ #define BSP_TZ_CFG_ICUSARC \ - ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \ - (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U) + ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U) /* Security attribution registers for SELSR0. */ #define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU) @@ -222,7 +222,7 @@ /* Option Function Select Register 1 Security Attribution */ #if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE) #define BSP_CFG_ROM_REG_OFS1_SEL \ - (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U)) + (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U)) #else #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U) #endif diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index f2334140a..bb7e3b60a 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Koji Kitayama @@ -31,8 +31,10 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_RAXXX) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ + CFG_TUSB_MCU == OPT_MCU_RX65X || \ + CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "device/dcd.h" #include "link_type.h" diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 940013c86..f60c49114 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji Kitayama @@ -27,8 +27,10 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_RAXXX) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ + CFG_TUSB_MCU == OPT_MCU_RX65X || \ + CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "host/hcd.h" #include "link_type.h" @@ -488,7 +490,7 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); return LINK_REG->FRMNUM_b.FRNM; diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/link/link_ra.h index b42def368..97618ef8f 100644 --- a/src/portable/renesas/link/link_ra.h +++ b/src/portable/renesas/link/link_ra.h @@ -41,15 +41,15 @@ extern "C" { TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport) { - (void) rhport; - NVIC_EnableIRQ(TU_IRQn); + (void) rhport; + NVIC_EnableIRQ(TU_IRQn); } TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport) { - (void) rhport; - NVIC_DisableIRQ(TU_IRQn); + (void) rhport; + NVIC_DisableIRQ(TU_IRQn); } // MCU specific PHY init diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h index b15084bb3..62f2911c2 100644 --- a/src/portable/renesas/link/link_rx.h +++ b/src/portable/renesas/link/link_rx.h @@ -41,21 +41,21 @@ extern "C" { static inline void link_int_enable(uint8_t rhport) { - (void) rhport; + (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) - IEN(PERIB, INTB185) = 1; + IEN(PERIB, INTB185) = 1; #else - IEN(USB0, USBI0) = 1; + IEN(USB0, USBI0) = 1; #endif } static inline void link_int_disable(uint8_t rhport) { - (void) rhport; + (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) - IEN(PERIB, INTB185) = 0; + IEN(PERIB, INTB185) = 0; #else - IEN(USB0, USBI0) = 0; + IEN(USB0, USBI0) = 0; #endif } @@ -63,9 +63,9 @@ static inline void link_int_disable(uint8_t rhport) static inline void link_phy_init(void) { #if (CFG_TUSB_MCU == OPT_MCU_RX72N) - IR(PERIB, INTB185) = 0; + IR(PERIB, INTB185) = 0; #else - IR(USB0, USBI0) = 0; + IR(USB0, USBI0) = 0; #endif } diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h index f1d0130cc..eaf0b1ec4 100644 --- a/src/portable/renesas/link/link_type.h +++ b/src/portable/renesas/link/link_type.h @@ -42,933 +42,933 @@ TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { - union { - volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */ + union { + volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */ - struct { - uint16_t : 8; - volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */ - volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */ - uint16_t : 6; - } E_b; - }; + struct { + uint16_t : 8; + volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */ + volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */ + uint16_t : 6; + } E_b; + }; - union { - volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */ + union { + volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */ - struct { - volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */ - } N_b; - }; + struct { + volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */ + } N_b; + }; } LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */ TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size"); /* LINK_REG Structure */ typedef struct TU_ATTR_PACKED { - union { - volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */ - - struct { - volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ - uint16_t : 2; - volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */ - volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */ - volatile uint16_t DRPD : 1; /* [5..5] D+/D- Line Resistor Control */ - volatile uint16_t DCFM : 1; /* [6..6] Controller Function Select */ - uint16_t : 1; - volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */ - uint16_t : 1; - volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */ - uint16_t : 5; - } SYSCFG_b; - }; - - union { - volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */ - - struct { - volatile uint16_t - BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ - uint16_t : 12; - } BUSWAIT_b; - }; - - union { - volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */ - - struct { - volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ - volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ - uint16_t : 2; - volatile const uint16_t - SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */ - volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */ - uint16_t : 7; - volatile const uint16_t - OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */ - } SYSSTS0_b; - }; - - union { - volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */ - - struct { - volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */ - uint16_t : 15; - } PLLSTA_b; - }; - - union { - volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */ - - struct { - volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */ - uint16_t : 1; - volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ - volatile uint16_t RESUME : 1; /* [5..5] Resume Output */ - volatile uint16_t USBRST : 1; /* [6..6] USB Bus Reset Output */ - volatile uint16_t RWUPE : 1; /* [7..7] Wakeup Detection Enable */ - volatile uint16_t WKUP : 1; /* [8..8] Wakeup Output */ - volatile uint16_t VBUSEN : 1; /* [9..9] USB_VBUSEN Output Pin Control */ - volatile uint16_t EXICEN : 1; /* [10..10] USB_EXICEN Output Pin Control */ - volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */ - uint16_t : 4; - } DVSTCTR0_b; - }; - volatile const uint16_t RESERVED; - - union { - volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */ - - struct { - volatile uint16_t UTST : 4; /* [3..0] Test Mode */ - uint16_t : 12; - } TESTMODE_b; - }; - volatile const uint16_t RESERVED1; - volatile const uint32_t RESERVED2; - - union { - volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */ - - struct { - union { - volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */ - volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */ - }; - - union { - volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */ - - struct { - volatile const uint8_t RESERVED3; - volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */ - }; - }; - }; - }; - - union { - volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */ - - struct { - union { - volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */ - volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */ - }; - - union { - volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */ - - struct { - volatile const uint8_t RESERVED4; - volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */ - }; - }; - }; - }; - - union { - volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */ - - struct { - union { - volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */ - volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */ - }; - - union { - volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */ - - struct { - volatile const uint8_t RESERVED5; - volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */ - }; - }; - }; - }; - - union { - volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */ - - struct { - volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */ - uint16_t : 1; - volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ - uint16_t : 2; - volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */ - uint16_t : 2; - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ - } CFIFOSEL_b; - }; - - union { - volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */ - - struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ - } CFIFOCTR_b; - }; - volatile const uint32_t RESERVED6; - - union { - volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */ - - struct { - volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ - uint16_t : 4; - volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ - volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ - volatile uint16_t - DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ - } D0FIFOSEL_b; - }; - - union { - volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */ - - struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ - } D0FIFOCTR_b; - }; - - union { - volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */ - - struct { - volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ - uint16_t : 4; - volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ - volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ - volatile uint16_t - DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ - } D1FIFOSEL_b; - }; - - union { - volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */ - - struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ - } D1FIFOCTR_b; - }; - - union { - volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */ - - struct { - uint16_t : 8; - volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */ - volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */ - volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */ - volatile uint16_t CTRE : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */ - volatile uint16_t DVSE : 1; /* [12..12] Device State Transition Interrupt Enable */ - volatile uint16_t SOFE : 1; /* [13..13] Frame Number Update Interrupt Enable */ - volatile uint16_t RSME : 1; /* [14..14] Resume Interrupt Enable */ - volatile uint16_t VBSE : 1; /* [15..15] VBUS Interrupt Enable */ - } INTENB0_b; - }; - - union { - volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */ - - struct { - volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */ - uint16_t : 3; - volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ - volatile uint16_t SIGNE : 1; /* [5..5] Setup Transaction Error Interrupt Enable */ - volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */ - uint16_t : 4; - volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */ - volatile uint16_t DTCHE : 1; /* [12..12] Disconnection Detection Interrupt Enable */ - uint16_t : 1; - volatile uint16_t BCHGE : 1; /* [14..14] USB Bus Change Interrupt Enable */ - volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */ - } INTENB1_b; - }; - volatile const uint16_t RESERVED7; - - union { - volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */ - - struct { - volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */ - uint16_t : 6; - } BRDYENB_b; - }; - - union { - volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */ - - struct { - volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */ - volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */ - uint16_t : 6; - } NRDYENB_b; - }; - - union { - volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */ - - struct { - volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */ - volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */ - uint16_t : 6; - } BEMPENB_b; - }; - - union { - volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */ - - struct { - uint16_t : 4; - volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */ - volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ - volatile uint16_t BRDYM : 1; /* [6..6] BRDY Interrupt Status Clear Timing */ - uint16_t : 1; - volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */ - uint16_t : 7; - } SOFCFG_b; - }; - - union { - volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */ - - struct { - volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ - volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */ - uint16_t : 1; - volatile uint16_t CDPEN : 1; /* [3..3] Charging Downstream Port Enable */ - volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */ - uint16_t : 2; - volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */ - uint16_t : 1; - volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */ - uint16_t : 3; - volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */ - } PHYSET_b; - }; - - union { - volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */ - - struct { - volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ - volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ - volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ - volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */ - volatile const uint16_t BRDY : 1; /* [8..8] Buffer Ready Interrupt Status */ - volatile const uint16_t NRDY : 1; /* [9..9] Buffer Not Ready Interrupt Status */ - volatile const uint16_t BEMP : 1; /* [10..10] Buffer Empty Interrupt Status */ - volatile uint16_t CTRT : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */ - volatile uint16_t DVST : 1; /* [12..12] Device State Transition Interrupt Status */ - volatile uint16_t SOFR : 1; /* [13..13] Frame Number Refresh Interrupt Status */ - volatile uint16_t RESM : 1; /* [14..14] Resume Interrupt Status */ - volatile uint16_t VBINT : 1; /* [15..15] VBUS Interrupt Status */ - } INTSTS0_b; - }; - - union { - volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */ - - struct { - volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */ - uint16_t : 3; - volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ - volatile uint16_t SIGN : 1; /* [5..5] Setup Transaction Error Interrupt Status */ - volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */ - uint16_t : 1; - volatile uint16_t LPMEND : 1; /* [8..8] LPM Transaction End Interrupt Status */ - volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */ - uint16_t : 1; - volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ - volatile uint16_t DTCH : 1; /* [12..12] USB Disconnection Detection Interrupt Status */ - uint16_t : 1; - volatile uint16_t BCHG : 1; /* [14..14] USB Bus Change Interrupt Status */ - volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */ - } INTSTS1_b; - }; - volatile const uint16_t RESERVED8; - - union { - volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */ - - struct { - volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */ - uint16_t : 6; - } BRDYSTS_b; - }; - - union { - volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */ - - struct { - volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */ - volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */ - uint16_t : 6; - } NRDYSTS_b; - }; - - union { - volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */ - - struct { - volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */ - volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */ - uint16_t : 6; - } BEMPSTS_b; - }; - - union { - volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */ - - struct { - volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */ - uint16_t : 3; - volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ - volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */ - } FRMNUM_b; - }; - - union { - volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */ - - struct { - volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */ - uint16_t : 12; - volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ - } UFRMNUM_b; - }; - - union { - volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */ - - struct { - volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */ - uint16_t : 1; - volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ - uint16_t : 5; - } USBADDR_b; - }; - volatile const uint16_t RESERVED9; - - union { - volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */ - - struct { - volatile uint16_t - BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ - volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ - } USBREQ_b; - }; - - union { - volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */ - - struct { - volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */ - } USBVAL_b; - }; - - union { - volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */ - - struct { - volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */ - } USBINDX_b; - }; - - union { - volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */ - - struct { - volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */ - } USBLENG_b; - }; - - union { - volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */ - - struct { - uint16_t : 4; - volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ - uint16_t : 2; - volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ - volatile uint16_t CNTMD : 1; /* [8..8] Continuous Transfer Mode */ - uint16_t : 7; - } DCPCFG_b; - }; - - union { - volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */ - - struct { - volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ - uint16_t : 5; - volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ - } DCPMAXP_b; - }; - - union { - volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */ - - struct { - volatile uint16_t PID : 2; /* [1..0] Response PID */ - volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ - uint16_t : 2; - volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ - volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */ - volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ - volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ - uint16_t : 2; - volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */ - uint16_t : 2; - volatile uint16_t SUREQ : 1; /* [14..14] Setup Token Transmission */ - volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ - } DCPCTR_b; - }; - volatile const uint16_t RESERVED10; - - union { - volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */ - - struct { - volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */ - uint16_t : 12; - } PIPESEL_b; - }; - volatile const uint16_t RESERVED11; - - union { - volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ - - struct { - volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ - volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ - uint16_t : 2; - volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ - uint16_t : 1; - volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */ - volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */ - uint16_t : 3; - volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */ - } PIPECFG_b; - }; - volatile const uint16_t RESERVED12; - - union { - volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */ - - struct { - volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ - uint16_t : 3; - volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ - } PIPEMAXP_b; - }; - - union { - volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */ - - struct { - volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */ - uint16_t : 9; - volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */ - uint16_t : 3; - } PIPEPERI_b; - }; - - union { - volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ - - struct { - volatile uint16_t PID : 2; /* [1..0] Response PID */ - uint16_t : 3; - volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ - volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */ - volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ - volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ - volatile uint16_t ACLRM : 1; /* [9..9] Auto Buffer Clear Mode */ - volatile uint16_t ATREPM : 1; /* [10..10] Auto Response Mode */ - uint16_t : 1; - volatile const uint16_t CSSTS : 1; /* [12..12] CSSTS Status */ - volatile uint16_t CSCLR : 1; /* [13..13] CSPLIT Status Clear */ - volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */ - volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ - } PIPE_CTR_b[9]; - }; - volatile const uint16_t RESERVED13; - volatile const uint32_t RESERVED14[3]; - volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */ - volatile const uint32_t RESERVED15[3]; - - union { - volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ - - struct { - volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ - volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ - volatile uint16_t - IDMSINKE0 : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */ - volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */ - volatile uint16_t - IDPSINKE0 : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */ - volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */ - uint16_t : 1; - volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */ - volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */ - volatile const uint16_t PDDETSTS0 : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */ - uint16_t : 6; - } USBBCCTRL0_b; - }; - volatile const uint16_t RESERVED16; - volatile const uint32_t RESERVED17[4]; - - union { - volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */ - - struct { - volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */ - uint16_t : 15; - } UCKSEL_b; - }; - volatile const uint16_t RESERVED18; - volatile const uint32_t RESERVED19; - - union { - volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */ - - struct { - volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */ - uint16_t : 6; - volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ - uint16_t : 8; - } USBMC_b; - }; - volatile const uint16_t RESERVED20; - - union { - volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */ - - struct { - uint16_t : 6; - volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ - volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */ - volatile uint16_t UPPHUB : 4; /* [14..11] Communication Target Connecting Hub Register */ - uint16_t : 1; - } DEVADD_b[10]; - }; - volatile const uint32_t RESERVED21[3]; - - union { - volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */ - - struct { - volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */ - volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */ - volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */ - volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */ - uint32_t : 28; - } PHYSLEW_b; - }; - volatile const uint32_t RESERVED22[3]; - - union { - volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */ - - struct { - uint16_t : 7; - volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */ - uint16_t : 8; - } LPCTRL_b; - }; - - union { - volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */ - - struct { - uint16_t : 14; - volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */ - uint16_t : 1; - } LPSTS_b; - }; - volatile const uint32_t RESERVED23[15]; - - union { - volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */ - - struct { - volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ - volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ - volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ - volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */ - volatile uint16_t VDMSRCE : 1; /* [4..4] VDMSRC Control */ - volatile uint16_t DCPMODE : 1; /* [5..5] DCP Mode Control */ - uint16_t : 2; - volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */ - volatile const uint16_t PDDETSTS : 1; /* [9..9] PDDET Status */ - uint16_t : 6; - } BCCTRL_b; - }; - volatile const uint16_t RESERVED24; - - union { - volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */ - - struct { - volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ - volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ - volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ - volatile const uint16_t - DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */ - volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */ - uint16_t : 2; - volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */ - uint16_t : 1; - } PL1CTRL1_b; - }; - - union { - volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */ - - struct { - uint16_t : 8; - volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */ - volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ - uint16_t : 3; - } PL1CTRL2_b; - }; - - union { - volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */ - - struct { - volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ - volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */ - uint16_t : 13; - } HL1CTRL1_b; - }; - - union { - volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */ - - struct { - volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */ - uint16_t : 4; - volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ - volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */ - uint16_t : 2; - volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */ - } HL1CTRL2_b; - }; - volatile const uint32_t RESERVED25[5]; - - union { - volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */ - - struct { - uint32_t : 20; - volatile const uint32_t - DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ - volatile const uint32_t - DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ - uint32_t : 1; - volatile const uint32_t - DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */ - uint32_t : 8; - } DPUSR0R_b; - }; - - union { - volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */ - - struct { - uint32_t : 4; - volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ - volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ - uint32_t : 1; - volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */ - uint32_t : 12; - volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */ - volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */ - uint32_t : 1; - volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */ - uint32_t : 8; - } DPUSR1R_b; - }; - - union { - volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */ - - struct { - volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */ - volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */ - uint16_t : 2; - volatile const uint16_t - DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */ - volatile const uint16_t - DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */ - uint16_t : 2; - volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */ - volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */ - uint16_t : 6; - } DPUSR2R_b; - }; - - union { - volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */ - - struct { - volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ - volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */ - uint16_t : 14; - } DPUSRCR_b; - }; - volatile const uint32_t RESERVED26[165]; - - union { - volatile uint32_t - DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */ - - struct { - volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ - volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ - uint32_t : 1; - volatile uint32_t DRPD0 : 1; /* [3..3] D+/D- Pull-Down Resistor Control */ - volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */ - uint32_t : 11; - volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */ - volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */ - uint32_t : 2; - volatile const uint32_t - DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */ - volatile const uint32_t - DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */ - uint32_t : 1; - volatile const uint32_t - DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */ - uint32_t : 8; - } DPUSR0R_FS_b; - }; - - union { - volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */ - - struct { - volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ - volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ - uint32_t : 2; - volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */ - volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */ - uint32_t : 1; - volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */ - uint32_t : 8; - volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */ - volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */ - uint32_t : 2; - volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */ - volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */ - uint32_t : 1; - volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */ - uint32_t : 8; - } DPUSR1R_FS_b; - }; + union { + volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */ + + struct { + volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ + uint16_t : 2; + volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */ + volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */ + volatile uint16_t DRPD : 1; /* [5..5] D+/D- Line Resistor Control */ + volatile uint16_t DCFM : 1; /* [6..6] Controller Function Select */ + uint16_t : 1; + volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */ + uint16_t : 1; + volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */ + uint16_t : 5; + } SYSCFG_b; + }; + + union { + volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */ + + struct { + volatile uint16_t + BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ + uint16_t : 12; + } BUSWAIT_b; + }; + + union { + volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */ + + struct { + volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ + volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ + uint16_t : 2; + volatile const uint16_t + SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */ + volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */ + uint16_t : 7; + volatile const uint16_t + OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */ + } SYSSTS0_b; + }; + + union { + volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */ + + struct { + volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */ + uint16_t : 15; + } PLLSTA_b; + }; + + union { + volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */ + + struct { + volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */ + uint16_t : 1; + volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ + volatile uint16_t RESUME : 1; /* [5..5] Resume Output */ + volatile uint16_t USBRST : 1; /* [6..6] USB Bus Reset Output */ + volatile uint16_t RWUPE : 1; /* [7..7] Wakeup Detection Enable */ + volatile uint16_t WKUP : 1; /* [8..8] Wakeup Output */ + volatile uint16_t VBUSEN : 1; /* [9..9] USB_VBUSEN Output Pin Control */ + volatile uint16_t EXICEN : 1; /* [10..10] USB_EXICEN Output Pin Control */ + volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */ + uint16_t : 4; + } DVSTCTR0_b; + }; + volatile const uint16_t RESERVED; + + union { + volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */ + + struct { + volatile uint16_t UTST : 4; /* [3..0] Test Mode */ + uint16_t : 12; + } TESTMODE_b; + }; + volatile const uint16_t RESERVED1; + volatile const uint32_t RESERVED2; + + union { + volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */ + + struct { + union { + volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */ + volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */ + }; + + union { + volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED3; + volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */ + + struct { + union { + volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */ + volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */ + }; + + union { + volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED4; + volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */ + + struct { + union { + volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */ + volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */ + }; + + union { + volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */ + + struct { + volatile const uint8_t RESERVED5; + volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */ + }; + }; + }; + }; + + union { + volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */ + uint16_t : 1; + volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ + uint16_t : 2; + volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */ + uint16_t : 2; + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } CFIFOSEL_b; + }; + + union { + volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } CFIFOCTR_b; + }; + volatile const uint32_t RESERVED6; + + union { + volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t + DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } D0FIFOSEL_b; + }; + + union { + volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } D0FIFOCTR_b; + }; + + union { + volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */ + + struct { + volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t + DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + } D1FIFOSEL_b; + }; + + union { + volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */ + + struct { + volatile const uint16_t + DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + } D1FIFOCTR_b; + }; + + union { + volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */ + + struct { + uint16_t : 8; + volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */ + volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */ + volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */ + volatile uint16_t CTRE : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */ + volatile uint16_t DVSE : 1; /* [12..12] Device State Transition Interrupt Enable */ + volatile uint16_t SOFE : 1; /* [13..13] Frame Number Update Interrupt Enable */ + volatile uint16_t RSME : 1; /* [14..14] Resume Interrupt Enable */ + volatile uint16_t VBSE : 1; /* [15..15] VBUS Interrupt Enable */ + } INTENB0_b; + }; + + union { + volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */ + + struct { + volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */ + uint16_t : 3; + volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ + volatile uint16_t SIGNE : 1; /* [5..5] Setup Transaction Error Interrupt Enable */ + volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */ + uint16_t : 4; + volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */ + volatile uint16_t DTCHE : 1; /* [12..12] Disconnection Detection Interrupt Enable */ + uint16_t : 1; + volatile uint16_t BCHGE : 1; /* [14..14] USB Bus Change Interrupt Enable */ + volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */ + } INTENB1_b; + }; + volatile const uint16_t RESERVED7; + + union { + volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */ + uint16_t : 6; + } BRDYENB_b; + }; + + union { + volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */ + volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */ + uint16_t : 6; + } NRDYENB_b; + }; + + union { + volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */ + + struct { + volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */ + volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */ + uint16_t : 6; + } BEMPENB_b; + }; + + union { + volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */ + + struct { + uint16_t : 4; + volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */ + volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ + volatile uint16_t BRDYM : 1; /* [6..6] BRDY Interrupt Status Clear Timing */ + uint16_t : 1; + volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */ + uint16_t : 7; + } SOFCFG_b; + }; + + union { + volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */ + + struct { + volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ + volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */ + uint16_t : 1; + volatile uint16_t CDPEN : 1; /* [3..3] Charging Downstream Port Enable */ + volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */ + uint16_t : 2; + volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */ + uint16_t : 1; + volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */ + uint16_t : 3; + volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */ + } PHYSET_b; + }; + + union { + volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */ + + struct { + volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ + volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ + volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ + volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */ + volatile const uint16_t BRDY : 1; /* [8..8] Buffer Ready Interrupt Status */ + volatile const uint16_t NRDY : 1; /* [9..9] Buffer Not Ready Interrupt Status */ + volatile const uint16_t BEMP : 1; /* [10..10] Buffer Empty Interrupt Status */ + volatile uint16_t CTRT : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */ + volatile uint16_t DVST : 1; /* [12..12] Device State Transition Interrupt Status */ + volatile uint16_t SOFR : 1; /* [13..13] Frame Number Refresh Interrupt Status */ + volatile uint16_t RESM : 1; /* [14..14] Resume Interrupt Status */ + volatile uint16_t VBINT : 1; /* [15..15] VBUS Interrupt Status */ + } INTSTS0_b; + }; + + union { + volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */ + + struct { + volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */ + uint16_t : 3; + volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ + volatile uint16_t SIGN : 1; /* [5..5] Setup Transaction Error Interrupt Status */ + volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t LPMEND : 1; /* [8..8] LPM Transaction End Interrupt Status */ + volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */ + uint16_t : 1; + volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ + volatile uint16_t DTCH : 1; /* [12..12] USB Disconnection Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t BCHG : 1; /* [14..14] USB Bus Change Interrupt Status */ + volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */ + } INTSTS1_b; + }; + volatile const uint16_t RESERVED8; + + union { + volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */ + uint16_t : 6; + } BRDYSTS_b; + }; + + union { + volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */ + volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */ + uint16_t : 6; + } NRDYSTS_b; + }; + + union { + volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */ + + struct { + volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */ + volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */ + uint16_t : 6; + } BEMPSTS_b; + }; + + union { + volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */ + + struct { + volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */ + uint16_t : 3; + volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ + volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */ + } FRMNUM_b; + }; + + union { + volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */ + + struct { + volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */ + uint16_t : 12; + volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ + } UFRMNUM_b; + }; + + union { + volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */ + + struct { + volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */ + uint16_t : 1; + volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ + uint16_t : 5; + } USBADDR_b; + }; + volatile const uint16_t RESERVED9; + + union { + volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */ + + struct { + volatile uint16_t + BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ + volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ + } USBREQ_b; + }; + + union { + volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */ + + struct { + volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */ + } USBVAL_b; + }; + + union { + volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */ + + struct { + volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */ + } USBINDX_b; + }; + + union { + volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */ + + struct { + volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */ + } USBLENG_b; + }; + + union { + volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */ + + struct { + uint16_t : 4; + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; + volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ + volatile uint16_t CNTMD : 1; /* [8..8] Continuous Transfer Mode */ + uint16_t : 7; + } DCPCFG_b; + }; + + union { + volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */ + + struct { + volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ + uint16_t : 5; + volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ + } DCPMAXP_b; + }; + + union { + volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */ + + struct { + volatile uint16_t PID : 2; /* [1..0] Response PID */ + volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ + uint16_t : 2; + volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ + volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQ : 1; /* [14..14] Setup Token Transmission */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + } DCPCTR_b; + }; + volatile const uint16_t RESERVED10; + + union { + volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */ + + struct { + volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */ + uint16_t : 12; + } PIPESEL_b; + }; + volatile const uint16_t RESERVED11; + + union { + volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ + + struct { + volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; + volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ + uint16_t : 1; + volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */ + volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */ + uint16_t : 3; + volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */ + } PIPECFG_b; + }; + volatile const uint16_t RESERVED12; + + union { + volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */ + + struct { + volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ + uint16_t : 3; + volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ + } PIPEMAXP_b; + }; + + union { + volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */ + + struct { + volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */ + uint16_t : 9; + volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */ + uint16_t : 3; + } PIPEPERI_b; + }; + + union { + volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ + + struct { + volatile uint16_t PID : 2; /* [1..0] Response PID */ + uint16_t : 3; + volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ + volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + volatile uint16_t ACLRM : 1; /* [9..9] Auto Buffer Clear Mode */ + volatile uint16_t ATREPM : 1; /* [10..10] Auto Response Mode */ + uint16_t : 1; + volatile const uint16_t CSSTS : 1; /* [12..12] CSSTS Status */ + volatile uint16_t CSCLR : 1; /* [13..13] CSPLIT Status Clear */ + volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + } PIPE_CTR_b[9]; + }; + volatile const uint16_t RESERVED13; + volatile const uint32_t RESERVED14[3]; + volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */ + volatile const uint32_t RESERVED15[3]; + + union { + volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ + + struct { + volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ + volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ + volatile uint16_t + IDMSINKE0 : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */ + volatile uint16_t + IDPSINKE0 : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */ + uint16_t : 1; + volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */ + volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */ + volatile const uint16_t PDDETSTS0 : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */ + uint16_t : 6; + } USBBCCTRL0_b; + }; + volatile const uint16_t RESERVED16; + volatile const uint32_t RESERVED17[4]; + + union { + volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */ + + struct { + volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */ + uint16_t : 15; + } UCKSEL_b; + }; + volatile const uint16_t RESERVED18; + volatile const uint32_t RESERVED19; + + union { + volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */ + + struct { + volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */ + uint16_t : 6; + volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ + uint16_t : 8; + } USBMC_b; + }; + volatile const uint16_t RESERVED20; + + union { + volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */ + + struct { + uint16_t : 6; + volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ + volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */ + volatile uint16_t UPPHUB : 4; /* [14..11] Communication Target Connecting Hub Register */ + uint16_t : 1; + } DEVADD_b[10]; + }; + volatile const uint32_t RESERVED21[3]; + + union { + volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */ + + struct { + volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */ + volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */ + volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */ + volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */ + uint32_t : 28; + } PHYSLEW_b; + }; + volatile const uint32_t RESERVED22[3]; + + union { + volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */ + + struct { + uint16_t : 7; + volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */ + uint16_t : 8; + } LPCTRL_b; + }; + + union { + volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */ + + struct { + uint16_t : 14; + volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */ + uint16_t : 1; + } LPSTS_b; + }; + volatile const uint32_t RESERVED23[15]; + + union { + volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */ + + struct { + volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ + volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ + volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ + volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */ + volatile uint16_t VDMSRCE : 1; /* [4..4] VDMSRC Control */ + volatile uint16_t DCPMODE : 1; /* [5..5] DCP Mode Control */ + uint16_t : 2; + volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */ + volatile const uint16_t PDDETSTS : 1; /* [9..9] PDDET Status */ + uint16_t : 6; + } BCCTRL_b; + }; + volatile const uint16_t RESERVED24; + + union { + volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */ + + struct { + volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ + volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ + volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ + volatile const uint16_t + DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */ + volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */ + uint16_t : 2; + volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */ + uint16_t : 1; + } PL1CTRL1_b; + }; + + union { + volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */ + + struct { + uint16_t : 8; + volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */ + volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ + uint16_t : 3; + } PL1CTRL2_b; + }; + + union { + volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */ + + struct { + volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ + volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */ + uint16_t : 13; + } HL1CTRL1_b; + }; + + union { + volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */ + + struct { + volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */ + uint16_t : 4; + volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ + volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */ + uint16_t : 2; + volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */ + } HL1CTRL2_b; + }; + volatile const uint32_t RESERVED25[5]; + + union { + volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */ + + struct { + uint32_t : 20; + volatile const uint32_t + DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ + volatile const uint32_t + DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ + uint32_t : 1; + volatile const uint32_t + DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */ + uint32_t : 8; + } DPUSR0R_b; + }; + + union { + volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */ + + struct { + uint32_t : 4; + volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ + volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ + uint32_t : 1; + volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */ + uint32_t : 12; + volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */ + volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */ + uint32_t : 1; + volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */ + uint32_t : 8; + } DPUSR1R_b; + }; + + union { + volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */ + + struct { + volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */ + volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */ + uint16_t : 2; + volatile const uint16_t + DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */ + volatile const uint16_t + DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */ + uint16_t : 2; + volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */ + volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */ + uint16_t : 6; + } DPUSR2R_b; + }; + + union { + volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */ + + struct { + volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ + volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */ + uint16_t : 14; + } DPUSRCR_b; + }; + volatile const uint32_t RESERVED26[165]; + + union { + volatile uint32_t + DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */ + + struct { + volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ + volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ + uint32_t : 1; + volatile uint32_t DRPD0 : 1; /* [3..3] D+/D- Pull-Down Resistor Control */ + volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */ + uint32_t : 11; + volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */ + volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */ + uint32_t : 2; + volatile const uint32_t + DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */ + volatile const uint32_t + DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */ + uint32_t : 1; + volatile const uint32_t + DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */ + uint32_t : 8; + } DPUSR0R_FS_b; + }; + + union { + volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */ + + struct { + volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ + volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ + uint32_t : 2; + volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */ + volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */ + uint32_t : 1; + volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */ + uint32_t : 8; + volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */ + volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */ + uint32_t : 2; + volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */ + volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */ + uint32_t : 1; + volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */ + uint32_t : 8; + } DPUSR1R_FS_b; + }; } LINK_REG_t; /* Size = 1032 (0x408) */ TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset"); @@ -1034,7 +1034,7 @@ TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offs TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset"); TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */ - TU_ATTR_BIT_FIELD_ORDER_END +TU_ATTR_BIT_FIELD_ORDER_END /*--------------------------------------------------------------------*/ /* Register Bit Definitions */ From 79fd23974c04b18a7ebb2dfe14a170cb7c3e6f41 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 30 Mar 2022 13:56:00 +0100 Subject: [PATCH 013/142] fix host preprocessor flag typo Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com> --- src/portable/renesas/link/hcd_link.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index f60c49114..4bb103936 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -27,7 +27,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ CFG_TUSB_MCU == OPT_MCU_RX65X || \ CFG_TUSB_MCU == OPT_MCU_RX72N || \ CFG_TUSB_MCU == OPT_MCU_RAXXX) From fbc29794287b1f22388a09e289ff7b7698ef3eab Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 30 Mar 2022 15:38:31 +0100 Subject: [PATCH 014/142] fix iso int register typo druing the renaming int and iso endpoint configurations were swapped Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com> --- src/portable/renesas/link/dcd_link.c | 4 ++-- src/portable/renesas/link/hcd_link.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index bb7e3b60a..0f9037593 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -642,9 +642,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) if (xfer == TUSB_XFER_BULK) { cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk); } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= LINK_REG_PIPECFG_TYPE_ISO; + cfg |= LINK_REG_PIPECFG_TYPE_INT; } else { - cfg |= (LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk); + cfg |= (LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk); } LINK_REG->PIPECFG = cfg; LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 4bb103936..1197e1de5 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -642,9 +642,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const if (xfer == TUSB_XFER_BULK) { cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk; } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= LINK_REG_PIPECFG_TYPE_ISO; + cfg |= LINK_REG_PIPECFG_TYPE_INT; } else { - cfg |= LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk; + cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk; } LINK_REG->PIPECFG = cfg; LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); From ea81d22f184fa8fd6c46c35c8be86e47996b46c8 Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Thu, 7 Apr 2022 11:13:34 +0100 Subject: [PATCH 015/142] add __evenaccess keyword for CCRX compiler compatibility Signed-off-by: Rafael Silva --- src/portable/renesas/link/dcd_link.c | 4 ++++ src/portable/renesas/link/hcd_link.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index 0f9037593..dcbd68b8d 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -52,7 +52,11 @@ //--------------------------------------------------------------------+ /* LINK core registers */ +#if defined(__CCRX__) +#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE) +#else #define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) +#endif /* Start of definition of packed structs (used by the CCRX toolchain) */ TU_ATTR_PACKED_BEGIN diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 1197e1de5..f1ea2b821 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -48,7 +48,11 @@ //--------------------------------------------------------------------+ /* LINK core registers */ +#if defined(__CCRX__) +#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE) +#else #define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) +#endif TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN From d28ff1175d185c399add10be7824310b2b8dcd47 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 14:28:00 +0100 Subject: [PATCH 016/142] IAR declares strncasecmp in string.h not strings.h strings.h is not an ISO header file, so IAR generates fatal error Pe1696 'cannot open source file "strings.h"'. Even though strncasecmp isn't an ISO C library function, IAR's runtime library defines it, though it declares it in string.h instead. --- examples/device/usbtmc/src/usbtmc_app.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c index 8f87a6dca..115163c7f 100644 --- a/examples/device/usbtmc/src/usbtmc_app.c +++ b/examples/device/usbtmc/src/usbtmc_app.c @@ -23,7 +23,11 @@ * */ +#ifdef __ICCARM__ +#include +#else #include +#endif #include /* atoi */ #include "tusb.h" #include "bsp/board.h" From e5355d0335082541ae47b128add049a9d91ec070 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Fri, 15 Jul 2022 17:32:20 +0100 Subject: [PATCH 017/142] [rp2040] Remove non-portable return statements IAR generates error Pe118 'a void function may not return a value'. --- src/portable/raspberrypi/rp2040/rp2040_usb.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index c72dae64c..87fa999ca 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -87,15 +87,15 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_val } TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) { - return _hw_endpoint_buffer_control_update32(ep, 0, value); + _hw_endpoint_buffer_control_update32(ep, 0, value); } TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) { - return _hw_endpoint_buffer_control_update32(ep, ~value, value); + _hw_endpoint_buffer_control_update32(ep, ~value, value); } TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) { - return _hw_endpoint_buffer_control_update32(ep, ~value, 0); + _hw_endpoint_buffer_control_update32(ep, ~value, 0); } static inline uintptr_t hw_data_offset(uint8_t *buf) From 6dfc857b916855e57a15813f423987449dd1a935 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Wed, 24 Aug 2022 19:53:12 +0100 Subject: [PATCH 018/142] [rp2040] Explicit cast value of `hw_set_alias` Some compilers don't support the GNU extension `typeof` so their definitions of `hw_set_alias` can't inherit their type from their argument, and the best we can do is have `hw_set_alias` act the same as `hw_set_alias_untyped`. This requires an explicit cast when the macro is used instead, otherwise IAR generates error Pe132 'expression must have pointer-to-struct-or-union type but it has type "void *"'. The same goes for `hw_clear_alias`. --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 4 ++-- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 2003f72fd..89fd6b82d 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -46,8 +46,8 @@ /* Low level controller *------------------------------------------------------------------*/ -#define usb_hw_set hw_set_alias(usb_hw) -#define usb_hw_clear hw_clear_alias(usb_hw) +#define usb_hw_set ((usb_hw_t *)hw_set_alias(usb_hw)) +#define usb_hw_clear ((usb_hw_t *)hw_clear_alias(usb_hw)) // Init these in dcd_init static uint8_t *next_buffer_ptr; diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index e9118c6a3..5badb261a 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -56,8 +56,8 @@ static_assert(PICO_USB_HOST_INTERRUPT_ENDPOINTS <= USB_MAX_ENDPOINTS, ""); static struct hw_endpoint ep_pool[1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS]; #define epx (ep_pool[0]) -#define usb_hw_set hw_set_alias(usb_hw) -#define usb_hw_clear hw_clear_alias(usb_hw) +#define usb_hw_set ((usb_hw_t *)hw_set_alias(usb_hw)) +#define usb_hw_clear ((usb_hw_t *)hw_clear_alias(usb_hw)) // Flags we set by default in sie_ctrl (we add other bits on top) enum { From 16518dcbbb6f20182a6f69556908afe35a7f6e25 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Mon, 5 Sep 2022 12:50:05 +0100 Subject: [PATCH 019/142] Refactor pointer arithmetic on void* This is a GCC extension, illegal in ISO C. IAR generates errors Pa152 'these operand types cannot be used here' and Pe852 'expression must be a pointer to a complete object type'. Replace with uint8_t*. --- src/class/video/video_device.c | 89 +++++++++++++++++----------------- 1 file changed, 44 insertions(+), 45 deletions(-) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 7636db5fe..1f653f5c5 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -80,7 +80,7 @@ typedef struct TU_ATTR_PACKED { /* video control interface */ typedef struct TU_ATTR_PACKED { - void const *beg; /* The head of the first video control interface descriptor */ + uint8_t const *beg; /* The head of the first video control interface descriptor */ uint16_t len; /* Byte length of the descriptors */ uint16_t cur; /* offset for current video control interface */ uint8_t stm[CFG_TUD_VIDEO_STREAMING]; /* Indices of streaming interface */ @@ -108,9 +108,9 @@ static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ * @param[in] desc interface descriptor * * @return bInterfaceNumber */ -static inline uint8_t _desc_itfnum(void const *desc) +static inline uint8_t _desc_itfnum(uint8_t const *desc) { - return ((uint8_t const*)desc)[2]; + return desc[2]; } /** Get endpoint address from the endpoint descriptor @@ -118,9 +118,9 @@ static inline uint8_t _desc_itfnum(void const *desc) * @param[in] desc endpoint descriptor * * @return bEndpointAddress */ -static inline uint8_t _desc_ep_addr(void const *desc) +static inline uint8_t _desc_ep_addr(uint8_t const *desc) { - return ((uint8_t const*)desc)[2]; + return desc[2]; } /** Get instance of streaming interface @@ -146,7 +146,7 @@ static tusb_desc_vc_itf_t const* _get_desc_vc(videod_interface_t const *self) static tusb_desc_vs_itf_t const* _get_desc_vs(videod_streaming_interface_t const *self) { if (!self->desc.cur) return NULL; - void const *desc = _videod_itf[self->index_vc].beg; + uint8_t const *desc = _videod_itf[self->index_vc].beg; return (tusb_desc_vs_itf_t const*)(desc + self->desc.cur); } @@ -158,9 +158,9 @@ static tusb_desc_vs_itf_t const* _get_desc_vs(videod_streaming_interface_t const * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* _find_desc(void const *beg, void const *end, uint_fast8_t desc_type) +static uint8_t const* _find_desc(uint8_t const *beg, uint8_t const *end, uint_fast8_t desc_type) { - void const *cur = beg; + uint8_t const *cur = beg; while ((cur < end) && (desc_type != tu_desc_type(cur))) { cur = tu_desc_next(cur); } @@ -177,14 +177,13 @@ static void const* _find_desc(void const *beg, void const *end, uint_fast8_t des * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* _find_desc_3(void const *beg, void const *end, - uint_fast8_t desc_type, - uint_fast8_t element_0, - uint_fast8_t element_1) +static uint8_t const* _find_desc_3(uint8_t const *beg, uint8_t const *end, + uint_fast8_t desc_type, + uint_fast8_t element_0, + uint_fast8_t element_1) { - for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, desc_type)) { - uint8_t const *p = (uint8_t const *)cur; - if ((p[2] == element_0) && (p[3] == element_1)) { + for (uint8_t const *cur = beg; cur < end; cur = _find_desc(cur, end, desc_type)) { + if ((cur[2] == element_0) && (cur[3] == element_1)) { return cur; } cur = tu_desc_next(cur); @@ -199,9 +198,9 @@ static void const* _find_desc_3(void const *beg, void const *end, * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* _next_desc_itf(void const *beg, void const *end) +static uint8_t const* _next_desc_itf(void const *beg, uint8_t const *end) { - void const *cur = beg; + uint8_t const *cur = beg; uint_fast8_t itfnum = ((tusb_desc_interface_t const*)cur)->bInterfaceNumber; while ((cur < end) && (itfnum == ((tusb_desc_interface_t const*)cur)->bInterfaceNumber)) { @@ -219,7 +218,7 @@ static void const* _next_desc_itf(void const *beg, void const *end) * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static inline void const* _find_desc_itf(void const *beg, void const *end, uint_fast8_t itfnum, uint_fast8_t altnum) +static inline uint8_t const* _find_desc_itf(uint8_t const *beg, uint8_t const *end, uint_fast8_t itfnum, uint_fast8_t altnum) { return _find_desc_3(beg, end, TUSB_DESC_INTERFACE, itfnum, altnum); } @@ -233,9 +232,9 @@ static inline void const* _find_desc_itf(void const *beg, void const *end, uint_ * * @return The pointer for endpoint descriptor. * @retval end did not found endpoint descriptor */ -static void const* _find_desc_ep(void const *beg, void const *end) +static uint8_t const* _find_desc_ep(uint8_t const *beg, uint8_t const *end) { - for (void const *cur = beg; cur < end; cur = tu_desc_next(cur)) { + for (uint8_t const *cur = beg; cur < end; cur = tu_desc_next(cur)) { uint_fast8_t desc_type = tu_desc_type(cur); if (TUSB_DESC_ENDPOINT == desc_type) return cur; if (TUSB_DESC_INTERFACE == desc_type) break; @@ -251,17 +250,17 @@ static void const* _find_desc_ep(void const *beg, void const *end) * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* _find_desc_entity(void const *desc, uint_fast8_t entityid) +static uint8_t const* _find_desc_entity(void const *desc, uint_fast8_t entityid) { tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const*)desc; - void const *beg = vc; - void const *end = beg + vc->std.bLength + vc->ctl.wTotalLength; - for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) { + uint8_t const *beg = desc; + uint8_t const *end = beg + vc->std.bLength + vc->ctl.wTotalLength; + for (uint8_t const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) { tusb_desc_cs_video_entity_itf_t const *itf = (tusb_desc_cs_video_entity_itf_t const *)cur; if ((VIDEO_CS_ITF_VC_INPUT_TERMINAL <= itf->bDescriptorSubtype && itf->bDescriptorSubtype < VIDEO_CS_ITF_VC_MAX) && itf->bEntityId == entityid) { - return itf; + return cur; } cur = tu_desc_next(cur); } @@ -272,18 +271,18 @@ static void const* _find_desc_entity(void const *desc, uint_fast8_t entityid) static inline void const* _end_of_streaming_descriptor(void const *desc) { tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const *)desc; - return desc + vs->std.bLength + vs->stm.wTotalLength; + return (uint8_t const *)desc + vs->std.bLength + vs->stm.wTotalLength; } /** Find the first format descriptor with the specified format number. */ -static inline tusb_desc_cs_video_fmt_uncompressed_t const *_find_desc_format(void const *beg, void const *end, uint_fast8_t fmtnum) +static inline tusb_desc_cs_video_fmt_uncompressed_t const *_find_desc_format(uint8_t const *beg, uint8_t const *end, uint_fast8_t fmtnum) { return (tusb_desc_cs_video_fmt_uncompressed_t const*) _find_desc_3(beg, end, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, fmtnum); } /** Find the first frame descriptor with the specified format number. */ -static inline tusb_desc_cs_video_frm_uncompressed_t const *_find_desc_frame(void const *beg, void const *end, uint_fast8_t frmnum) +static inline tusb_desc_cs_video_frm_uncompressed_t const *_find_desc_frame(uint8_t const *beg, uint8_t const *end, uint_fast8_t frmnum) { return (tusb_desc_cs_video_frm_uncompressed_t const*) _find_desc_3(beg, end, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, frmnum); @@ -485,9 +484,9 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self) { tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); /* The next descriptor after the class-specific VC interface header descriptor. */ - void const *cur = (void const*)vc + vc->std.bLength + vc->ctl.bLength; + uint8_t const *cur = (uint8_t const*)vc + vc->std.bLength + vc->ctl.bLength; /* The end of the video control interface descriptor. */ - void const *end = (void const*)vc + vc->std.bLength + vc->ctl.wTotalLength; + uint8_t const *end = (uint8_t const*)vc + vc->std.bLength + vc->ctl.wTotalLength; if (vc->std.bNumEndpoints) { /* Find the notification endpoint descriptor. */ cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); @@ -506,10 +505,10 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self) static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum) { TU_LOG2(" open VC %d\n", altnum); - void const *beg = self->beg; - void const *end = beg + self->len; + uint8_t const *beg = self->beg; + uint8_t const *end = beg + self->len; /* The first descriptor is a video control interface descriptor. */ - void const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum); + uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum); TU_LOG2(" cur %d\n", cur - beg); TU_VERIFY(cur < end); @@ -534,7 +533,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t /* Open the notification endpoint */ TU_ASSERT(usbd_edpt_open(rhport, notif)); } - self->cur = (uint16_t) ((void const*)vc - beg); + self->cur = (uint16_t) ((uint8_t const*)vc - beg); return true; } @@ -546,7 +545,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint { uint_fast8_t i; TU_LOG2(" reopen VS %d\n", altnum); - void const *desc = _videod_itf[stm->index_vc].beg; + uint8_t const *desc = _videod_itf[stm->index_vc].beg; /* Close endpoints of previous settings. */ for (i = 0; i < TU_ARRAY_SIZE(stm->desc.ep); ++i) { @@ -563,9 +562,9 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint stm->offset = 0; /* Find a alternate interface */ - void const *beg = desc + stm->desc.beg; - void const *end = desc + stm->desc.end; - void const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum); + uint8_t const *beg = desc + stm->desc.beg; + uint8_t const *end = desc + stm->desc.end; + uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum); TU_VERIFY(cur < end); uint_fast8_t numeps = ((tusb_desc_interface_t const *)cur)->bNumEndpoints; TU_ASSERT(numeps <= TU_ARRAY_SIZE(stm->desc.ep)); @@ -977,7 +976,7 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu if (!stm || !stm->desc.ep[0] || stm->buffer) return false; /* Find EP address */ - void const *desc = _videod_itf[stm->index_vc].beg; + uint8_t const *desc = _videod_itf[stm->index_vc].beg; uint8_t ep_addr = 0; for (uint_fast8_t i = 0; i < CFG_TUD_VIDEO_STREAMING; ++i) { uint_fast16_t ofs_ep = stm->desc.ep[i]; @@ -1044,15 +1043,15 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin } TU_ASSERT(ctl_idx < CFG_TUD_VIDEO, 0); - void const *end = (void const*)itf_desc + max_len; - self->beg = itf_desc; + uint8_t const *end = (uint8_t const*)itf_desc + max_len; + self->beg = (uint8_t const *)itf_desc; self->len = max_len; /*------------- Video Control Interface -------------*/ TU_VERIFY(_open_vc_itf(rhport, self, 0), 0); tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); uint_fast8_t bInCollection = vc->ctl.bInCollection; /* Find the end of the video interface descriptor */ - void const *cur = _next_desc_itf(itf_desc, end); + uint8_t const *cur = _next_desc_itf(itf_desc, end); for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) { videod_streaming_interface_t *stm = NULL; /* find free streaming interface handle */ @@ -1085,7 +1084,7 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_ /* Identify which control interface to use */ uint_fast8_t itf; for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) { - void const *desc = _videod_itf[itf].beg; + uint8_t const *desc = _videod_itf[itf].beg; if (!desc) continue; if (itfnum == _desc_itfnum(desc)) break; } @@ -1101,7 +1100,7 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_ for (itf = 0; itf < CFG_TUD_VIDEO_STREAMING; ++itf) { videod_streaming_interface_t *stm = &_videod_streaming_itf[itf]; if (!stm->desc.beg) continue; - void const *desc = _videod_itf[stm->index_vc].beg; + uint8_t const *desc = _videod_itf[stm->index_vc].beg; if (itfnum == _desc_itfnum(desc + stm->desc.beg)) break; } @@ -1127,7 +1126,7 @@ bool videod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 uint_fast16_t const ep_ofs = stm->desc.ep[0]; if (!ep_ofs) continue; ctl = &_videod_itf[stm->index_vc]; - void const *desc = ctl->beg; + uint8_t const *desc = ctl->beg; if (ep_addr == _desc_ep_addr(desc + ep_ofs)) break; } From 65ba15c37d50fa470fa24c38dbf0e30eba3147c0 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Mon, 5 Sep 2022 12:53:49 +0100 Subject: [PATCH 020/142] Remove unreachable code IAR generates warning Pe111 'statement is unreachable'. In a couple of cases, replace return statements with TU_ATTR_FALLTHROUGH; because some compilers apparently can't figure out that the return statements are unreachable but do whinge about an imagined fall-through without them! --- examples/device/audio_4_channel_mic/src/main.c | 3 --- examples/device/audio_test/src/main.c | 3 --- examples/device/board_test/src/main.c | 2 -- examples/device/cdc_dual_ports/src/main.c | 2 -- examples/device/cdc_msc/src/main.c | 2 -- examples/device/dfu/src/main.c | 2 -- examples/device/dfu_runtime/src/main.c | 2 -- examples/device/dynamic_configuration/src/main.c | 2 -- examples/device/hid_composite/src/main.c | 2 -- examples/device/hid_generic_inout/src/main.c | 2 -- examples/device/hid_multiple_interface/src/main.c | 2 -- examples/device/midi_test/src/main.c | 3 --- examples/device/msc_dual_lun/src/main.c | 2 -- examples/device/uac2_headset/src/main.c | 2 -- examples/device/usbtmc/src/main.c | 2 -- examples/device/usbtmc/src/usbtmc_app.c | 1 - examples/device/video_capture/src/main.c | 2 -- examples/device/webusb_serial/src/main.c | 2 -- examples/host/cdc_msc_hid/src/main.c | 2 -- examples/host/hid_controller/src/main.c | 2 -- src/class/usbtmc/usbtmc_device.c | 10 +++------- src/class/video/video_device.c | 1 - src/portable/raspberrypi/rp2040/hcd_rp2040.c | 6 ++---- 23 files changed, 5 insertions(+), 54 deletions(-) diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c index a6af5fd19..662f67df3 100644 --- a/examples/device/audio_4_channel_mic/src/main.c +++ b/examples/device/audio_4_channel_mic/src/main.c @@ -99,9 +99,6 @@ int main(void) led_blinking_task(); audio_task(); } - - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c index d0849c7ac..4b88c2883 100644 --- a/examples/device/audio_test/src/main.c +++ b/examples/device/audio_test/src/main.c @@ -100,9 +100,6 @@ int main(void) led_blinking_task(); audio_task(); } - - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c index 5e28cbb27..207ca6294 100644 --- a/examples/device/board_test/src/main.c +++ b/examples/device/board_test/src/main.c @@ -67,8 +67,6 @@ int main(void) led_state = 1 - led_state; // toggle } } - - return 0; } #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3 diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c index 0264f0566..893b0dbc5 100644 --- a/examples/device/cdc_dual_ports/src/main.c +++ b/examples/device/cdc_dual_ports/src/main.c @@ -47,8 +47,6 @@ int main(void) tud_task(); // tinyusb device task cdc_task(); } - - return 0; } // echo to either Serial0 or Serial1 diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c index c3666763b..043b4e8f5 100644 --- a/examples/device/cdc_msc/src/main.c +++ b/examples/device/cdc_msc/src/main.c @@ -65,8 +65,6 @@ int main(void) cdc_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c index 6bb183819..5f37f25e1 100644 --- a/examples/device/dfu/src/main.c +++ b/examples/device/dfu/src/main.c @@ -82,8 +82,6 @@ int main(void) tud_task(); // tinyusb device task led_blinking_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c index 55b380353..3c5f04e82 100644 --- a/examples/device/dfu_runtime/src/main.c +++ b/examples/device/dfu_runtime/src/main.c @@ -77,8 +77,6 @@ int main(void) tud_task(); // tinyusb device task led_blinking_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c index 33a603343..69b3acd19 100644 --- a/examples/device/dynamic_configuration/src/main.c +++ b/examples/device/dynamic_configuration/src/main.c @@ -66,8 +66,6 @@ int main(void) cdc_task(); midi_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c index f7d76cfc7..75a0633a3 100644 --- a/examples/device/hid_composite/src/main.c +++ b/examples/device/hid_composite/src/main.c @@ -67,8 +67,6 @@ int main(void) hid_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c index 5b7daf118..e692d3bd3 100644 --- a/examples/device/hid_generic_inout/src/main.c +++ b/examples/device/hid_generic_inout/src/main.c @@ -88,8 +88,6 @@ int main(void) tud_task(); // tinyusb device task led_blinking_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c index 29ba74398..72240b208 100644 --- a/examples/device/hid_multiple_interface/src/main.c +++ b/examples/device/hid_multiple_interface/src/main.c @@ -71,8 +71,6 @@ int main(void) hid_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c index 3310348bd..ddf419fe9 100644 --- a/examples/device/midi_test/src/main.c +++ b/examples/device/midi_test/src/main.c @@ -71,9 +71,6 @@ int main(void) led_blinking_task(); midi_task(); } - - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c index 96790d20c..18038e442 100644 --- a/examples/device/msc_dual_lun/src/main.c +++ b/examples/device/msc_dual_lun/src/main.c @@ -62,8 +62,6 @@ int main(void) tud_task(); // tinyusb device task led_blinking_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c index 003dc2a74..3256bc272 100644 --- a/examples/device/uac2_headset/src/main.c +++ b/examples/device/uac2_headset/src/main.c @@ -113,8 +113,6 @@ int main(void) audio_task(); led_blinking_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c index 6945d8743..8fc06b56c 100644 --- a/examples/device/usbtmc/src/main.c +++ b/examples/device/usbtmc/src/main.c @@ -63,8 +63,6 @@ int main(void) led_blinking_task(); usbtmc_app_task_iter(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c index 115163c7f..e1ce115ad 100644 --- a/examples/device/usbtmc/src/usbtmc_app.c +++ b/examples/device/usbtmc/src/usbtmc_app.c @@ -254,7 +254,6 @@ void usbtmc_app_task_iter(void) { break; default: TU_ASSERT(false,); - return; } } diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 4028352da..0f81c693a 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -66,8 +66,6 @@ int main(void) video_task(); } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c index 604d30a83..23aa79f58 100644 --- a/examples/device/webusb_serial/src/main.c +++ b/examples/device/webusb_serial/src/main.c @@ -103,8 +103,6 @@ int main(void) webserial_task(); led_blinking_task(); } - - return 0; } // send characters to both CDC and WebUSB diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index 664cbf035..091c002ac 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -62,8 +62,6 @@ int main(void) hid_app_task(); #endif } - - return 0; } //--------------------------------------------------------------------+ diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c index 299a3ff10..13d1d6cdb 100644 --- a/examples/host/hid_controller/src/main.c +++ b/examples/host/hid_controller/src/main.c @@ -68,8 +68,6 @@ int main(void) hid_app_task(); #endif } - - return 0; } //--------------------------------------------------------------------+ diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index af4a92732..64db85fcf 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -496,7 +496,6 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint default: usbd_edpt_stall(rhport, usbtmc_state.ep_bulk_out); TU_VERIFY(false); - return false; } return true; @@ -509,8 +508,8 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint return true; case STATE_ABORTING_BULK_OUT: - TU_VERIFY(false); - return false; // Should be stalled by now, shouldn't have received a packet. + TU_VERIFY(false); // Should be stalled by now, shouldn't have received a packet. + TU_ATTR_FALLTHROUGH; // Not really - some compilers can't figure out that the above macro always returns. case STATE_TX_REQUESTED: case STATE_TX_INITIATED: @@ -567,7 +566,6 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint default: TU_ASSERT(false); - return false; } } else if (ep_addr == usbtmc_state.ep_int_in) { @@ -872,15 +870,13 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request { TU_VERIFY(request->bmRequestType == 0xA1); // in,class,interface TU_VERIFY(false); - return false; + TU_ATTR_FALLTHROUGH; // Not really - some compilers can't figure out that the above macro always returns. } #endif default: TU_VERIFY(false); - return false; } - TU_VERIFY(false); } #endif /* CFG_TUD_TSMC */ diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 1f653f5c5..a27287360 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -943,7 +943,6 @@ static int handle_video_stm_req(uint8_t rhport, uint8_t stage, default: return VIDEO_ERROR_INVALID_REQUEST; } - return VIDEO_ERROR_UNKNOWN; } //--------------------------------------------------------------------+ diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 5badb261a..f65749a2f 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -432,8 +432,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport) case 2: return TUSB_SPEED_FULL; default: - panic("Invalid speed\n"); - return TUSB_SPEED_INVALID; + panic("Invalid speed\n"); // does not return } } @@ -599,8 +598,7 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) (void) dev_addr; (void) ep_addr; - panic("hcd_clear_stall"); - return true; + panic("hcd_clear_stall"); // does not return } #endif From 53f0d5538bd2ab171567c9ba3138522accc8145d Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 12:34:25 +0100 Subject: [PATCH 021/142] Don't assume ints automatically convert to enums IAR generates warning Pe188 'enumerated type mixed with another type'. --- examples/device/audio_4_channel_mic/src/main.c | 2 +- examples/device/audio_test/src/main.c | 2 +- src/class/cdc/cdc_host.c | 2 +- src/host/usbh.c | 6 +++--- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c index 662f67df3..db2e9bf95 100644 --- a/examples/device/audio_4_channel_mic/src/main.c +++ b/examples/device/audio_4_channel_mic/src/main.c @@ -287,7 +287,7 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * // Those are dummy values for now ret.bNrChannels = 1; - ret.bmChannelConfig = 0; + ret.bmChannelConfig = (audio_channel_config_t) 0; ret.iChannelNames = 0; TU_LOG2(" Get terminal connector\r\n"); diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c index 4b88c2883..a3bf767f4 100644 --- a/examples/device/audio_test/src/main.c +++ b/examples/device/audio_test/src/main.c @@ -288,7 +288,7 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * // Those are dummy values for now ret.bNrChannels = 1; - ret.bmChannelConfig = 0; + ret.bmChannelConfig = (audio_channel_config_t) 0; ret.iChannelNames = 0; TU_LOG2(" Get terminal connector\r\n"); diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index ee824cb4e..09acc0c70 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -245,7 +245,7 @@ bool cdch_set_config(uint8_t dev_addr, uint8_t itf_num) bool cdch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { (void) ep_addr; - tuh_cdc_xfer_isr( dev_addr, event, 0, xferred_bytes ); + tuh_cdc_xfer_isr( dev_addr, event, (cdc_pipeid_t) 0, xferred_bytes ); return true; } diff --git a/src/host/usbh.c b/src/host/usbh.c index 9d618db92..32f701248 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -449,7 +449,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) { // device 0 only has control endpoint TU_ASSERT(epnum == 0, ); - usbh_control_xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len); + usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len); } else { @@ -461,14 +461,14 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) if ( 0 == epnum ) { - usbh_control_xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len); + usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len); }else { uint8_t drv_id = dev->ep2drv[epnum][ep_dir]; if(drv_id < USBH_CLASS_DRIVER_COUNT) { TU_LOG2("%s xfer callback\r\n", usbh_class_drivers[drv_id].name); - usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len); + usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len); } else { diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 89fd6b82d..ebf352d39 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -201,7 +201,7 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void) usb_hw_clear->buf_status = bit; // IN transfer for even i, OUT transfer for odd i - struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u)); + struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u) ? TUSB_DIR_IN : TUSB_DIR_OUT); // Continue xfer bool done = hw_endpoint_xfer_continue(ep); From 6a2d01bae47d2660dc2d10941e767fc0bc0e97bc Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 12:33:12 +0100 Subject: [PATCH 022/142] Don't assume different enum types can be combined IAR generates warning Pa089 'enumerated type mixed with another enumerated type'. --- examples/device/uac2_headset/src/usb_descriptors.h | 8 ++++---- src/class/video/video.h | 2 +- src/device/usbd.h | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 342b4fac1..7d1f60e82 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -114,7 +114,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Interface 1, Alternate 2 - alternate interface for data streaming */\ @@ -124,7 +124,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Standard AS Interface Descriptor(4.9.1) */\ @@ -138,7 +138,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Interface 2, Alternate 2 - alternate interface for data streaming */\ @@ -148,7 +148,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) diff --git a/src/class/video/video.h b/src/class/video/video.h index 844746546..eb2f6adc9 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -470,7 +470,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c /* 3.10.1.1 */ #define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \ - 7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\ + 7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\ U16_TO_U8S_LE(_epsize), _ep_interval /* 3.10.1.2 */ diff --git a/src/device/usbd.h b/src/device/usbd.h index 17b4d927b..64f166826 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -418,7 +418,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */ #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \ - TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval // AUDIO simple descriptor (UAC2) for 1 microphone input // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source @@ -465,7 +465,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -514,7 +514,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -562,7 +562,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\ From caff3b5c54615a0cc4e35dadffb99af543d0165f Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 14:29:30 +0100 Subject: [PATCH 023/142] Remove unused static data This affects struct rspMsg in usbtmc_app.c (unconditionally) and uint8_t termChar in usbtmc_device.c (when NDEBUG is defined). IAR generates warning Pe550 'variable was set but never used'. --- examples/device/usbtmc/src/usbtmc_app.c | 11 ----------- src/class/usbtmc/usbtmc_device.c | 4 ++++ 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c index e1ce115ad..0057a429f 100644 --- a/examples/device/usbtmc/src/usbtmc_app.c +++ b/examples/device/usbtmc/src/usbtmc_app.c @@ -92,14 +92,6 @@ static size_t buffer_tx_ix; // for transmitting using multiple transfers static uint8_t buffer[225]; // A few packets long should be enough. -static usbtmc_msg_dev_dep_msg_in_header_t rspMsg = { - .bmTransferAttributes = - { - .EOM = 1, - .UsingTermChar = 0 - } -}; - void tud_usbtmc_open_cb(uint8_t interface_id) { (void)interface_id; @@ -188,9 +180,6 @@ static unsigned int msgReqLen; bool tud_usbtmc_msgBulkIn_request_cb(usbtmc_msg_request_dev_dep_in const * request) { - rspMsg.header.MsgID = request->header.MsgID, - rspMsg.header.bTag = request->header.bTag, - rspMsg.header.bTagInverse = request->header.bTagInverse; msgReqLen = request->TransferSize; #ifdef xDEBUG diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index 64db85fcf..e96990c49 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -154,7 +154,9 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small"); static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len); static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen); +#ifndef NDEBUG static uint8_t termChar; +#endif static uint8_t termCharRequested = false; osal_mutex_def_t usbtmcLockBuffer; @@ -440,7 +442,9 @@ static bool handle_devMsgIn(void *data, size_t len) usbtmc_state.transfer_size_sent = 0u; termCharRequested = msg->bmTransferAttributes.TermCharEnabled; +#ifndef NDEBUG termChar = msg->TermChar; +#endif if(termCharRequested) TU_VERIFY(usbtmc_state.capabilities->bmDevCapabilities.canEndBulkInOnTermChar); From 62d90c850096277080e4044dd37ef9c18748f06c Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 14:33:04 +0100 Subject: [PATCH 024/142] Move variable into its own curly-brace scope IAR generates warning Pe546 'transfer of control bypasses initialization of variable "invInvTag"'. --- src/class/usbtmc/usbtmc_device.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index e96990c49..d7ba02d29 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -470,8 +470,10 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint case STATE_IDLE: TU_VERIFY(xferred_bytes >= sizeof(usbtmc_msg_generic_t)); msg = (usbtmc_msg_generic_t*)(usbtmc_state.ep_bulk_out_buf); - uint8_t invInvTag = (uint8_t)~(msg->header.bTagInverse); - TU_VERIFY(msg->header.bTag == invInvTag); + { + uint8_t invInvTag = (uint8_t)~(msg->header.bTagInverse); + TU_VERIFY(msg->header.bTag == invInvTag); + } TU_VERIFY(msg->header.bTag != 0x00); switch(msg->header.MsgID) { From 01edbb8af6b22fa213bcbbaccd92c9be5f72b376 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 17:10:26 +0100 Subject: [PATCH 025/142] IAR doesn't support __attribute__((fallthrough)) IAR generates warning Pa167 'the "fallthrough" attribute is not supported'. It doesn't generate warnings when one switch case falls through to another, so simply make TU_ATTR_FALLTHROUGH expand to an empty string. Also replace one instance of __attribute__ with the macro. --- src/common/tusb_compiler.h | 2 +- src/host/usbh.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 2c30daf6f..894d0178a 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -189,7 +189,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used - #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) + #define TU_ATTR_FALLTHROUGH #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END diff --git a/src/host/usbh.c b/src/host/usbh.c index 32f701248..fb8479419 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1273,7 +1273,7 @@ static void process_enumeration(tuh_xfer_t* xfer) break; } #endif - __attribute__((fallthrough)); + TU_ATTR_FALLTHROUGH; #endif case ENUM_SET_ADDR: From 73f22e31c7a31e9b974e27407b906bbc8cb05a7a Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Mon, 12 Sep 2022 14:46:26 +0100 Subject: [PATCH 026/142] [rp2040] Wrap GCC pragmas in #ifdef __GNUC__ IAR generates warning Pe161 'unrecognized #pragma'. --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 25c013bd2..adb9151f9 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -57,15 +57,19 @@ void rp2040_usb_init(void) reset_block(RESETS_RESET_USBCTRL_BITS); unreset_block_wait(RESETS_RESET_USBCTRL_BITS); +#ifdef __GNUC__ // Clear any previous state just in case #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" #if __GNUC__ > 6 #pragma GCC diagnostic ignored "-Wstringop-overflow" +#endif #endif memset(usb_hw, 0, sizeof(*usb_hw)); memset(usb_dpram, 0, sizeof(*usb_dpram)); +#ifdef __GNUC__ #pragma GCC diagnostic pop +#endif // Mux the controller to the onboard usb phy usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; From eb7aacb51f00a55867304d6217dcaaf39f7019c0 Mon Sep 17 00:00:00 2001 From: Howard Su Date: Sat, 7 Jan 2023 07:01:14 +0000 Subject: [PATCH 027/142] Allow config OS for RP2040 --- hw/bsp/rp2040/family.cmake | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 5dba9dc39..350e8bc65 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -23,6 +23,10 @@ if (NOT TARGET _rp2040_family_inclusion_marker) set(PICO_TINYUSB_PATH ${TOP}) endif() + if (NOT TINYUSB_OPT_OS) + set(TINYUSB_OPT_OS OPT_OS_PICO) + endif() + #------------------------------------ # Base config for both device and host; wrapped by SDK's tinyusb_common #------------------------------------ @@ -54,7 +58,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_compile_definitions(tinyusb_common_base INTERFACE CFG_TUSB_MCU=OPT_MCU_RP2040 - CFG_TUSB_OS=OPT_OS_PICO + CFG_TUSB_OS=${TINYUSB_OPT_OS} #CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} ) From 787afbbcd0b178925fa1e429f7a650dd2146485b Mon Sep 17 00:00:00 2001 From: Brandon Alba Date: Tue, 28 Feb 2023 10:25:06 -0800 Subject: [PATCH 028/142] Initialized all RCC init structs for all STM32H7 BSP variants as empty --- hw/bsp/stm32h7/boards/daisyseed/board.h | 6 +++--- hw/bsp/stm32h7/boards/stm32h723nucleo/board.h | 4 ++-- hw/bsp/stm32h7/boards/stm32h743eval/board.h | 6 +++--- hw/bsp/stm32h7/boards/stm32h743nucleo/board.h | 4 ++-- hw/bsp/stm32h7/boards/stm32h745disco/board.h | 6 +++--- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.h b/hw/bsp/stm32h7/boards/daisyseed/board.h index 579c09727..0ad809720 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.h +++ b/hw/bsp/stm32h7/boards/daisyseed/board.h @@ -57,9 +57,9 @@ //--------------------------------------------------------------------+ static inline void board_stm32h7_clock_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; /*!< Supply configuration update enable */ /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */ diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h index 56a48ec24..71ca33447 100644 --- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h +++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h @@ -64,8 +64,8 @@ //--------------------------------------------------------------------+ static inline void board_stm32h7_clock_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; /* The PWR block is always enabled on the H7 series- there is no clock enable. For now, use the default VOS3 scale mode (lowest) and limit clock diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h index af2063ce0..666bec9a1 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h @@ -63,9 +63,9 @@ //--------------------------------------------------------------------+ static inline void board_stm32h7_clock_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; /*!< Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h index 06148c875..c101801eb 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h @@ -55,8 +55,8 @@ //--------------------------------------------------------------------+ static inline void board_stm32h7_clock_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; /* The PWR block is always enabled on the H7 series- there is no clock enable. For now, use the default VOS3 scale mode (lowest) and limit clock diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.h b/hw/bsp/stm32h7/boards/stm32h745disco/board.h index d33e0c8eb..d7d3e8723 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.h +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.h @@ -57,9 +57,9 @@ //--------------------------------------------------------------------+ static inline void board_stm32h7_clock_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; /*!< Supply configuration update enable */ /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */ From 8c8f26f14e6cb4561ed0a937739b926da27393ff Mon Sep 17 00:00:00 2001 From: Brandon Alba Date: Tue, 28 Feb 2023 10:31:07 -0800 Subject: [PATCH 029/142] In some STM32H7 BSP variants, initialized RCC_PeriphCLKInitStruct instances as empty --- hw/bsp/stm32h7/boards/stm32h723nucleo/board.h | 2 +- hw/bsp/stm32h7/boards/stm32h743nucleo/board.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h index 71ca33447..0eb5e76ad 100644 --- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h +++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h @@ -111,7 +111,7 @@ static inline void board_stm32h7_clock_init(void) separate. However, the main system PLL (PLL1) doesn't have a direct connection to the USB peripheral clock to generate 48 MHz, so we do this dance. This will connect PLL1's Q output to the USB peripheral clock. */ - RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct; + RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 }; RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h index c101801eb..8c6a7ce5a 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h @@ -102,7 +102,7 @@ static inline void board_stm32h7_clock_init(void) separate. However, the main system PLL (PLL1) doesn't have a direct connection to the USB peripheral clock to generate 48 MHz, so we do this dance. This will connect PLL1's Q output to the USB peripheral clock. */ - RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct; + RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 }; RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; From 2cf092464b5cfabcd0a5e507459e5658e2e0ff54 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 8 Mar 2023 22:34:54 +0700 Subject: [PATCH 030/142] fix freertos build with iar, format/indent link_type --- .codespell/exclude-file.txt | 5 +- examples/device/cdc_msc_freertos/Makefile | 2 +- .../device/hid_composite_freertos/Makefile | 2 +- src/portable/renesas/link/link_type.h | 1847 +++++++++-------- 4 files changed, 952 insertions(+), 904 deletions(-) diff --git a/.codespell/exclude-file.txt b/.codespell/exclude-file.txt index af8265cc7..660d2e07e 100644 --- a/.codespell/exclude-file.txt +++ b/.codespell/exclude-file.txt @@ -1 +1,4 @@ - return USB0.INTSTS1.BIT.ATTCH ? true : false; + return LINK_REG->INTSTS1_b.ATTCH ? true : false; + volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ +#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ +#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index 2d5d0cfcc..ed3b3f0ce 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -30,7 +30,7 @@ SRC_C += \ $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) SRC_S += \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s)) # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index 9b9c4d1b3..f4410b202 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -29,7 +29,7 @@ SRC_C += \ $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) SRC_S += \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s)) # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h index eaf0b1ec4..cb3db650a 100644 --- a/src/portable/renesas/link/link_type.h +++ b/src/portable/renesas/link/link_type.h @@ -62,25 +62,23 @@ typedef struct TU_ATTR_PACKED { }; } LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */ -TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size"); - /* LINK_REG Structure */ typedef struct TU_ATTR_PACKED { union { volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */ struct { - volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ - uint16_t : 2; + volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ + uint16_t : 2; volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */ volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */ - volatile uint16_t DRPD : 1; /* [5..5] D+/D- Line Resistor Control */ - volatile uint16_t DCFM : 1; /* [6..6] Controller Function Select */ - uint16_t : 1; - volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */ - uint16_t : 1; - volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */ - uint16_t : 5; + volatile uint16_t DRPD : 1; /* [5..5] D+/D- Line Resistor Control */ + volatile uint16_t DCFM : 1; /* [6..6] Controller Function Select */ + uint16_t : 1; + volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */ + uint16_t : 1; + volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */ + uint16_t : 5; } SYSCFG_b; }; @@ -88,8 +86,7 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */ struct { - volatile uint16_t - BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ + volatile uint16_t BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ uint16_t : 12; } BUSWAIT_b; }; @@ -98,15 +95,14 @@ typedef struct TU_ATTR_PACKED { volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */ struct { - volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ - volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ - uint16_t : 2; + volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ + volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ + uint16_t : 2; volatile const uint16_t - SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */ - volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */ - uint16_t : 7; - volatile const uint16_t - OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */ + SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */ + volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */ + uint16_t : 7; + volatile const uint16_t OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */ } SYSSTS0_b; }; @@ -124,16 +120,16 @@ typedef struct TU_ATTR_PACKED { struct { volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */ - uint16_t : 1; - volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ - volatile uint16_t RESUME : 1; /* [5..5] Resume Output */ - volatile uint16_t USBRST : 1; /* [6..6] USB Bus Reset Output */ - volatile uint16_t RWUPE : 1; /* [7..7] Wakeup Detection Enable */ - volatile uint16_t WKUP : 1; /* [8..8] Wakeup Output */ - volatile uint16_t VBUSEN : 1; /* [9..9] USB_VBUSEN Output Pin Control */ - volatile uint16_t EXICEN : 1; /* [10..10] USB_EXICEN Output Pin Control */ - volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */ - uint16_t : 4; + uint16_t : 1; + volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ + volatile uint16_t RESUME : 1; /* [5..5] Resume Output */ + volatile uint16_t USBRST : 1; /* [6..6] USB Bus Reset Output */ + volatile uint16_t RWUPE : 1; /* [7..7] Wakeup Detection Enable */ + volatile uint16_t WKUP : 1; /* [8..8] Wakeup Output */ + volatile uint16_t VBUSEN : 1; /* [9..9] USB_VBUSEN Output Pin Control */ + volatile uint16_t EXICEN : 1; /* [10..10] USB_EXICEN Output Pin Control */ + volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */ + uint16_t : 4; } DVSTCTR0_b; }; volatile const uint16_t RESERVED; @@ -214,15 +210,15 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */ - uint16_t : 1; - volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ - uint16_t : 2; - volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */ - uint16_t : 2; - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + uint16_t : 1; + volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ + uint16_t : 2; + volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */ + uint16_t : 2; + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ } CFIFOSEL_b; }; @@ -230,12 +226,11 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */ struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ } CFIFOCTR_b; }; volatile const uint32_t RESERVED6; @@ -245,15 +240,14 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ - uint16_t : 4; - volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ - volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ - volatile uint16_t - DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ } D0FIFOSEL_b; }; @@ -261,12 +255,11 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */ struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ } D0FIFOCTR_b; }; @@ -275,15 +268,14 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ - uint16_t : 4; - volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ - uint16_t : 1; - volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ - volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ - volatile uint16_t - DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ - volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ - volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ + uint16_t : 4; + volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ + uint16_t : 1; + volatile uint16_t MBW : 2; /* [11..10] FIFO Port Access Bit Width */ + volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */ + volatile uint16_t DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */ + volatile uint16_t REW : 1; /* [14..14] Buffer Pointer Rewind */ + volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */ } D1FIFOSEL_b; }; @@ -291,12 +283,11 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */ struct { - volatile const uint16_t - DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ - uint16_t : 1; - volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ + uint16_t : 1; + volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ } D1FIFOCTR_b; }; @@ -308,11 +299,11 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */ volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */ volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */ - volatile uint16_t CTRE : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */ - volatile uint16_t DVSE : 1; /* [12..12] Device State Transition Interrupt Enable */ - volatile uint16_t SOFE : 1; /* [13..13] Frame Number Update Interrupt Enable */ - volatile uint16_t RSME : 1; /* [14..14] Resume Interrupt Enable */ - volatile uint16_t VBSE : 1; /* [15..15] VBUS Interrupt Enable */ + volatile uint16_t CTRE : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */ + volatile uint16_t DVSE : 1; /* [12..12] Device State Transition Interrupt Enable */ + volatile uint16_t SOFE : 1; /* [13..13] Frame Number Update Interrupt Enable */ + volatile uint16_t RSME : 1; /* [14..14] Resume Interrupt Enable */ + volatile uint16_t VBSE : 1; /* [15..15] VBUS Interrupt Enable */ } INTENB0_b; }; @@ -321,16 +312,16 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */ - uint16_t : 3; - volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ - volatile uint16_t SIGNE : 1; /* [5..5] Setup Transaction Error Interrupt Enable */ - volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */ - uint16_t : 4; - volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */ - volatile uint16_t DTCHE : 1; /* [12..12] Disconnection Detection Interrupt Enable */ - uint16_t : 1; - volatile uint16_t BCHGE : 1; /* [14..14] USB Bus Change Interrupt Enable */ - volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */ + uint16_t : 3; + volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ + volatile uint16_t SIGNE : 1; /* [5..5] Setup Transaction Error Interrupt Enable */ + volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */ + uint16_t : 4; + volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */ + volatile uint16_t DTCHE : 1; /* [12..12] Disconnection Detection Interrupt Enable */ + uint16_t : 1; + volatile uint16_t BCHGE : 1; /* [14..14] USB Bus Change Interrupt Enable */ + volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */ } INTENB1_b; }; volatile const uint16_t RESERVED7; @@ -393,12 +384,12 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */ struct { - uint16_t : 4; + uint16_t : 4; volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */ - volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ - volatile uint16_t BRDYM : 1; /* [6..6] BRDY Interrupt Status Clear Timing */ - uint16_t : 1; - volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */ + volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ + volatile uint16_t BRDYM : 1; /* [6..6] BRDY Interrupt Status Clear Timing */ + uint16_t : 1; + volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */ uint16_t : 7; } SOFCFG_b; }; @@ -407,17 +398,17 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */ struct { - volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ + volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */ - uint16_t : 1; - volatile uint16_t CDPEN : 1; /* [3..3] Charging Downstream Port Enable */ - volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */ - uint16_t : 2; - volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */ - uint16_t : 1; + uint16_t : 1; + volatile uint16_t CDPEN : 1; /* [3..3] Charging Downstream Port Enable */ + volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */ + uint16_t : 2; + volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */ + uint16_t : 1; volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */ - uint16_t : 3; - volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */ + uint16_t : 3; + volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */ } PHYSET_b; }; @@ -425,18 +416,18 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */ struct { - volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ - volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ - volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ + volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ + volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ + volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */ - volatile const uint16_t BRDY : 1; /* [8..8] Buffer Ready Interrupt Status */ - volatile const uint16_t NRDY : 1; /* [9..9] Buffer Not Ready Interrupt Status */ - volatile const uint16_t BEMP : 1; /* [10..10] Buffer Empty Interrupt Status */ - volatile uint16_t CTRT : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */ - volatile uint16_t DVST : 1; /* [12..12] Device State Transition Interrupt Status */ - volatile uint16_t SOFR : 1; /* [13..13] Frame Number Refresh Interrupt Status */ - volatile uint16_t RESM : 1; /* [14..14] Resume Interrupt Status */ - volatile uint16_t VBINT : 1; /* [15..15] VBUS Interrupt Status */ + volatile const uint16_t BRDY : 1; /* [8..8] Buffer Ready Interrupt Status */ + volatile const uint16_t NRDY : 1; /* [9..9] Buffer Not Ready Interrupt Status */ + volatile const uint16_t BEMP : 1; /* [10..10] Buffer Empty Interrupt Status */ + volatile uint16_t CTRT : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */ + volatile uint16_t DVST : 1; /* [12..12] Device State Transition Interrupt Status */ + volatile uint16_t SOFR : 1; /* [13..13] Frame Number Refresh Interrupt Status */ + volatile uint16_t RESM : 1; /* [14..14] Resume Interrupt Status */ + volatile uint16_t VBINT : 1; /* [15..15] VBUS Interrupt Status */ } INTSTS0_b; }; @@ -445,19 +436,19 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */ - uint16_t : 3; - volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ - volatile uint16_t SIGN : 1; /* [5..5] Setup Transaction Error Interrupt Status */ - volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */ - uint16_t : 1; - volatile uint16_t LPMEND : 1; /* [8..8] LPM Transaction End Interrupt Status */ - volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */ - uint16_t : 1; - volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ - volatile uint16_t DTCH : 1; /* [12..12] USB Disconnection Detection Interrupt Status */ - uint16_t : 1; - volatile uint16_t BCHG : 1; /* [14..14] USB Bus Change Interrupt Status */ - volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */ + uint16_t : 3; + volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ + volatile uint16_t SIGN : 1; /* [5..5] Setup Transaction Error Interrupt Status */ + volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t LPMEND : 1; /* [8..8] LPM Transaction End Interrupt Status */ + volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */ + uint16_t : 1; + volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ + volatile uint16_t DTCH : 1; /* [12..12] USB Disconnection Detection Interrupt Status */ + uint16_t : 1; + volatile uint16_t BCHG : 1; /* [14..14] USB Bus Change Interrupt Status */ + volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */ } INTSTS1_b; }; volatile const uint16_t RESERVED8; @@ -521,9 +512,9 @@ typedef struct TU_ATTR_PACKED { struct { volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */ - uint16_t : 3; - volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ - volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */ + uint16_t : 3; + volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ + volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */ } FRMNUM_b; }; @@ -532,8 +523,8 @@ typedef struct TU_ATTR_PACKED { struct { volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */ - uint16_t : 12; - volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ + uint16_t : 12; + volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ } UFRMNUM_b; }; @@ -542,9 +533,9 @@ typedef struct TU_ATTR_PACKED { struct { volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */ - uint16_t : 1; - volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ - uint16_t : 5; + uint16_t : 1; + volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ + uint16_t : 5; } USBADDR_b; }; volatile const uint16_t RESERVED9; @@ -553,9 +544,8 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */ struct { - volatile uint16_t - BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ - volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ + volatile uint16_t BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ + volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ } USBREQ_b; }; @@ -587,12 +577,12 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */ struct { - uint16_t : 4; - volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ - uint16_t : 2; + uint16_t : 4; + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ - volatile uint16_t CNTMD : 1; /* [8..8] Continuous Transfer Mode */ - uint16_t : 7; + volatile uint16_t CNTMD : 1; /* [8..8] Continuous Transfer Mode */ + uint16_t : 7; } DCPCFG_b; }; @@ -600,8 +590,8 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */ struct { - volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ - uint16_t : 5; + volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ + uint16_t : 5; volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ } DCPMAXP_b; }; @@ -610,18 +600,18 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */ struct { - volatile uint16_t PID : 2; /* [1..0] Response PID */ - volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ - uint16_t : 2; + volatile uint16_t PID : 2; /* [1..0] Response PID */ + volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ + uint16_t : 2; volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */ - volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ - volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ - uint16_t : 2; - volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */ - uint16_t : 2; - volatile uint16_t SUREQ : 1; /* [14..14] Setup Token Transmission */ - volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */ + uint16_t : 2; + volatile uint16_t SUREQ : 1; /* [14..14] Setup Token Transmission */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ } DCPCTR_b; }; volatile const uint16_t RESERVED10; @@ -637,18 +627,18 @@ typedef struct TU_ATTR_PACKED { volatile const uint16_t RESERVED11; union { - volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ + volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ struct { - volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ - volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ - uint16_t : 2; + volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ + volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ + uint16_t : 2; volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */ - uint16_t : 1; - volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */ - volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */ - uint16_t : 3; - volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */ + uint16_t : 1; + volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */ + volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */ + uint16_t : 3; + volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */ } PIPECFG_b; }; volatile const uint16_t RESERVED12; @@ -657,8 +647,8 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */ struct { - volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ - uint16_t : 3; + volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ + uint16_t : 3; volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ } PIPEMAXP_b; }; @@ -668,29 +658,29 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */ - uint16_t : 9; + uint16_t : 9; volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */ - uint16_t : 3; + uint16_t : 3; } PIPEPERI_b; }; union { - volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ + volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ struct { - volatile uint16_t PID : 2; /* [1..0] Response PID */ - uint16_t : 3; - volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ - volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */ - volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ - volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ - volatile uint16_t ACLRM : 1; /* [9..9] Auto Buffer Clear Mode */ - volatile uint16_t ATREPM : 1; /* [10..10] Auto Response Mode */ - uint16_t : 1; - volatile const uint16_t CSSTS : 1; /* [12..12] CSSTS Status */ - volatile uint16_t CSCLR : 1; /* [13..13] CSPLIT Status Clear */ + volatile uint16_t PID : 2; /* [1..0] Response PID */ + uint16_t : 3; + volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ + volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */ + volatile uint16_t SQSET : 1; /* [7..7] Sequence Toggle Bit Set */ + volatile uint16_t SQCLR : 1; /* [8..8] Sequence Toggle Bit Clear */ + volatile uint16_t ACLRM : 1; /* [9..9] Auto Buffer Clear Mode */ + volatile uint16_t ATREPM : 1; /* [10..10] Auto Response Mode */ + uint16_t : 1; + volatile const uint16_t CSSTS : 1; /* [12..12] CSSTS Status */ + volatile uint16_t CSCLR : 1; /* [13..13] CSPLIT Status Clear */ volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */ - volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ + volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */ } PIPE_CTR_b[9]; }; volatile const uint16_t RESERVED13; @@ -699,22 +689,22 @@ typedef struct TU_ATTR_PACKED { volatile const uint32_t RESERVED15[3]; union { - volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ + volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ struct { - volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ - volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ + volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ + volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ volatile uint16_t - IDMSINKE0 : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */ - volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */ + IDMSINKE0 : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */ volatile uint16_t - IDPSINKE0 : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */ - volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */ - uint16_t : 1; - volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */ + IDPSINKE0 : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */ + volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */ + uint16_t : 1; + volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */ volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */ - volatile const uint16_t PDDETSTS0 : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */ - uint16_t : 6; + volatile const uint16_t PDDETSTS0 : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */ + uint16_t : 6; } USBBCCTRL0_b; }; volatile const uint16_t RESERVED16; @@ -736,9 +726,9 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */ - uint16_t : 6; - volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ - uint16_t : 8; + uint16_t : 6; + volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ + uint16_t : 8; } USBMC_b; }; volatile const uint16_t RESERVED20; @@ -748,9 +738,9 @@ typedef struct TU_ATTR_PACKED { struct { uint16_t : 6; - volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ + volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */ - volatile uint16_t UPPHUB : 4; /* [14..11] Communication Target Connecting Hub Register */ + volatile uint16_t UPPHUB : 4; /* [14..11] Communication Target Connecting Hub Register */ uint16_t : 1; } DEVADD_b[10]; }; @@ -794,15 +784,15 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */ struct { - volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ - volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ - volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ - volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */ - volatile uint16_t VDMSRCE : 1; /* [4..4] VDMSRC Control */ - volatile uint16_t DCPMODE : 1; /* [5..5] DCP Mode Control */ - uint16_t : 2; + volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ + volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ + volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ + volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */ + volatile uint16_t VDMSRCE : 1; /* [4..4] VDMSRC Control */ + volatile uint16_t DCPMODE : 1; /* [5..5] DCP Mode Control */ + uint16_t : 2; volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */ - volatile const uint16_t PDDETSTS : 1; /* [9..9] PDDET Status */ + volatile const uint16_t PDDETSTS : 1; /* [9..9] PDDET Status */ uint16_t : 6; } BCCTRL_b; }; @@ -812,14 +802,13 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */ struct { - volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ - volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ - volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ - volatile const uint16_t - DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */ - volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */ - uint16_t : 2; - volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */ + volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ + volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ + volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ + volatile const uint16_t DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */ + volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */ + uint16_t : 2; + volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */ uint16_t : 1; } PL1CTRL1_b; }; @@ -830,7 +819,7 @@ typedef struct TU_ATTR_PACKED { struct { uint16_t : 8; volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */ - volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ + volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ uint16_t : 3; } PL1CTRL2_b; }; @@ -839,7 +828,7 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */ struct { - volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ + volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */ uint16_t : 13; } HL1CTRL1_b; @@ -850,11 +839,11 @@ typedef struct TU_ATTR_PACKED { struct { volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */ - uint16_t : 4; - volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ - volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */ - uint16_t : 2; - volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */ + uint16_t : 4; + volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ + volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */ + uint16_t : 2; + volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */ } HL1CTRL2_b; }; volatile const uint32_t RESERVED25[5]; @@ -864,13 +853,10 @@ typedef struct TU_ATTR_PACKED { struct { uint32_t : 20; - volatile const uint32_t - DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ - volatile const uint32_t - DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ - uint32_t : 1; - volatile const uint32_t - DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */ + volatile const uint32_t DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ + volatile const uint32_t DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ + uint32_t : 1; + volatile const uint32_t DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */ uint32_t : 8; } DPUSR0R_b; }; @@ -880,14 +866,14 @@ typedef struct TU_ATTR_PACKED { struct { uint32_t : 4; - volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ - volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ - uint32_t : 1; - volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */ - uint32_t : 12; - volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */ - volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */ - uint32_t : 1; + volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ + volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ + uint32_t : 1; + volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */ + uint32_t : 12; + volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */ + volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */ + uint32_t : 1; volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */ uint32_t : 8; } DPUSR1R_b; @@ -899,14 +885,12 @@ typedef struct TU_ATTR_PACKED { struct { volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */ volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */ - uint16_t : 2; - volatile const uint16_t - DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */ - volatile const uint16_t - DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */ - uint16_t : 2; - volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */ - volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */ + uint16_t : 2; + volatile const uint16_t DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */ + volatile const uint16_t DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */ + uint16_t : 2; + volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */ + volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */ uint16_t : 6; } DPUSR2R_b; }; @@ -915,7 +899,7 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */ struct { - volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ + volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */ uint16_t : 14; } DPUSRCR_b; @@ -927,22 +911,19 @@ typedef struct TU_ATTR_PACKED { DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */ struct { - volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ - volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ - uint32_t : 1; - volatile uint32_t DRPD0 : 1; /* [3..3] D+/D- Pull-Down Resistor Control */ - volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */ - uint32_t : 11; - volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */ - volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */ - uint32_t : 2; - volatile const uint32_t - DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */ - volatile const uint32_t - DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */ - uint32_t : 1; - volatile const uint32_t - DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */ + volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ + volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ + uint32_t : 1; + volatile uint32_t DRPD0 : 1; /* [3..3] D+/D- Pull-Down Resistor Control */ + volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */ + uint32_t : 11; + volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */ + volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */ + uint32_t : 2; + volatile const uint32_t DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */ + volatile const uint32_t DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */ + uint32_t : 1; + volatile const uint32_t DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */ uint32_t : 8; } DPUSR0R_FS_b; }; @@ -951,88 +932,26 @@ typedef struct TU_ATTR_PACKED { volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */ struct { - volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ - volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ - uint32_t : 2; - volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */ - volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */ - uint32_t : 1; - volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */ - uint32_t : 8; - volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */ - volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */ - uint32_t : 2; + volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ + volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ + uint32_t : 2; + volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */ + volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */ + uint32_t : 1; + volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */ + uint32_t : 8; + volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */ + volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */ + uint32_t : 2; volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */ volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */ - uint32_t : 1; - volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */ + uint32_t : 1; + volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */ uint32_t : 8; } DPUSR1R_FS_b; }; } LINK_REG_t; /* Size = 1032 (0x408) */ -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT) == 0x00000002, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0) == 0x00000004, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA) == 0x00000006, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0) == 0x00000008, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE) == 0x0000000C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO) == 0x00000014, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO) == 0x00000018, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO) == 0x0000001C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL) == 0x00000020, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR) == 0x00000022, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL) == 0x00000028, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR) == 0x0000002A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL) == 0x0000002C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR) == 0x0000002E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0) == 0x00000030, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1) == 0x00000032, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB) == 0x00000036, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB) == 0x00000038, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB) == 0x0000003A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG) == 0x0000003C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET) == 0x0000003E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0) == 0x00000040, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1) == 0x00000042, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS) == 0x00000046, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS) == 0x00000048, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS) == 0x0000004A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM) == 0x0000004C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM) == 0x0000004E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR) == 0x00000050, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ) == 0x00000054, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL) == 0x00000056, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX) == 0x00000058, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG) == 0x0000005A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG) == 0x0000005C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP) == 0x0000005E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR) == 0x00000060, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL) == 0x00000064, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG) == 0x00000068, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP) == 0x0000006C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI) == 0x0000006E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR) == 0x00000070, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR) == 0x00000090, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0) == 0x000000B0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL) == 0x000000C4, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC) == 0x000000CC, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD) == 0x000000D0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW) == 0x000000F0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL) == 0x00000100, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS) == 0x00000102, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL) == 0x00000140, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1) == 0x00000144, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2) == 0x00000146, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1) == 0x00000148, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2) == 0x0000014A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R) == 0x00000160, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R) == 0x00000164, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R) == 0x00000168, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR) == 0x0000016A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset"); - TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */ TU_ATTR_BIT_FIELD_ORDER_END @@ -1040,582 +959,708 @@ TU_ATTR_BIT_FIELD_ORDER_END /* Register Bit Definitions */ /*--------------------------------------------------------------------*/ -/* PIPE_TR */ -/* E */ -#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL) /* TRENB (Bit 9) */ -#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL) /* TRCLR (Bit 8) */ -#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */ -/* N */ -#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL) /* TRNCNT (Bit 0) */ -#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */ +// PIPE_TR +// E +#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL) /* TRENB (Bit 9) */ +#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL) /* TRCLR (Bit 8) */ +#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */ -/* LINK_REG */ -/* SYSCFG */ -#define LINK_REG_SYSCFG_SCKE_Pos (10UL) /* SCKE (Bit 10) */ -#define LINK_REG_SYSCFG_SCKE_Msk (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_CNEN_Pos (8UL) /* CNEN (Bit 8) */ -#define LINK_REG_SYSCFG_CNEN_Msk (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DCFM_Pos (6UL) /* DCFM (Bit 6) */ -#define LINK_REG_SYSCFG_DCFM_Msk (0x40UL) /* DCFM (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DRPD_Pos (5UL) /* DRPD (Bit 5) */ -#define LINK_REG_SYSCFG_DRPD_Msk (0x20UL) /* DRPD (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DPRPU_Pos (4UL) /* DPRPU (Bit 4) */ -#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL) /* DPRPU (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DMRPU_Pos (3UL) /* DMRPU (Bit 3) */ -#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL) /* DMRPU (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_USBE_Pos (0UL) /* USBE (Bit 0) */ -#define LINK_REG_SYSCFG_USBE_Msk (0x1UL) /* USBE (Bitfield-Mask: 0x01) */ -/* BUSWAIT */ -#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL) /* BWAIT (Bit 0) */ -#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */ -/* SYSSTS0 */ -#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL) /* OVCMON (Bit 14) */ -#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */ -#define LINK_REG_SYSSTS0_HTACT_Pos (6UL) /* HTACT (Bit 6) */ -#define LINK_REG_SYSSTS0_HTACT_Msk (0x40UL) /* HTACT (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_SOFEA_Pos (5UL) /* SOFEA (Bit 5) */ -#define LINK_REG_SYSSTS0_SOFEA_Msk (0x20UL) /* SOFEA (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_IDMON_Pos (2UL) /* IDMON (Bit 2) */ -#define LINK_REG_SYSSTS0_IDMON_Msk (0x4UL) /* IDMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_LNST_Pos (0UL) /* LNST (Bit 0) */ -#define LINK_REG_SYSSTS0_LNST_Msk (0x3UL) /* LNST (Bitfield-Mask: 0x03) */ -/* PLLSTA */ -#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL) /* PLLLOCK (Bit 0) */ -#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */ -/* DVSTCTR0 */ -#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL) /* HNPBTOA (Bit 11) */ -#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_EXICEN_Pos (10UL) /* EXICEN (Bit 10) */ -#define LINK_REG_DVSTCTR0_EXICEN_Msk (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_VBUSEN_Pos (9UL) /* VBUSEN (Bit 9) */ -#define LINK_REG_DVSTCTR0_VBUSEN_Msk (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_WKUP_Pos (8UL) /* WKUP (Bit 8) */ -#define LINK_REG_DVSTCTR0_WKUP_Msk (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RWUPE_Pos (7UL) /* RWUPE (Bit 7) */ -#define LINK_REG_DVSTCTR0_RWUPE_Msk (0x80UL) /* RWUPE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_USBRST_Pos (6UL) /* USBRST (Bit 6) */ -#define LINK_REG_DVSTCTR0_USBRST_Msk (0x40UL) /* USBRST (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RESUME_Pos (5UL) /* RESUME (Bit 5) */ -#define LINK_REG_DVSTCTR0_RESUME_Msk (0x20UL) /* RESUME (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_UACT_Pos (4UL) /* UACT (Bit 4) */ -#define LINK_REG_DVSTCTR0_UACT_Msk (0x10UL) /* UACT (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RHST_Pos (0UL) /* RHST (Bit 0) */ -#define LINK_REG_DVSTCTR0_RHST_Msk (0x7UL) /* RHST (Bitfield-Mask: 0x07) */ -/* TESTMODE */ -#define LINK_REG_TESTMODE_UTST_Pos (0UL) /* UTST (Bit 0) */ -#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */ -/* CFIFOSEL */ -#define LINK_REG_CFIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_CFIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_CFIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_CFIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_CFIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_CFIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_ISEL_Pos (5UL) /* ISEL (Bit 5) */ -#define LINK_REG_CFIFOSEL_ISEL_Msk (0x20UL) /* ISEL (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ -/* CFIFOCTR */ -#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ -/* D0FIFOSEL */ -#define LINK_REG_D0FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_D0FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_D0FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ -#define LINK_REG_D0FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ -#define LINK_REG_D0FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_D0FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_D0FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_D0FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ -/* D0FIFOCTR */ -#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ -/* D1FIFOSEL */ -#define LINK_REG_D1FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_D1FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_D1FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ -#define LINK_REG_D1FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ -#define LINK_REG_D1FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_D1FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_D1FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_D1FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ -/* D1FIFOCTR */ -#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ -/* INTENB0 */ -#define LINK_REG_INTENB0_VBSE_Pos (15UL) /* VBSE (Bit 15) */ -#define LINK_REG_INTENB0_VBSE_Msk (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_RSME_Pos (14UL) /* RSME (Bit 14) */ -#define LINK_REG_INTENB0_RSME_Msk (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_SOFE_Pos (13UL) /* SOFE (Bit 13) */ -#define LINK_REG_INTENB0_SOFE_Msk (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_DVSE_Pos (12UL) /* DVSE (Bit 12) */ -#define LINK_REG_INTENB0_DVSE_Msk (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_CTRE_Pos (11UL) /* CTRE (Bit 11) */ -#define LINK_REG_INTENB0_CTRE_Msk (0x800UL) /* CTRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_BEMPE_Pos (10UL) /* BEMPE (Bit 10) */ -#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL) /* BEMPE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_NRDYE_Pos (9UL) /* NRDYE (Bit 9) */ -#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL) /* NRDYE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_BRDYE_Pos (8UL) /* BRDYE (Bit 8) */ -#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL) /* BRDYE (Bitfield-Mask: 0x01) */ -/* INTENB1 */ -#define LINK_REG_INTENB1_OVRCRE_Pos (15UL) /* OVRCRE (Bit 15) */ -#define LINK_REG_INTENB1_OVRCRE_Msk (0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_BCHGE_Pos (14UL) /* BCHGE (Bit 14) */ -#define LINK_REG_INTENB1_BCHGE_Msk (0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_DTCHE_Pos (12UL) /* DTCHE (Bit 12) */ -#define LINK_REG_INTENB1_DTCHE_Msk (0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_ATTCHE_Pos (11UL) /* ATTCHE (Bit 11) */ -#define LINK_REG_INTENB1_ATTCHE_Msk (0x800UL) /* ATTCHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_EOFERRE_Pos (6UL) /* EOFERRE (Bit 6) */ -#define LINK_REG_INTENB1_EOFERRE_Msk (0x40UL) /* EOFERRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_SIGNE_Pos (5UL) /* SIGNE (Bit 5) */ -#define LINK_REG_INTENB1_SIGNE_Msk (0x20UL) /* SIGNE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_SACKE_Pos (4UL) /* SACKE (Bit 4) */ -#define LINK_REG_INTENB1_SACKE_Msk (0x10UL) /* SACKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL) /* PDDETINTE0 (Bit 0) */ -#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL) /* PDDETINTE0 (Bitfield-Mask: 0x01) */ -/* BRDYENB */ -#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL) /* PIPEBRDYE (Bit 0) */ -#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */ -/* NRDYENB */ -#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL) /* PIPENRDYE (Bit 0) */ -#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */ -/* BEMPENB */ -#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL) /* PIPEBEMPE (Bit 0) */ -#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */ -/* SOFCFG */ -#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL) /* TRNENSEL (Bit 8) */ -#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_BRDYM_Pos (6UL) /* BRDYM (Bit 6) */ -#define LINK_REG_SOFCFG_BRDYM_Msk (0x40UL) /* BRDYM (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_INTL_Pos (5UL) /* INTL (Bit 5) */ -#define LINK_REG_SOFCFG_INTL_Msk (0x20UL) /* INTL (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_EDGESTS_Pos (4UL) /* EDGESTS (Bit 4) */ -#define LINK_REG_SOFCFG_EDGESTS_Msk (0x10UL) /* EDGESTS (Bitfield-Mask: 0x01) */ -/* PHYSET */ -#define LINK_REG_PHYSET_HSEB_Pos (15UL) /* HSEB (Bit 15) */ -#define LINK_REG_PHYSET_HSEB_Msk (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_REPSTART_Pos (11UL) /* REPSTART (Bit 11) */ -#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL) /* REPSTART (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_REPSEL_Pos (8UL) /* REPSEL (Bit 8) */ -#define LINK_REG_PHYSET_REPSEL_Msk (0x300UL) /* REPSEL (Bitfield-Mask: 0x03) */ -#define LINK_REG_PHYSET_CLKSEL_Pos (4UL) /* CLKSEL (Bit 4) */ -#define LINK_REG_PHYSET_CLKSEL_Msk (0x30UL) /* CLKSEL (Bitfield-Mask: 0x03) */ -#define LINK_REG_PHYSET_CDPEN_Pos (3UL) /* CDPEN (Bit 3) */ -#define LINK_REG_PHYSET_CDPEN_Msk (0x8UL) /* CDPEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_PLLRESET_Pos (1UL) /* PLLRESET (Bit 1) */ -#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL) /* PLLRESET (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_DIRPD_Pos (0UL) /* DIRPD (Bit 0) */ -#define LINK_REG_PHYSET_DIRPD_Msk (0x1UL) /* DIRPD (Bitfield-Mask: 0x01) */ -/* INTSTS0 */ -#define LINK_REG_INTSTS0_VBINT_Pos (15UL) /* VBINT (Bit 15) */ -#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_RESM_Pos (14UL) /* RESM (Bit 14) */ -#define LINK_REG_INTSTS0_RESM_Msk (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_SOFR_Pos (13UL) /* SOFR (Bit 13) */ -#define LINK_REG_INTSTS0_SOFR_Msk (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_DVST_Pos (12UL) /* DVST (Bit 12) */ -#define LINK_REG_INTSTS0_DVST_Msk (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_CTRT_Pos (11UL) /* CTRT (Bit 11) */ -#define LINK_REG_INTSTS0_CTRT_Msk (0x800UL) /* CTRT (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_BEMP_Pos (10UL) /* BEMP (Bit 10) */ -#define LINK_REG_INTSTS0_BEMP_Msk (0x400UL) /* BEMP (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_NRDY_Pos (9UL) /* NRDY (Bit 9) */ -#define LINK_REG_INTSTS0_NRDY_Msk (0x200UL) /* NRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_BRDY_Pos (8UL) /* BRDY (Bit 8) */ -#define LINK_REG_INTSTS0_BRDY_Msk (0x100UL) /* BRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_VBSTS_Pos (7UL) /* VBSTS (Bit 7) */ -#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL) /* VBSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ -#define LINK_REG_INTSTS0_DVSQ_Msk (0x70UL) /* DVSQ (Bitfield-Mask: 0x07) */ -#define LINK_REG_INTSTS0_VALID_Pos (3UL) /* VALID (Bit 3) */ -#define LINK_REG_INTSTS0_VALID_Msk (0x8UL) /* VALID (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_CTSQ_Pos (0UL) /* CTSQ (Bit 0) */ -#define LINK_REG_INTSTS0_CTSQ_Msk (0x7UL) /* CTSQ (Bitfield-Mask: 0x07) */ -/* INTSTS1 */ -#define LINK_REG_INTSTS1_OVRCR_Pos (15UL) /* OVRCR (Bit 15) */ -#define LINK_REG_INTSTS1_OVRCR_Msk (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_BCHG_Pos (14UL) /* BCHG (Bit 14) */ -#define LINK_REG_INTSTS1_BCHG_Msk (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_DTCH_Pos (12UL) /* DTCH (Bit 12) */ -#define LINK_REG_INTSTS1_DTCH_Msk (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ -#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_L1RSMEND_Pos (9UL) /* L1RSMEND (Bit 9) */ -#define LINK_REG_INTSTS1_L1RSMEND_Msk (0x200UL) /* L1RSMEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_LPMEND_Pos (8UL) /* LPMEND (Bit 8) */ -#define LINK_REG_INTSTS1_LPMEND_Msk (0x100UL) /* LPMEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_EOFERR_Pos (6UL) /* EOFERR (Bit 6) */ -#define LINK_REG_INTSTS1_EOFERR_Msk (0x40UL) /* EOFERR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_SIGN_Pos (5UL) /* SIGN (Bit 5) */ -#define LINK_REG_INTSTS1_SIGN_Msk (0x20UL) /* SIGN (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_SACK_Pos (4UL) /* SACK (Bit 4) */ -#define LINK_REG_INTSTS1_SACK_Msk (0x10UL) /* SACK (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL) /* PDDETINT0 (Bit 0) */ -#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL) /* PDDETINT0 (Bitfield-Mask: 0x01) */ -/* BRDYSTS */ -#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL) /* PIPEBRDY (Bit 0) */ -#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */ -/* NRDYSTS */ -#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL) /* PIPENRDY (Bit 0) */ -#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */ -/* BEMPSTS */ -#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL) /* PIPEBEMP (Bit 0) */ -#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */ -/* FRMNUM */ -#define LINK_REG_FRMNUM_OVRN_Pos (15UL) /* OVRN (Bit 15) */ -#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */ -#define LINK_REG_FRMNUM_CRCE_Pos (14UL) /* CRCE (Bit 14) */ -#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_FRMNUM_FRNM_Pos (0UL) /* FRNM (Bit 0) */ -#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL) /* FRNM (Bitfield-Mask: 0x7ff) */ -/* UFRMNUM */ -#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL) /* DVCHG (Bit 15) */ -#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */ -#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL) /* UFRNM (Bit 0) */ -#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL) /* UFRNM (Bitfield-Mask: 0x07) */ -/* USBADDR */ -#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL) /* STSRECOV0 (Bit 8) */ -#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */ -#define LINK_REG_USBADDR_USBADDR_Pos (0UL) /* USBADDR (Bit 0) */ -#define LINK_REG_USBADDR_USBADDR_Msk (0x7fUL) /* USBADDR (Bitfield-Mask: 0x7f) */ -/* USBREQ */ -#define LINK_REG_USBREQ_BREQUEST_Pos (8UL) /* BREQUEST (Bit 8) */ -#define LINK_REG_USBREQ_BREQUEST_Msk (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */ -#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL) /* BMREQUESTTYPE (Bit 0) */ -#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL) /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */ -/* USBVAL */ -#define LINK_REG_USBVAL_WVALUE_Pos (0UL) /* WVALUE (Bit 0) */ -#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */ -/* USBINDX */ -#define LINK_REG_USBINDX_WINDEX_Pos (0UL) /* WINDEX (Bit 0) */ -#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */ -/* USBLENG */ -#define LINK_REG_USBLENG_WLENGTH_Pos (0UL) /* WLENGTH (Bit 0) */ -#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */ -/* DCPCFG */ -#define LINK_REG_DCPCFG_CNTMD_Pos (8UL) /* CNTMD (Bit 8) */ -#define LINK_REG_DCPCFG_CNTMD_Msk (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ -#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCFG_DIR_Pos (4UL) /* DIR (Bit 4) */ -#define LINK_REG_DCPCFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ -/* DCPMAXP */ -#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ -#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ -#define LINK_REG_DCPMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ -#define LINK_REG_DCPMAXP_MXPS_Msk (0x7fUL) /* MXPS (Bitfield-Mask: 0x7f) */ -/* DCPCTR */ -#define LINK_REG_DCPCTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ -#define LINK_REG_DCPCTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SUREQ_Pos (14UL) /* SUREQ (Bit 14) */ -#define LINK_REG_DCPCTR_SUREQ_Msk (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL) /* SUREQCLR (Bit 11) */ -#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL) /* SUREQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ -#define LINK_REG_DCPCTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ -#define LINK_REG_DCPCTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ -#define LINK_REG_DCPCTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ -#define LINK_REG_DCPCTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_CCPL_Pos (2UL) /* CCPL (Bit 2) */ -#define LINK_REG_DCPCTR_CCPL_Msk (0x4UL) /* CCPL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_PID_Pos (0UL) /* PID (Bit 0) */ -#define LINK_REG_DCPCTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ -/* PIPESEL */ -#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL) /* PIPESEL (Bit 0) */ -#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */ -/* PIPECFG */ -#define LINK_REG_PIPECFG_TYPE_Pos (14UL) /* TYPE (Bit 14) */ -#define LINK_REG_PIPECFG_TYPE_Msk (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */ -#define LINK_REG_PIPECFG_BFRE_Pos (10UL) /* BFRE (Bit 10) */ -#define LINK_REG_PIPECFG_BFRE_Msk (0x400UL) /* BFRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_DBLB_Pos (9UL) /* DBLB (Bit 9) */ -#define LINK_REG_PIPECFG_DBLB_Msk (0x200UL) /* DBLB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ -#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_DIR_Pos (4UL) /* DIR (Bit 4) */ -#define LINK_REG_PIPECFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_EPNUM_Pos (0UL) /* EPNUM (Bit 0) */ -#define LINK_REG_PIPECFG_EPNUM_Msk (0xfUL) /* EPNUM (Bitfield-Mask: 0x0f) */ -/* PIPEMAXP */ -#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ -#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PIPEMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ -#define LINK_REG_PIPEMAXP_MXPS_Msk (0x1ffUL) /* MXPS (Bitfield-Mask: 0x1ff) */ -/* PIPEPERI */ -#define LINK_REG_PIPEPERI_IFIS_Pos (12UL) /* IFIS (Bit 12) */ -#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPEPERI_IITV_Pos (0UL) /* IITV (Bit 0) */ -#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL) /* IITV (Bitfield-Mask: 0x07) */ -/* PIPE_CTR */ -#define LINK_REG_PIPE_CTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ -#define LINK_REG_PIPE_CTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL) /* INBUFM (Bit 14) */ -#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_CSCLR_Pos (13UL) /* CSCLR (Bit 13) */ -#define LINK_REG_PIPE_CTR_CSCLR_Msk (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_CSSTS_Pos (12UL) /* CSSTS (Bit 12) */ -#define LINK_REG_PIPE_CTR_CSSTS_Msk (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL) /* ATREPM (Bit 10) */ -#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL) /* ATREPM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_ACLRM_Pos (9UL) /* ACLRM (Bit 9) */ -#define LINK_REG_PIPE_CTR_ACLRM_Msk (0x200UL) /* ACLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ -#define LINK_REG_PIPE_CTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ -#define LINK_REG_PIPE_CTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ -#define LINK_REG_PIPE_CTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ -#define LINK_REG_PIPE_CTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_PID_Pos (0UL) /* PID (Bit 0) */ -#define LINK_REG_PIPE_CTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ -/* DEVADD */ -#define LINK_REG_DEVADD_UPPHUB_Pos (11UL) /* UPPHUB (Bit 11) */ -#define LINK_REG_DEVADD_UPPHUB_Msk (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */ -#define LINK_REG_DEVADD_HUBPORT_Pos (8UL) /* HUBPORT (Bit 8) */ -#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL) /* HUBPORT (Bitfield-Mask: 0x07) */ -#define LINK_REG_DEVADD_USBSPD_Pos (6UL) /* USBSPD (Bit 6) */ -#define LINK_REG_DEVADD_USBSPD_Msk (0xc0UL) /* USBSPD (Bitfield-Mask: 0x03) */ -/* USBBCCTRL0 */ -#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos (9UL) /* PDDETSTS0 (Bit 9) */ -#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL) /* CHGDETSTS0 (Bit 8) */ -#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos (7UL) /* BATCHGE0 (Bit 7) */ -#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk (0x80UL) /* BATCHGE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos (5UL) /* VDMSRCE0 (Bit 5) */ -#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk (0x20UL) /* VDMSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos (4UL) /* IDPSINKE0 (Bit 4) */ -#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk (0x10UL) /* IDPSINKE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos (3UL) /* VDPSRCE0 (Bit 3) */ -#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk (0x8UL) /* VDPSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos (2UL) /* IDMSINKE0 (Bit 2) */ -#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk (0x4UL) /* IDMSINKE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos (1UL) /* IDPSRCE0 (Bit 1) */ -#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk (0x2UL) /* IDPSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_RPDME0_Pos (0UL) /* RPDME0 (Bit 0) */ -#define LINK_REG_USBBCCTRL0_RPDME0_Msk (0x1UL) /* RPDME0 (Bitfield-Mask: 0x01) */ -/* UCKSEL */ -#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL) /* UCKSELC (Bit 0) */ -#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */ -/* USBMC */ -#define LINK_REG_USBMC_VDCEN_Pos (7UL) /* VDCEN (Bit 7) */ -#define LINK_REG_USBMC_VDCEN_Msk (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBMC_VDDUSBE_Pos (0UL) /* VDDUSBE (Bit 0) */ -#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL) /* VDDUSBE (Bitfield-Mask: 0x01) */ -/* PHYSLEW */ -#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL) /* SLEWF01 (Bit 3) */ -#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL) /* SLEWF00 (Bit 2) */ -#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL) /* SLEWR01 (Bit 1) */ -#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL) /* SLEWR00 (Bit 0) */ -#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */ -/* LPCTRL */ -#define LINK_REG_LPCTRL_HWUPM_Pos (7UL) /* HWUPM (Bit 7) */ -#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */ -/* LPSTS */ -#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL) /* SUSPENDM (Bit 14) */ -#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */ -/* BCCTRL */ -#define LINK_REG_BCCTRL_PDDETSTS_Pos (9UL) /* PDDETSTS (Bit 9) */ -#define LINK_REG_BCCTRL_PDDETSTS_Msk (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL) /* CHGDETSTS (Bit 8) */ -#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_DCPMODE_Pos (5UL) /* DCPMODE (Bit 5) */ -#define LINK_REG_BCCTRL_DCPMODE_Msk (0x20UL) /* DCPMODE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_VDMSRCE_Pos (4UL) /* VDMSRCE (Bit 4) */ -#define LINK_REG_BCCTRL_VDMSRCE_Msk (0x10UL) /* VDMSRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDPSINKE_Pos (3UL) /* IDPSINKE (Bit 3) */ -#define LINK_REG_BCCTRL_IDPSINKE_Msk (0x8UL) /* IDPSINKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_VDPSRCE_Pos (2UL) /* VDPSRCE (Bit 2) */ -#define LINK_REG_BCCTRL_VDPSRCE_Msk (0x4UL) /* VDPSRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDMSINKE_Pos (1UL) /* IDMSINKE (Bit 1) */ -#define LINK_REG_BCCTRL_IDMSINKE_Msk (0x2UL) /* IDMSINKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDPSRCE_Pos (0UL) /* IDPSRCE (Bit 0) */ -#define LINK_REG_BCCTRL_IDPSRCE_Msk (0x1UL) /* IDPSRCE (Bitfield-Mask: 0x01) */ -/* PL1CTRL1 */ -#define LINK_REG_PL1CTRL1_L1EXTMD_Pos (14UL) /* L1EXTMD (Bit 14) */ -#define LINK_REG_PL1CTRL1_L1EXTMD_Msk (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL1_HIRDTHR_Pos (8UL) /* HIRDTHR (Bit 8) */ -#define LINK_REG_PL1CTRL1_HIRDTHR_Msk (0xf00UL) /* HIRDTHR (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PL1CTRL1_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ -#define LINK_REG_PL1CTRL1_DVSQ_Msk (0xf0UL) /* DVSQ (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL) /* L1NEGOMD (Bit 3) */ -#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL) /* L1NEGOMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL) /* L1RESPMD (Bit 1) */ -#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL) /* L1RESPMD (Bitfield-Mask: 0x03) */ -#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL) /* L1RESPEN (Bit 0) */ -#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL) /* L1RESPEN (Bitfield-Mask: 0x01) */ -/* PL1CTRL2 */ -#define LINK_REG_PL1CTRL2_RWEMON_Pos (12UL) /* RWEMON (Bit 12) */ -#define LINK_REG_PL1CTRL2_RWEMON_Msk (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL) /* HIRDMON (Bit 8) */ -#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL) /* HIRDMON (Bitfield-Mask: 0x0f) */ -/* HL1CTRL1 */ -#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL) /* L1STATUS (Bit 1) */ -#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */ -#define LINK_REG_HL1CTRL1_L1REQ_Pos (0UL) /* L1REQ (Bit 0) */ -#define LINK_REG_HL1CTRL1_L1REQ_Msk (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */ -/* HL1CTRL2 */ -#define LINK_REG_HL1CTRL2_BESL_Pos (15UL) /* BESL (Bit 15) */ -#define LINK_REG_HL1CTRL2_BESL_Msk (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */ -#define LINK_REG_HL1CTRL2_L1RWE_Pos (12UL) /* L1RWE (Bit 12) */ -#define LINK_REG_HL1CTRL2_L1RWE_Msk (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */ -#define LINK_REG_HL1CTRL2_HIRD_Pos (8UL) /* HIRD (Bit 8) */ -#define LINK_REG_HL1CTRL2_HIRD_Msk (0xf00UL) /* HIRD (Bitfield-Mask: 0x0f) */ -#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL) /* L1ADDR (Bit 0) */ -#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL) /* L1ADDR (Bitfield-Mask: 0x0f) */ -/* DPUSR0R */ -#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL) /* DVBSTSHM (Bit 23) */ -#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_DOVCBHM_Pos (21UL) /* DOVCBHM (Bit 21) */ -#define LINK_REG_DPUSR0R_DOVCBHM_Msk (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_DOVCAHM_Pos (20UL) /* DOVCAHM (Bit 20) */ -#define LINK_REG_DPUSR0R_DOVCAHM_Msk (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */ -/* DPUSR1R */ -#define LINK_REG_DPUSR1R_DVBSTSH_Pos (23UL) /* DVBSTSH (Bit 23) */ -#define LINK_REG_DPUSR1R_DVBSTSH_Msk (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCBH_Pos (21UL) /* DOVCBH (Bit 21) */ -#define LINK_REG_DPUSR1R_DOVCBH_Msk (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCAH_Pos (20UL) /* DOVCAH (Bit 20) */ -#define LINK_REG_DPUSR1R_DOVCAH_Msk (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL) /* DVBSTSHE (Bit 7) */ -#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL) /* DVBSTSHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCBHE_Pos (5UL) /* DOVCBHE (Bit 5) */ -#define LINK_REG_DPUSR1R_DOVCBHE_Msk (0x20UL) /* DOVCBHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCAHE_Pos (4UL) /* DOVCAHE (Bit 4) */ -#define LINK_REG_DPUSR1R_DOVCAHE_Msk (0x10UL) /* DOVCAHE (Bitfield-Mask: 0x01) */ -/* DPUSR2R */ -#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL) /* DMINTE (Bit 9) */ -#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL) /* DPINTE (Bit 8) */ -#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DMVAL_Pos (5UL) /* DMVAL (Bit 5) */ -#define LINK_REG_DPUSR2R_DMVAL_Msk (0x20UL) /* DMVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPVAL_Pos (4UL) /* DPVAL (Bit 4) */ -#define LINK_REG_DPUSR2R_DPVAL_Msk (0x10UL) /* DPVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DMINT_Pos (1UL) /* DMINT (Bit 1) */ -#define LINK_REG_DPUSR2R_DMINT_Msk (0x2UL) /* DMINT (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPINT_Pos (0UL) /* DPINT (Bit 0) */ -#define LINK_REG_DPUSR2R_DPINT_Msk (0x1UL) /* DPINT (Bitfield-Mask: 0x01) */ -/* DPUSRCR */ -#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL) /* FIXPHYPD (Bit 1) */ -#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSRCR_FIXPHY_Pos (0UL) /* FIXPHY (Bit 0) */ -#define LINK_REG_DPUSRCR_FIXPHY_Msk (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */ -/* DPUSR0R_FS */ -#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL) /* DVBSTS0 (Bit 23) */ -#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos (21UL) /* DOVCB0 (Bit 21) */ -#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos (20UL) /* DOVCA0 (Bit 20) */ -#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DM0_Pos (17UL) /* DM0 (Bit 17) */ -#define LINK_REG_DPUSR0R_FS_DM0_Msk (0x20000UL) /* DM0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DP0_Pos (16UL) /* DP0 (Bit 16) */ -#define LINK_REG_DPUSR0R_FS_DP0_Msk (0x10000UL) /* DP0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL) /* FIXPHY0 (Bit 4) */ -#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL) /* FIXPHY0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DRPD0_Pos (3UL) /* DRPD0 (Bit 3) */ -#define LINK_REG_DPUSR0R_FS_DRPD0_Msk (0x8UL) /* DRPD0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_RPUE0_Pos (1UL) /* RPUE0 (Bit 1) */ -#define LINK_REG_DPUSR0R_FS_RPUE0_Msk (0x2UL) /* RPUE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_SRPC0_Pos (0UL) /* SRPC0 (Bit 0) */ -#define LINK_REG_DPUSR0R_FS_SRPC0_Msk (0x1UL) /* SRPC0 (Bitfield-Mask: 0x01) */ -/* DPUSR1R_FS */ -#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos (23UL) /* DVBINT0 (Bit 23) */ -#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos (21UL) /* DOVRCRB0 (Bit 21) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos (20UL) /* DOVRCRA0 (Bit 20) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DMINT0_Pos (17UL) /* DMINT0 (Bit 17) */ -#define LINK_REG_DPUSR1R_FS_DMINT0_Msk (0x20000UL) /* DMINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DPINT0_Pos (16UL) /* DPINT0 (Bit 16) */ -#define LINK_REG_DPUSR1R_FS_DPINT0_Msk (0x10000UL) /* DPINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos (7UL) /* DVBSE0 (Bit 7) */ -#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk (0x80UL) /* DVBSE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL) /* DOVRCRBE0 (Bit 5) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL) /* DOVRCRBE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL) /* DOVRCRAE0 (Bit 4) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL) /* DOVRCRAE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos (1UL) /* DMINTE0 (Bit 1) */ -#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk (0x2UL) /* DMINTE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ -#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ +// N +#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL) /* TRNCNT (Bit 0) */ +#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */ + +// LINK_REG + +// SYSCFG +#define LINK_REG_SYSCFG_SCKE_Pos (10UL) /* SCKE (Bit 10) */ +#define LINK_REG_SYSCFG_SCKE_Msk (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_CNEN_Pos (8UL) /* CNEN (Bit 8) */ +#define LINK_REG_SYSCFG_CNEN_Msk (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DCFM_Pos (6UL) /* DCFM (Bit 6) */ +#define LINK_REG_SYSCFG_DCFM_Msk (0x40UL) /* DCFM (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DRPD_Pos (5UL) /* DRPD (Bit 5) */ +#define LINK_REG_SYSCFG_DRPD_Msk (0x20UL) /* DRPD (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DPRPU_Pos (4UL) /* DPRPU (Bit 4) */ +#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL) /* DPRPU (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_DMRPU_Pos (3UL) /* DMRPU (Bit 3) */ +#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL) /* DMRPU (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSCFG_USBE_Pos (0UL) /* USBE (Bit 0) */ +#define LINK_REG_SYSCFG_USBE_Msk (0x1UL) /* USBE (Bitfield-Mask: 0x01) */ + +// BUSWAIT +#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL) /* BWAIT (Bit 0) */ +#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */ + +// SYSSTS0 +#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL) /* OVCMON (Bit 14) */ +#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */ +#define LINK_REG_SYSSTS0_HTACT_Pos (6UL) /* HTACT (Bit 6) */ +#define LINK_REG_SYSSTS0_HTACT_Msk (0x40UL) /* HTACT (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_SOFEA_Pos (5UL) /* SOFEA (Bit 5) */ +#define LINK_REG_SYSSTS0_SOFEA_Msk (0x20UL) /* SOFEA (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_IDMON_Pos (2UL) /* IDMON (Bit 2) */ +#define LINK_REG_SYSSTS0_IDMON_Msk (0x4UL) /* IDMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_SYSSTS0_LNST_Pos (0UL) /* LNST (Bit 0) */ +#define LINK_REG_SYSSTS0_LNST_Msk (0x3UL) /* LNST (Bitfield-Mask: 0x03) */ + +// PLLSTA +#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL) /* PLLLOCK (Bit 0) */ +#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */ + +// DVSTCTR0 +#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL) /* HNPBTOA (Bit 11) */ +#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_EXICEN_Pos (10UL) /* EXICEN (Bit 10) */ +#define LINK_REG_DVSTCTR0_EXICEN_Msk (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_VBUSEN_Pos (9UL) /* VBUSEN (Bit 9) */ +#define LINK_REG_DVSTCTR0_VBUSEN_Msk (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_WKUP_Pos (8UL) /* WKUP (Bit 8) */ +#define LINK_REG_DVSTCTR0_WKUP_Msk (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RWUPE_Pos (7UL) /* RWUPE (Bit 7) */ +#define LINK_REG_DVSTCTR0_RWUPE_Msk (0x80UL) /* RWUPE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_USBRST_Pos (6UL) /* USBRST (Bit 6) */ +#define LINK_REG_DVSTCTR0_USBRST_Msk (0x40UL) /* USBRST (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RESUME_Pos (5UL) /* RESUME (Bit 5) */ +#define LINK_REG_DVSTCTR0_RESUME_Msk (0x20UL) /* RESUME (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_UACT_Pos (4UL) /* UACT (Bit 4) */ +#define LINK_REG_DVSTCTR0_UACT_Msk (0x10UL) /* UACT (Bitfield-Mask: 0x01) */ +#define LINK_REG_DVSTCTR0_RHST_Pos (0UL) /* RHST (Bit 0) */ +#define LINK_REG_DVSTCTR0_RHST_Msk (0x7UL) /* RHST (Bitfield-Mask: 0x07) */ + +// TESTMODE +#define LINK_REG_TESTMODE_UTST_Pos (0UL) /* UTST (Bit 0) */ +#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */ + +// CFIFOSEL +#define LINK_REG_CFIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_CFIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_CFIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_CFIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_CFIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_CFIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_ISEL_Pos (5UL) /* ISEL (Bit 5) */ +#define LINK_REG_CFIFOSEL_ISEL_Msk (0x20UL) /* ISEL (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ + +// CFIFOCTR +#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ + +// D0FIFOSEL +#define LINK_REG_D0FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_D0FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_D0FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define LINK_REG_D0FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define LINK_REG_D0FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_D0FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_D0FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_D0FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ + +// D0FIFOCTR +#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ + +// D1FIFOSEL +#define LINK_REG_D1FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define LINK_REG_D1FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define LINK_REG_D1FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define LINK_REG_D1FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define LINK_REG_D1FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define LINK_REG_D1FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define LINK_REG_D1FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define LINK_REG_D1FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ + +// D1FIFOCTR +#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ + +// INTENB0 +#define LINK_REG_INTENB0_VBSE_Pos (15UL) /* VBSE (Bit 15) */ +#define LINK_REG_INTENB0_VBSE_Msk (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_RSME_Pos (14UL) /* RSME (Bit 14) */ +#define LINK_REG_INTENB0_RSME_Msk (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_SOFE_Pos (13UL) /* SOFE (Bit 13) */ +#define LINK_REG_INTENB0_SOFE_Msk (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_DVSE_Pos (12UL) /* DVSE (Bit 12) */ +#define LINK_REG_INTENB0_DVSE_Msk (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_CTRE_Pos (11UL) /* CTRE (Bit 11) */ +#define LINK_REG_INTENB0_CTRE_Msk (0x800UL) /* CTRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_BEMPE_Pos (10UL) /* BEMPE (Bit 10) */ +#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL) /* BEMPE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_NRDYE_Pos (9UL) /* NRDYE (Bit 9) */ +#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL) /* NRDYE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB0_BRDYE_Pos (8UL) /* BRDYE (Bit 8) */ +#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL) /* BRDYE (Bitfield-Mask: 0x01) */ + +// INTENB1 +#define LINK_REG_INTENB1_OVRCRE_Pos (15UL) /* OVRCRE (Bit 15) */ +#define LINK_REG_INTENB1_OVRCRE_Msk (0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_BCHGE_Pos (14UL) /* BCHGE (Bit 14) */ +#define LINK_REG_INTENB1_BCHGE_Msk (0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_DTCHE_Pos (12UL) /* DTCHE (Bit 12) */ +#define LINK_REG_INTENB1_DTCHE_Msk (0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_ATTCHE_Pos (11UL) /* ATTCHE (Bit 11) */ +#define LINK_REG_INTENB1_ATTCHE_Msk (0x800UL) /* ATTCHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_EOFERRE_Pos (6UL) /* EOFERRE (Bit 6) */ +#define LINK_REG_INTENB1_EOFERRE_Msk (0x40UL) /* EOFERRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_SIGNE_Pos (5UL) /* SIGNE (Bit 5) */ +#define LINK_REG_INTENB1_SIGNE_Msk (0x20UL) /* SIGNE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_SACKE_Pos (4UL) /* SACKE (Bit 4) */ +#define LINK_REG_INTENB1_SACKE_Msk (0x10UL) /* SACKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL) /* PDDETINTE0 (Bit 0) */ +#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL) /* PDDETINTE0 (Bitfield-Mask: 0x01) */ + +// BRDYENB +#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL) /* PIPEBRDYE (Bit 0) */ +#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */ + +// NRDYENB +#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL) /* PIPENRDYE (Bit 0) */ +#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */ + +// BEMPENB +#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL) /* PIPEBEMPE (Bit 0) */ +#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */ + +// SOFCFG +#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL) /* TRNENSEL (Bit 8) */ +#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_BRDYM_Pos (6UL) /* BRDYM (Bit 6) */ +#define LINK_REG_SOFCFG_BRDYM_Msk (0x40UL) /* BRDYM (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_INTL_Pos (5UL) /* INTL (Bit 5) */ +#define LINK_REG_SOFCFG_INTL_Msk (0x20UL) /* INTL (Bitfield-Mask: 0x01) */ +#define LINK_REG_SOFCFG_EDGESTS_Pos (4UL) /* EDGESTS (Bit 4) */ +#define LINK_REG_SOFCFG_EDGESTS_Msk (0x10UL) /* EDGESTS (Bitfield-Mask: 0x01) */ + +// PHYSET +#define LINK_REG_PHYSET_HSEB_Pos (15UL) /* HSEB (Bit 15) */ +#define LINK_REG_PHYSET_HSEB_Msk (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_REPSTART_Pos (11UL) /* REPSTART (Bit 11) */ +#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL) /* REPSTART (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_REPSEL_Pos (8UL) /* REPSEL (Bit 8) */ +#define LINK_REG_PHYSET_REPSEL_Msk (0x300UL) /* REPSEL (Bitfield-Mask: 0x03) */ +#define LINK_REG_PHYSET_CLKSEL_Pos (4UL) /* CLKSEL (Bit 4) */ +#define LINK_REG_PHYSET_CLKSEL_Msk (0x30UL) /* CLKSEL (Bitfield-Mask: 0x03) */ +#define LINK_REG_PHYSET_CDPEN_Pos (3UL) /* CDPEN (Bit 3) */ +#define LINK_REG_PHYSET_CDPEN_Msk (0x8UL) /* CDPEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_PLLRESET_Pos (1UL) /* PLLRESET (Bit 1) */ +#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL) /* PLLRESET (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSET_DIRPD_Pos (0UL) /* DIRPD (Bit 0) */ +#define LINK_REG_PHYSET_DIRPD_Msk (0x1UL) /* DIRPD (Bitfield-Mask: 0x01) */ + +// INTSTS0 +#define LINK_REG_INTSTS0_VBINT_Pos (15UL) /* VBINT (Bit 15) */ +#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_RESM_Pos (14UL) /* RESM (Bit 14) */ +#define LINK_REG_INTSTS0_RESM_Msk (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_SOFR_Pos (13UL) /* SOFR (Bit 13) */ +#define LINK_REG_INTSTS0_SOFR_Msk (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_DVST_Pos (12UL) /* DVST (Bit 12) */ +#define LINK_REG_INTSTS0_DVST_Msk (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_CTRT_Pos (11UL) /* CTRT (Bit 11) */ +#define LINK_REG_INTSTS0_CTRT_Msk (0x800UL) /* CTRT (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_BEMP_Pos (10UL) /* BEMP (Bit 10) */ +#define LINK_REG_INTSTS0_BEMP_Msk (0x400UL) /* BEMP (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_NRDY_Pos (9UL) /* NRDY (Bit 9) */ +#define LINK_REG_INTSTS0_NRDY_Msk (0x200UL) /* NRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_BRDY_Pos (8UL) /* BRDY (Bit 8) */ +#define LINK_REG_INTSTS0_BRDY_Msk (0x100UL) /* BRDY (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_VBSTS_Pos (7UL) /* VBSTS (Bit 7) */ +#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL) /* VBSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define LINK_REG_INTSTS0_DVSQ_Msk (0x70UL) /* DVSQ (Bitfield-Mask: 0x07) */ +#define LINK_REG_INTSTS0_VALID_Pos (3UL) /* VALID (Bit 3) */ +#define LINK_REG_INTSTS0_VALID_Msk (0x8UL) /* VALID (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS0_CTSQ_Pos (0UL) /* CTSQ (Bit 0) */ +#define LINK_REG_INTSTS0_CTSQ_Msk (0x7UL) /* CTSQ (Bitfield-Mask: 0x07) */ + +// INTSTS1 +#define LINK_REG_INTSTS1_OVRCR_Pos (15UL) /* OVRCR (Bit 15) */ +#define LINK_REG_INTSTS1_OVRCR_Msk (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_BCHG_Pos (14UL) /* BCHG (Bit 14) */ +#define LINK_REG_INTSTS1_BCHG_Msk (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_DTCH_Pos (12UL) /* DTCH (Bit 12) */ +#define LINK_REG_INTSTS1_DTCH_Msk (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ +#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_L1RSMEND_Pos (9UL) /* L1RSMEND (Bit 9) */ +#define LINK_REG_INTSTS1_L1RSMEND_Msk (0x200UL) /* L1RSMEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_LPMEND_Pos (8UL) /* LPMEND (Bit 8) */ +#define LINK_REG_INTSTS1_LPMEND_Msk (0x100UL) /* LPMEND (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_EOFERR_Pos (6UL) /* EOFERR (Bit 6) */ +#define LINK_REG_INTSTS1_EOFERR_Msk (0x40UL) /* EOFERR (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_SIGN_Pos (5UL) /* SIGN (Bit 5) */ +#define LINK_REG_INTSTS1_SIGN_Msk (0x20UL) /* SIGN (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_SACK_Pos (4UL) /* SACK (Bit 4) */ +#define LINK_REG_INTSTS1_SACK_Msk (0x10UL) /* SACK (Bitfield-Mask: 0x01) */ +#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL) /* PDDETINT0 (Bit 0) */ +#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL) /* PDDETINT0 (Bitfield-Mask: 0x01) */ + +// BRDYSTS +#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL) /* PIPEBRDY (Bit 0) */ +#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */ + +// NRDYSTS +#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL) /* PIPENRDY (Bit 0) */ +#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */ + +// BEMPSTS +#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL) /* PIPEBEMP (Bit 0) */ +#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */ + +// FRMNUM +#define LINK_REG_FRMNUM_OVRN_Pos (15UL) /* OVRN (Bit 15) */ +#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */ +#define LINK_REG_FRMNUM_CRCE_Pos (14UL) /* CRCE (Bit 14) */ +#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_FRMNUM_FRNM_Pos (0UL) /* FRNM (Bit 0) */ +#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL) /* FRNM (Bitfield-Mask: 0x7ff) */ + +// UFRMNUM +#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL) /* DVCHG (Bit 15) */ +#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */ +#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL) /* UFRNM (Bit 0) */ +#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL) /* UFRNM (Bitfield-Mask: 0x07) */ + +// USBADDR +#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL) /* STSRECOV0 (Bit 8) */ +#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */ +#define LINK_REG_USBADDR_USBADDR_Pos (0UL) /* USBADDR (Bit 0) */ +#define LINK_REG_USBADDR_USBADDR_Msk (0x7fUL) /* USBADDR (Bitfield-Mask: 0x7f) */ + +// USBREQ +#define LINK_REG_USBREQ_BREQUEST_Pos (8UL) /* BREQUEST (Bit 8) */ +#define LINK_REG_USBREQ_BREQUEST_Msk (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */ +#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL) /* BMREQUESTTYPE (Bit 0) */ +#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL) /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */ + +// USBVAL +#define LINK_REG_USBVAL_WVALUE_Pos (0UL) /* WVALUE (Bit 0) */ +#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */ + +// USBINDX +#define LINK_REG_USBINDX_WINDEX_Pos (0UL) /* WINDEX (Bit 0) */ +#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */ + +// USBLENG +#define LINK_REG_USBLENG_WLENGTH_Pos (0UL) /* WLENGTH (Bit 0) */ +#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */ + +// DCPCFG +#define LINK_REG_DCPCFG_CNTMD_Pos (8UL) /* CNTMD (Bit 8) */ +#define LINK_REG_DCPCFG_CNTMD_Msk (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define LINK_REG_DCPCFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ + +// DCPMAXP +#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define LINK_REG_DCPMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define LINK_REG_DCPMAXP_MXPS_Msk (0x7fUL) /* MXPS (Bitfield-Mask: 0x7f) */ + +// DCPCTR +#define LINK_REG_DCPCTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define LINK_REG_DCPCTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SUREQ_Pos (14UL) /* SUREQ (Bit 14) */ +#define LINK_REG_DCPCTR_SUREQ_Msk (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL) /* SUREQCLR (Bit 11) */ +#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL) /* SUREQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define LINK_REG_DCPCTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define LINK_REG_DCPCTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define LINK_REG_DCPCTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define LINK_REG_DCPCTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_CCPL_Pos (2UL) /* CCPL (Bit 2) */ +#define LINK_REG_DCPCTR_CCPL_Msk (0x4UL) /* CCPL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DCPCTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define LINK_REG_DCPCTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ + +// PIPESEL +#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL) /* PIPESEL (Bit 0) */ +#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */ + +// PIPECFG +#define LINK_REG_PIPECFG_TYPE_Pos (14UL) /* TYPE (Bit 14) */ +#define LINK_REG_PIPECFG_TYPE_Msk (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */ +#define LINK_REG_PIPECFG_BFRE_Pos (10UL) /* BFRE (Bit 10) */ +#define LINK_REG_PIPECFG_BFRE_Msk (0x400UL) /* BFRE (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_DBLB_Pos (9UL) /* DBLB (Bit 9) */ +#define LINK_REG_PIPECFG_DBLB_Msk (0x200UL) /* DBLB (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define LINK_REG_PIPECFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPECFG_EPNUM_Pos (0UL) /* EPNUM (Bit 0) */ +#define LINK_REG_PIPECFG_EPNUM_Msk (0xfUL) /* EPNUM (Bitfield-Mask: 0x0f) */ + +// PIPEMAXP +#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PIPEMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define LINK_REG_PIPEMAXP_MXPS_Msk (0x1ffUL) /* MXPS (Bitfield-Mask: 0x1ff) */ + +// PIPEPERI +#define LINK_REG_PIPEPERI_IFIS_Pos (12UL) /* IFIS (Bit 12) */ +#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPEPERI_IITV_Pos (0UL) /* IITV (Bit 0) */ +#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL) /* IITV (Bitfield-Mask: 0x07) */ + +// PIPE_CTR +#define LINK_REG_PIPE_CTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define LINK_REG_PIPE_CTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL) /* INBUFM (Bit 14) */ +#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_CSCLR_Pos (13UL) /* CSCLR (Bit 13) */ +#define LINK_REG_PIPE_CTR_CSCLR_Msk (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_CSSTS_Pos (12UL) /* CSSTS (Bit 12) */ +#define LINK_REG_PIPE_CTR_CSSTS_Msk (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL) /* ATREPM (Bit 10) */ +#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL) /* ATREPM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_ACLRM_Pos (9UL) /* ACLRM (Bit 9) */ +#define LINK_REG_PIPE_CTR_ACLRM_Msk (0x200UL) /* ACLRM (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define LINK_REG_PIPE_CTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define LINK_REG_PIPE_CTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define LINK_REG_PIPE_CTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define LINK_REG_PIPE_CTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define LINK_REG_PIPE_CTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define LINK_REG_PIPE_CTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ + +// DEVADD +#define LINK_REG_DEVADD_UPPHUB_Pos (11UL) /* UPPHUB (Bit 11) */ +#define LINK_REG_DEVADD_UPPHUB_Msk (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */ +#define LINK_REG_DEVADD_HUBPORT_Pos (8UL) /* HUBPORT (Bit 8) */ +#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL) /* HUBPORT (Bitfield-Mask: 0x07) */ +#define LINK_REG_DEVADD_USBSPD_Pos (6UL) /* USBSPD (Bit 6) */ +#define LINK_REG_DEVADD_USBSPD_Msk (0xc0UL) /* USBSPD (Bitfield-Mask: 0x03) */ + +// USBBCCTRL0 +#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos (9UL) /* PDDETSTS0 (Bit 9) */ +#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL) /* CHGDETSTS0 (Bit 8) */ +#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos (7UL) /* BATCHGE0 (Bit 7) */ +#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk (0x80UL) /* BATCHGE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos (5UL) /* VDMSRCE0 (Bit 5) */ +#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk (0x20UL) /* VDMSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos (4UL) /* IDPSINKE0 (Bit 4) */ +#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk (0x10UL) /* IDPSINKE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos (3UL) /* VDPSRCE0 (Bit 3) */ +#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk (0x8UL) /* VDPSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos (2UL) /* IDMSINKE0 (Bit 2) */ +#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk (0x4UL) /* IDMSINKE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos (1UL) /* IDPSRCE0 (Bit 1) */ +#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk (0x2UL) /* IDPSRCE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBBCCTRL0_RPDME0_Pos (0UL) /* RPDME0 (Bit 0) */ +#define LINK_REG_USBBCCTRL0_RPDME0_Msk (0x1UL) /* RPDME0 (Bitfield-Mask: 0x01) */ + +// UCKSEL +#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL) /* UCKSELC (Bit 0) */ +#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */ + +// USBMC +#define LINK_REG_USBMC_VDCEN_Pos (7UL) /* VDCEN (Bit 7) */ +#define LINK_REG_USBMC_VDCEN_Msk (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */ +#define LINK_REG_USBMC_VDDUSBE_Pos (0UL) /* VDDUSBE (Bit 0) */ +#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL) /* VDDUSBE (Bitfield-Mask: 0x01) */ + +// PHYSLEW +#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL) /* SLEWF01 (Bit 3) */ +#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL) /* SLEWF00 (Bit 2) */ +#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL) /* SLEWR01 (Bit 1) */ +#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */ +#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL) /* SLEWR00 (Bit 0) */ +#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */ + +// LPCTRL +#define LINK_REG_LPCTRL_HWUPM_Pos (7UL) /* HWUPM (Bit 7) */ +#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */ + +// LPSTS +#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL) /* SUSPENDM (Bit 14) */ +#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */ + +// BCCTRL +#define LINK_REG_BCCTRL_PDDETSTS_Pos (9UL) /* PDDETSTS (Bit 9) */ +#define LINK_REG_BCCTRL_PDDETSTS_Msk (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL) /* CHGDETSTS (Bit 8) */ +#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_DCPMODE_Pos (5UL) /* DCPMODE (Bit 5) */ +#define LINK_REG_BCCTRL_DCPMODE_Msk (0x20UL) /* DCPMODE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_VDMSRCE_Pos (4UL) /* VDMSRCE (Bit 4) */ +#define LINK_REG_BCCTRL_VDMSRCE_Msk (0x10UL) /* VDMSRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDPSINKE_Pos (3UL) /* IDPSINKE (Bit 3) */ +#define LINK_REG_BCCTRL_IDPSINKE_Msk (0x8UL) /* IDPSINKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_VDPSRCE_Pos (2UL) /* VDPSRCE (Bit 2) */ +#define LINK_REG_BCCTRL_VDPSRCE_Msk (0x4UL) /* VDPSRCE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDMSINKE_Pos (1UL) /* IDMSINKE (Bit 1) */ +#define LINK_REG_BCCTRL_IDMSINKE_Msk (0x2UL) /* IDMSINKE (Bitfield-Mask: 0x01) */ +#define LINK_REG_BCCTRL_IDPSRCE_Pos (0UL) /* IDPSRCE (Bit 0) */ +#define LINK_REG_BCCTRL_IDPSRCE_Msk (0x1UL) /* IDPSRCE (Bitfield-Mask: 0x01) */ + +// PL1CTRL1 +#define LINK_REG_PL1CTRL1_L1EXTMD_Pos (14UL) /* L1EXTMD (Bit 14) */ +#define LINK_REG_PL1CTRL1_L1EXTMD_Msk (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL1_HIRDTHR_Pos (8UL) /* HIRDTHR (Bit 8) */ +#define LINK_REG_PL1CTRL1_HIRDTHR_Msk (0xf00UL) /* HIRDTHR (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PL1CTRL1_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define LINK_REG_PL1CTRL1_DVSQ_Msk (0xf0UL) /* DVSQ (Bitfield-Mask: 0x0f) */ +#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL) /* L1NEGOMD (Bit 3) */ +#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL) /* L1NEGOMD (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL) /* L1RESPMD (Bit 1) */ +#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL) /* L1RESPMD (Bitfield-Mask: 0x03) */ +#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL) /* L1RESPEN (Bit 0) */ +#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL) /* L1RESPEN (Bitfield-Mask: 0x01) */ + +// PL1CTRL2 +#define LINK_REG_PL1CTRL2_RWEMON_Pos (12UL) /* RWEMON (Bit 12) */ +#define LINK_REG_PL1CTRL2_RWEMON_Msk (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */ +#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL) /* HIRDMON (Bit 8) */ +#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL) /* HIRDMON (Bitfield-Mask: 0x0f) */ + +// HL1CTRL1 +#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL) /* L1STATUS (Bit 1) */ +#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */ +#define LINK_REG_HL1CTRL1_L1REQ_Pos (0UL) /* L1REQ (Bit 0) */ +#define LINK_REG_HL1CTRL1_L1REQ_Msk (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */ + +// HL1CTRL2 +#define LINK_REG_HL1CTRL2_BESL_Pos (15UL) /* BESL (Bit 15) */ +#define LINK_REG_HL1CTRL2_BESL_Msk (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */ +#define LINK_REG_HL1CTRL2_L1RWE_Pos (12UL) /* L1RWE (Bit 12) */ +#define LINK_REG_HL1CTRL2_L1RWE_Msk (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */ +#define LINK_REG_HL1CTRL2_HIRD_Pos (8UL) /* HIRD (Bit 8) */ +#define LINK_REG_HL1CTRL2_HIRD_Msk (0xf00UL) /* HIRD (Bitfield-Mask: 0x0f) */ +#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL) /* L1ADDR (Bit 0) */ +#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL) /* L1ADDR (Bitfield-Mask: 0x0f) */ + +// DPUSR0R +#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL) /* DVBSTSHM (Bit 23) */ +#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_DOVCBHM_Pos (21UL) /* DOVCBHM (Bit 21) */ +#define LINK_REG_DPUSR0R_DOVCBHM_Msk (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_DOVCAHM_Pos (20UL) /* DOVCAHM (Bit 20) */ +#define LINK_REG_DPUSR0R_DOVCAHM_Msk (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */ + +// DPUSR1R +#define LINK_REG_DPUSR1R_DVBSTSH_Pos (23UL) /* DVBSTSH (Bit 23) */ +#define LINK_REG_DPUSR1R_DVBSTSH_Msk (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCBH_Pos (21UL) /* DOVCBH (Bit 21) */ +#define LINK_REG_DPUSR1R_DOVCBH_Msk (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCAH_Pos (20UL) /* DOVCAH (Bit 20) */ +#define LINK_REG_DPUSR1R_DOVCAH_Msk (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL) /* DVBSTSHE (Bit 7) */ +#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL) /* DVBSTSHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCBHE_Pos (5UL) /* DOVCBHE (Bit 5) */ +#define LINK_REG_DPUSR1R_DOVCBHE_Msk (0x20UL) /* DOVCBHE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_DOVCAHE_Pos (4UL) /* DOVCAHE (Bit 4) */ +#define LINK_REG_DPUSR1R_DOVCAHE_Msk (0x10UL) /* DOVCAHE (Bitfield-Mask: 0x01) */ + +// DPUSR2R +#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL) /* DMINTE (Bit 9) */ +#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL) /* DPINTE (Bit 8) */ +#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DMVAL_Pos (5UL) /* DMVAL (Bit 5) */ +#define LINK_REG_DPUSR2R_DMVAL_Msk (0x20UL) /* DMVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPVAL_Pos (4UL) /* DPVAL (Bit 4) */ +#define LINK_REG_DPUSR2R_DPVAL_Msk (0x10UL) /* DPVAL (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DMINT_Pos (1UL) /* DMINT (Bit 1) */ +#define LINK_REG_DPUSR2R_DMINT_Msk (0x2UL) /* DMINT (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR2R_DPINT_Pos (0UL) /* DPINT (Bit 0) */ +#define LINK_REG_DPUSR2R_DPINT_Msk (0x1UL) /* DPINT (Bitfield-Mask: 0x01) */ + +// DPUSRCR +#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL) /* FIXPHYPD (Bit 1) */ +#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSRCR_FIXPHY_Pos (0UL) /* FIXPHY (Bit 0) */ +#define LINK_REG_DPUSRCR_FIXPHY_Msk (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */ + +// DPUSR0R_FS +#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL) /* DVBSTS0 (Bit 23) */ +#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos (21UL) /* DOVCB0 (Bit 21) */ +#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos (20UL) /* DOVCA0 (Bit 20) */ +#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DM0_Pos (17UL) /* DM0 (Bit 17) */ +#define LINK_REG_DPUSR0R_FS_DM0_Msk (0x20000UL) /* DM0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DP0_Pos (16UL) /* DP0 (Bit 16) */ +#define LINK_REG_DPUSR0R_FS_DP0_Msk (0x10000UL) /* DP0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL) /* FIXPHY0 (Bit 4) */ +#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL) /* FIXPHY0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_DRPD0_Pos (3UL) /* DRPD0 (Bit 3) */ +#define LINK_REG_DPUSR0R_FS_DRPD0_Msk (0x8UL) /* DRPD0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_RPUE0_Pos (1UL) /* RPUE0 (Bit 1) */ +#define LINK_REG_DPUSR0R_FS_RPUE0_Msk (0x2UL) /* RPUE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR0R_FS_SRPC0_Pos (0UL) /* SRPC0 (Bit 0) */ +#define LINK_REG_DPUSR0R_FS_SRPC0_Msk (0x1UL) /* SRPC0 (Bitfield-Mask: 0x01) */ + +// DPUSR1R_FS +#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos (23UL) /* DVBINT0 (Bit 23) */ +#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos (21UL) /* DOVRCRB0 (Bit 21) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos (20UL) /* DOVRCRA0 (Bit 20) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DMINT0_Pos (17UL) /* DMINT0 (Bit 17) */ +#define LINK_REG_DPUSR1R_FS_DMINT0_Msk (0x20000UL) /* DMINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DPINT0_Pos (16UL) /* DPINT0 (Bit 16) */ +#define LINK_REG_DPUSR1R_FS_DPINT0_Msk (0x10000UL) /* DPINT0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos (7UL) /* DVBSE0 (Bit 7) */ +#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk (0x80UL) /* DVBSE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL) /* DOVRCRBE0 (Bit 5) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL) /* DOVRCRBE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL) /* DOVRCRAE0 (Bit 4) */ +#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL) /* DOVRCRAE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos (1UL) /* DMINTE0 (Bit 1) */ +#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk (0x2UL) /* DMINTE0 (Bitfield-Mask: 0x01) */ +#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ +#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ /*--------------------------------------------------------------------*/ /* Register Bit Utils */ /*--------------------------------------------------------------------*/ -#define LINK_REG_PIPE_CTR_PID_NAK (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */ -#define LINK_REG_PIPE_CTR_PID_BUF (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */ -#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */ +#define LINK_REG_PIPE_CTR_PID_NAK (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */ +#define LINK_REG_PIPE_CTR_PID_BUF (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */ +#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */ -#define LINK_REG_DVSTCTR0_RHST_LS (1U << LINK_REG_DVSTCTR0_RHST_Pos) /* Low-speed connection */ -#define LINK_REG_DVSTCTR0_RHST_FS (2U << LINK_REG_DVSTCTR0_RHST_Pos) /* Full-speed connection */ +#define LINK_REG_DVSTCTR0_RHST_LS (1U << LINK_REG_DVSTCTR0_RHST_Pos) /* Low-speed connection */ +#define LINK_REG_DVSTCTR0_RHST_FS (2U << LINK_REG_DVSTCTR0_RHST_Pos) /* Full-speed connection */ -#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */ -#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */ +#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */ +#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */ -#define LINK_REG_CFIFOSEL_ISEL_WRITE (1U << LINK_REG_CFIFOSEL_ISEL_Pos) /* FIFO write AKA TX*/ +#define LINK_REG_CFIFOSEL_ISEL_WRITE (1U << LINK_REG_CFIFOSEL_ISEL_Pos) /* FIFO write AKA TX*/ -#define LINK_REG_FIFOSEL_BIGEND (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */ -#define LINK_REG_FIFOSEL_MBW_8BIT (0U << LINK_REG_CFIFOSEL_MBW_Pos) /* 8-bit width */ -#define LINK_REG_FIFOSEL_MBW_16BIT (1U << LINK_REG_CFIFOSEL_MBW_Pos) /* 16-bit width */ +#define LINK_REG_FIFOSEL_BIGEND (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */ +#define LINK_REG_FIFOSEL_MBW_8BIT (0U << LINK_REG_CFIFOSEL_MBW_Pos) /* 8-bit width */ +#define LINK_REG_FIFOSEL_MBW_16BIT (1U << LINK_REG_CFIFOSEL_MBW_Pos) /* 16-bit width */ -#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos) +#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos) -#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos) -#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos) -#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos) +#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos) +#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos) +#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos) + +//--------------------------------------------------------------------+ +// Static Assert +//--------------------------------------------------------------------+ + +TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size"); + +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG ) == 0x00000000, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT ) == 0x00000002, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0 ) == 0x00000004, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA ) == 0x00000006, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0 ) == 0x00000008, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE ) == 0x0000000C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO ) == 0x00000014, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO ) == 0x00000018, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO ) == 0x0000001C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL ) == 0x00000020, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR ) == 0x00000022, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL ) == 0x00000028, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR ) == 0x0000002A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL ) == 0x0000002C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR ) == 0x0000002E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0 ) == 0x00000030, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1 ) == 0x00000032, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB ) == 0x00000036, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB ) == 0x00000038, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB ) == 0x0000003A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG ) == 0x0000003C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET ) == 0x0000003E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0 ) == 0x00000040, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1 ) == 0x00000042, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS ) == 0x00000046, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS ) == 0x00000048, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS ) == 0x0000004A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM ) == 0x0000004C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM ) == 0x0000004E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR ) == 0x00000050, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ ) == 0x00000054, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL ) == 0x00000056, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX ) == 0x00000058, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG ) == 0x0000005A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG ) == 0x0000005C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP ) == 0x0000005E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR ) == 0x00000060, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL ) == 0x00000064, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG ) == 0x00000068, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP ) == 0x0000006C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI ) == 0x0000006E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR ) == 0x00000070, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR ) == 0x00000090, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL ) == 0x000000C4, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC ) == 0x000000CC, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD ) == 0x000000D0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW ) == 0x000000F0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL ) == 0x00000100, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS ) == 0x00000102, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL ) == 0x00000140, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1 ) == 0x00000144, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2 ) == 0x00000146, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1 ) == 0x00000148, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2 ) == 0x0000014A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R ) == 0x00000160, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R ) == 0x00000164, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R ) == 0x00000168, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR ) == 0x0000016A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset"); #ifdef __cplusplus } From 0f8e530de175e8fb289870fdd7c28ec0b16314e2 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 8 Mar 2023 23:00:01 +0700 Subject: [PATCH 031/142] fix incorrect merge of hcd link --- src/portable/renesas/link/hcd_link.c | 476 +++++++++++---------------- 1 file changed, 190 insertions(+), 286 deletions(-) diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index a10fe54ea..f1ea2b821 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji Kitayama @@ -27,86 +27,37 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N ) +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ + CFG_TUSB_MCU == OPT_MCU_RX65X || \ + CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) + #include "host/hcd.h" -#include "iodefine.h" +#include "link_type.h" + +#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) +#include "link_rx.h" +#elif TU_CHECK_MCU(OPT_MCU_RAXXX) +#include "link_ra.h" +#else +#error "Unsupported MCU" +#endif //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -#define SYSTEM_PRCR_PRC1 (1<<1) -#define SYSTEM_PRCR_PRKEY (0xA5u<<8) -#define USB_DVSTCTR0_LOW (1u) -#define USB_DVSTCTR0_FULL (2u) +/* LINK core registers */ +#if defined(__CCRX__) +#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE) +#else +#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) +#endif -#define USB_FIFOSEL_TX ((uint16_t)(1u<<5)) -#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8)) -#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10)) -#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10)) -#define USB_IS0_CTSQ ((uint16_t)(7u)) -#define USB_IS0_DVSQ ((uint16_t)(7u<<4)) -#define USB_IS0_VALID ((uint16_t)(1u<<3)) -#define USB_IS0_BRDY ((uint16_t)(1u<<8)) -#define USB_IS0_NRDY ((uint16_t)(1u<<9)) -#define USB_IS0_BEMP ((uint16_t)(1u<<10)) -#define USB_IS0_CTRT ((uint16_t)(1u<<11)) -#define USB_IS0_DVST ((uint16_t)(1u<<12)) -#define USB_IS0_SOFR ((uint16_t)(1u<<13)) -#define USB_IS0_RESM ((uint16_t)(1u<<14)) -#define USB_IS0_VBINT ((uint16_t)(1u<<15)) -#define USB_IS1_SACK ((uint16_t)(1u<<4)) -#define USB_IS1_SIGN ((uint16_t)(1u<<5)) -#define USB_IS1_EOFERR ((uint16_t)(1u<<6)) -#define USB_IS1_ATTCH ((uint16_t)(1u<<11)) -#define USB_IS1_DTCH ((uint16_t)(1u<<12)) -#define USB_IS1_BCHG ((uint16_t)(1u<<14)) -#define USB_IS1_OVRCR ((uint16_t)(1u<<15)) - -#define USB_IS0_CTSQ_MSK (7u) -#define USB_IS0_CTSQ_SETUP (1u) -#define USB_IS0_DVSQ_DEF (1u<<4) -#define USB_IS0_DVSQ_ADDR (2u<<4) -#define USB_IS0_DVSQ_SUSP0 (4u<<4) -#define USB_IS0_DVSQ_SUSP1 (5u<<4) -#define USB_IS0_DVSQ_SUSP2 (6u<<4) -#define USB_IS0_DVSQ_SUSP3 (7u<<4) - -#define USB_PIPECTR_PID_MSK (3u) -#define USB_PIPECTR_PID_NAK (0u) -#define USB_PIPECTR_PID_BUF (1u) -#define USB_PIPECTR_PID_STALL (2u) -#define USB_PIPECTR_CCPL (1u<<2) -#define USB_PIPECTR_SQMON (1u<<6) -#define USB_PIPECTR_SQCLR (1u<<8) -#define USB_PIPECTR_ACLRM (1u<<9) -#define USB_PIPECTR_INBUFM (1u<<14) -#define USB_PIPECTR_BSTS (1u<<15) - -#define USB_FIFOCTR_DTLN (0x1FF) -#define USB_FIFOCTR_FRDY (1u<<13) -#define USB_FIFOCTR_BCLR (1u<<14) -#define USB_FIFOCTR_BVAL (1u<<15) - -#define USB_PIPECFG_SHTNAK (1u<<7) -#define USB_PIPECFG_DBLB (1u<<9) -#define USB_PIPECFG_BULK (1u<<14) -#define USB_PIPECFG_ISO (3u<<14) -#define USB_PIPECFG_INT (2u<<14) - -#define USB_DEVADD_LOW (1u<<6) -#define USB_DEVADD_FULL (2u<<6) - -#define FIFO_REQ_CLR (1u) -#define FIFO_COMPLETE (1u<<1) - -// Start of definition of packed structs (used by the CCRX toolchain) TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN -typedef struct { +typedef struct TU_ATTR_PACKED { union { struct { uint16_t : 8; @@ -119,7 +70,7 @@ typedef struct { uint16_t TRN; } reg_pipetre_t; -typedef union { +typedef union TU_ATTR_PACKED { struct { volatile uint16_t u8: 8; volatile uint16_t : 0; @@ -127,8 +78,7 @@ typedef union { volatile uint16_t u16; } hw_fifo_t; -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { void *buf; /* the start address of a transfer data buffer */ uint16_t length; /* the number of bytes in the buffer */ uint16_t remaining; /* the number of bytes remaining in the buffer */ @@ -156,28 +106,6 @@ typedef struct //--------------------------------------------------------------------+ static hcd_data_t _hcd; -static uint32_t disable_interrupt(void) -{ - uint32_t pswi; -#if defined(__CCRX__) - pswi = get_psw() & 0x010000; - clrpsw_i(); -#else - pswi = __builtin_rx_mvfc(0) & 0x010000; - __builtin_rx_clrpsw('I'); -#endif - return pswi; -} - -static void enable_interrupt(uint32_t pswi) -{ -#if defined(__CCRX__) - set_psw(get_psw() | pswi); -#else - __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi); -#endif -} - static unsigned find_pipe(unsigned xfer) { switch (xfer) { @@ -208,58 +136,49 @@ static unsigned find_pipe(unsigned xfer) static volatile uint16_t* get_pipectr(unsigned num) { - volatile uint16_t *ctr = NULL; if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; + return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return (volatile uint16_t*)&(LINK_REG->DCPCTR); } - return ctr; } static volatile reg_pipetre_t* get_pipetre(unsigned num) { volatile reg_pipetre_t* tre = NULL; if ((1 <= num) && (num <= 5)) { - tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD; - tre += num - 1; + tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E); } return tre; } static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr) { - volatile uint16_t *ctr = NULL; - const unsigned epn = tu_edpt_number(ep_addr); + const unsigned epn = tu_edpt_number(ep_addr); if (epn) { const unsigned dir_in = tu_edpt_dir(ep_addr); - const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1]; - if (num) { - ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD; - ctr += num - 1; - } + const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1]; + return get_pipectr(num); } else { - ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD; + return get_pipectr(0); } - return ctr; } static unsigned edpt0_max_packet_size(void) { - return USB0.DCPMAXP.BIT.MXPS; + return LINK_REG->DCPMAXP_b.MXPS; } static unsigned edpt_max_packet_size(unsigned num) { - USB0.PIPESEL.WORD = num; - return USB0.PIPEMAXP.BIT.MXPS; + LINK_REG->PIPESEL = num; + return LINK_REG->PIPEMAXP_b.MXPS; } static inline void pipe_wait_for_ready(unsigned num) { - while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ; - while (!USB0.D0FIFOCTR.BIT.FRDY) ; + while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ; + while (!LINK_REG->D0FIFOCTR_b.FRDY) ; } static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) @@ -290,21 +209,22 @@ static bool pipe0_xfer_in(void) const unsigned rem = pipe->remaining; const unsigned mps = edpt0_max_packet_size(); - const unsigned vld = USB0.CFIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; - pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; + pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; + if (len < mps) + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return true; } - USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; return false; } @@ -320,10 +240,11 @@ static bool pipe0_xfer_out(void) const unsigned len = TU_MIN(mps, rem); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL; + if (len < mps) + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; pipe->remaining = rem - len; return false; } @@ -333,20 +254,21 @@ static bool pipe_xfer_in(unsigned num) pipe_state_t *pipe = &_hcd.pipe[num]; const unsigned rem = pipe->remaining; - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8; + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); - const unsigned vld = USB0.D0FIFOCTR.BIT.DTLN; + const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - pipe->remaining = rem - len; + if (len < mps) + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return NULL != buf; @@ -364,18 +286,19 @@ static bool pipe_xfer_out(unsigned num) return true; } - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); + LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len); + pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + if (len < mps) + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -387,11 +310,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, /* configure fifo direction and access unit settings */ if (dir_in) { /* IN, a byte */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8; - while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ; - } else { /* OUT, 2 bytes */ - USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); - while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ; + LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; + while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; + } else { /* OUT, 2 bytes */ + LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; } pipe_state_t *pipe = &_hcd.pipe[0]; @@ -401,25 +325,25 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, if (buflen) { pipe->buf = buffer; if (!dir_in) { /* OUT */ - TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80)); + TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); pipe0_xfer_out(); } } else { /* ZLP */ pipe->buf = NULL; if (!dir_in) { /* OUT */ - USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL; + LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; } - if (dir_in == USB0.DCPCFG.BIT.DIR) { - TU_ASSERT(USB_PIPECTR_PID_NAK == USB0.DCPCTR.BIT.PID); - USB0.DCPCTR.BIT.SQSET = 1; - USB0.DCPCFG.BIT.DIR = dir_in ^ 1; + if (dir_in == LINK_REG->DCPCFG_b.DIR) { + TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID); + LINK_REG->DCPCTR_b.SQSET = 1; + LINK_REG->DCPCFG_b.DIR = dir_in ^ 1; } } - USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; return true; } -static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen) +static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen) { const unsigned epn = tu_edpt_number(ep_addr); const unsigned dir_in = tu_edpt_dir(ep_addr); @@ -435,23 +359,23 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, u if (buflen) { pipe_xfer_out(num); } else { /* ZLP */ - USB0.D0FIFOSEL.WORD = num; + LINK_REG->D0FIFOSEL = num; pipe_wait_for_ready(num); - USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; - USB0.D0FIFOSEL.WORD = 0; - while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + LINK_REG->D0FIFOSEL = 0; + while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ } } else { volatile uint16_t *ctr = get_pipectr(num); volatile reg_pipetre_t *pt = get_pipetre(num); if (pt) { const unsigned mps = edpt_max_packet_size(num); - if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK; + if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK; pt->TRE = TU_BIT(8); pt->TRN = (buflen + mps - 1) / mps; pt->TRENB = 1; } - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } return true; } @@ -485,10 +409,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num) unsigned result; uint16_t volatile *ctr = get_pipectr(num); // TU_LOG1("NRDY %d %x\n", num, *ctr); - switch (*ctr & USB_PIPECTR_PID_MSK) { + switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) { default: return; - case USB_PIPECTR_PID_STALL: result = XFER_RESULT_STALLED; break; - case USB_PIPECTR_PID_NAK: result = XFER_RESULT_FAILED; break; + case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break; + case LINK_REG_PIPE_CTR_PID_NAK: result = XFER_RESULT_FAILED; break; } pipe_state_t *pipe = &_hcd.pipe[num]; hcd_event_xfer_complete(pipe->dev, pipe->ep, @@ -520,78 +444,60 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) } } - /*------------------------------------------------------------------*/ /* Host API *------------------------------------------------------------------*/ bool hcd_init(uint8_t rhport) { (void)rhport; - /* Enable USB0 */ - uint32_t pswi = disable_interrupt(); - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; - MSTP(USB0) = 0; - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; - enable_interrupt(pswi); - USB0.SYSCFG.BIT.SCKE = 1; - while (!USB0.SYSCFG.BIT.SCKE) ; - USB0.SYSCFG.BIT.DPRPU = 0; - USB0.SYSCFG.BIT.DRPD = 0; - USB0.SYSCFG.BIT.DCFM = 1; - USB0.DVSTCTR0.BIT.VBUSEN = 1; + LINK_REG->SYSCFG_b.SCKE = 1; + while (!LINK_REG->SYSCFG_b.SCKE) ; + LINK_REG->SYSCFG_b.DPRPU = 0; + LINK_REG->SYSCFG_b.DRPD = 0; + LINK_REG->SYSCFG_b.DCFM = 1; - USB0.SYSCFG.BIT.DRPD = 1; + LINK_REG->DVSTCTR0_b.VBUSEN = 1; + + LINK_REG->SYSCFG_b.DRPD = 1; for (volatile int i = 0; i < 30000; ++i) ; - USB0.SYSCFG.BIT.USBE = 1; + LINK_REG->SYSCFG_b.USBE = 1; - USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */ -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - USB0.PHYSLEW.LONG = 0x5; - IR(PERIB, INTB185) = 0; -#else - IR(USB0, USBI0) = 0; -#endif + // MCU specific PHY init + link_phy_init(); + + LINK_REG->PHYSLEW = 0x5; + LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ /* Setup default control pipe */ - USB0.DCPCFG.WORD = USB_PIPECFG_SHTNAK; - USB0.DCPMAXP.WORD = 64; - USB0.INTENB0.WORD = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP; - USB0.INTENB1.WORD = USB_IS1_SACK | USB_IS1_SIGN | - USB_IS1_ATTCH | USB_IS1_DTCH; - USB0.BEMPENB.WORD = 1; - USB0.NRDYENB.WORD = 1; - USB0.BRDYENB.WORD = 1; + LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk; + LINK_REG->DCPMAXP = 64; + LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk; + LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk; + LINK_REG->BEMPENB = 1; + LINK_REG->NRDYENB = 1; + LINK_REG->BRDYENB = 1; + return true; } void hcd_int_enable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 1; -#else - IEN(USB0, USBI0) = 1; -#endif + link_int_enable(rhport); } void hcd_int_disable(uint8_t rhport) { - (void)rhport; -#if ( CFG_TUSB_MCU == OPT_MCU_RX72N ) - IEN(PERIB, INTB185) = 0; -#else - IEN(USB0, USBI0) = 0; -#endif + link_int_disable(rhport); } uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); - return USB0.FRMNUM.BIT.FRNM; + return LINK_REG->FRMNUM_b.FRNM; } /*--------------------------------------------------------------------+ @@ -605,18 +511,18 @@ bool hcd_port_connect_status(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; - while (USB0.DCPCTR.BIT.PBUSY) ; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; + while (LINK_REG->DCPCTR_b.PBUSY) ; hcd_int_disable(rhport); - USB0.DVSTCTR0.BIT.UACT = 0; - if (USB0.DCPCTR.BIT.SUREQ) - USB0.DCPCTR.BIT.SUREQCLR = 1; + LINK_REG->DVSTCTR0_b.UACT = 0; + if (LINK_REG->DCPCTR_b.SUREQ) + LINK_REG->DCPCTR_b.SUREQCLR = 1; hcd_int_enable(rhport); /* Reset should be asserted 10-20ms. */ - USB0.DVSTCTR0.BIT.USBRST = 1; + LINK_REG->DVSTCTR0_b.USBRST = 1; for (volatile int i = 0; i < 2400000; ++i) ; - USB0.DVSTCTR0.BIT.USBRST = 0; - USB0.DVSTCTR0.BIT.UACT = 1; + LINK_REG->DVSTCTR0_b.USBRST = 0; + LINK_REG->DVSTCTR0_b.UACT = 1; _hcd.need_reset = false; } @@ -628,10 +534,10 @@ void hcd_port_reset_end(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; - switch (USB0.DVSTCTR0.BIT.RHST) { + switch (LINK_REG->DVSTCTR0_b.RHST) { default: return TUSB_SPEED_INVALID; - case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL; - case USB_DVSTCTR0_LOW: return TUSB_SPEED_LOW; + case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL; + case LINK_REG_DVSTCTR0_RHST_LS: return TUSB_SPEED_LOW; } } @@ -647,13 +553,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) unsigned num = *ep; if (!num || dev_addr != _hcd.pipe[num].dev) continue; - ctr = (uint16_t volatile*)&USB0.PIPE1CTR.WORD + num - 1; + ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1]; *ctr = 0; - USB0.NRDYENB.WORD &= ~TU_BIT(num); - USB0.BRDYENB.WORD &= ~TU_BIT(num); - USB0.PIPESEL.WORD = num; - USB0.PIPECFG.WORD = 0; - USB0.PIPEMAXP.WORD = 0; + LINK_REG->NRDYENB &= ~TU_BIT(num); + LINK_REG->BRDYENB &= ~TU_BIT(num); + LINK_REG->PIPESEL = num; + LINK_REG->PIPECFG = 0; + LINK_REG->PIPEMAXP = 0; _hcd.pipe[num].ep = 0; _hcd.pipe[num].dev = 0; @@ -667,36 +573,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void)rhport; - // TU_LOG1("S %d %x\n", dev_addr, USB0.DCPCTR.WORD); + // TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR); TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ - TU_ASSERT(0 == USB0.DCPCTR.BIT.SUREQ); + TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ); - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; - _hcd.pipe[0].buf = NULL; - _hcd.pipe[0].length = 8; + _hcd.pipe[0].buf = NULL; + _hcd.pipe[0].length = 8; _hcd.pipe[0].remaining = 0; - _hcd.pipe[0].dev = dev_addr; + _hcd.pipe[0].dev = dev_addr; - while (USB0.DCPCTR.BIT.PBUSY) ; - USB0.DCPMAXP.WORD = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; + while (LINK_REG->DCPCTR_b.PBUSY) ; + LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; /* Set direction in advance for DATA stage */ uint8_t const bmRequesttype = setup_packet[0]; - USB0.DCPCFG.BIT.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; + LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0]; - USB0.USBREQ.WORD = tu_htole16(p[0]); - USB0.USBVAL = p[1]; - USB0.USBINDX = p[2]; - USB0.USBLENG = p[3]; + LINK_REG->USBREQ = tu_htole16(p[0]); + LINK_REG->USBVAL = p[1]; + LINK_REG->USBINDX = p[2]; + LINK_REG->USBLENG = p[3]; - USB0.DCPCTR.BIT.SUREQ = 1; + LINK_REG->DCPCTR_b.SUREQ = 1; return true; } -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc) { (void)rhport; TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ @@ -705,14 +611,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const const unsigned epn = tu_edpt_number(ep_addr); const unsigned mps = tu_edpt_packet_size(ep_desc); if (0 == epn) { - USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK; + LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; hcd_devtree_info_t devtree; hcd_devtree_get_info(dev_addr, &devtree); - uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t)&USB0.DEVADD0.WORD; + uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0]; devadd += dev_addr; - while (USB0.DCPCTR.BIT.PBUSY) ; - USB0.DCPMAXP.WORD = (dev_addr << 12) | mps; - *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW; + while (LINK_REG->DCPCTR_b.PBUSY) ; + LINK_REG->DCPMAXP = (dev_addr << 12) | mps; + *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS; _hcd.ctl_mps[dev_addr] = mps; return true; } @@ -731,25 +637,25 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const /* setup pipe */ hcd_int_disable(rhport); - USB0.PIPESEL.WORD = num; - USB0.PIPEMAXP.WORD = (dev_addr << 12) | mps; + LINK_REG->PIPESEL = num; + LINK_REG->PIPEMAXP = (dev_addr << 12) | mps; volatile uint16_t *ctr = get_pipectr(num); - *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk; *ctr = 0; unsigned cfg = ((1 ^ dir_in) << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB; + cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk; } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= USB_PIPECFG_INT; + cfg |= LINK_REG_PIPECFG_TYPE_INT; } else { - cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB; + cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk; } - USB0.PIPECFG.WORD = cfg; - USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num); - USB0.NRDYENB.WORD |= TU_BIT(num); - USB0.BRDYENB.WORD |= TU_BIT(num); + LINK_REG->PIPECFG = cfg; + LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); + LINK_REG->NRDYENB |= TU_BIT(num); + LINK_REG->BRDYENB |= TU_BIT(num); if (!dir_in) { - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } hcd_int_enable(rhport); @@ -776,12 +682,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) *ctr = pid & 2; *ctr = 0; } - *ctr = USB_PIPECTR_SQCLR; + *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk; unsigned const epn = tu_edpt_number(ep_addr); if (!epn) return true; if (!tu_edpt_dir(ep_addr)) { /* OUT */ - *ctr = USB_PIPECTR_PID_BUF; + *ctr = LINK_REG_PIPE_CTR_PID_BUF; } return true; } @@ -799,52 +705,50 @@ void hcd_int_handler(uint8_t rhport) 20, 8, 19, 18}; #endif - unsigned is1 = USB0.INTSTS1.WORD; - unsigned is0 = USB0.INTSTS0.WORD; + unsigned is1 = LINK_REG->INTSTS1; + unsigned is0 = LINK_REG->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - USB0.INTSTS1.WORD = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1); - USB0.INTSTS0.WORD = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0); + LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1); + LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0); // TU_LOG1("IS %04x %04x\n", is0, is1); - is1 &= USB0.INTENB1.WORD; - is0 &= USB0.INTENB0.WORD; + is1 &= LINK_REG->INTENB1; + is0 &= LINK_REG->INTENB0; - if (is1 & USB_IS1_SACK) { + if (is1 & LINK_REG_INTSTS1_SACK_Msk) { /* Set DATA1 in advance for the next transfer. */ - USB0.DCPCTR.BIT.SQSET = 1; - hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL, - tu_edpt_addr(0, TUSB_DIR_OUT), - 8, XFER_RESULT_SUCCESS, true); + LINK_REG->DCPCTR_b.SQSET = 1; + hcd_event_xfer_complete( + LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); } - if (is1 & USB_IS1_SIGN) { - hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL, - tu_edpt_addr(0, TUSB_DIR_OUT), - 8, XFER_RESULT_FAILED, true); + if (is1 & LINK_REG_INTSTS1_SIGN_Msk) { + hcd_event_xfer_complete( + LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); } - if (is1 & USB_IS1_ATTCH) { - USB0.DVSTCTR0.BIT.UACT = 1; + if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) { + LINK_REG->DVSTCTR0_b.UACT = 1; _hcd.need_reset = true; - USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_ATTCH) | USB_IS1_DTCH; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk; hcd_event_device_attach(rhport, true); } - if (is1 & USB_IS1_DTCH) { - USB0.DVSTCTR0.BIT.UACT = 0; - if (USB0.DCPCTR.BIT.SUREQ) - USB0.DCPCTR.BIT.SUREQCLR = 1; - USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_DTCH) | USB_IS1_ATTCH; + if (is1 & LINK_REG_INTSTS1_DTCH_Msk) { + LINK_REG->DVSTCTR0_b.UACT = 0; + if (LINK_REG->DCPCTR_b.SUREQ) + LINK_REG->DCPCTR_b.SUREQCLR = 1; + LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk; hcd_event_device_remove(rhport, true); } - if (is0 & USB_IS0_BEMP) { - const unsigned s = USB0.BEMPSTS.WORD; - USB0.BEMPSTS.WORD = 0; + if (is0 & LINK_REG_INTSTS0_BEMP_Msk) { + const unsigned s = LINK_REG->BEMPSTS; + LINK_REG->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } - if (is0 & USB_IS0_NRDY) { - const unsigned m = USB0.NRDYENB.WORD; - unsigned s = USB0.NRDYSTS.WORD & m; - USB0.NRDYSTS.WORD = ~s; + if (is0 & LINK_REG_INTSTS0_NRDY_Msk) { + const unsigned m = LINK_REG->NRDYENB; + unsigned s = LINK_REG->NRDYSTS & m; + LINK_REG->NRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; @@ -855,11 +759,11 @@ void hcd_int_handler(uint8_t rhport) s &= ~TU_BIT(num); } } - if (is0 & USB_IS0_BRDY) { - const unsigned m = USB0.BRDYENB.WORD; - unsigned s = USB0.BRDYSTS.WORD & m; + if (is0 & LINK_REG_INTSTS0_BRDY_Msk) { + const unsigned m = LINK_REG->BRDYENB; + unsigned s = LINK_REG->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ - USB0.BRDYSTS.WORD = ~s; + LINK_REG->BRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; From f0ddf8d10f7d58592d2ebb60025b227c8047114d Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Thu, 9 Mar 2023 14:00:37 +0100 Subject: [PATCH 032/142] dcd_nrf5x: ISO OUT handling For incoming ISO OUT packets it was possible to start DMA from endpoint to RAM before transfer was started resulting in unrelated memory corruption. This is scenario that causes memory corruption: - ISO OUT packet is received - Packet is transferred by DMA to transfer buffer - xfer->started is cleared and xfer->buffer is updated as it is in every case - Application takes to long to handle it (it happens when debugger is connected breakpoint is hit slowing down software). - Next ISO OUT packet arrives At this point there was no check if transfer was started and packet was copied by DMA to location beyond previous data, possibly overwriting unrelated memory. This solves the issue by checking that transfer was started and there is buffer ready for incoming packet. --- src/portable/nordic/nrf5x/dcd_nrf5x.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index afc14b010..4aeb85fc0 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -187,11 +187,16 @@ static void xact_out_dma(uint8_t epnum) } else { - // Trigger DMA move data from Endpoint -> SRAM - NRF_USBD->ISOOUT.PTR = (uint32_t) xfer->buffer; - NRF_USBD->ISOOUT.MAXCNT = xact_len; + if (xfer->started) + { + // Trigger DMA move data from Endpoint -> SRAM + NRF_USBD->ISOOUT.PTR = (uint32_t) xfer->buffer; + NRF_USBD->ISOOUT.MAXCNT = xact_len; - start_dma(&NRF_USBD->TASKS_STARTISOOUT); + start_dma(&NRF_USBD->TASKS_STARTISOOUT); + } else { + atomic_flag_clear(&_dcd.dma_running); + } } } else From 76f43a7a16ae814abfc7e4eec84088a4a8e70bb4 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 19:23:23 +0700 Subject: [PATCH 033/142] starting to remove submodule cmsis5 and nrfx --- .gitmodules | 6 ------ hw/mcu/nordic/nrfx | 1 - lib/CMSIS_5 | 1 - tools/{get_dependencies.py => get_deps.py} | 0 4 files changed, 8 deletions(-) delete mode 160000 hw/mcu/nordic/nrfx delete mode 160000 lib/CMSIS_5 rename tools/{get_dependencies.py => get_deps.py} (100%) diff --git a/.gitmodules b/.gitmodules index 14f47746b..c3baaa1be 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,6 +1,3 @@ -[submodule "hw/mcu/nordic/nrfx"] - path = hw/mcu/nordic/nrfx - url = https://github.com/NordicSemiconductor/nrfx.git [submodule "tools/uf2"] path = tools/uf2 url = https://github.com/microsoft/uf2.git @@ -109,9 +106,6 @@ [submodule "lib/FreeRTOS-Kernel"] path = lib/FreeRTOS-Kernel url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git -[submodule "lib/CMSIS_5"] - path = lib/CMSIS_5 - url = https://github.com/ARM-software/CMSIS_5.git [submodule "hw/mcu/silabs/cmsis-dfp-efm32gg12b"] path = hw/mcu/silabs/cmsis-dfp-efm32gg12b url = https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b diff --git a/hw/mcu/nordic/nrfx b/hw/mcu/nordic/nrfx deleted file mode 160000 index 281cc2e17..000000000 --- a/hw/mcu/nordic/nrfx +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 281cc2e178fd9a470d844b3afdea9eb322a0b0e8 diff --git a/lib/CMSIS_5 b/lib/CMSIS_5 deleted file mode 160000 index 202852626..000000000 --- a/lib/CMSIS_5 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 20285262657d1b482d132d20d755c8c330d55c1f diff --git a/tools/get_dependencies.py b/tools/get_deps.py similarity index 100% rename from tools/get_dependencies.py rename to tools/get_deps.py From d41320a42eae7fd26075f7c91972254c7f03ede6 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 20:49:11 +0700 Subject: [PATCH 034/142] adding python script to manage dependencies instead of submodule --- .github/workflows/build_aarch64.yml | 2 +- .github/workflows/build_arm.yml | 2 +- .github/workflows/build_iar.yml | 2 +- .github/workflows/build_msp430.yml | 2 +- .github/workflows/build_renesas.yml | 2 +- .github/workflows/build_riscv.yml | 2 +- .github/workflows/build_win_mac.yml | 2 +- examples/rules.mk | 2 +- tools/get_deps.py | 104 +++++++++++++++++++++++----- tools/get_family_deps.py | 19 +++++ 10 files changed, 115 insertions(+), 24 deletions(-) create mode 100644 tools/get_family_deps.py diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml index 800a54380..5818ea432 100644 --- a/.github/workflows/build_aarch64.yml +++ b/.github/workflows/build_aarch64.yml @@ -72,7 +72,7 @@ jobs: run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin` - name: Get Dependencies - run: python3 tools/get_dependencies.py ${{ matrix.family }} + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index b1b88ec70..2ed40e186 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -80,7 +80,7 @@ jobs: echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk - name: Get Dependencies - run: python3 tools/get_dependencies.py ${{ matrix.family }} + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 33e77c3dc..7f2a92010 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -45,7 +45,7 @@ jobs: - name: Checkout submodules and dependencies run: | git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel - python3 tools/get_dependencies.py ${{ matrix.family }} + python3 tools/get_family_deps.py ${{ matrix.family }} #- name: Checkout pico-sdk for rp2040 # if: matrix.family == 'rp2040' diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml index 2c7785806..6832c54b3 100644 --- a/.github/workflows/build_msp430.yml +++ b/.github/workflows/build_msp430.yml @@ -70,7 +70,7 @@ jobs: run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin` - name: Get Dependencies - run: python3 tools/get_dependencies.py ${{ matrix.family }} + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml index 3a961d327..7ce674485 100644 --- a/.github/workflows/build_renesas.yml +++ b/.github/workflows/build_renesas.yml @@ -70,7 +70,7 @@ jobs: run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin` - name: Get Dependencies - run: python3 tools/get_dependencies.py ${{ matrix.family }} + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml index fb4d4d28c..876ebbdef 100644 --- a/.github/workflows/build_riscv.yml +++ b/.github/workflows/build_riscv.yml @@ -71,7 +71,7 @@ jobs: run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin` - name: Get Dependencies - run: python3 tools/get_dependencies.py ${{ matrix.family }} + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml index bad9f3162..7c884abd9 100644 --- a/.github/workflows/build_win_mac.yml +++ b/.github/workflows/build_win_mac.yml @@ -50,7 +50,7 @@ jobs: run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - name: Get Dependencies - run: python3 tools/get_dependencies.py stm32f4 + run: python3 tools/get_family_deps.py stm32f4 - name: Build run: python3 tools/build_family.py stm32f4 stm32f411disco diff --git a/examples/rules.mk b/examples/rules.mk index 7f3535bba..f8e4001ec 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -193,7 +193,7 @@ endif .PHONY: get-deps get-deps: ifdef DEPS_SUBMODULES - git -C $(TOP) submodule update --init $(DEPS_SUBMODULES) + $(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES) endif .PHONY: size diff --git a/tools/get_deps.py b/tools/get_deps.py index e7d3e0a76..7ce02cc33 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -1,25 +1,97 @@ -import os import sys import subprocess +from pathlib import Path + +# path, url, commit +deps_list = { + 'hw/mcu/allwinner' : [ 'https://github.com/hathach/allwinner_driver.git', '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'], + 'hw/mcu/bridgetek/ft9xx/ft90x-sdk' : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git', '91060164afe239fcb394122e8bf9eb24d3194eb1'], + 'hw/mcu/broadcom' : [ 'https://github.com/adafruit/broadcom-peripherals.git', '08370086080759ed54ac1136d62d2ad24c6fa267'], + 'hw/mcu/gd/nuclei-sdk' : [ 'https://github.com/Nuclei-Software/nuclei-sdk.git', '7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7'], + 'hw/mcu/infineon/mtb-xmclib-cat3' : [ 'https://github.com/Infineon/mtb-xmclib-cat3.git', 'daf5500d03cba23e68c2f241c30af79cd9d63880'], + 'hw/mcu/microchip' : [ 'https://github.com/hathach/microchip_driver.git', '9e8b37e307d8404033bb881623a113931e1edf27'], + 'hw/mcu/mindmotion/mm32sdk' : [ 'https://github.com/hathach/mm32sdk.git', '708a7152952ac595d24837069dcc0f7f59a4c30b'], + 'hw/mcu/nordic/nrfx' : [ 'https://github.com/NordicSemiconductor/nrfx.git', '281cc2e178fd9a470d844b3afdea9eb322a0b0e8'], + 'hw/mcu/nuvoton' : [ 'https://github.com/majbthrd/nuc_driver.git', '2204191ec76283371419fbcec207da02e1bc22fa'], + 'hw/mcu/nxp/lpcopen' : [ 'https://github.com/hathach/nxp_lpcopen.git', '43c45c85405a5dd114fff0ea95cca62837740c13'], + 'hw/mcu/nxp/mcux-sdk' : [ 'https://github.com/NXPmicro/mcux-sdk.git', 'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'], + 'hw/mcu/nxp/nxp_sdk' : [ 'https://github.com/hathach/nxp_sdk.git', '845c8fc49b6fb660f06a5c45225494eacb06f00c'], + 'hw/mcu/raspberry_pi/Pico-PIO-USB' : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'], + 'hw/mcu/renesas/rx' : [ 'https://github.com/kkitayam/rx_device.git', '706b4e0cf485605c32351e2f90f5698267996023'], + 'hw/mcu/silabs/cmsis-dfp-efm32gg12b' : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git', 'f1c31b7887669cb230b3ea63f9b56769078960bc'], + 'hw/mcu/sony/cxd56/spresense-exported-sdk' : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git', '2ec2a1538362696118dc3fdf56f33dacaf8f4067'], + 'hw/mcu/st/cmsis_device_f0' : [ 'https://github.com/STMicroelectronics/cmsis_device_f0.git', '2fc25ee22264bc27034358be0bd400b893ef837e'], + 'hw/mcu/st/cmsis_device_f1' : [ 'https://github.com/STMicroelectronics/cmsis_device_f1.git', '6601104a6397299b7304fd5bcd9a491f56cb23a6'], + 'hw/mcu/st/cmsis_device_f2' : [ 'https://github.com/STMicroelectronics/cmsis_device_f2.git', '182fcb3681ce116816feb41b7764f1b019ce796f'], + 'hw/mcu/st/cmsis_device_f3' : [ 'https://github.com/STMicroelectronics/cmsis_device_f3.git', '5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b'], + 'hw/mcu/st/cmsis_device_f4' : [ 'https://github.com/STMicroelectronics/cmsis_device_f4.git', '2615e866fa48fe1ff1af9e31c348813f2b19e7ec'], + 'hw/mcu/st/cmsis_device_f7' : [ 'https://github.com/STMicroelectronics/cmsis_device_f7.git', 'fc676ef1ad177eb874eaa06444d3d75395fc51f4'], + 'hw/mcu/st/cmsis_device_g0' : [ 'https://github.com/STMicroelectronics/cmsis_device_g0.git', '08258b28ee95f50cb9624d152a1cbf084be1f9a5'], + 'hw/mcu/st/cmsis_device_g4' : [ 'https://github.com/STMicroelectronics/cmsis_device_g4.git', 'ce822adb1dc552b3aedd13621edbc7fdae124878'], + 'hw/mcu/st/cmsis_device_h7' : [ 'https://github.com/STMicroelectronics/cmsis_device_h7.git', '60dc2c913203dc8629dc233d4384dcc41c91e77f'], + 'hw/mcu/st/cmsis_device_l0' : [ 'https://github.com/STMicroelectronics/cmsis_device_l0.git', '06748ca1f93827befdb8b794402320d94d02004f'], + 'hw/mcu/st/cmsis_device_l1' : [ 'https://github.com/STMicroelectronics/cmsis_device_l1.git', '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e'], + 'hw/mcu/st/cmsis_device_l4' : [ 'https://github.com/STMicroelectronics/cmsis_device_l4.git', '6ca7312fa6a5a460b5a5a63d66da527fdd8359a6'], + 'hw/mcu/st/cmsis_device_l5' : [ 'https://github.com/STMicroelectronics/cmsis_device_l5.git', 'd922865fc0326a102c26211c44b8e42f52c1e53d'], + 'hw/mcu/st/cmsis_device_u5' : [ 'https://github.com/STMicroelectronics/cmsis_device_u5.git', 'bc00f3c9d8a4e25220f84c26d414902cc6bdf566'], + 'hw/mcu/st/cmsis_device_wb' : [ 'https://github.com/STMicroelectronics/cmsis_device_wb.git', '9c5d1920dd9fabbe2548e10561d63db829bb744f'], + 'hw/mcu/st/stm32f0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git', '0e95cd88657030f640a11e690a8a5186c7712ea5'], + 'hw/mcu/st/stm32f1xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git', '1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29'], + 'hw/mcu/st/stm32f2xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git', 'c75ace9b908a9aca631193ebf2466963b8ea33d0'], + 'hw/mcu/st/stm32f3xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git', '1761b6207318ede021706e75aae78f452d72b6fa'], + 'hw/mcu/st/stm32f4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git', '04e99fbdabd00ab8f370f377c66b0a4570365b58'], + 'hw/mcu/st/stm32f7xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git', 'f7ffdf6bf72110e58b42c632b0a051df5997e4ee'], + 'hw/mcu/st/stm32g0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git', '5b53e6cee664a82b16c86491aa0060e2110c00cb'], + 'hw/mcu/st/stm32g4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git', '8b4518417706d42eef5c14e56a650005abf478a8'], + 'hw/mcu/st/stm32h7xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git', 'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04'], + 'hw/mcu/st/stm32l0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git', 'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b'], + 'hw/mcu/st/stm32l1xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git', '44efc446fa69ed8344e7fd966e68ed11043b35d9'], + 'hw/mcu/st/stm32l4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git', 'aee3d5bf283ae5df87532b781bdd01b7caf256fc'], + 'hw/mcu/st/stm32l5xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git', '675c32a75df37f39d50d61f51cb0dcf53f07e1cb'], + 'hw/mcu/st/stm32u5xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git', '2e1d4cdb386e33391cb261dfff4fefa92e4aa35a'], + 'hw/mcu/st/stm32wbxx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git', '2c5f06638be516c1b772f768456ba637f077bac8'], + 'hw/mcu/ti' : [ 'https://github.com/hathach/ti_driver.git', '143ed6cc20a7615d042b03b21e070197d473e6e5'], + 'hw/mcu/wch/ch32v307' : [ 'https://github.com/openwch/ch32v307.git', '17761f5cf9dbbf2dcf665b7c04934188add20082'], + 'lib/CMSIS_5' : [ 'https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f'], + 'lib/FreeRTOS-Kernel' : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git', '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'], + 'lib/lwip' : [ 'https://github.com/lwip-tcpip/lwip.git', '159e31b689577dbf69cf0683bbaffbd71fa5ee10'], + 'lib/sct_neopixel' : [ 'https://github.com/gsteiert/sct_neopixel.git', 'e73e04ca63495672d955f9268e003cffe168fcd8'], + 'tools/uf2' : [ 'https://github.com/microsoft/uf2.git', '19615407727073e36d81bf239c52108ba92e7660'], +} + +# TOP is tinyusb root dir +TOP = Path(__file__).parent.parent.resolve() -# dependency lookup (ABC sorted) -# deps = { -# 'LPC11UXX' : [ [] ] -# } +def get_a_dep(d): + if d not in deps_list.keys(): + print('{} is not found in dependency list') + return 1 + url = deps_list[d][0] + commit = deps_list[d][1] + print('cloning {} with {}'.format(d, url)) + p = Path(TOP / d) + git_cmd = "git -C {}".format(p) + + # Init git deps if not existed + if not p.exists(): + p.mkdir(parents=True) + subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + + # Check if commit is already fetched + result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + head = result.stdout.decode("utf-8").splitlines()[0] + if commit != head: + subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + + return 0 -def get_family_dep(family): - for entry in os.scandir("hw/bsp/{}/boards".format(family)): - if entry.is_dir(): - result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name), - shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - print(result.stdout.decode("utf-8")) - return result.returncode status = 0 -all_family = sys.argv[1:] -for f in all_family: - status += get_family_dep(f) +for d in sys.argv[1:]: + status += get_a_dep(d) -sys.exit(status) \ No newline at end of file +sys.exit(status) diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py new file mode 100644 index 000000000..e382d709b --- /dev/null +++ b/tools/get_family_deps.py @@ -0,0 +1,19 @@ +import sys +import subprocess +import os + + +def get_family_dep(family): + for entry in os.scandir("hw/bsp/{}/boards".format(family)): + if entry.is_dir(): + result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name), + shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + print(result.stdout.decode("utf-8")) + return result.returncode + + +status = 0 +for d in sys.argv[1:]: + status += get_family_dep(d) + +sys.exit(status) From 7c9bd81eca6d9a405c8a3ee1d012f370b88b44d1 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 22:49:49 +0700 Subject: [PATCH 035/142] update deps script --- tools/get_deps.py | 30 +++++++++++++++++------------- tools/get_family_deps.py | 6 ++++-- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 7ce02cc33..6e7093816 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -1,8 +1,9 @@ import sys import subprocess from pathlib import Path +from multiprocessing import Pool -# path, url, commit +# path, url, commit (Alphabet sorted by path) deps_list = { 'hw/mcu/allwinner' : [ 'https://github.com/hathach/allwinner_driver.git', '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'], 'hw/mcu/bridgetek/ft9xx/ft90x-sdk' : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git', '91060164afe239fcb394122e8bf9eb24d3194eb1'], @@ -53,10 +54,10 @@ deps_list = { 'hw/mcu/ti' : [ 'https://github.com/hathach/ti_driver.git', '143ed6cc20a7615d042b03b21e070197d473e6e5'], 'hw/mcu/wch/ch32v307' : [ 'https://github.com/openwch/ch32v307.git', '17761f5cf9dbbf2dcf665b7c04934188add20082'], 'lib/CMSIS_5' : [ 'https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f'], - 'lib/FreeRTOS-Kernel' : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git', '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'], - 'lib/lwip' : [ 'https://github.com/lwip-tcpip/lwip.git', '159e31b689577dbf69cf0683bbaffbd71fa5ee10'], + #'lib/FreeRTOS-Kernel' : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git', '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'], + #'lib/lwip' : [ 'https://github.com/lwip-tcpip/lwip.git', '159e31b689577dbf69cf0683bbaffbd71fa5ee10'], 'lib/sct_neopixel' : [ 'https://github.com/gsteiert/sct_neopixel.git', 'e73e04ca63495672d955f9268e003cffe168fcd8'], - 'tools/uf2' : [ 'https://github.com/microsoft/uf2.git', '19615407727073e36d81bf239c52108ba92e7660'], + #'tools/uf2' : [ 'https://github.com/microsoft/uf2.git', '19615407727073e36d81bf239c52108ba92e7660'], } # TOP is tinyusb root dir @@ -77,21 +78,24 @@ def get_a_dep(d): # Init git deps if not existed if not p.exists(): p.mkdir(parents=True) - subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + subprocess.run("{} init".format(git_cmd), shell=True) + subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True) # Check if commit is already fetched result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) head = result.stdout.decode("utf-8").splitlines()[0] + if commit != head: - subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True) + subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True) return 0 -status = 0 -for d in sys.argv[1:]: - status += get_a_dep(d) - -sys.exit(status) +if __name__ == "__main__": + status = 0 + all_deps = sys.argv[1:] + with Pool() as pool: + result = pool.map(get_a_dep, all_deps) + status = sum(result) + sys.exit(status) diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py index e382d709b..071d7b756 100644 --- a/tools/get_family_deps.py +++ b/tools/get_family_deps.py @@ -2,11 +2,13 @@ import sys import subprocess import os +# TOP is tinyusb root dir +TOP = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) def get_family_dep(family): - for entry in os.scandir("hw/bsp/{}/boards".format(family)): + for entry in os.scandir("{}/hw/bsp/{}/boards".format(TOP, family)): if entry.is_dir(): - result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name), + result = subprocess.run("make -C {}/examples/device/board_test BOARD={} get-deps".format(TOP, entry.name), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) print(result.stdout.decode("utf-8")) return result.returncode From fb9180b6eb2ec1b76bf5b01d611901d986f85d83 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 23:36:53 +0700 Subject: [PATCH 036/142] remove most of the submodules --- .gitmodules | 138 ----------------------- hw/mcu/allwinner | 1 - hw/mcu/bridgetek/ft9xx/ft90x-sdk | 1 - hw/mcu/gd/nuclei-sdk | 1 - hw/mcu/infineon/mtb-xmclib-cat3 | 1 - hw/mcu/microchip | 1 - hw/mcu/mindmotion/mm32sdk | 1 - hw/mcu/nuvoton | 1 - hw/mcu/nxp/lpcopen | 1 - hw/mcu/nxp/mcux-sdk | 1 - hw/mcu/nxp/nxp_sdk | 1 - hw/mcu/raspberry_pi/Pico-PIO-USB | 1 - hw/mcu/renesas/rx | 1 - hw/mcu/silabs/cmsis-dfp-efm32gg12b | 1 - hw/mcu/sony/cxd56/spresense-exported-sdk | 1 - hw/mcu/st/cmsis_device_f0 | 1 - hw/mcu/st/cmsis_device_f1 | 1 - hw/mcu/st/cmsis_device_f2 | 1 - hw/mcu/st/cmsis_device_f3 | 1 - hw/mcu/st/cmsis_device_f4 | 1 - hw/mcu/st/cmsis_device_f7 | 1 - hw/mcu/st/cmsis_device_g0 | 1 - hw/mcu/st/cmsis_device_g4 | 1 - hw/mcu/st/cmsis_device_h7 | 1 - hw/mcu/st/cmsis_device_l0 | 1 - hw/mcu/st/cmsis_device_l1 | 1 - hw/mcu/st/cmsis_device_l4 | 1 - hw/mcu/st/cmsis_device_l5 | 1 - hw/mcu/st/cmsis_device_u5 | 1 - hw/mcu/st/cmsis_device_wb | 1 - hw/mcu/st/stm32f0xx_hal_driver | 1 - hw/mcu/st/stm32f1xx_hal_driver | 1 - hw/mcu/st/stm32f2xx_hal_driver | 1 - hw/mcu/st/stm32f3xx_hal_driver | 1 - hw/mcu/st/stm32f4xx_hal_driver | 1 - hw/mcu/st/stm32f7xx_hal_driver | 1 - hw/mcu/st/stm32g0xx_hal_driver | 1 - hw/mcu/st/stm32g4xx_hal_driver | 1 - hw/mcu/st/stm32h7xx_hal_driver | 1 - hw/mcu/st/stm32l0xx_hal_driver | 1 - hw/mcu/st/stm32l1xx_hal_driver | 1 - hw/mcu/st/stm32l4xx_hal_driver | 1 - hw/mcu/st/stm32l5xx_hal_driver | 1 - hw/mcu/st/stm32u5xx_hal_driver | 1 - hw/mcu/st/stm32wbxx_hal_driver | 1 - hw/mcu/wch/ch32v307 | 1 - lib/sct_neopixel | 1 - 47 files changed, 184 deletions(-) delete mode 160000 hw/mcu/allwinner delete mode 160000 hw/mcu/bridgetek/ft9xx/ft90x-sdk delete mode 160000 hw/mcu/gd/nuclei-sdk delete mode 160000 hw/mcu/infineon/mtb-xmclib-cat3 delete mode 160000 hw/mcu/microchip delete mode 160000 hw/mcu/mindmotion/mm32sdk delete mode 160000 hw/mcu/nuvoton delete mode 160000 hw/mcu/nxp/lpcopen delete mode 160000 hw/mcu/nxp/mcux-sdk delete mode 160000 hw/mcu/nxp/nxp_sdk delete mode 160000 hw/mcu/raspberry_pi/Pico-PIO-USB delete mode 160000 hw/mcu/renesas/rx delete mode 160000 hw/mcu/silabs/cmsis-dfp-efm32gg12b delete mode 160000 hw/mcu/sony/cxd56/spresense-exported-sdk delete mode 160000 hw/mcu/st/cmsis_device_f0 delete mode 160000 hw/mcu/st/cmsis_device_f1 delete mode 160000 hw/mcu/st/cmsis_device_f2 delete mode 160000 hw/mcu/st/cmsis_device_f3 delete mode 160000 hw/mcu/st/cmsis_device_f4 delete mode 160000 hw/mcu/st/cmsis_device_f7 delete mode 160000 hw/mcu/st/cmsis_device_g0 delete mode 160000 hw/mcu/st/cmsis_device_g4 delete mode 160000 hw/mcu/st/cmsis_device_h7 delete mode 160000 hw/mcu/st/cmsis_device_l0 delete mode 160000 hw/mcu/st/cmsis_device_l1 delete mode 160000 hw/mcu/st/cmsis_device_l4 delete mode 160000 hw/mcu/st/cmsis_device_l5 delete mode 160000 hw/mcu/st/cmsis_device_u5 delete mode 160000 hw/mcu/st/cmsis_device_wb delete mode 160000 hw/mcu/st/stm32f0xx_hal_driver delete mode 160000 hw/mcu/st/stm32f1xx_hal_driver delete mode 160000 hw/mcu/st/stm32f2xx_hal_driver delete mode 160000 hw/mcu/st/stm32f3xx_hal_driver delete mode 160000 hw/mcu/st/stm32f4xx_hal_driver delete mode 160000 hw/mcu/st/stm32f7xx_hal_driver delete mode 160000 hw/mcu/st/stm32g0xx_hal_driver delete mode 160000 hw/mcu/st/stm32g4xx_hal_driver delete mode 160000 hw/mcu/st/stm32h7xx_hal_driver delete mode 160000 hw/mcu/st/stm32l0xx_hal_driver delete mode 160000 hw/mcu/st/stm32l1xx_hal_driver delete mode 160000 hw/mcu/st/stm32l4xx_hal_driver delete mode 160000 hw/mcu/st/stm32l5xx_hal_driver delete mode 160000 hw/mcu/st/stm32u5xx_hal_driver delete mode 160000 hw/mcu/st/stm32wbxx_hal_driver delete mode 160000 hw/mcu/wch/ch32v307 delete mode 160000 lib/sct_neopixel diff --git a/.gitmodules b/.gitmodules index c3baaa1be..e0eb5fb35 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,154 +1,16 @@ [submodule "tools/uf2"] path = tools/uf2 url = https://github.com/microsoft/uf2.git -[submodule "hw/mcu/sony/cxd56/spresense-exported-sdk"] - path = hw/mcu/sony/cxd56/spresense-exported-sdk - url = https://github.com/sonydevworld/spresense-exported-sdk.git [submodule "hw/mcu/ti"] path = hw/mcu/ti url = https://github.com/hathach/ti_driver.git -[submodule "hw/mcu/microchip"] - path = hw/mcu/microchip - url = https://github.com/hathach/microchip_driver.git -[submodule "hw/mcu/nuvoton"] - path = hw/mcu/nuvoton - url = https://github.com/majbthrd/nuc_driver.git [submodule "lib/lwip"] path = lib/lwip url = https://github.com/lwip-tcpip/lwip.git -[submodule "hw/mcu/st/cmsis_device_f4"] - path = hw/mcu/st/cmsis_device_f4 - url = https://github.com/STMicroelectronics/cmsis_device_f4.git -[submodule "hw/mcu/st/stm32f4xx_hal_driver"] - path = hw/mcu/st/stm32f4xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_f0"] - path = hw/mcu/st/cmsis_device_f0 - url = https://github.com/STMicroelectronics/cmsis_device_f0.git -[submodule "hw/mcu/st/stm32f0xx_hal_driver"] - path = hw/mcu/st/stm32f0xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_f1"] - path = hw/mcu/st/cmsis_device_f1 - url = https://github.com/STMicroelectronics/cmsis_device_f1.git -[submodule "hw/mcu/st/stm32f1xx_hal_driver"] - path = hw/mcu/st/stm32f1xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_f2"] - path = hw/mcu/st/cmsis_device_f2 - url = https://github.com/STMicroelectronics/cmsis_device_f2.git -[submodule "hw/mcu/st/stm32f2xx_hal_driver"] - path = hw/mcu/st/stm32f2xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_f3"] - path = hw/mcu/st/cmsis_device_f3 - url = https://github.com/STMicroelectronics/cmsis_device_f3.git -[submodule "hw/mcu/st/stm32f3xx_hal_driver"] - path = hw/mcu/st/stm32f3xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_f7"] - path = hw/mcu/st/cmsis_device_f7 - url = https://github.com/STMicroelectronics/cmsis_device_f7.git -[submodule "hw/mcu/st/stm32f7xx_hal_driver"] - path = hw/mcu/st/stm32f7xx_hal_driver - url = https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_h7"] - path = hw/mcu/st/cmsis_device_h7 - url = https://github.com/STMicroelectronics/cmsis_device_h7.git -[submodule "hw/mcu/st/stm32h7xx_hal_driver"] - path = hw/mcu/st/stm32h7xx_hal_driver - url = https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_l0"] - path = hw/mcu/st/cmsis_device_l0 - url = https://github.com/STMicroelectronics/cmsis_device_l0.git -[submodule "hw/mcu/st/stm32l0xx_hal_driver"] - path = hw/mcu/st/stm32l0xx_hal_driver - url = https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_l1"] - path = hw/mcu/st/cmsis_device_l1 - url = https://github.com/STMicroelectronics/cmsis_device_l1.git -[submodule "hw/mcu/st/stm32l1xx_hal_driver"] - path = hw/mcu/st/stm32l1xx_hal_driver - url = https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_l4"] - path = hw/mcu/st/cmsis_device_l4 - url = https://github.com/STMicroelectronics/cmsis_device_l4.git -[submodule "hw/mcu/st/stm32l4xx_hal_driver"] - path = hw/mcu/st/stm32l4xx_hal_driver - url = https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_g0"] - path = hw/mcu/st/cmsis_device_g0 - url = https://github.com/STMicroelectronics/cmsis_device_g0.git -[submodule "hw/mcu/st/stm32g0xx_hal_driver"] - path = hw/mcu/st/stm32g0xx_hal_driver - url = https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_g4"] - path = hw/mcu/st/cmsis_device_g4 - url = https://github.com/STMicroelectronics/cmsis_device_g4.git -[submodule "hw/mcu/st/stm32g4xx_hal_driver"] - path = hw/mcu/st/stm32g4xx_hal_driver - url = https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_l5"] - path = hw/mcu/st/cmsis_device_l5 - url = https://github.com/STMicroelectronics/cmsis_device_l5.git -[submodule "hw/mcu/st/stm32l5xx_hal_driver"] - path = hw/mcu/st/stm32l5xx_hal_driver - url = https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git -[submodule "hw/mcu/st/cmsis_device_wb"] - path = hw/mcu/st/cmsis_device_wb - url = https://github.com/STMicroelectronics/cmsis_device_wb.git -[submodule "hw/mcu/st/stm32wbxx_hal_driver"] - path = hw/mcu/st/stm32wbxx_hal_driver - url = https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git -[submodule "lib/sct_neopixel"] - path = lib/sct_neopixel - url = https://github.com/gsteiert/sct_neopixel [submodule "lib/FreeRTOS-Kernel"] path = lib/FreeRTOS-Kernel url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git -[submodule "hw/mcu/silabs/cmsis-dfp-efm32gg12b"] - path = hw/mcu/silabs/cmsis-dfp-efm32gg12b - url = https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b -[submodule "hw/mcu/renesas/rx"] - path = hw/mcu/renesas/rx - url = https://github.com/kkitayam/rx_device.git -[submodule "hw/mcu/nxp/lpcopen"] - path = hw/mcu/nxp/lpcopen - url = https://github.com/hathach/nxp_lpcopen.git -[submodule "hw/mcu/nxp/mcux-sdk"] - path = hw/mcu/nxp/mcux-sdk - url = https://github.com/NXPmicro/mcux-sdk.git -[submodule "hw/mcu/nxp/nxp_sdk"] - path = hw/mcu/nxp/nxp_sdk - url = https://github.com/hathach/nxp_sdk.git -[submodule "hw/mcu/gd/nuclei-sdk"] - path = hw/mcu/gd/nuclei-sdk - url = https://github.com/Nuclei-Software/nuclei-sdk.git -[submodule "hw/mcu/bridgetek/ft9xx/ft90x-sdk"] - path = hw/mcu/bridgetek/ft9xx/ft90x-sdk - url = https://github.com/BRTSG-FOSS/ft90x-sdk -[submodule "hw/mcu/mindmotion/mm32sdk"] - path = hw/mcu/mindmotion/mm32sdk - url = https://github.com/hathach/mm32sdk.git [submodule "hw/mcu/broadcom"] path = hw/mcu/broadcom url = https://github.com/adafruit/broadcom-peripherals.git branch = main-build -[submodule "hw/mcu/infineon/mtb-xmclib-cat3"] - path = hw/mcu/infineon/mtb-xmclib-cat3 - url = https://github.com/Infineon/mtb-xmclib-cat3.git -[submodule "hw/mcu/allwinner"] - path = hw/mcu/allwinner - url = https://github.com/hathach/allwinner_driver.git -[submodule "hw/mcu/wch/ch32v307"] - path = hw/mcu/wch/ch32v307 - url = https://github.com/openwch/ch32v307.git -[submodule "hw/mcu/raspberry_pi/Pico-PIO-USB"] - path = hw/mcu/raspberry_pi/Pico-PIO-USB - url = https://github.com/sekigon-gonnoc/Pico-PIO-USB.git -[submodule "hw/mcu/st/cmsis_device_u5"] - path = hw/mcu/st/cmsis_device_u5 - url = https://github.com/STMicroelectronics/cmsis_device_u5 -[submodule "hw/mcu/st/stm32u5xx_hal_driver"] - path = hw/mcu/st/stm32u5xx_hal_driver - url = https://github.com/STMicroelectronics/stm32u5xx_hal_driver diff --git a/hw/mcu/allwinner b/hw/mcu/allwinner deleted file mode 160000 index 8e5e89e8e..000000000 --- a/hw/mcu/allwinner +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8e5e89e8e132c0fd90e72d5422e5d3d68232b756 diff --git a/hw/mcu/bridgetek/ft9xx/ft90x-sdk b/hw/mcu/bridgetek/ft9xx/ft90x-sdk deleted file mode 160000 index 91060164a..000000000 --- a/hw/mcu/bridgetek/ft9xx/ft90x-sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 91060164afe239fcb394122e8bf9eb24d3194eb1 diff --git a/hw/mcu/gd/nuclei-sdk b/hw/mcu/gd/nuclei-sdk deleted file mode 160000 index 7eb7bfa9e..000000000 --- a/hw/mcu/gd/nuclei-sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7 diff --git a/hw/mcu/infineon/mtb-xmclib-cat3 b/hw/mcu/infineon/mtb-xmclib-cat3 deleted file mode 160000 index daf5500d0..000000000 --- a/hw/mcu/infineon/mtb-xmclib-cat3 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit daf5500d03cba23e68c2f241c30af79cd9d63880 diff --git a/hw/mcu/microchip b/hw/mcu/microchip deleted file mode 160000 index 9e8b37e30..000000000 --- a/hw/mcu/microchip +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 9e8b37e307d8404033bb881623a113931e1edf27 diff --git a/hw/mcu/mindmotion/mm32sdk b/hw/mcu/mindmotion/mm32sdk deleted file mode 160000 index 708a71529..000000000 --- a/hw/mcu/mindmotion/mm32sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 708a7152952ac595d24837069dcc0f7f59a4c30b diff --git a/hw/mcu/nuvoton b/hw/mcu/nuvoton deleted file mode 160000 index 2204191ec..000000000 --- a/hw/mcu/nuvoton +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2204191ec76283371419fbcec207da02e1bc22fa diff --git a/hw/mcu/nxp/lpcopen b/hw/mcu/nxp/lpcopen deleted file mode 160000 index 43c45c854..000000000 --- a/hw/mcu/nxp/lpcopen +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 43c45c85405a5dd114fff0ea95cca62837740c13 diff --git a/hw/mcu/nxp/mcux-sdk b/hw/mcu/nxp/mcux-sdk deleted file mode 160000 index ae2ab01d9..000000000 --- a/hw/mcu/nxp/mcux-sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294 diff --git a/hw/mcu/nxp/nxp_sdk b/hw/mcu/nxp/nxp_sdk deleted file mode 160000 index 845c8fc49..000000000 --- a/hw/mcu/nxp/nxp_sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 845c8fc49b6fb660f06a5c45225494eacb06f00c diff --git a/hw/mcu/raspberry_pi/Pico-PIO-USB b/hw/mcu/raspberry_pi/Pico-PIO-USB deleted file mode 160000 index 9ff3f52fd..000000000 --- a/hw/mcu/raspberry_pi/Pico-PIO-USB +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665 diff --git a/hw/mcu/renesas/rx b/hw/mcu/renesas/rx deleted file mode 160000 index 706b4e0cf..000000000 --- a/hw/mcu/renesas/rx +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 706b4e0cf485605c32351e2f90f5698267996023 diff --git a/hw/mcu/silabs/cmsis-dfp-efm32gg12b b/hw/mcu/silabs/cmsis-dfp-efm32gg12b deleted file mode 160000 index f1c31b788..000000000 --- a/hw/mcu/silabs/cmsis-dfp-efm32gg12b +++ /dev/null @@ -1 +0,0 @@ -Subproject commit f1c31b7887669cb230b3ea63f9b56769078960bc diff --git a/hw/mcu/sony/cxd56/spresense-exported-sdk b/hw/mcu/sony/cxd56/spresense-exported-sdk deleted file mode 160000 index 2ec2a1538..000000000 --- a/hw/mcu/sony/cxd56/spresense-exported-sdk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2ec2a1538362696118dc3fdf56f33dacaf8f4067 diff --git a/hw/mcu/st/cmsis_device_f0 b/hw/mcu/st/cmsis_device_f0 deleted file mode 160000 index 2fc25ee22..000000000 --- a/hw/mcu/st/cmsis_device_f0 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2fc25ee22264bc27034358be0bd400b893ef837e diff --git a/hw/mcu/st/cmsis_device_f1 b/hw/mcu/st/cmsis_device_f1 deleted file mode 160000 index 6601104a6..000000000 --- a/hw/mcu/st/cmsis_device_f1 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 6601104a6397299b7304fd5bcd9a491f56cb23a6 diff --git a/hw/mcu/st/cmsis_device_f2 b/hw/mcu/st/cmsis_device_f2 deleted file mode 160000 index 182fcb368..000000000 --- a/hw/mcu/st/cmsis_device_f2 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 182fcb3681ce116816feb41b7764f1b019ce796f diff --git a/hw/mcu/st/cmsis_device_f3 b/hw/mcu/st/cmsis_device_f3 deleted file mode 160000 index 5e4ee5ed7..000000000 --- a/hw/mcu/st/cmsis_device_f3 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b diff --git a/hw/mcu/st/cmsis_device_f4 b/hw/mcu/st/cmsis_device_f4 deleted file mode 160000 index 2615e866f..000000000 --- a/hw/mcu/st/cmsis_device_f4 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2615e866fa48fe1ff1af9e31c348813f2b19e7ec diff --git a/hw/mcu/st/cmsis_device_f7 b/hw/mcu/st/cmsis_device_f7 deleted file mode 160000 index fc676ef1a..000000000 --- a/hw/mcu/st/cmsis_device_f7 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit fc676ef1ad177eb874eaa06444d3d75395fc51f4 diff --git a/hw/mcu/st/cmsis_device_g0 b/hw/mcu/st/cmsis_device_g0 deleted file mode 160000 index 08258b28e..000000000 --- a/hw/mcu/st/cmsis_device_g0 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 08258b28ee95f50cb9624d152a1cbf084be1f9a5 diff --git a/hw/mcu/st/cmsis_device_g4 b/hw/mcu/st/cmsis_device_g4 deleted file mode 160000 index ce822adb1..000000000 --- a/hw/mcu/st/cmsis_device_g4 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit ce822adb1dc552b3aedd13621edbc7fdae124878 diff --git a/hw/mcu/st/cmsis_device_h7 b/hw/mcu/st/cmsis_device_h7 deleted file mode 160000 index 60dc2c913..000000000 --- a/hw/mcu/st/cmsis_device_h7 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 60dc2c913203dc8629dc233d4384dcc41c91e77f diff --git a/hw/mcu/st/cmsis_device_l0 b/hw/mcu/st/cmsis_device_l0 deleted file mode 160000 index 06748ca1f..000000000 --- a/hw/mcu/st/cmsis_device_l0 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 06748ca1f93827befdb8b794402320d94d02004f diff --git a/hw/mcu/st/cmsis_device_l1 b/hw/mcu/st/cmsis_device_l1 deleted file mode 160000 index 7f16ec0a1..000000000 --- a/hw/mcu/st/cmsis_device_l1 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 7f16ec0a1c4c063f84160b4cc6bf88ad554a823e diff --git a/hw/mcu/st/cmsis_device_l4 b/hw/mcu/st/cmsis_device_l4 deleted file mode 160000 index 6ca7312fa..000000000 --- a/hw/mcu/st/cmsis_device_l4 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 6ca7312fa6a5a460b5a5a63d66da527fdd8359a6 diff --git a/hw/mcu/st/cmsis_device_l5 b/hw/mcu/st/cmsis_device_l5 deleted file mode 160000 index d922865fc..000000000 --- a/hw/mcu/st/cmsis_device_l5 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit d922865fc0326a102c26211c44b8e42f52c1e53d diff --git a/hw/mcu/st/cmsis_device_u5 b/hw/mcu/st/cmsis_device_u5 deleted file mode 160000 index bc00f3c9d..000000000 --- a/hw/mcu/st/cmsis_device_u5 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit bc00f3c9d8a4e25220f84c26d414902cc6bdf566 diff --git a/hw/mcu/st/cmsis_device_wb b/hw/mcu/st/cmsis_device_wb deleted file mode 160000 index 9c5d1920d..000000000 --- a/hw/mcu/st/cmsis_device_wb +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 9c5d1920dd9fabbe2548e10561d63db829bb744f diff --git a/hw/mcu/st/stm32f0xx_hal_driver b/hw/mcu/st/stm32f0xx_hal_driver deleted file mode 160000 index 0e95cd886..000000000 --- a/hw/mcu/st/stm32f0xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 0e95cd88657030f640a11e690a8a5186c7712ea5 diff --git a/hw/mcu/st/stm32f1xx_hal_driver b/hw/mcu/st/stm32f1xx_hal_driver deleted file mode 160000 index 1dd9d3662..000000000 --- a/hw/mcu/st/stm32f1xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29 diff --git a/hw/mcu/st/stm32f2xx_hal_driver b/hw/mcu/st/stm32f2xx_hal_driver deleted file mode 160000 index c75ace9b9..000000000 --- a/hw/mcu/st/stm32f2xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit c75ace9b908a9aca631193ebf2466963b8ea33d0 diff --git a/hw/mcu/st/stm32f3xx_hal_driver b/hw/mcu/st/stm32f3xx_hal_driver deleted file mode 160000 index 1761b6207..000000000 --- a/hw/mcu/st/stm32f3xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 1761b6207318ede021706e75aae78f452d72b6fa diff --git a/hw/mcu/st/stm32f4xx_hal_driver b/hw/mcu/st/stm32f4xx_hal_driver deleted file mode 160000 index 04e99fbda..000000000 --- a/hw/mcu/st/stm32f4xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 04e99fbdabd00ab8f370f377c66b0a4570365b58 diff --git a/hw/mcu/st/stm32f7xx_hal_driver b/hw/mcu/st/stm32f7xx_hal_driver deleted file mode 160000 index f7ffdf6bf..000000000 --- a/hw/mcu/st/stm32f7xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit f7ffdf6bf72110e58b42c632b0a051df5997e4ee diff --git a/hw/mcu/st/stm32g0xx_hal_driver b/hw/mcu/st/stm32g0xx_hal_driver deleted file mode 160000 index 5b53e6cee..000000000 --- a/hw/mcu/st/stm32g0xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 5b53e6cee664a82b16c86491aa0060e2110c00cb diff --git a/hw/mcu/st/stm32g4xx_hal_driver b/hw/mcu/st/stm32g4xx_hal_driver deleted file mode 160000 index 8b4518417..000000000 --- a/hw/mcu/st/stm32g4xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8b4518417706d42eef5c14e56a650005abf478a8 diff --git a/hw/mcu/st/stm32h7xx_hal_driver b/hw/mcu/st/stm32h7xx_hal_driver deleted file mode 160000 index d8461b980..000000000 --- a/hw/mcu/st/stm32h7xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04 diff --git a/hw/mcu/st/stm32l0xx_hal_driver b/hw/mcu/st/stm32l0xx_hal_driver deleted file mode 160000 index fbdacaf6f..000000000 --- a/hw/mcu/st/stm32l0xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b diff --git a/hw/mcu/st/stm32l1xx_hal_driver b/hw/mcu/st/stm32l1xx_hal_driver deleted file mode 160000 index 44efc446f..000000000 --- a/hw/mcu/st/stm32l1xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 44efc446fa69ed8344e7fd966e68ed11043b35d9 diff --git a/hw/mcu/st/stm32l4xx_hal_driver b/hw/mcu/st/stm32l4xx_hal_driver deleted file mode 160000 index aee3d5bf2..000000000 --- a/hw/mcu/st/stm32l4xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit aee3d5bf283ae5df87532b781bdd01b7caf256fc diff --git a/hw/mcu/st/stm32l5xx_hal_driver b/hw/mcu/st/stm32l5xx_hal_driver deleted file mode 160000 index 675c32a75..000000000 --- a/hw/mcu/st/stm32l5xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 675c32a75df37f39d50d61f51cb0dcf53f07e1cb diff --git a/hw/mcu/st/stm32u5xx_hal_driver b/hw/mcu/st/stm32u5xx_hal_driver deleted file mode 160000 index 2e1d4cdb3..000000000 --- a/hw/mcu/st/stm32u5xx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2e1d4cdb386e33391cb261dfff4fefa92e4aa35a diff --git a/hw/mcu/st/stm32wbxx_hal_driver b/hw/mcu/st/stm32wbxx_hal_driver deleted file mode 160000 index 2c5f06638..000000000 --- a/hw/mcu/st/stm32wbxx_hal_driver +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2c5f06638be516c1b772f768456ba637f077bac8 diff --git a/hw/mcu/wch/ch32v307 b/hw/mcu/wch/ch32v307 deleted file mode 160000 index 17761f5cf..000000000 --- a/hw/mcu/wch/ch32v307 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 17761f5cf9dbbf2dcf665b7c04934188add20082 diff --git a/lib/sct_neopixel b/lib/sct_neopixel deleted file mode 160000 index e73e04ca6..000000000 --- a/lib/sct_neopixel +++ /dev/null @@ -1 +0,0 @@ -Subproject commit e73e04ca63495672d955f9268e003cffe168fcd8 From 7e6a6e75bcdba408e6fd6dabc57d110b168e3d17 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 23:41:27 +0700 Subject: [PATCH 037/142] remove the rest of mcu submodules --- .gitmodules | 7 ------- hw/mcu/broadcom | 1 - hw/mcu/ti | 1 - 3 files changed, 9 deletions(-) delete mode 160000 hw/mcu/broadcom delete mode 160000 hw/mcu/ti diff --git a/.gitmodules b/.gitmodules index e0eb5fb35..469192026 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,16 +1,9 @@ [submodule "tools/uf2"] path = tools/uf2 url = https://github.com/microsoft/uf2.git -[submodule "hw/mcu/ti"] - path = hw/mcu/ti - url = https://github.com/hathach/ti_driver.git [submodule "lib/lwip"] path = lib/lwip url = https://github.com/lwip-tcpip/lwip.git [submodule "lib/FreeRTOS-Kernel"] path = lib/FreeRTOS-Kernel url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git -[submodule "hw/mcu/broadcom"] - path = hw/mcu/broadcom - url = https://github.com/adafruit/broadcom-peripherals.git - branch = main-build diff --git a/hw/mcu/broadcom b/hw/mcu/broadcom deleted file mode 160000 index 083700860..000000000 --- a/hw/mcu/broadcom +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 08370086080759ed54ac1136d62d2ad24c6fa267 diff --git a/hw/mcu/ti b/hw/mcu/ti deleted file mode 160000 index 143ed6cc2..000000000 --- a/hw/mcu/ti +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 143ed6cc20a7615d042b03b21e070197d473e6e5 From 704f3ddeb5e6bfa3b4111a998564d979a9a95d1d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 23:43:07 +0700 Subject: [PATCH 038/142] add dependencies repo to git ignore --- .gitignore | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/.gitignore b/.gitignore index 87a5faa80..ba3baa9b6 100644 --- a/.gitignore +++ b/.gitignore @@ -28,3 +28,57 @@ cov-int /_bin/ __pycache__ +# submodules +hw/mcu/allwinner +hw/mcu/bridgetek/ft9xx/ft90x-sdk +hw/mcu/broadcom +hw/mcu/gd/nuclei-sdk +hw/mcu/infineon/mtb-xmclib-cat3 +hw/mcu/microchip +hw/mcu/mindmotion/mm32sdk +hw/mcu/nordic/nrfx +hw/mcu/nuvoton +hw/mcu/nxp/lpcopen +hw/mcu/nxp/mcux-sdk +hw/mcu/nxp/nxp_sdk +hw/mcu/raspberry_pi/Pico-PIO-USB +hw/mcu/renesas/rx +hw/mcu/silabs/cmsis-dfp-efm32gg12b +hw/mcu/sony/cxd56/spresense-exported-sdk +hw/mcu/st/cmsis_device_f0 +hw/mcu/st/cmsis_device_f1 +hw/mcu/st/cmsis_device_f2 +hw/mcu/st/cmsis_device_f3 +hw/mcu/st/cmsis_device_f4 +hw/mcu/st/cmsis_device_f7 +hw/mcu/st/cmsis_device_g0 +hw/mcu/st/cmsis_device_g4 +hw/mcu/st/cmsis_device_h7 +hw/mcu/st/cmsis_device_l0 +hw/mcu/st/cmsis_device_l1 +hw/mcu/st/cmsis_device_l4 +hw/mcu/st/cmsis_device_l5 +hw/mcu/st/cmsis_device_u5 +hw/mcu/st/cmsis_device_wb +hw/mcu/st/stm32f0xx_hal_driver +hw/mcu/st/stm32f1xx_hal_driver +hw/mcu/st/stm32f2xx_hal_driver +hw/mcu/st/stm32f3xx_hal_driver +hw/mcu/st/stm32f4xx_hal_driver +hw/mcu/st/stm32f7xx_hal_driver +hw/mcu/st/stm32g0xx_hal_driver +hw/mcu/st/stm32g4xx_hal_driver +hw/mcu/st/stm32h7xx_hal_driver +hw/mcu/st/stm32l0xx_hal_driver +hw/mcu/st/stm32l1xx_hal_driver +hw/mcu/st/stm32l4xx_hal_driver +hw/mcu/st/stm32l5xx_hal_driver +hw/mcu/st/stm32u5xx_hal_driver +hw/mcu/st/stm32wbxx_hal_driver +hw/mcu/ti +hw/mcu/wch/ch32v307 +lib/CMSIS_5 +lib/FreeRTOS-Kernel +lib/lwip +lib/sct_neopixel +tools/uf2 From 206a9a21e6297b49287605ad8ddf1ab47124358e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 23:54:30 +0700 Subject: [PATCH 039/142] fix ci --- .github/workflows/build_aarch64.yml | 2 +- .github/workflows/build_iar.yml | 8 +------- hw/bsp/rx/boards/gr_citrus/board.mk | 2 -- 3 files changed, 2 insertions(+), 10 deletions(-) diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml index 5818ea432..30df2bdf0 100644 --- a/.github/workflows/build_aarch64.yml +++ b/.github/workflows/build_aarch64.yml @@ -43,7 +43,7 @@ jobs: uses: actions/checkout@v3 - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel + run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - name: Checkout hathach/linkermap uses: actions/checkout@v3 diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 7f2a92010..afb6efb6b 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -44,14 +44,8 @@ jobs: - name: Checkout submodules and dependencies run: | - git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel + git submodule update --init lib/FreeRTOS-Kernel lib/lwip python3 tools/get_family_deps.py ${{ matrix.family }} - #- name: Checkout pico-sdk for rp2040 - # if: matrix.family == 'rp2040' - # run: | - # git clone --depth 1 -b develop https://github.com/raspberrypi/pico-sdk ~/pico-sdk - # echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk - - name: Build run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk index 0eba94610..235cefc61 100644 --- a/hw/bsp/rx/boards/gr_citrus/board.mk +++ b/hw/bsp/rx/boards/gr_citrus/board.mk @@ -1,5 +1,3 @@ -DEPS_SUBMODULES += hw/mcu/renesas/rx - CFLAGS += \ -mcpu=rx610 \ -misa=v1 \ From 4857abdc6bc58ebd06ce87c0139ed8a789b0d440 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 10 Mar 2023 14:01:51 -0500 Subject: [PATCH 040/142] rp2040: include hardware/sync.h explicitly --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 8df7bef2b..37dec1cbf 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -29,6 +29,7 @@ #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUD_RPI_PIO_USB #include "pico.h" +#include "hardware/sync.h" #include "rp2040_usb.h" #if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX From 7428a16d2d5891b5ceadcd0530798c8933d02f6f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 11 Mar 2023 08:23:21 +0700 Subject: [PATCH 041/142] remove ra submodules --- .gitmodules | 3 --- hw/bsp/ra/family.mk | 2 +- hw/mcu/renesas/fsp | 1 - tools/get_deps.py | 1 + 4 files changed, 2 insertions(+), 5 deletions(-) delete mode 160000 hw/mcu/renesas/fsp diff --git a/.gitmodules b/.gitmodules index 320a5f7f6..469192026 100644 --- a/.gitmodules +++ b/.gitmodules @@ -7,6 +7,3 @@ [submodule "lib/FreeRTOS-Kernel"] path = lib/FreeRTOS-Kernel url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git -[submodule "hw/mcu/renesas/fsp"] - path = hw/mcu/renesas/fsp - url = https://github.com/renesas/fsp diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index 6b7f43345..e75e74104 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -40,7 +40,7 @@ SRC_C += \ $(FSP_BOARD_DIR)/board_leds.c INC += \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(BOARD_PATH)/fsp_cfg \ diff --git a/hw/mcu/renesas/fsp b/hw/mcu/renesas/fsp deleted file mode 160000 index 8dc14709f..000000000 --- a/hw/mcu/renesas/fsp +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8dc14709f2a6518b43f71efad70d900b7718d9f1 diff --git a/tools/get_deps.py b/tools/get_deps.py index 6e7093816..df606bfab 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -18,6 +18,7 @@ deps_list = { 'hw/mcu/nxp/mcux-sdk' : [ 'https://github.com/NXPmicro/mcux-sdk.git', 'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'], 'hw/mcu/nxp/nxp_sdk' : [ 'https://github.com/hathach/nxp_sdk.git', '845c8fc49b6fb660f06a5c45225494eacb06f00c'], 'hw/mcu/raspberry_pi/Pico-PIO-USB' : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'], + 'hw/mcu/renesas/fsp' : [ 'https://github.com/renesas/fsp.git', '8dc14709f2a6518b43f71efad70d900b7718d9f1'], 'hw/mcu/renesas/rx' : [ 'https://github.com/kkitayam/rx_device.git', '706b4e0cf485605c32351e2f90f5698267996023'], 'hw/mcu/silabs/cmsis-dfp-efm32gg12b' : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git', 'f1c31b7887669cb230b3ea63f9b56769078960bc'], 'hw/mcu/sony/cxd56/spresense-exported-sdk' : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git', '2ec2a1538362696118dc3fdf56f33dacaf8f4067'], From cae05c65934384d2503baaad9ae55d4c68db6fdd Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 11 Mar 2023 08:33:08 +0700 Subject: [PATCH 042/142] update get-deps.py --- tools/get_deps.py | 113 +++++++++++++++++++++++----------------------- 1 file changed, 56 insertions(+), 57 deletions(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 6e7093816..29bb35f15 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -5,59 +5,59 @@ from multiprocessing import Pool # path, url, commit (Alphabet sorted by path) deps_list = { - 'hw/mcu/allwinner' : [ 'https://github.com/hathach/allwinner_driver.git', '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'], - 'hw/mcu/bridgetek/ft9xx/ft90x-sdk' : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git', '91060164afe239fcb394122e8bf9eb24d3194eb1'], - 'hw/mcu/broadcom' : [ 'https://github.com/adafruit/broadcom-peripherals.git', '08370086080759ed54ac1136d62d2ad24c6fa267'], - 'hw/mcu/gd/nuclei-sdk' : [ 'https://github.com/Nuclei-Software/nuclei-sdk.git', '7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7'], - 'hw/mcu/infineon/mtb-xmclib-cat3' : [ 'https://github.com/Infineon/mtb-xmclib-cat3.git', 'daf5500d03cba23e68c2f241c30af79cd9d63880'], - 'hw/mcu/microchip' : [ 'https://github.com/hathach/microchip_driver.git', '9e8b37e307d8404033bb881623a113931e1edf27'], - 'hw/mcu/mindmotion/mm32sdk' : [ 'https://github.com/hathach/mm32sdk.git', '708a7152952ac595d24837069dcc0f7f59a4c30b'], - 'hw/mcu/nordic/nrfx' : [ 'https://github.com/NordicSemiconductor/nrfx.git', '281cc2e178fd9a470d844b3afdea9eb322a0b0e8'], - 'hw/mcu/nuvoton' : [ 'https://github.com/majbthrd/nuc_driver.git', '2204191ec76283371419fbcec207da02e1bc22fa'], - 'hw/mcu/nxp/lpcopen' : [ 'https://github.com/hathach/nxp_lpcopen.git', '43c45c85405a5dd114fff0ea95cca62837740c13'], - 'hw/mcu/nxp/mcux-sdk' : [ 'https://github.com/NXPmicro/mcux-sdk.git', 'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'], - 'hw/mcu/nxp/nxp_sdk' : [ 'https://github.com/hathach/nxp_sdk.git', '845c8fc49b6fb660f06a5c45225494eacb06f00c'], - 'hw/mcu/raspberry_pi/Pico-PIO-USB' : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'], - 'hw/mcu/renesas/rx' : [ 'https://github.com/kkitayam/rx_device.git', '706b4e0cf485605c32351e2f90f5698267996023'], - 'hw/mcu/silabs/cmsis-dfp-efm32gg12b' : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git', 'f1c31b7887669cb230b3ea63f9b56769078960bc'], - 'hw/mcu/sony/cxd56/spresense-exported-sdk' : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git', '2ec2a1538362696118dc3fdf56f33dacaf8f4067'], - 'hw/mcu/st/cmsis_device_f0' : [ 'https://github.com/STMicroelectronics/cmsis_device_f0.git', '2fc25ee22264bc27034358be0bd400b893ef837e'], - 'hw/mcu/st/cmsis_device_f1' : [ 'https://github.com/STMicroelectronics/cmsis_device_f1.git', '6601104a6397299b7304fd5bcd9a491f56cb23a6'], - 'hw/mcu/st/cmsis_device_f2' : [ 'https://github.com/STMicroelectronics/cmsis_device_f2.git', '182fcb3681ce116816feb41b7764f1b019ce796f'], - 'hw/mcu/st/cmsis_device_f3' : [ 'https://github.com/STMicroelectronics/cmsis_device_f3.git', '5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b'], - 'hw/mcu/st/cmsis_device_f4' : [ 'https://github.com/STMicroelectronics/cmsis_device_f4.git', '2615e866fa48fe1ff1af9e31c348813f2b19e7ec'], - 'hw/mcu/st/cmsis_device_f7' : [ 'https://github.com/STMicroelectronics/cmsis_device_f7.git', 'fc676ef1ad177eb874eaa06444d3d75395fc51f4'], - 'hw/mcu/st/cmsis_device_g0' : [ 'https://github.com/STMicroelectronics/cmsis_device_g0.git', '08258b28ee95f50cb9624d152a1cbf084be1f9a5'], - 'hw/mcu/st/cmsis_device_g4' : [ 'https://github.com/STMicroelectronics/cmsis_device_g4.git', 'ce822adb1dc552b3aedd13621edbc7fdae124878'], - 'hw/mcu/st/cmsis_device_h7' : [ 'https://github.com/STMicroelectronics/cmsis_device_h7.git', '60dc2c913203dc8629dc233d4384dcc41c91e77f'], - 'hw/mcu/st/cmsis_device_l0' : [ 'https://github.com/STMicroelectronics/cmsis_device_l0.git', '06748ca1f93827befdb8b794402320d94d02004f'], - 'hw/mcu/st/cmsis_device_l1' : [ 'https://github.com/STMicroelectronics/cmsis_device_l1.git', '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e'], - 'hw/mcu/st/cmsis_device_l4' : [ 'https://github.com/STMicroelectronics/cmsis_device_l4.git', '6ca7312fa6a5a460b5a5a63d66da527fdd8359a6'], - 'hw/mcu/st/cmsis_device_l5' : [ 'https://github.com/STMicroelectronics/cmsis_device_l5.git', 'd922865fc0326a102c26211c44b8e42f52c1e53d'], - 'hw/mcu/st/cmsis_device_u5' : [ 'https://github.com/STMicroelectronics/cmsis_device_u5.git', 'bc00f3c9d8a4e25220f84c26d414902cc6bdf566'], - 'hw/mcu/st/cmsis_device_wb' : [ 'https://github.com/STMicroelectronics/cmsis_device_wb.git', '9c5d1920dd9fabbe2548e10561d63db829bb744f'], - 'hw/mcu/st/stm32f0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git', '0e95cd88657030f640a11e690a8a5186c7712ea5'], - 'hw/mcu/st/stm32f1xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git', '1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29'], - 'hw/mcu/st/stm32f2xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git', 'c75ace9b908a9aca631193ebf2466963b8ea33d0'], - 'hw/mcu/st/stm32f3xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git', '1761b6207318ede021706e75aae78f452d72b6fa'], - 'hw/mcu/st/stm32f4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git', '04e99fbdabd00ab8f370f377c66b0a4570365b58'], - 'hw/mcu/st/stm32f7xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git', 'f7ffdf6bf72110e58b42c632b0a051df5997e4ee'], - 'hw/mcu/st/stm32g0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git', '5b53e6cee664a82b16c86491aa0060e2110c00cb'], - 'hw/mcu/st/stm32g4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git', '8b4518417706d42eef5c14e56a650005abf478a8'], - 'hw/mcu/st/stm32h7xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git', 'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04'], - 'hw/mcu/st/stm32l0xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git', 'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b'], - 'hw/mcu/st/stm32l1xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git', '44efc446fa69ed8344e7fd966e68ed11043b35d9'], - 'hw/mcu/st/stm32l4xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git', 'aee3d5bf283ae5df87532b781bdd01b7caf256fc'], - 'hw/mcu/st/stm32l5xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git', '675c32a75df37f39d50d61f51cb0dcf53f07e1cb'], - 'hw/mcu/st/stm32u5xx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git', '2e1d4cdb386e33391cb261dfff4fefa92e4aa35a'], - 'hw/mcu/st/stm32wbxx_hal_driver' : [ 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git', '2c5f06638be516c1b772f768456ba637f077bac8'], - 'hw/mcu/ti' : [ 'https://github.com/hathach/ti_driver.git', '143ed6cc20a7615d042b03b21e070197d473e6e5'], - 'hw/mcu/wch/ch32v307' : [ 'https://github.com/openwch/ch32v307.git', '17761f5cf9dbbf2dcf665b7c04934188add20082'], - 'lib/CMSIS_5' : [ 'https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f'], - #'lib/FreeRTOS-Kernel' : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git', '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'], - #'lib/lwip' : [ 'https://github.com/lwip-tcpip/lwip.git', '159e31b689577dbf69cf0683bbaffbd71fa5ee10'], - 'lib/sct_neopixel' : [ 'https://github.com/gsteiert/sct_neopixel.git', 'e73e04ca63495672d955f9268e003cffe168fcd8'], - #'tools/uf2' : [ 'https://github.com/microsoft/uf2.git', '19615407727073e36d81bf239c52108ba92e7660'], + 'hw/mcu/allwinner' : ['8e5e89e8e132c0fd90e72d5422e5d3d68232b756', 'https://github.com/hathach/allwinner_driver.git' ], + 'hw/mcu/bridgetek/ft9xx/ft90x-sdk' : ['91060164afe239fcb394122e8bf9eb24d3194eb1', 'https://github.com/BRTSG-FOSS/ft90x-sdk.git' ], + 'hw/mcu/broadcom' : ['08370086080759ed54ac1136d62d2ad24c6fa267', 'https://github.com/adafruit/broadcom-peripherals.git' ], + 'hw/mcu/gd/nuclei-sdk' : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git' ], + 'hw/mcu/infineon/mtb-xmclib-cat3' : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git' ], + 'hw/mcu/microchip' : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git' ], + 'hw/mcu/mindmotion/mm32sdk' : ['708a7152952ac595d24837069dcc0f7f59a4c30b', 'https://github.com/hathach/mm32sdk.git' ], + 'hw/mcu/nordic/nrfx' : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git' ], + 'hw/mcu/nuvoton' : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git' ], + 'hw/mcu/nxp/lpcopen' : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git' ], + 'hw/mcu/nxp/mcux-sdk' : ['ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294', 'https://github.com/NXPmicro/mcux-sdk.git' ], + 'hw/mcu/nxp/nxp_sdk' : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git' ], + 'hw/mcu/raspberry_pi/Pico-PIO-USB' : ['9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git' ], + 'hw/mcu/renesas/rx' : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git' ], + 'hw/mcu/silabs/cmsis-dfp-efm32gg12b' : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git' ], + 'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git' ], + 'hw/mcu/st/cmsis_device_f0' : ['2fc25ee22264bc27034358be0bd400b893ef837e', 'https://github.com/STMicroelectronics/cmsis_device_f0.git' ], + 'hw/mcu/st/cmsis_device_f1' : ['6601104a6397299b7304fd5bcd9a491f56cb23a6', 'https://github.com/STMicroelectronics/cmsis_device_f1.git' ], + 'hw/mcu/st/cmsis_device_f2' : ['182fcb3681ce116816feb41b7764f1b019ce796f', 'https://github.com/STMicroelectronics/cmsis_device_f2.git' ], + 'hw/mcu/st/cmsis_device_f3' : ['5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b', 'https://github.com/STMicroelectronics/cmsis_device_f3.git' ], + 'hw/mcu/st/cmsis_device_f4' : ['2615e866fa48fe1ff1af9e31c348813f2b19e7ec', 'https://github.com/STMicroelectronics/cmsis_device_f4.git' ], + 'hw/mcu/st/cmsis_device_f7' : ['fc676ef1ad177eb874eaa06444d3d75395fc51f4', 'https://github.com/STMicroelectronics/cmsis_device_f7.git' ], + 'hw/mcu/st/cmsis_device_g0' : ['08258b28ee95f50cb9624d152a1cbf084be1f9a5', 'https://github.com/STMicroelectronics/cmsis_device_g0.git' ], + 'hw/mcu/st/cmsis_device_g4' : ['ce822adb1dc552b3aedd13621edbc7fdae124878', 'https://github.com/STMicroelectronics/cmsis_device_g4.git' ], + 'hw/mcu/st/cmsis_device_h7' : ['60dc2c913203dc8629dc233d4384dcc41c91e77f', 'https://github.com/STMicroelectronics/cmsis_device_h7.git' ], + 'hw/mcu/st/cmsis_device_l0' : ['06748ca1f93827befdb8b794402320d94d02004f', 'https://github.com/STMicroelectronics/cmsis_device_l0.git' ], + 'hw/mcu/st/cmsis_device_l1' : ['7f16ec0a1c4c063f84160b4cc6bf88ad554a823e', 'https://github.com/STMicroelectronics/cmsis_device_l1.git' ], + 'hw/mcu/st/cmsis_device_l4' : ['6ca7312fa6a5a460b5a5a63d66da527fdd8359a6', 'https://github.com/STMicroelectronics/cmsis_device_l4.git' ], + 'hw/mcu/st/cmsis_device_l5' : ['d922865fc0326a102c26211c44b8e42f52c1e53d', 'https://github.com/STMicroelectronics/cmsis_device_l5.git' ], + 'hw/mcu/st/cmsis_device_u5' : ['bc00f3c9d8a4e25220f84c26d414902cc6bdf566', 'https://github.com/STMicroelectronics/cmsis_device_u5.git' ], + 'hw/mcu/st/cmsis_device_wb' : ['9c5d1920dd9fabbe2548e10561d63db829bb744f', 'https://github.com/STMicroelectronics/cmsis_device_wb.git' ], + 'hw/mcu/st/stm32f0xx_hal_driver' : ['0e95cd88657030f640a11e690a8a5186c7712ea5', 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git'], + 'hw/mcu/st/stm32f1xx_hal_driver' : ['1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29', 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git'], + 'hw/mcu/st/stm32f2xx_hal_driver' : ['c75ace9b908a9aca631193ebf2466963b8ea33d0', 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git'], + 'hw/mcu/st/stm32f3xx_hal_driver' : ['1761b6207318ede021706e75aae78f452d72b6fa', 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git'], + 'hw/mcu/st/stm32f4xx_hal_driver' : ['04e99fbdabd00ab8f370f377c66b0a4570365b58', 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git'], + 'hw/mcu/st/stm32f7xx_hal_driver' : ['f7ffdf6bf72110e58b42c632b0a051df5997e4ee', 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git'], + 'hw/mcu/st/stm32g0xx_hal_driver' : ['5b53e6cee664a82b16c86491aa0060e2110c00cb', 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git'], + 'hw/mcu/st/stm32g4xx_hal_driver' : ['8b4518417706d42eef5c14e56a650005abf478a8', 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git'], + 'hw/mcu/st/stm32h7xx_hal_driver' : ['d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04', 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git'], + 'hw/mcu/st/stm32l0xx_hal_driver' : ['fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b', 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git'], + 'hw/mcu/st/stm32l1xx_hal_driver' : ['44efc446fa69ed8344e7fd966e68ed11043b35d9', 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git'], + 'hw/mcu/st/stm32l4xx_hal_driver' : ['aee3d5bf283ae5df87532b781bdd01b7caf256fc', 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git'], + 'hw/mcu/st/stm32l5xx_hal_driver' : ['675c32a75df37f39d50d61f51cb0dcf53f07e1cb', 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git'], + 'hw/mcu/st/stm32u5xx_hal_driver' : ['2e1d4cdb386e33391cb261dfff4fefa92e4aa35a', 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git'], + 'hw/mcu/st/stm32wbxx_hal_driver' : ['2c5f06638be516c1b772f768456ba637f077bac8', 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git'], + 'hw/mcu/ti' : ['143ed6cc20a7615d042b03b21e070197d473e6e5', 'https://github.com/hathach/ti_driver.git' ], + 'hw/mcu/wch/ch32v307' : ['17761f5cf9dbbf2dcf665b7c04934188add20082', 'https://github.com/openwch/ch32v307.git' ], + 'lib/CMSIS_5' : ['20285262657d1b482d132d20d755c8c330d55c1f', 'https://github.com/ARM-software/CMSIS_5.git' ], + 'lib/FreeRTOS-Kernel' : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git' ], + 'lib/lwip' : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git' ], + 'lib/sct_neopixel' : ['e73e04ca63495672d955f9268e003cffe168fcd8', 'https://github.com/gsteiert/sct_neopixel.git' ], + 'tools/uf2' : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git' ], } # TOP is tinyusb root dir @@ -68,8 +68,8 @@ def get_a_dep(d): if d not in deps_list.keys(): print('{} is not found in dependency list') return 1 - url = deps_list[d][0] - commit = deps_list[d][1] + commit = deps_list[d][0] + url = deps_list[d][1] print('cloning {} with {}'.format(d, url)) p = Path(TOP / d) @@ -96,6 +96,5 @@ if __name__ == "__main__": status = 0 all_deps = sys.argv[1:] with Pool() as pool: - result = pool.map(get_a_dep, all_deps) - status = sum(result) + status = sum(pool.map(get_a_dep, all_deps)) sys.exit(status) From e045995407e060800877d6a6421f83a413f9e084 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 11 Mar 2023 08:54:51 +0700 Subject: [PATCH 043/142] minor update get_deps --- tools/get_deps.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 5c6bef389..3aa95ece5 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -79,8 +79,8 @@ def get_a_dep(d): # Init git deps if not existed if not p.exists(): p.mkdir(parents=True) - subprocess.run("{} init".format(git_cmd), shell=True) - subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True) + subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) # Check if commit is already fetched result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) @@ -88,7 +88,7 @@ def get_a_dep(d): if commit != head: subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True) - subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True) + subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) return 0 From 0a7c08d16e10b9a252c7daeb3fe9b3abdd6ff225 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 12 Mar 2023 16:01:24 +0700 Subject: [PATCH 044/142] minor format --- src/portable/renesas/link/dcd_link.c | 57 +++++++++++++++++---- src/portable/renesas/link/hcd_link.c | 76 ++++++++++++++++++++-------- src/portable/renesas/link/link_rx.h | 6 +-- 3 files changed, 104 insertions(+), 35 deletions(-) diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index dcbd68b8d..ce29769e0 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -31,10 +31,8 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_RAXXX) +#if CFG_TUD_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \ + TU_CHECK_MCU(OPT_MCU_RAXXX)) #include "device/dcd.h" #include "link_type.h" @@ -250,8 +248,9 @@ static bool pipe0_xfer_in(void) pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) + if (len < mps) { LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + } pipe->remaining = rem - len; return false; } @@ -273,8 +272,9 @@ static bool pipe0_xfer_out(void) pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) + if (len < mps) { LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + } pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -306,10 +306,11 @@ static bool pipe_xfer_in(unsigned num) pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) + if (len < mps) { LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + } LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ + while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -333,10 +334,11 @@ static bool pipe_xfer_out(unsigned num) pipe->buf = (uint8_t*)buf + len; } } - if (len < mps) + if (len < mps) { LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + } LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -377,7 +379,7 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u /* configure fifo direction and access unit settings */ if (ep_addr) { /* IN, 2 bytes */ LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | - (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; } else { /* OUT, a byte */ LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; @@ -541,10 +543,43 @@ static void process_set_address(uint8_t rhport) /*------------------------------------------------------------------*/ /* Device API *------------------------------------------------------------------*/ + +#if 0 // previously present in the rx driver before generalization +static uint32_t disable_interrupt(void) +{ + uint32_t pswi; +#if defined(__CCRX__) + pswi = get_psw() & 0x010000; + clrpsw_i(); +#else + pswi = __builtin_rx_mvfc(0) & 0x010000; + __builtin_rx_clrpsw('I'); +#endif + return pswi; +} + +static void enable_interrupt(uint32_t pswi) +{ +#if defined(__CCRX__) + set_psw(get_psw() | pswi); +#else + __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi); +#endif +} +#endif + void dcd_init(uint8_t rhport) { (void)rhport; +#if 0 // previously present in the rx driver before generalization + uint32_t pswi = disable_interrupt(); + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(USB0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + enable_interrupt(pswi); +#endif + LINK_REG->SYSCFG_b.SCKE = 1; while (!LINK_REG->SYSCFG_b.SCKE) ; LINK_REG->SYSCFG_b.DRPD = 0; diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index f1ea2b821..b16544c2f 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -27,10 +27,8 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_RAXXX) +#if CFG_TUH_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \ + TU_CHECK_MCU(OPT_MCU_RAXXX)) #include "host/hcd.h" #include "link_type.h" @@ -217,8 +215,9 @@ static bool pipe0_xfer_in(void) pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) + if (len < mps) { LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + } pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -243,8 +242,9 @@ static bool pipe0_xfer_out(void) pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) + if (len < mps) { LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + } pipe->remaining = rem - len; return false; } @@ -264,8 +264,9 @@ static bool pipe_xfer_in(unsigned num) pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } - if (len < mps) + if (len < mps) { LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + } LINK_REG->D0FIFOSEL = 0; while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; @@ -314,7 +315,7 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; } else { /* OUT, 2 bytes */ LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | - (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; } @@ -363,7 +364,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u pipe_wait_for_ready(num); LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */ + while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ } } else { volatile uint16_t *ctr = get_pipectr(num); @@ -447,10 +448,43 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) /*------------------------------------------------------------------*/ /* Host API *------------------------------------------------------------------*/ + +#if 0 // previously present in the rx driver before generalization +static uint32_t disable_interrupt(void) +{ + uint32_t pswi; +#if defined(__CCRX__) + pswi = get_psw() & 0x010000; + clrpsw_i(); +#else + pswi = __builtin_rx_mvfc(0) & 0x010000; + __builtin_rx_clrpsw('I'); +#endif + return pswi; +} + +static void enable_interrupt(uint32_t pswi) +{ +#if defined(__CCRX__) + set_psw(get_psw() | pswi); +#else + __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi); +#endif +} +#endif + bool hcd_init(uint8_t rhport) { (void)rhport; +#if 0 // previously present in the rx driver before generalization + uint32_t pswi = disable_interrupt(); + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(USB0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + enable_interrupt(pswi); +#endif + LINK_REG->SYSCFG_b.SCKE = 1; while (!LINK_REG->SYSCFG_b.SCKE) ; LINK_REG->SYSCFG_b.DPRPU = 0; @@ -470,7 +504,7 @@ bool hcd_init(uint8_t rhport) LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ /* Setup default control pipe */ - LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk; + LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk; LINK_REG->DCPMAXP = 64; LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk; LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk; @@ -515,8 +549,9 @@ void hcd_port_reset(uint8_t rhport) while (LINK_REG->DCPCTR_b.PBUSY) ; hcd_int_disable(rhport); LINK_REG->DVSTCTR0_b.UACT = 0; - if (LINK_REG->DCPCTR_b.SUREQ) + if (LINK_REG->DCPCTR_b.SUREQ) { LINK_REG->DCPCTR_b.SUREQCLR = 1; + } hcd_int_enable(rhport); /* Reset should be asserted 10-20ms. */ LINK_REG->DVSTCTR0_b.USBRST = 1; @@ -580,10 +615,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; - _hcd.pipe[0].buf = NULL; - _hcd.pipe[0].length = 8; + _hcd.pipe[0].buf = NULL; + _hcd.pipe[0].length = 8; _hcd.pipe[0].remaining = 0; - _hcd.pipe[0].dev = dev_addr; + _hcd.pipe[0].dev = dev_addr; while (LINK_REG->DCPCTR_b.PBUSY) ; LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; @@ -593,8 +628,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0]; - LINK_REG->USBREQ = tu_htole16(p[0]); - LINK_REG->USBVAL = p[1]; + LINK_REG->USBREQ = tu_htole16(p[0]); + LINK_REG->USBVAL = p[1]; LINK_REG->USBINDX = p[2]; LINK_REG->USBLENG = p[3]; @@ -717,12 +752,10 @@ void hcd_int_handler(uint8_t rhport) if (is1 & LINK_REG_INTSTS1_SACK_Msk) { /* Set DATA1 in advance for the next transfer. */ LINK_REG->DCPCTR_b.SQSET = 1; - hcd_event_xfer_complete( - LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); + hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); } if (is1 & LINK_REG_INTSTS1_SIGN_Msk) { - hcd_event_xfer_complete( - LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); + hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); } if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) { LINK_REG->DVSTCTR0_b.UACT = 1; @@ -732,8 +765,9 @@ void hcd_int_handler(uint8_t rhport) } if (is1 & LINK_REG_INTSTS1_DTCH_Msk) { LINK_REG->DVSTCTR0_b.UACT = 0; - if (LINK_REG->DCPCTR_b.SUREQ) + if (LINK_REG->DCPCTR_b.SUREQ) { LINK_REG->DCPCTR_b.SUREQCLR = 1; + } LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk; hcd_event_device_remove(rhport, true); } diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h index 62f2911c2..9e31c5b46 100644 --- a/src/portable/renesas/link/link_rx.h +++ b/src/portable/renesas/link/link_rx.h @@ -39,7 +39,7 @@ extern "C" { #define LINK_REG_BASE (0x000A0000) -static inline void link_int_enable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport) { (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) @@ -49,7 +49,7 @@ static inline void link_int_enable(uint8_t rhport) #endif } -static inline void link_int_disable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport) { (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) @@ -60,7 +60,7 @@ static inline void link_int_disable(uint8_t rhport) } // MCU specific PHY init -static inline void link_phy_init(void) +TU_ATTR_ALWAYS_INLINE static inline void link_phy_init(void) { #if (CFG_TUSB_MCU == OPT_MCU_RX72N) IR(PERIB, INTB185) = 0; From f6774d561148c7c2f41b66234d080e9dfd514551 Mon Sep 17 00:00:00 2001 From: James Smith Date: Tue, 7 Feb 2023 20:46:00 -0700 Subject: [PATCH 045/142] Implemented tuh_hid_send_report --- src/class/hid/hid_host.c | 48 +++++++++++++++++++++++++++++++++++++--- src/class/hid/hid_host.h | 4 ++-- 2 files changed, 47 insertions(+), 5 deletions(-) diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 42b5e2f4e..22569194f 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -274,7 +274,49 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance) // return !usbh_edpt_busy(dev_addr, hid_itf->ep_in); //} -//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len); +bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len) +{ + TU_LOG2("HID Send Report %d\r\n", report_id); + + hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + + if (hid_itf->ep_out == 0) + { + // This HID does not have an out endpoint (other than control) + return false; + } + else if (len > CFG_TUH_HID_EPOUT_BUFSIZE + || (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1))) + { + // ep_out buffer is not large enough to hold contents + return false; + } + + // claim endpoint + TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_out) ); + + if (report_id == 0) + { + // No report ID in transmission + memcpy(&hid_itf->epout_buf[0], report, len); + } + else + { + hid_itf->epout_buf[0] = report_id; + memcpy(&hid_itf->epout_buf[1], report, len); + ++len; // 1 more byte for report_id + } + + TU_LOG3_MEM(hid_itf->epout_buf, len, 2); + + if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_out, hid_itf->epout_buf, len) ) + { + usbh_edpt_release(dev_addr, hid_itf->ep_out); + return false; + } + + return true; +} //--------------------------------------------------------------------+ // USBH API @@ -349,7 +391,7 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de hidh_device_t* hid_dev = get_dev(dev_addr); TU_ASSERT(hid_dev->inst_count < CFG_TUH_HID, 0); - hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count); + hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count); //------------- Endpoint Descriptors -------------// p_desc = tu_desc_next(p_desc); diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index ffc601d77..e5f159ca8 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -106,7 +106,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance); // Send report using interrupt endpoint // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent. -//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len); +bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len); //--------------------------------------------------------------------+ // Callbacks (Weak is optional) From 296ce528fcc3632205cb7f6f5a2f386169fdbf36 Mon Sep 17 00:00:00 2001 From: James Smith Date: Thu, 9 Feb 2023 19:42:36 -0700 Subject: [PATCH 046/142] Updated host hid_controller example to demo tuh_hid_send_report --- examples/host/hid_controller/src/hid_app.c | 87 +++++++++++++++++++--- src/class/hid/hid_host.c | 2 +- src/class/hid/hid_host.h | 2 +- 3 files changed, 80 insertions(+), 11 deletions(-) diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c index 75c91400e..0444d6eb5 100644 --- a/examples/host/hid_controller/src/hid_app.c +++ b/examples/host/hid_controller/src/hid_app.c @@ -91,9 +91,8 @@ typedef struct TU_ATTR_PACKED uint8_t counter : 6; // +1 each report }; - // comment out since not used by this example - // uint8_t l2_trigger; // 0 released, 0xff fully pressed - // uint8_t r2_trigger; // as above + uint8_t l2_trigger; // 0 released, 0xff fully pressed + uint8_t r2_trigger; // as above // uint16_t timestamp; // uint8_t battery; @@ -105,15 +104,54 @@ typedef struct TU_ATTR_PACKED } sony_ds4_report_t; +typedef struct TU_ATTR_PACKED { + // First 16 bits set what data is pertinent in this structure (1 = set; 0 = not set) + uint8_t set_rumble : 1; + uint8_t set_led : 1; + uint8_t set_led_blink : 1; + uint8_t set_ext_write : 1; + uint8_t set_left_volume : 1; + uint8_t set_right_volume : 1; + uint8_t set_mic_volume : 1; + uint8_t set_speaker_volume : 1; + uint8_t set_flags2; + + uint8_t reserved; + + uint8_t motor_right; + uint8_t motor_left; + + uint8_t lightbar_red; + uint8_t lightbar_green; + uint8_t lightbar_blue; + uint8_t lightbar_blink_on; + uint8_t lightbar_blink_off; + + uint8_t ext_data[8]; + + uint8_t volume_left; + uint8_t volume_right; + uint8_t volume_mic; + uint8_t volume_speaker; + + uint8_t other[9]; +} sony_ds4_output_report_t; + +static bool ds4_mounted = false; +static uint8_t ds4_dev_addr = 0; +static uint8_t ds4_instance = 0; +static uint8_t motor_left = 0; +static uint8_t motor_right = 0; + // check if device is Sony DualShock 4 static inline bool is_sony_ds4(uint8_t dev_addr) { uint16_t vid, pid; tuh_vid_pid_get(dev_addr, &vid, &pid); - return ( (vid == 0x054c && (pid == 0x09cc || pid == 0x05c4)) // Sony DualShock4 - || (vid == 0x0f0d && pid == 0x005e) // Hori FC4 - || (vid == 0x0f0d && pid == 0x00ee) // Hori PS4 Mini (PS4-099U) + return ( (vid == 0x054c && (pid == 0x09cc || pid == 0x05c4)) // Sony DualShock4 + || (vid == 0x0f0d && pid == 0x005e) // Hori FC4 + || (vid == 0x0f0d && pid == 0x00ee) // Hori PS4 Mini (PS4-099U) || (vid == 0x1f4f && pid == 0x1002) // ASW GG xrd controller ); } @@ -124,7 +162,22 @@ static inline bool is_sony_ds4(uint8_t dev_addr) void hid_app_task(void) { - // nothing to do + if (ds4_mounted) + { + const uint32_t interval_ms = 200; + static uint32_t start_ms = 0; + + if ( board_millis() - start_ms >= interval_ms) + { + start_ms += interval_ms; + + sony_ds4_output_report_t output_report = {0}; + output_report.set_rumble = 1; + output_report.motor_left = motor_left; + output_report.motor_right = motor_right; + tuh_hid_send_report(ds4_dev_addr, ds4_instance, 5, &output_report, sizeof(output_report)); + } + } } //--------------------------------------------------------------------+ @@ -149,6 +202,14 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_re // Sony DualShock 4 [CUH-ZCT2x] if ( is_sony_ds4(dev_addr) ) { + if (!ds4_mounted) + { + ds4_dev_addr = dev_addr; + ds4_instance = instance; + motor_left = 0; + motor_right = 0; + ds4_mounted = true; + } // request to receive report // tuh_hid_report_received_cb() will be invoked when report is available if ( !tuh_hid_receive_report(dev_addr, instance) ) @@ -162,6 +223,10 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_re void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance) { printf("HID device address = %d, instance = %d is unmounted\r\n", dev_addr, instance); + if (ds4_mounted && ds4_dev_addr == dev_addr && ds4_instance == instance) + { + ds4_mounted = false; + } } // check if different than 2 @@ -179,8 +244,8 @@ bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2) result = diff_than_2(rpt1->x, rpt2->x) || diff_than_2(rpt1->y , rpt2->y ) || diff_than_2(rpt1->z, rpt2->z) || diff_than_2(rpt1->rz, rpt2->rz); - // check the reset with mem compare - result |= memcmp(&rpt1->rz + 1, &rpt2->rz + 1, sizeof(sony_ds4_report_t)-4); + // check the rest with mem compare + result |= memcmp(&rpt1->rz + 1, &rpt2->rz + 1, sizeof(sony_ds4_report_t)-6); return result; } @@ -234,6 +299,10 @@ void process_sony_ds4(uint8_t const* report, uint16_t len) printf("\r\n"); } + // The left and right triggers control the intensity of the left and right rumble motors + motor_left = ds4_report.l2_trigger; + motor_right = ds4_report.r2_trigger; + prev_report = ds4_report; } } diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 22569194f..e5fc86267 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -274,7 +274,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance) // return !usbh_edpt_busy(dev_addr, hid_itf->ep_in); //} -bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len) +bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len) { TU_LOG2("HID Send Report %d\r\n", report_id); diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index e5f159ca8..c152e527a 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -106,7 +106,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance); // Send report using interrupt endpoint // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent. -bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len); +bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len); //--------------------------------------------------------------------+ // Callbacks (Weak is optional) From 43770802f9164f8bc3973719c25ba46ff4ba23ca Mon Sep 17 00:00:00 2001 From: James Smith Date: Thu, 9 Feb 2023 19:52:42 -0700 Subject: [PATCH 047/142] Removed tabs from host hid_controller example --- examples/host/hid_controller/src/hid_app.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c index 0444d6eb5..114768ab7 100644 --- a/examples/host/hid_controller/src/hid_app.c +++ b/examples/host/hid_controller/src/hid_app.c @@ -106,7 +106,7 @@ typedef struct TU_ATTR_PACKED typedef struct TU_ATTR_PACKED { // First 16 bits set what data is pertinent in this structure (1 = set; 0 = not set) - uint8_t set_rumble : 1; + uint8_t set_rumble : 1; uint8_t set_led : 1; uint8_t set_led_blink : 1; uint8_t set_ext_write : 1; @@ -116,16 +116,16 @@ typedef struct TU_ATTR_PACKED { uint8_t set_speaker_volume : 1; uint8_t set_flags2; - uint8_t reserved; + uint8_t reserved; - uint8_t motor_right; - uint8_t motor_left; + uint8_t motor_right; + uint8_t motor_left; - uint8_t lightbar_red; - uint8_t lightbar_green; - uint8_t lightbar_blue; - uint8_t lightbar_blink_on; - uint8_t lightbar_blink_off; + uint8_t lightbar_red; + uint8_t lightbar_green; + uint8_t lightbar_blue; + uint8_t lightbar_blink_on; + uint8_t lightbar_blink_off; uint8_t ext_data[8]; From 9247131b1f6476c433ceb47d4746c9bc5baf8b65 Mon Sep 17 00:00:00 2001 From: James Smith Date: Thu, 9 Feb 2023 21:21:57 -0700 Subject: [PATCH 048/142] Avoid spamming out endpoint on connect --- examples/host/hid_controller/src/hid_app.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c index 114768ab7..76de97b41 100644 --- a/examples/host/hid_controller/src/hid_app.c +++ b/examples/host/hid_controller/src/hid_app.c @@ -167,9 +167,10 @@ void hid_app_task(void) const uint32_t interval_ms = 200; static uint32_t start_ms = 0; - if ( board_millis() - start_ms >= interval_ms) + uint32_t current_time_ms = board_millis(); + if ( current_time_ms - start_ms >= interval_ms) { - start_ms += interval_ms; + start_ms = current_time_ms; sony_ds4_output_report_t output_report = {0}; output_report.set_rumble = 1; From d31aac453eaa0b56a998c3cca5d2efd4c55209af Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 13 Mar 2023 15:22:00 -0700 Subject: [PATCH 049/142] Flush the dcd data on reset --- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 32c2fc029..91d5524b6 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -48,6 +48,8 @@ #define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base) +// Clean means to push any cached changes to RAM and invalidate "removes" the +// entry from the cache. #if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr #else @@ -199,6 +201,8 @@ static void bus_reset(uint8_t rhport) _dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID; _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only + + CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); } void dcd_init(uint8_t rhport) From d9a9dc5ac0a9679403a75dbe3a32c4d4678998e6 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 10 Mar 2023 14:39:57 +0700 Subject: [PATCH 050/142] fix PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY not defined in old pico-sdk --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 37dec1cbf..4af8c2d71 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -385,6 +385,11 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void) /* Controller API *------------------------------------------------------------------*/ +// older SDK +#ifndef PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY +#define PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY 0xff +#endif + void dcd_init (uint8_t rhport) { assert(rhport == 0); From ffa56a1beb724397e434e5e74e2a7b1d4583acd8 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 15 Mar 2023 17:40:02 +0700 Subject: [PATCH 051/142] add pre-commit yaml --- .pre-commit-config.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 .pre-commit-config.yaml diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml new file mode 100644 index 000000000..5a61f5282 --- /dev/null +++ b/.pre-commit-config.yaml @@ -0,0 +1,20 @@ +# SPDX-FileCopyrightText: 2020 Diego Elio Pettenò +# +# SPDX-License-Identifier: Unlicense + +repos: +- repo: local + hooks: + - id: codespell + name: codespell + entry: codespell + types_or: [c, header] + language: system + + - id: unit-test + name: unit-test + files: ^(src/|test/unit-test/) + entry: sh -c "cd test/unit-test && ceedling test:all" + pass_filenames: false + types_or: [c, header] + language: system From fabe86362b0cf914a80f27023775291ffabe9bbc Mon Sep 17 00:00:00 2001 From: tyustli <1225613647@qq.com> Date: Thu, 16 Mar 2023 08:28:19 +0800 Subject: [PATCH 052/142] fix HAL_Delay no effect bug on st platform --- hw/bsp/stm32f0/family.c | 1 + hw/bsp/stm32f1/family.c | 1 + hw/bsp/stm32f207nucleo/stm32f207nucleo.c | 1 + hw/bsp/stm32f303disco/stm32f303disco.c | 1 + hw/bsp/stm32f4/family.c | 1 + hw/bsp/stm32f7/family.c | 1 + hw/bsp/stm32g4/family.c | 1 + hw/bsp/stm32h7/family.c | 1 + hw/bsp/stm32l0/family.c | 1 + hw/bsp/stm32l0538disco/stm32l0538disco.c | 1 + hw/bsp/stm32l4/family.c | 1 + hw/bsp/stm32u5/family.c | 1 + hw/bsp/stm32wb/family.c | 1 + 13 files changed, 13 insertions(+) diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c index 0765f361d..884208fb1 100644 --- a/hw/bsp/stm32f0/family.c +++ b/hw/bsp/stm32f0/family.c @@ -143,6 +143,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c index 61b40badd..6f0471096 100644 --- a/hw/bsp/stm32f1/family.c +++ b/hw/bsp/stm32f1/family.c @@ -129,6 +129,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c index 619c90d68..d77643661 100644 --- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c +++ b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c @@ -191,6 +191,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index 33552bc07..940c49d26 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -193,6 +193,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c index 674058f50..93ab5bb35 100644 --- a/hw/bsp/stm32f4/family.c +++ b/hw/bsp/stm32f4/family.c @@ -180,6 +180,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c index 536eb0554..88cba2c7d 100644 --- a/hw/bsp/stm32f7/family.c +++ b/hw/bsp/stm32f7/family.c @@ -293,6 +293,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 32c46b7d8..f3ba54576 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -167,6 +167,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 28a2568fa..65ffc8ef4 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -251,6 +251,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler(void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c index 80a7c7435..dcd71a513 100644 --- a/hw/bsp/stm32l0/family.c +++ b/hw/bsp/stm32l0/family.c @@ -141,6 +141,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0538disco/stm32l0538disco.c index f0f1d028b..f4c38d150 100644 --- a/hw/bsp/stm32l0538disco/stm32l0538disco.c +++ b/hw/bsp/stm32l0538disco/stm32l0538disco.c @@ -183,6 +183,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c index 19b84c086..d661613af 100644 --- a/hw/bsp/stm32l4/family.c +++ b/hw/bsp/stm32l4/family.c @@ -204,6 +204,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c index 9bc94cfa3..ee8a5d7ff 100644 --- a/hw/bsp/stm32u5/family.c +++ b/hw/bsp/stm32u5/family.c @@ -179,6 +179,7 @@ int board_uart_write(void const *buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler(void) { + HAL_IncTick(); system_ticks++; } diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c index 9f1f46f4d..525d637ea 100644 --- a/hw/bsp/stm32wb/family.c +++ b/hw/bsp/stm32wb/family.c @@ -169,6 +169,7 @@ int board_uart_write(void const * buf, int len) volatile uint32_t system_ticks = 0; void SysTick_Handler (void) { + HAL_IncTick(); system_ticks++; } From 1117cf5729d5896d960285e3d522064c63e2a2cc Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 10:05:46 +0700 Subject: [PATCH 053/142] update pre-commit yaml --- .pre-commit-config.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 5a61f5282..865307896 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -3,6 +3,13 @@ # SPDX-License-Identifier: Unlicense repos: +- repo: https://github.com/pre-commit/pre-commit-hooks + rev: v4.0.1 + hooks: + - id: check-yaml + - id: trailing-whitespace + - id: end-of-file-fixer + - repo: local hooks: - id: codespell From bc2127b3305f5a6e689c1a3264fdee06928cd60e Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 11:03:08 +0700 Subject: [PATCH 054/142] rename file link to rusb2 --- .codespell/exclude-file.txt | 4 ---- .codespell/ignore-words.txt | 1 + hw/bsp/ra/family.mk | 4 ++-- hw/bsp/rx/family.mk | 4 ++-- .../renesas/{link/dcd_link.c => rusb2/dcd_rusb2.c} | 8 ++++---- .../renesas/{link/hcd_link.c => rusb2/hcd_rusb2.c} | 8 ++++---- src/portable/renesas/{link/link_ra.h => rusb2/rusb2_ra.h} | 2 -- src/portable/renesas/{link/link_rx.h => rusb2/rusb2_rx.h} | 2 -- .../renesas/{link/link_type.h => rusb2/rusb2_type.h} | 0 9 files changed, 13 insertions(+), 20 deletions(-) rename src/portable/renesas/{link/dcd_link.c => rusb2/dcd_rusb2.c} (99%) rename src/portable/renesas/{link/hcd_link.c => rusb2/hcd_rusb2.c} (99%) rename src/portable/renesas/{link/link_ra.h => rusb2/rusb2_ra.h} (98%) rename src/portable/renesas/{link/link_rx.h => rusb2/rusb2_rx.h} (98%) rename src/portable/renesas/{link/link_type.h => rusb2/rusb2_type.h} (100%) diff --git a/.codespell/exclude-file.txt b/.codespell/exclude-file.txt index 660d2e07e..e69de29bb 100644 --- a/.codespell/exclude-file.txt +++ b/.codespell/exclude-file.txt @@ -1,4 +0,0 @@ - return LINK_REG->INTSTS1_b.ATTCH ? true : false; - volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */ -#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ -#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt index e37d97a9f..e1ad88a07 100644 --- a/.codespell/ignore-words.txt +++ b/.codespell/ignore-words.txt @@ -6,3 +6,4 @@ fro dout mot te +attch diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index e75e74104..3c681a7c3 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -20,8 +20,8 @@ CFLAGS += \ -ffreestanding SRC_C += \ - src/portable/renesas/link/dcd_link.c \ - src/portable/renesas/link/hcd_link.c \ + src/portable/renesas/rusb2/dcd_rusb2.c \ + src/portable/renesas/rusb2/hcd_rusb2.c \ hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \ hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \ hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \ diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk index ef9db293a..3044167b9 100644 --- a/hw/bsp/rx/family.mk +++ b/hw/bsp/rx/family.mk @@ -17,8 +17,8 @@ CFLAGS += \ CFLAGS += -Wno-error=redundant-decls SRC_C += \ - src/portable/renesas/link/dcd_link.c \ - src/portable/renesas/link/hcd_link.c \ + src/portable/renesas/rusb2/dcd_rusb2.c \ + src/portable/renesas/rusb2/hcd_rusb2.c \ $(MCU_DIR)/vects.c INC += \ diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/rusb2/dcd_rusb2.c similarity index 99% rename from src/portable/renesas/link/dcd_link.c rename to src/portable/renesas/rusb2/dcd_rusb2.c index ce29769e0..ec9caab2c 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -35,14 +35,14 @@ TU_CHECK_MCU(OPT_MCU_RAXXX)) #include "device/dcd.h" -#include "link_type.h" +#include "rusb2_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) -#include "link_rx.h" + #include "rusb2_rx.h" #elif TU_CHECK_MCU(OPT_MCU_RAXXX) -#include "link_ra.h" + #include "rusb2_ra.h" #else -#error "Unsupported MCU" + #error "Unsupported MCU" #endif //--------------------------------------------------------------------+ diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/rusb2/hcd_rusb2.c similarity index 99% rename from src/portable/renesas/link/hcd_link.c rename to src/portable/renesas/rusb2/hcd_rusb2.c index b16544c2f..7d14aad60 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/rusb2/hcd_rusb2.c @@ -31,14 +31,14 @@ TU_CHECK_MCU(OPT_MCU_RAXXX)) #include "host/hcd.h" -#include "link_type.h" +#include "rusb2_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) -#include "link_rx.h" + #include "rusb2_rx.h" #elif TU_CHECK_MCU(OPT_MCU_RAXXX) -#include "link_ra.h" + #include "rusb2_ra.h" #else -#error "Unsupported MCU" + #error "Unsupported MCU" #endif //--------------------------------------------------------------------+ diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h similarity index 98% rename from src/portable/renesas/link/link_ra.h rename to src/portable/renesas/rusb2/rusb2_ra.h index 97618ef8f..a73b13951 100644 --- a/src/portable/renesas/link/link_ra.h +++ b/src/portable/renesas/rusb2/rusb2_ra.h @@ -31,8 +31,6 @@ extern "C" { #endif -#include "link_type.h" - /* renesas fsp api */ #include "bsp_api.h" diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h similarity index 98% rename from src/portable/renesas/link/link_rx.h rename to src/portable/renesas/rusb2/rusb2_rx.h index 9e31c5b46..e43253569 100644 --- a/src/portable/renesas/link/link_rx.h +++ b/src/portable/renesas/rusb2/rusb2_rx.h @@ -33,8 +33,6 @@ extern "C" { #endif -#include "link_type.h" - #include "iodefine.h" #define LINK_REG_BASE (0x000A0000) diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/rusb2/rusb2_type.h similarity index 100% rename from src/portable/renesas/link/link_type.h rename to src/portable/renesas/rusb2/rusb2_type.h From 92aed7e3e0600570da239729d1e83ede69be8158 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 11:28:10 +0700 Subject: [PATCH 055/142] rename symbols --- docs/reference/supported.rst | 4 +- src/portable/renesas/rusb2/dcd_rusb2.c | 274 +++--- src/portable/renesas/rusb2/hcd_rusb2.c | 294 +++--- src/portable/renesas/rusb2/rusb2_ra.h | 10 +- src/portable/renesas/rusb2/rusb2_rx.h | 8 +- src/portable/renesas/rusb2/rusb2_type.h | 1136 +++++++++++------------ 6 files changed, 862 insertions(+), 864 deletions(-) diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index 30a685854..ae16d361d 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -62,9 +62,9 @@ Supported MCUs +--------------+---------+-------------+--------+------+-----------+-------------------+--------------+ | Raspberry Pi | RP2040 | ✔ | ✔ | ✖ | rp2040, pio_usb | | +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ -| Renesas | RX | 63N, 65N, 72N | ✔ | ✔ | ✖ | link | | +| Renesas | RX | 63N, 65N, 72N | ✔ | ✔ | ✖ | rusb2 | | | +-----+-----------------+--------+------+-----------+-------------------+--------------+ -| | RA | XXX | ✔ | ✔ | | link | | +| | RA | XXX | ✔ | ✔ | | rusb2 | | +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+ | Silabs | EFM32GG12 | ✔ | | ✖ | dwc2 | | +--------------+-----------------------+--------+------+-----------+-------------------+--------------+ diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c index ec9caab2c..78584125f 100644 --- a/src/portable/renesas/rusb2/dcd_rusb2.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -51,9 +51,9 @@ /* LINK core registers */ #if defined(__CCRX__) -#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE) + #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE) #else -#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) + #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE) #endif /* Start of definition of packed structs (used by the CCRX toolchain) */ @@ -138,9 +138,9 @@ static unsigned find_pipe(unsigned xfer) static volatile uint16_t* get_pipectr(unsigned num) { if (num) { - return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]); + return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]); } else { - return (volatile uint16_t*)&(LINK_REG->DCPCTR); + return (volatile uint16_t*)&(RUSB2->DCPCTR); } } @@ -148,7 +148,7 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num) { volatile reg_pipetre_t* tre = NULL; if ((1 <= num) && (num <= 5)) { - tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E); + tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E); } return tre; } @@ -168,19 +168,19 @@ static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) static unsigned edpt0_max_packet_size(void) { - return LINK_REG->DCPMAXP_b.MXPS; + return RUSB2->DCPMAXP_b.MXPS; } static unsigned edpt_max_packet_size(unsigned num) { - LINK_REG->PIPESEL = num; - return LINK_REG->PIPEMAXP; + RUSB2->PIPESEL = num; + return RUSB2->PIPEMAXP; } static inline void pipe_wait_for_ready(unsigned num) { - while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ; - while (!LINK_REG->D0FIFOCTR_b.FRDY) ; + while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ; + while (!RUSB2->D0FIFOCTR_b.FRDY) ; } static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) @@ -242,14 +242,14 @@ static bool pipe0_xfer_in(void) void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_IN); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_IN); } else { - pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); + pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } } if (len < mps) { - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; } pipe->remaining = rem - len; return false; @@ -261,19 +261,19 @@ static bool pipe0_xfer_out(void) const unsigned rem = pipe->remaining; const unsigned mps = edpt0_max_packet_size(); - const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN; + const unsigned vld = RUSB2->CFIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_OUT); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_OUT); } else { - pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); + pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } } if (len < mps) { - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; } pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { @@ -293,24 +293,24 @@ static bool pipe_xfer_in(unsigned num) return true; } - LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_IN); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_IN); } else { - pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); + pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } } if (len < mps) { - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; } - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -320,25 +320,25 @@ static bool pipe_xfer_out(unsigned num) pipe_state_t *pipe = &_dcd.pipe[num]; const unsigned rem = pipe->remaining; - LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT; + RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); - const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; + const unsigned vld = RUSB2->D0FIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_OUT); + pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_OUT); } else { - pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); + pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } } if (len < mps) { - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; } - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -350,13 +350,13 @@ static bool pipe_xfer_out(unsigned num) static void process_setup_packet(uint8_t rhport) { uint16_t setup_packet[4]; - if (0 == (LINK_REG->INTSTS0 & LINK_REG_INTSTS0_VALID_Msk)) return; - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; - setup_packet[0] = tu_le16toh(LINK_REG->USBREQ); - setup_packet[1] = LINK_REG->USBVAL; - setup_packet[2] = LINK_REG->USBINDX; - setup_packet[3] = LINK_REG->USBLENG; - LINK_REG->INTSTS0 = ~((uint16_t)LINK_REG_INTSTS0_VALID_Msk); + if (0 == (RUSB2->INTSTS0 & RUSB2_INTSTS0_VALID_Msk)) return; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; + setup_packet[0] = tu_le16toh(RUSB2->USBREQ); + setup_packet[1] = RUSB2->USBVAL; + setup_packet[2] = RUSB2->USBINDX; + setup_packet[3] = RUSB2->USBLENG; + RUSB2->INTSTS0 = ~((uint16_t)RUSB2_INTSTS0_VALID_Msk); dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true); } @@ -364,7 +364,7 @@ static void process_status_completion(uint8_t rhport) { uint8_t ep_addr; /* Check the data stage direction */ - if (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) { + if (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) { /* IN transfer. */ ep_addr = tu_edpt_addr(0, TUSB_DIR_IN); } else { @@ -378,12 +378,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u { /* configure fifo direction and access unit settings */ if (ep_addr) { /* IN, 2 bytes */ - LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | - (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); - while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; + RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT | + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0); + while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ; } else { /* OUT, a byte */ - LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; - while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; + RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT; + while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ; } pipe_state_t *pipe = &_dcd.pipe[0]; @@ -393,14 +393,14 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u if (total_bytes) { pipe->buf = buffer; if (ep_addr) { /* IN */ - TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); + TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80)); pipe0_xfer_in(); } - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF; } else { /* ZLP */ pipe->buf = NULL; - LINK_REG->DCPCTR = LINK_REG_DCPCTR_CCPL_Msk | LINK_REG_PIPE_CTR_PID_BUF; + RUSB2->DCPCTR = RUSB2_DCPCTR_CCPL_Msk | RUSB2_PIPE_CTR_PID_BUF; } return true; } @@ -422,11 +422,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui if (total_bytes) { pipe_xfer_in(num); } else { /* ZLP */ - LINK_REG->D0FIFOSEL = num; + RUSB2->D0FIFOSEL = num; pipe_wait_for_ready(num); - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ } } else { #if defined(__CCRX__) @@ -437,11 +437,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui if (pt) { const unsigned mps = edpt_max_packet_size(num); volatile uint16_t *ctr = get_pipectr(num); - if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK; + if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK; pt->TRE = TU_BIT(8); pt->TRN = (total_bytes + mps - 1) / mps; pt->TRENB = 1; - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } } // TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type); @@ -493,28 +493,28 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) static void process_bus_reset(uint8_t rhport) { - LINK_REG->BEMPENB = 1; - LINK_REG->BRDYENB = 1; - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - LINK_REG->D1FIFOSEL = 0; - while (LINK_REG->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ - volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_CTR[0])); - volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_TR[0].E)); + RUSB2->BEMPENB = 1; + RUSB2->BRDYENB = 1; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + RUSB2->D1FIFOSEL = 0; + while (RUSB2->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_CTR[0])); + volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_TR[0].E)); for (int i = 1; i <= 5; ++i) { - LINK_REG->PIPESEL = i; - LINK_REG->PIPECFG = 0; - *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk; + RUSB2->PIPESEL = i; + RUSB2->PIPECFG = 0; + *ctr = RUSB2_PIPE_CTR_ACLRM_Msk; *ctr = 0; ++ctr; *tre = TU_BIT(8); tre += 2; } for (int i = 6; i <= 9; ++i) { - LINK_REG->PIPESEL = i; - LINK_REG->PIPECFG = 0; - *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk; + RUSB2->PIPESEL = i; + RUSB2->PIPECFG = 0; + *ctr = RUSB2_PIPE_CTR_ACLRM_Msk; *ctr = 0; ++ctr; } @@ -524,7 +524,7 @@ static void process_bus_reset(uint8_t rhport) static void process_set_address(uint8_t rhport) { - const uint32_t addr = LINK_REG->USBADDR_b.USBADDR; + const uint32_t addr = RUSB2->USBADDR_b.USBADDR; if (!addr) return; const tusb_control_request_t setup_packet = { #if defined(__CCRX__) @@ -580,39 +580,39 @@ void dcd_init(uint8_t rhport) enable_interrupt(pswi); #endif - LINK_REG->SYSCFG_b.SCKE = 1; - while (!LINK_REG->SYSCFG_b.SCKE) ; - LINK_REG->SYSCFG_b.DRPD = 0; - LINK_REG->SYSCFG_b.DCFM = 0; - LINK_REG->SYSCFG_b.USBE = 1; + RUSB2->SYSCFG_b.SCKE = 1; + while (!RUSB2->SYSCFG_b.SCKE) ; + RUSB2->SYSCFG_b.DRPD = 0; + RUSB2->SYSCFG_b.DCFM = 0; + RUSB2->SYSCFG_b.USBE = 1; // MCU specific PHY init - link_phy_init(); + rusb2_phy_init(); - LINK_REG->PHYSLEW = 0x5; - LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */ + RUSB2->PHYSLEW = 0x5; + RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */ /* Setup default control pipe */ - LINK_REG->DCPMAXP_b.MXPS = 64; - LINK_REG->INTENB0 = LINK_REG_INTSTS0_VBINT_Msk | LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk | - LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_CTRT_Msk | (USE_SOF ? LINK_REG_INTSTS0_SOFR_Msk : 0) | - LINK_REG_INTSTS0_RESM_Msk; - LINK_REG->BEMPENB = 1; - LINK_REG->BRDYENB = 1; + RUSB2->DCPMAXP_b.MXPS = 64; + RUSB2->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk | + RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) | + RUSB2_INTSTS0_RESM_Msk; + RUSB2->BEMPENB = 1; + RUSB2->BRDYENB = 1; - if (LINK_REG->INTSTS0_b.VBSTS) { + if (RUSB2->INTSTS0_b.VBSTS) { dcd_connect(rhport); } } void dcd_int_enable(uint8_t rhport) { - link_int_enable(rhport); + rusb2_int_enable(rhport); } void dcd_int_disable(uint8_t rhport) { - link_int_disable(rhport); + rusb2_int_disable(rhport); } void dcd_set_address(uint8_t rhport, uint8_t dev_addr) @@ -624,19 +624,19 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { (void)rhport; - LINK_REG->DVSTCTR0_b.WKUP = 1; + RUSB2->DVSTCTR0_b.WKUP = 1; } void dcd_connect(uint8_t rhport) { (void)rhport; - LINK_REG->SYSCFG_b.DPRPU = 1; + RUSB2->SYSCFG_b.DPRPU = 1; } void dcd_disconnect(uint8_t rhport) { (void)rhport; - LINK_REG->SYSCFG_b.DPRPU = 0; + RUSB2->SYSCFG_b.DPRPU = 0; } void dcd_sof_enable(uint8_t rhport, bool en) @@ -672,26 +672,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) /* setup pipe */ dcd_int_disable(rhport); - LINK_REG->PIPESEL = num; - LINK_REG->PIPEMAXP = mps; + RUSB2->PIPESEL = num; + RUSB2->PIPEMAXP = mps; volatile uint16_t *ctr = get_pipectr(num); - *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk; + *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk; *ctr = 0; unsigned cfg = (dir << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk); + cfg |= (RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk); } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= LINK_REG_PIPECFG_TYPE_INT; + cfg |= RUSB2_PIPECFG_TYPE_INT; } else { - cfg |= (LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk); + cfg |= (RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk); } - LINK_REG->PIPECFG = cfg; - LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); - LINK_REG->BRDYENB |= TU_BIT(num); + RUSB2->PIPECFG = cfg; + RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num); + RUSB2->BRDYENB |= TU_BIT(num); if (dir || (xfer != TUSB_XFER_BULK)) { - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } - // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP); + // TU_LOG1("O %d %x %x\r\n", RUSB2->PIPESEL, RUSB2->PIPECFG, RUSB2->PIPEMAXP); dcd_int_enable(rhport); return true; @@ -716,11 +716,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) const unsigned dir = tu_edpt_dir(ep_addr); const unsigned num = _dcd.ep[dir][epn]; - LINK_REG->BRDYENB &= ~TU_BIT(num); + RUSB2->BRDYENB &= ~TU_BIT(num); volatile uint16_t *ctr = get_pipectr(num); *ctr = 0; - LINK_REG->PIPESEL = num; - LINK_REG->PIPECFG = 0; + RUSB2->PIPESEL = num; + RUSB2->PIPECFG = 0; _dcd.pipe[num].ep = 0; _dcd.ep[dir][epn] = 0; } @@ -751,8 +751,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) if (!ctr) return; dcd_int_disable(rhport); const uint32_t pid = *ctr & 0x3; - *ctr = pid | LINK_REG_PIPE_CTR_PID_STALL; - *ctr = LINK_REG_PIPE_CTR_PID_STALL; + *ctr = pid | RUSB2_PIPE_CTR_PID_STALL; + *ctr = RUSB2_PIPE_CTR_PID_STALL; dcd_int_enable(rhport); } @@ -761,15 +761,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr); if (!ctr) return; dcd_int_disable(rhport); - *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk; + *ctr = RUSB2_PIPE_CTR_SQCLR_Msk; if (tu_edpt_dir(ep_addr)) { /* IN */ - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } else { const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)]; - LINK_REG->PIPESEL = num; - if (LINK_REG->PIPECFG_b.TYPE != 1) { - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + RUSB2->PIPESEL = num; + if (RUSB2->PIPECFG_b.TYPE != 1) { + *ctr = RUSB2_PIPE_CTR_PID_BUF; } } dcd_int_enable(rhport); @@ -782,71 +782,71 @@ void dcd_int_handler(uint8_t rhport) { (void)rhport; - unsigned is0 = LINK_REG->INTSTS0; + unsigned is0 = RUSB2->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_CTRT_Msk | LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_SOFR_Msk | - LINK_REG_INTSTS0_RESM_Msk | LINK_REG_INTSTS0_VBINT_Msk) & is0) | LINK_REG_INTSTS0_VALID_Msk; - if (is0 & LINK_REG_INTSTS0_VBINT_Msk) { - if (LINK_REG->INTSTS0_b.VBSTS) { + RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_CTRT_Msk | RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_SOFR_Msk | + RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_VBINT_Msk) & is0) | RUSB2_INTSTS0_VALID_Msk; + if (is0 & RUSB2_INTSTS0_VBINT_Msk) { + if (RUSB2->INTSTS0_b.VBSTS) { dcd_connect(rhport); } else { dcd_disconnect(rhport); } } - if (is0 & LINK_REG_INTSTS0_RESM_Msk) { + if (is0 & RUSB2_INTSTS0_RESM_Msk) { dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); #if (0==USE_SOF) - LINK_REG->INTENB0_b.SOFE = 0; + RUSB2->INTENB0_b.SOFE = 0; #endif } - if ((is0 & LINK_REG_INTSTS0_SOFR_Msk) && LINK_REG->INTENB0_b.SOFE) { + if ((is0 & RUSB2_INTSTS0_SOFR_Msk) && RUSB2->INTENB0_b.SOFE) { // USBD will exit suspended mode when SOF event is received dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); #if (0 == USE_SOF) - LINK_REG->INTENB0_b.SOFE = 0; + RUSB2->INTENB0_b.SOFE = 0; #endif } - if (is0 & LINK_REG_INTSTS0_DVST_Msk) { - switch (is0 & LINK_REG_INTSTS0_DVSQ_Msk) { - case LINK_REG_INTSTS0_DVSQ_STATE_DEF: + if (is0 & RUSB2_INTSTS0_DVST_Msk) { + switch (is0 & RUSB2_INTSTS0_DVSQ_Msk) { + case RUSB2_INTSTS0_DVSQ_STATE_DEF: process_bus_reset(rhport); break; - case LINK_REG_INTSTS0_DVSQ_STATE_ADDR: + case RUSB2_INTSTS0_DVSQ_STATE_ADDR: process_set_address(rhport); break; - case LINK_REG_INTSTS0_DVSQ_STATE_SUSP0: - case LINK_REG_INTSTS0_DVSQ_STATE_SUSP1: - case LINK_REG_INTSTS0_DVSQ_STATE_SUSP2: - case LINK_REG_INTSTS0_DVSQ_STATE_SUSP3: + case RUSB2_INTSTS0_DVSQ_STATE_SUSP0: + case RUSB2_INTSTS0_DVSQ_STATE_SUSP1: + case RUSB2_INTSTS0_DVSQ_STATE_SUSP2: + case RUSB2_INTSTS0_DVSQ_STATE_SUSP3: dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); #if (0==USE_SOF) - LINK_REG->INTENB0_b.SOFE = 1; + RUSB2->INTENB0_b.SOFE = 1; #endif default: break; } } - if (is0 & LINK_REG_INTSTS0_CTRT_Msk) { - if (is0 & LINK_REG_INTSTS0_CTSQ_CTRL_RDATA) { + if (is0 & RUSB2_INTSTS0_CTRT_Msk) { + if (is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA) { /* A setup packet has been received. */ process_setup_packet(rhport); - } else if (0 == (is0 & LINK_REG_INTSTS0_CTSQ_Msk)) { + } else if (0 == (is0 & RUSB2_INTSTS0_CTSQ_Msk)) { /* A ZLP has been sent/received. */ process_status_completion(rhport); } } - if (is0 & LINK_REG_INTSTS0_BEMP_Msk) { - const unsigned s = LINK_REG->BEMPSTS; - LINK_REG->BEMPSTS = 0; + if (is0 & RUSB2_INTSTS0_BEMP_Msk) { + const unsigned s = RUSB2->BEMPSTS; + RUSB2->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } - if (is0 & LINK_REG_INTSTS0_BRDY_Msk) { - const unsigned m = LINK_REG->BRDYENB; - unsigned s = LINK_REG->BRDYSTS & m; + if (is0 & RUSB2_INTSTS0_BRDY_Msk) { + const unsigned m = RUSB2->BRDYENB; + unsigned s = RUSB2->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->BRDYSTS = ~s; + RUSB2->BRDYSTS = ~s; while (s) { #if defined(__CCRX__) static const int Mod37BitPosition[] = { diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c index 7d14aad60..e4743223e 100644 --- a/src/portable/renesas/rusb2/hcd_rusb2.c +++ b/src/portable/renesas/rusb2/hcd_rusb2.c @@ -47,9 +47,9 @@ /* LINK core registers */ #if defined(__CCRX__) -#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE) + #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE) #else -#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE) + #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE) #endif TU_ATTR_PACKED_BEGIN @@ -135,9 +135,9 @@ static unsigned find_pipe(unsigned xfer) static volatile uint16_t* get_pipectr(unsigned num) { if (num) { - return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]); + return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]); } else { - return (volatile uint16_t*)&(LINK_REG->DCPCTR); + return (volatile uint16_t*)&(RUSB2->DCPCTR); } } @@ -145,7 +145,7 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num) { volatile reg_pipetre_t* tre = NULL; if ((1 <= num) && (num <= 5)) { - tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E); + tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E); } return tre; } @@ -164,19 +164,19 @@ static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr) static unsigned edpt0_max_packet_size(void) { - return LINK_REG->DCPMAXP_b.MXPS; + return RUSB2->DCPMAXP_b.MXPS; } static unsigned edpt_max_packet_size(unsigned num) { - LINK_REG->PIPESEL = num; - return LINK_REG->PIPEMAXP_b.MXPS; + RUSB2->PIPESEL = num; + return RUSB2->PIPEMAXP_b.MXPS; } static inline void pipe_wait_for_ready(unsigned num) { - while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ; - while (!LINK_REG->D0FIFOCTR_b.FRDY) ; + while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ; + while (!RUSB2->D0FIFOCTR_b.FRDY) ; } static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) @@ -207,23 +207,23 @@ static bool pipe0_xfer_in(void) const unsigned rem = pipe->remaining; const unsigned mps = edpt0_max_packet_size(); - const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN; + const unsigned vld = RUSB2->CFIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; - pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK; + pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } if (len < mps) { - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; } pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; return true; } - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF; return false; } @@ -239,11 +239,11 @@ static bool pipe0_xfer_out(void) const unsigned len = TU_MIN(mps, rem); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len); + pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len); pipe->buf = (uint8_t*)buf + len; } if (len < mps) { - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; } pipe->remaining = rem - len; return false; @@ -254,21 +254,21 @@ static bool pipe_xfer_in(unsigned num) pipe_state_t *pipe = &_hcd.pipe[num]; const unsigned rem = pipe->remaining; - LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT; + RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT; const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); - const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN; + const unsigned vld = RUSB2->D0FIFOCTR_b.DTLN; const unsigned len = TU_MIN(TU_MIN(rem, mps), vld); void *buf = pipe->buf; if (len) { - pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); + pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } if (len < mps) { - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk; + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk; } - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; if ((len < mps) || (rem == len)) { pipe->buf = NULL; @@ -287,19 +287,19 @@ static bool pipe_xfer_out(unsigned num) return true; } - LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); + RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0); const unsigned mps = edpt_max_packet_size(num); pipe_wait_for_ready(num); const unsigned len = TU_MIN(rem, mps); void *buf = pipe->buf; if (len) { - pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len); + pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; } if (len < mps) - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */ pipe->remaining = rem - len; return false; } @@ -311,12 +311,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, /* configure fifo direction and access unit settings */ if (dir_in) { /* IN, a byte */ - LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT; - while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ; + RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT; + while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ; } else { /* OUT, 2 bytes */ - LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT | - (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0); - while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ; + RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT | + (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0); + while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ; } pipe_state_t *pipe = &_hcd.pipe[0]; @@ -326,21 +326,21 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, if (buflen) { pipe->buf = buffer; if (!dir_in) { /* OUT */ - TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80)); + TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80)); pipe0_xfer_out(); } } else { /* ZLP */ pipe->buf = NULL; if (!dir_in) { /* OUT */ - LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; + RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; } - if (dir_in == LINK_REG->DCPCFG_b.DIR) { - TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID); - LINK_REG->DCPCTR_b.SQSET = 1; - LINK_REG->DCPCFG_b.DIR = dir_in ^ 1; + if (dir_in == RUSB2->DCPCFG_b.DIR) { + TU_ASSERT(RUSB2_PIPE_CTR_PID_NAK == RUSB2->DCPCTR_b.PID); + RUSB2->DCPCTR_b.SQSET = 1; + RUSB2->DCPCFG_b.DIR = dir_in ^ 1; } } - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF; return true; } @@ -360,23 +360,23 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u if (buflen) { pipe_xfer_out(num); } else { /* ZLP */ - LINK_REG->D0FIFOSEL = num; + RUSB2->D0FIFOSEL = num; pipe_wait_for_ready(num); - LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk; - LINK_REG->D0FIFOSEL = 0; - while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ + RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk; + RUSB2->D0FIFOSEL = 0; + while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */ } } else { volatile uint16_t *ctr = get_pipectr(num); volatile reg_pipetre_t *pt = get_pipetre(num); if (pt) { const unsigned mps = edpt_max_packet_size(num); - if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK; + if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK; pt->TRE = TU_BIT(8); pt->TRN = (buflen + mps - 1) / mps; pt->TRENB = 1; } - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } return true; } @@ -410,10 +410,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num) unsigned result; uint16_t volatile *ctr = get_pipectr(num); // TU_LOG1("NRDY %d %x\n", num, *ctr); - switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) { + switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) { default: return; - case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break; - case LINK_REG_PIPE_CTR_PID_NAK: result = XFER_RESULT_FAILED; break; + case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break; + case RUSB2_PIPE_CTR_PID_NAK: result = XFER_RESULT_FAILED; break; } pipe_state_t *pipe = &_hcd.pipe[num]; hcd_event_xfer_complete(pipe->dev, pipe->ep, @@ -485,44 +485,44 @@ bool hcd_init(uint8_t rhport) enable_interrupt(pswi); #endif - LINK_REG->SYSCFG_b.SCKE = 1; - while (!LINK_REG->SYSCFG_b.SCKE) ; - LINK_REG->SYSCFG_b.DPRPU = 0; - LINK_REG->SYSCFG_b.DRPD = 0; - LINK_REG->SYSCFG_b.DCFM = 1; + RUSB2->SYSCFG_b.SCKE = 1; + while (!RUSB2->SYSCFG_b.SCKE) ; + RUSB2->SYSCFG_b.DPRPU = 0; + RUSB2->SYSCFG_b.DRPD = 0; + RUSB2->SYSCFG_b.DCFM = 1; - LINK_REG->DVSTCTR0_b.VBUSEN = 1; + RUSB2->DVSTCTR0_b.VBUSEN = 1; - LINK_REG->SYSCFG_b.DRPD = 1; + RUSB2->SYSCFG_b.DRPD = 1; for (volatile int i = 0; i < 30000; ++i) ; - LINK_REG->SYSCFG_b.USBE = 1; + RUSB2->SYSCFG_b.USBE = 1; // MCU specific PHY init - link_phy_init(); + rusb2_phy_init(); - LINK_REG->PHYSLEW = 0x5; - LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ + RUSB2->PHYSLEW = 0x5; + RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */ /* Setup default control pipe */ - LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk; - LINK_REG->DCPMAXP = 64; - LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk; - LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk; - LINK_REG->BEMPENB = 1; - LINK_REG->NRDYENB = 1; - LINK_REG->BRDYENB = 1; + RUSB2->DCPCFG = RUSB2_PIPECFG_SHTNAK_Msk; + RUSB2->DCPMAXP = 64; + RUSB2->INTENB0 = RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk; + RUSB2->INTENB1 = RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk; + RUSB2->BEMPENB = 1; + RUSB2->NRDYENB = 1; + RUSB2->BRDYENB = 1; return true; } void hcd_int_enable(uint8_t rhport) { - link_int_enable(rhport); + rusb2_int_enable(rhport); } void hcd_int_disable(uint8_t rhport) { - link_int_disable(rhport); + rusb2_int_disable(rhport); } uint32_t hcd_frame_number(uint8_t rhport) @@ -531,7 +531,7 @@ uint32_t hcd_frame_number(uint8_t rhport) /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); - return LINK_REG->FRMNUM_b.FRNM; + return RUSB2->FRMNUM_b.FRNM; } /*--------------------------------------------------------------------+ @@ -540,24 +540,24 @@ uint32_t hcd_frame_number(uint8_t rhport) bool hcd_port_connect_status(uint8_t rhport) { (void)rhport; - return LINK_REG->INTSTS1_b.ATTCH ? true : false; + return RUSB2->INTSTS1_b.ATTCH ? true : false; } void hcd_port_reset(uint8_t rhport) { - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; - while (LINK_REG->DCPCTR_b.PBUSY) ; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK; + while (RUSB2->DCPCTR_b.PBUSY) ; hcd_int_disable(rhport); - LINK_REG->DVSTCTR0_b.UACT = 0; - if (LINK_REG->DCPCTR_b.SUREQ) { - LINK_REG->DCPCTR_b.SUREQCLR = 1; + RUSB2->DVSTCTR0_b.UACT = 0; + if (RUSB2->DCPCTR_b.SUREQ) { + RUSB2->DCPCTR_b.SUREQCLR = 1; } hcd_int_enable(rhport); /* Reset should be asserted 10-20ms. */ - LINK_REG->DVSTCTR0_b.USBRST = 1; + RUSB2->DVSTCTR0_b.USBRST = 1; for (volatile int i = 0; i < 2400000; ++i) ; - LINK_REG->DVSTCTR0_b.USBRST = 0; - LINK_REG->DVSTCTR0_b.UACT = 1; + RUSB2->DVSTCTR0_b.USBRST = 0; + RUSB2->DVSTCTR0_b.UACT = 1; _hcd.need_reset = false; } @@ -569,10 +569,10 @@ void hcd_port_reset_end(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; - switch (LINK_REG->DVSTCTR0_b.RHST) { + switch (RUSB2->DVSTCTR0_b.RHST) { default: return TUSB_SPEED_INVALID; - case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL; - case LINK_REG_DVSTCTR0_RHST_LS: return TUSB_SPEED_LOW; + case RUSB2_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL; + case RUSB2_DVSTCTR0_RHST_LS: return TUSB_SPEED_LOW; } } @@ -588,13 +588,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) unsigned num = *ep; if (!num || dev_addr != _hcd.pipe[num].dev) continue; - ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1]; + ctr = (uint16_t volatile*)&RUSB2->PIPE_CTR[num - 1]; *ctr = 0; - LINK_REG->NRDYENB &= ~TU_BIT(num); - LINK_REG->BRDYENB &= ~TU_BIT(num); - LINK_REG->PIPESEL = num; - LINK_REG->PIPECFG = 0; - LINK_REG->PIPEMAXP = 0; + RUSB2->NRDYENB &= ~TU_BIT(num); + RUSB2->BRDYENB &= ~TU_BIT(num); + RUSB2->PIPESEL = num; + RUSB2->PIPECFG = 0; + RUSB2->PIPEMAXP = 0; _hcd.pipe[num].ep = 0; _hcd.pipe[num].dev = 0; @@ -608,32 +608,32 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void)rhport; - // TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR); + // TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR); TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ - TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ); + TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ); - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK; _hcd.pipe[0].buf = NULL; _hcd.pipe[0].length = 8; _hcd.pipe[0].remaining = 0; _hcd.pipe[0].dev = dev_addr; - while (LINK_REG->DCPCTR_b.PBUSY) ; - LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; + while (RUSB2->DCPCTR_b.PBUSY) ; + RUSB2->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr]; /* Set direction in advance for DATA stage */ uint8_t const bmRequesttype = setup_packet[0]; - LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; + RUSB2->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1; uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0]; - LINK_REG->USBREQ = tu_htole16(p[0]); - LINK_REG->USBVAL = p[1]; - LINK_REG->USBINDX = p[2]; - LINK_REG->USBLENG = p[3]; + RUSB2->USBREQ = tu_htole16(p[0]); + RUSB2->USBVAL = p[1]; + RUSB2->USBINDX = p[2]; + RUSB2->USBLENG = p[3]; - LINK_REG->DCPCTR_b.SUREQ = 1; + RUSB2->DCPCTR_b.SUREQ = 1; return true; } @@ -646,14 +646,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const const unsigned epn = tu_edpt_number(ep_addr); const unsigned mps = tu_edpt_packet_size(ep_desc); if (0 == epn) { - LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK; + RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK; hcd_devtree_info_t devtree; hcd_devtree_get_info(dev_addr, &devtree); - uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0]; + uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &RUSB2->DEVADD[0]; devadd += dev_addr; - while (LINK_REG->DCPCTR_b.PBUSY) ; - LINK_REG->DCPMAXP = (dev_addr << 12) | mps; - *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS; + while (RUSB2->DCPCTR_b.PBUSY) ; + RUSB2->DCPMAXP = (dev_addr << 12) | mps; + *devadd = (TUSB_SPEED_FULL == devtree.speed) ? RUSB2_DEVADD_USBSPD_FS : RUSB2_DEVADD_USBSPD_LS; _hcd.ctl_mps[dev_addr] = mps; return true; } @@ -672,25 +672,25 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const /* setup pipe */ hcd_int_disable(rhport); - LINK_REG->PIPESEL = num; - LINK_REG->PIPEMAXP = (dev_addr << 12) | mps; + RUSB2->PIPESEL = num; + RUSB2->PIPEMAXP = (dev_addr << 12) | mps; volatile uint16_t *ctr = get_pipectr(num); - *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk; + *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk; *ctr = 0; unsigned cfg = ((1 ^ dir_in) << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk; + cfg |= RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk; } else if (xfer == TUSB_XFER_INTERRUPT) { - cfg |= LINK_REG_PIPECFG_TYPE_INT; + cfg |= RUSB2_PIPECFG_TYPE_INT; } else { - cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk; + cfg |= RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk; } - LINK_REG->PIPECFG = cfg; - LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num); - LINK_REG->NRDYENB |= TU_BIT(num); - LINK_REG->BRDYENB |= TU_BIT(num); + RUSB2->PIPECFG = cfg; + RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num); + RUSB2->NRDYENB |= TU_BIT(num); + RUSB2->BRDYENB |= TU_BIT(num); if (!dir_in) { - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } hcd_int_enable(rhport); @@ -717,12 +717,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) *ctr = pid & 2; *ctr = 0; } - *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk; + *ctr = RUSB2_PIPE_CTR_SQCLR_Msk; unsigned const epn = tu_edpt_number(ep_addr); if (!epn) return true; if (!tu_edpt_dir(ep_addr)) { /* OUT */ - *ctr = LINK_REG_PIPE_CTR_PID_BUF; + *ctr = RUSB2_PIPE_CTR_PID_BUF; } return true; } @@ -740,49 +740,49 @@ void hcd_int_handler(uint8_t rhport) 20, 8, 19, 18}; #endif - unsigned is1 = LINK_REG->INTSTS1; - unsigned is0 = LINK_REG->INTSTS0; + unsigned is1 = RUSB2->INTSTS1; + unsigned is0 = RUSB2->INTSTS0; /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1); - LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0); + RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1); + RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0); // TU_LOG1("IS %04x %04x\n", is0, is1); - is1 &= LINK_REG->INTENB1; - is0 &= LINK_REG->INTENB0; + is1 &= RUSB2->INTENB1; + is0 &= RUSB2->INTENB0; - if (is1 & LINK_REG_INTSTS1_SACK_Msk) { + if (is1 & RUSB2_INTSTS1_SACK_Msk) { /* Set DATA1 in advance for the next transfer. */ - LINK_REG->DCPCTR_b.SQSET = 1; - hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); + RUSB2->DCPCTR_b.SQSET = 1; + hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true); } - if (is1 & LINK_REG_INTSTS1_SIGN_Msk) { - hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); + if (is1 & RUSB2_INTSTS1_SIGN_Msk) { + hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true); } - if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) { - LINK_REG->DVSTCTR0_b.UACT = 1; + if (is1 & RUSB2_INTSTS1_ATTCH_Msk) { + RUSB2->DVSTCTR0_b.UACT = 1; _hcd.need_reset = true; - LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk; + RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk; hcd_event_device_attach(rhport, true); } - if (is1 & LINK_REG_INTSTS1_DTCH_Msk) { - LINK_REG->DVSTCTR0_b.UACT = 0; - if (LINK_REG->DCPCTR_b.SUREQ) { - LINK_REG->DCPCTR_b.SUREQCLR = 1; + if (is1 & RUSB2_INTSTS1_DTCH_Msk) { + RUSB2->DVSTCTR0_b.UACT = 0; + if (RUSB2->DCPCTR_b.SUREQ) { + RUSB2->DCPCTR_b.SUREQCLR = 1; } - LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk; + RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_DTCH_Msk) | RUSB2_INTSTS1_ATTCH_Msk; hcd_event_device_remove(rhport, true); } - if (is0 & LINK_REG_INTSTS0_BEMP_Msk) { - const unsigned s = LINK_REG->BEMPSTS; - LINK_REG->BEMPSTS = 0; + if (is0 & RUSB2_INTSTS0_BEMP_Msk) { + const unsigned s = RUSB2->BEMPSTS; + RUSB2->BEMPSTS = 0; if (s & 1) { process_pipe0_bemp(rhport); } } - if (is0 & LINK_REG_INTSTS0_NRDY_Msk) { - const unsigned m = LINK_REG->NRDYENB; - unsigned s = LINK_REG->NRDYSTS & m; - LINK_REG->NRDYSTS = ~s; + if (is0 & RUSB2_INTSTS0_NRDY_Msk) { + const unsigned m = RUSB2->NRDYENB; + unsigned s = RUSB2->NRDYSTS & m; + RUSB2->NRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; @@ -793,11 +793,11 @@ void hcd_int_handler(uint8_t rhport) s &= ~TU_BIT(num); } } - if (is0 & LINK_REG_INTSTS0_BRDY_Msk) { - const unsigned m = LINK_REG->BRDYENB; - unsigned s = LINK_REG->BRDYSTS & m; + if (is0 & RUSB2_INTSTS0_BRDY_Msk) { + const unsigned m = RUSB2->BRDYENB; + unsigned s = RUSB2->BRDYSTS & m; /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */ - LINK_REG->BRDYSTS = ~s; + RUSB2->BRDYSTS = ~s; while (s) { #if defined(__CCRX__) const unsigned num = Mod37BitPosition[(-s & s) % 37]; diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h index a73b13951..24658e95a 100644 --- a/src/portable/renesas/rusb2/rusb2_ra.h +++ b/src/portable/renesas/rusb2/rusb2_ra.h @@ -34,24 +34,22 @@ extern "C" { /* renesas fsp api */ #include "bsp_api.h" -#define LINK_REG_BASE (0x40090000) +#define RUSB2_REG_BASE (0x40090000) -TU_ATTR_ALWAYS_INLINE -static inline void link_int_enable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport) { (void) rhport; NVIC_EnableIRQ(TU_IRQn); } -TU_ATTR_ALWAYS_INLINE -static inline void link_int_disable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport) { (void) rhport; NVIC_DisableIRQ(TU_IRQn); } // MCU specific PHY init -static inline void link_phy_init(void) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) { } diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h index e43253569..c28689df1 100644 --- a/src/portable/renesas/rusb2/rusb2_rx.h +++ b/src/portable/renesas/rusb2/rusb2_rx.h @@ -35,9 +35,9 @@ extern "C" { #include "iodefine.h" -#define LINK_REG_BASE (0x000A0000) +#define RUSB2_REG_BASE (0x000A0000) -TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport) { (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) @@ -47,7 +47,7 @@ TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport) #endif } -TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport) { (void) rhport; #if (CFG_TUSB_MCU == OPT_MCU_RX72N) @@ -58,7 +58,7 @@ TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport) } // MCU specific PHY init -TU_ATTR_ALWAYS_INLINE static inline void link_phy_init(void) +TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) { #if (CFG_TUSB_MCU == OPT_MCU_RX72N) IR(PERIB, INTB185) = 0; diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h index cb3db650a..6a5c7f8ff 100644 --- a/src/portable/renesas/rusb2/rusb2_type.h +++ b/src/portable/renesas/rusb2/rusb2_type.h @@ -60,7 +60,7 @@ typedef struct TU_ATTR_PACKED { volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */ } N_b; }; -} LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */ +} RUSB2_PIPE_TR_t; /* Size = 4 (0x4) */ /* LINK_REG Structure */ typedef struct TU_ATTR_PACKED { @@ -685,7 +685,7 @@ typedef struct TU_ATTR_PACKED { }; volatile const uint16_t RESERVED13; volatile const uint32_t RESERVED14[3]; - volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */ + volatile RUSB2_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */ volatile const uint32_t RESERVED15[3]; union { @@ -950,7 +950,7 @@ typedef struct TU_ATTR_PACKED { uint32_t : 8; } DPUSR1R_FS_b; }; -} LINK_REG_t; /* Size = 1032 (0x408) */ +} RUSB2_REG_t; /* Size = 1032 (0x408) */ TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */ TU_ATTR_BIT_FIELD_ORDER_END @@ -961,706 +961,706 @@ TU_ATTR_BIT_FIELD_ORDER_END // PIPE_TR // E -#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL) /* TRENB (Bit 9) */ -#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL) /* TRCLR (Bit 8) */ -#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_TR_E_TRENB_Pos (9UL) /* TRENB (Bit 9) */ +#define RUSB2_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_TR_E_TRCLR_Pos (8UL) /* TRCLR (Bit 8) */ +#define RUSB2_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */ // N -#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL) /* TRNCNT (Bit 0) */ -#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */ +#define RUSB2_PIPE_TR_N_TRNCNT_Pos (0UL) /* TRNCNT (Bit 0) */ +#define RUSB2_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */ // LINK_REG // SYSCFG -#define LINK_REG_SYSCFG_SCKE_Pos (10UL) /* SCKE (Bit 10) */ -#define LINK_REG_SYSCFG_SCKE_Msk (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_CNEN_Pos (8UL) /* CNEN (Bit 8) */ -#define LINK_REG_SYSCFG_CNEN_Msk (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DCFM_Pos (6UL) /* DCFM (Bit 6) */ -#define LINK_REG_SYSCFG_DCFM_Msk (0x40UL) /* DCFM (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DRPD_Pos (5UL) /* DRPD (Bit 5) */ -#define LINK_REG_SYSCFG_DRPD_Msk (0x20UL) /* DRPD (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DPRPU_Pos (4UL) /* DPRPU (Bit 4) */ -#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL) /* DPRPU (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_DMRPU_Pos (3UL) /* DMRPU (Bit 3) */ -#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL) /* DMRPU (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSCFG_USBE_Pos (0UL) /* USBE (Bit 0) */ -#define LINK_REG_SYSCFG_USBE_Msk (0x1UL) /* USBE (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_SCKE_Pos (10UL) /* SCKE (Bit 10) */ +#define RUSB2_SYSCFG_SCKE_Msk (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_CNEN_Pos (8UL) /* CNEN (Bit 8) */ +#define RUSB2_SYSCFG_CNEN_Msk (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_DCFM_Pos (6UL) /* DCFM (Bit 6) */ +#define RUSB2_SYSCFG_DCFM_Msk (0x40UL) /* DCFM (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_DRPD_Pos (5UL) /* DRPD (Bit 5) */ +#define RUSB2_SYSCFG_DRPD_Msk (0x20UL) /* DRPD (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_DPRPU_Pos (4UL) /* DPRPU (Bit 4) */ +#define RUSB2_SYSCFG_DPRPU_Msk (0x10UL) /* DPRPU (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_DMRPU_Pos (3UL) /* DMRPU (Bit 3) */ +#define RUSB2_SYSCFG_DMRPU_Msk (0x8UL) /* DMRPU (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSCFG_USBE_Pos (0UL) /* USBE (Bit 0) */ +#define RUSB2_SYSCFG_USBE_Msk (0x1UL) /* USBE (Bitfield-Mask: 0x01) */ // BUSWAIT -#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL) /* BWAIT (Bit 0) */ -#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */ +#define RUSB2_BUSWAIT_BWAIT_Pos (0UL) /* BWAIT (Bit 0) */ +#define RUSB2_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */ // SYSSTS0 -#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL) /* OVCMON (Bit 14) */ -#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */ -#define LINK_REG_SYSSTS0_HTACT_Pos (6UL) /* HTACT (Bit 6) */ -#define LINK_REG_SYSSTS0_HTACT_Msk (0x40UL) /* HTACT (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_SOFEA_Pos (5UL) /* SOFEA (Bit 5) */ -#define LINK_REG_SYSSTS0_SOFEA_Msk (0x20UL) /* SOFEA (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_IDMON_Pos (2UL) /* IDMON (Bit 2) */ -#define LINK_REG_SYSSTS0_IDMON_Msk (0x4UL) /* IDMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_SYSSTS0_LNST_Pos (0UL) /* LNST (Bit 0) */ -#define LINK_REG_SYSSTS0_LNST_Msk (0x3UL) /* LNST (Bitfield-Mask: 0x03) */ +#define RUSB2_SYSSTS0_OVCMON_Pos (14UL) /* OVCMON (Bit 14) */ +#define RUSB2_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */ +#define RUSB2_SYSSTS0_HTACT_Pos (6UL) /* HTACT (Bit 6) */ +#define RUSB2_SYSSTS0_HTACT_Msk (0x40UL) /* HTACT (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSSTS0_SOFEA_Pos (5UL) /* SOFEA (Bit 5) */ +#define RUSB2_SYSSTS0_SOFEA_Msk (0x20UL) /* SOFEA (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSSTS0_IDMON_Pos (2UL) /* IDMON (Bit 2) */ +#define RUSB2_SYSSTS0_IDMON_Msk (0x4UL) /* IDMON (Bitfield-Mask: 0x01) */ +#define RUSB2_SYSSTS0_LNST_Pos (0UL) /* LNST (Bit 0) */ +#define RUSB2_SYSSTS0_LNST_Msk (0x3UL) /* LNST (Bitfield-Mask: 0x03) */ // PLLSTA -#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL) /* PLLLOCK (Bit 0) */ -#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */ +#define RUSB2_PLLSTA_PLLLOCK_Pos (0UL) /* PLLLOCK (Bit 0) */ +#define RUSB2_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */ // DVSTCTR0 -#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL) /* HNPBTOA (Bit 11) */ -#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_EXICEN_Pos (10UL) /* EXICEN (Bit 10) */ -#define LINK_REG_DVSTCTR0_EXICEN_Msk (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_VBUSEN_Pos (9UL) /* VBUSEN (Bit 9) */ -#define LINK_REG_DVSTCTR0_VBUSEN_Msk (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_WKUP_Pos (8UL) /* WKUP (Bit 8) */ -#define LINK_REG_DVSTCTR0_WKUP_Msk (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RWUPE_Pos (7UL) /* RWUPE (Bit 7) */ -#define LINK_REG_DVSTCTR0_RWUPE_Msk (0x80UL) /* RWUPE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_USBRST_Pos (6UL) /* USBRST (Bit 6) */ -#define LINK_REG_DVSTCTR0_USBRST_Msk (0x40UL) /* USBRST (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RESUME_Pos (5UL) /* RESUME (Bit 5) */ -#define LINK_REG_DVSTCTR0_RESUME_Msk (0x20UL) /* RESUME (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_UACT_Pos (4UL) /* UACT (Bit 4) */ -#define LINK_REG_DVSTCTR0_UACT_Msk (0x10UL) /* UACT (Bitfield-Mask: 0x01) */ -#define LINK_REG_DVSTCTR0_RHST_Pos (0UL) /* RHST (Bit 0) */ -#define LINK_REG_DVSTCTR0_RHST_Msk (0x7UL) /* RHST (Bitfield-Mask: 0x07) */ +#define RUSB2_DVSTCTR0_HNPBTOA_Pos (11UL) /* HNPBTOA (Bit 11) */ +#define RUSB2_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_EXICEN_Pos (10UL) /* EXICEN (Bit 10) */ +#define RUSB2_DVSTCTR0_EXICEN_Msk (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_VBUSEN_Pos (9UL) /* VBUSEN (Bit 9) */ +#define RUSB2_DVSTCTR0_VBUSEN_Msk (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_WKUP_Pos (8UL) /* WKUP (Bit 8) */ +#define RUSB2_DVSTCTR0_WKUP_Msk (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_RWUPE_Pos (7UL) /* RWUPE (Bit 7) */ +#define RUSB2_DVSTCTR0_RWUPE_Msk (0x80UL) /* RWUPE (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_USBRST_Pos (6UL) /* USBRST (Bit 6) */ +#define RUSB2_DVSTCTR0_USBRST_Msk (0x40UL) /* USBRST (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_RESUME_Pos (5UL) /* RESUME (Bit 5) */ +#define RUSB2_DVSTCTR0_RESUME_Msk (0x20UL) /* RESUME (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_UACT_Pos (4UL) /* UACT (Bit 4) */ +#define RUSB2_DVSTCTR0_UACT_Msk (0x10UL) /* UACT (Bitfield-Mask: 0x01) */ +#define RUSB2_DVSTCTR0_RHST_Pos (0UL) /* RHST (Bit 0) */ +#define RUSB2_DVSTCTR0_RHST_Msk (0x7UL) /* RHST (Bitfield-Mask: 0x07) */ // TESTMODE -#define LINK_REG_TESTMODE_UTST_Pos (0UL) /* UTST (Bit 0) */ -#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */ +#define RUSB2_TESTMODE_UTST_Pos (0UL) /* UTST (Bit 0) */ +#define RUSB2_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */ // CFIFOSEL -#define LINK_REG_CFIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_CFIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_CFIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_CFIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_CFIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_CFIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_ISEL_Pos (5UL) /* ISEL (Bit 5) */ -#define LINK_REG_CFIFOSEL_ISEL_Msk (0x20UL) /* ISEL (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +#define RUSB2_CFIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define RUSB2_CFIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define RUSB2_CFIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define RUSB2_CFIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define RUSB2_CFIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define RUSB2_CFIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOSEL_ISEL_Pos (5UL) /* ISEL (Bit 5) */ +#define RUSB2_CFIFOSEL_ISEL_Msk (0x20UL) /* ISEL (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define RUSB2_CFIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ // CFIFOCTR -#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +#define RUSB2_CFIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define RUSB2_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define RUSB2_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define RUSB2_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_CFIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define RUSB2_CFIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ // D0FIFOSEL -#define LINK_REG_D0FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_D0FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_D0FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ -#define LINK_REG_D0FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ -#define LINK_REG_D0FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_D0FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_D0FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_D0FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +#define RUSB2_D0FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define RUSB2_D0FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define RUSB2_D0FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define RUSB2_D0FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define RUSB2_D0FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define RUSB2_D0FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define RUSB2_D0FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define RUSB2_D0FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define RUSB2_D0FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ // D0FIFOCTR -#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +#define RUSB2_D0FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define RUSB2_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define RUSB2_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define RUSB2_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_D0FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define RUSB2_D0FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ // D1FIFOSEL -#define LINK_REG_D1FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ -#define LINK_REG_D1FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ -#define LINK_REG_D1FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ -#define LINK_REG_D1FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ -#define LINK_REG_D1FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ -#define LINK_REG_D1FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ -#define LINK_REG_D1FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ -#define LINK_REG_D1FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ -#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ +#define RUSB2_D1FIFOSEL_RCNT_Pos (15UL) /* RCNT (Bit 15) */ +#define RUSB2_D1FIFOSEL_RCNT_Msk (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOSEL_REW_Pos (14UL) /* REW (Bit 14) */ +#define RUSB2_D1FIFOSEL_REW_Msk (0x4000UL) /* REW (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOSEL_DCLRM_Pos (13UL) /* DCLRM (Bit 13) */ +#define RUSB2_D1FIFOSEL_DCLRM_Msk (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOSEL_DREQE_Pos (12UL) /* DREQE (Bit 12) */ +#define RUSB2_D1FIFOSEL_DREQE_Msk (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOSEL_MBW_Pos (10UL) /* MBW (Bit 10) */ +#define RUSB2_D1FIFOSEL_MBW_Msk (0xc00UL) /* MBW (Bitfield-Mask: 0x03) */ +#define RUSB2_D1FIFOSEL_BIGEND_Pos (8UL) /* BIGEND (Bit 8) */ +#define RUSB2_D1FIFOSEL_BIGEND_Msk (0x100UL) /* BIGEND (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOSEL_CURPIPE_Pos (0UL) /* CURPIPE (Bit 0) */ +#define RUSB2_D1FIFOSEL_CURPIPE_Msk (0xfUL) /* CURPIPE (Bitfield-Mask: 0x0f) */ // D1FIFOCTR -#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ -#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ -#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ -#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ -#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ +#define RUSB2_D1FIFOCTR_BVAL_Pos (15UL) /* BVAL (Bit 15) */ +#define RUSB2_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOCTR_BCLR_Pos (14UL) /* BCLR (Bit 14) */ +#define RUSB2_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOCTR_FRDY_Pos (13UL) /* FRDY (Bit 13) */ +#define RUSB2_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_D1FIFOCTR_DTLN_Pos (0UL) /* DTLN (Bit 0) */ +#define RUSB2_D1FIFOCTR_DTLN_Msk (0xfffUL) /* DTLN (Bitfield-Mask: 0xfff) */ // INTENB0 -#define LINK_REG_INTENB0_VBSE_Pos (15UL) /* VBSE (Bit 15) */ -#define LINK_REG_INTENB0_VBSE_Msk (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_RSME_Pos (14UL) /* RSME (Bit 14) */ -#define LINK_REG_INTENB0_RSME_Msk (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_SOFE_Pos (13UL) /* SOFE (Bit 13) */ -#define LINK_REG_INTENB0_SOFE_Msk (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_DVSE_Pos (12UL) /* DVSE (Bit 12) */ -#define LINK_REG_INTENB0_DVSE_Msk (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_CTRE_Pos (11UL) /* CTRE (Bit 11) */ -#define LINK_REG_INTENB0_CTRE_Msk (0x800UL) /* CTRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_BEMPE_Pos (10UL) /* BEMPE (Bit 10) */ -#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL) /* BEMPE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_NRDYE_Pos (9UL) /* NRDYE (Bit 9) */ -#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL) /* NRDYE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB0_BRDYE_Pos (8UL) /* BRDYE (Bit 8) */ -#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL) /* BRDYE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_VBSE_Pos (15UL) /* VBSE (Bit 15) */ +#define RUSB2_INTENB0_VBSE_Msk (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_RSME_Pos (14UL) /* RSME (Bit 14) */ +#define RUSB2_INTENB0_RSME_Msk (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_SOFE_Pos (13UL) /* SOFE (Bit 13) */ +#define RUSB2_INTENB0_SOFE_Msk (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_DVSE_Pos (12UL) /* DVSE (Bit 12) */ +#define RUSB2_INTENB0_DVSE_Msk (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_CTRE_Pos (11UL) /* CTRE (Bit 11) */ +#define RUSB2_INTENB0_CTRE_Msk (0x800UL) /* CTRE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_BEMPE_Pos (10UL) /* BEMPE (Bit 10) */ +#define RUSB2_INTENB0_BEMPE_Msk (0x400UL) /* BEMPE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_NRDYE_Pos (9UL) /* NRDYE (Bit 9) */ +#define RUSB2_INTENB0_NRDYE_Msk (0x200UL) /* NRDYE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB0_BRDYE_Pos (8UL) /* BRDYE (Bit 8) */ +#define RUSB2_INTENB0_BRDYE_Msk (0x100UL) /* BRDYE (Bitfield-Mask: 0x01) */ // INTENB1 -#define LINK_REG_INTENB1_OVRCRE_Pos (15UL) /* OVRCRE (Bit 15) */ -#define LINK_REG_INTENB1_OVRCRE_Msk (0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_BCHGE_Pos (14UL) /* BCHGE (Bit 14) */ -#define LINK_REG_INTENB1_BCHGE_Msk (0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_DTCHE_Pos (12UL) /* DTCHE (Bit 12) */ -#define LINK_REG_INTENB1_DTCHE_Msk (0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_ATTCHE_Pos (11UL) /* ATTCHE (Bit 11) */ -#define LINK_REG_INTENB1_ATTCHE_Msk (0x800UL) /* ATTCHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_EOFERRE_Pos (6UL) /* EOFERRE (Bit 6) */ -#define LINK_REG_INTENB1_EOFERRE_Msk (0x40UL) /* EOFERRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_SIGNE_Pos (5UL) /* SIGNE (Bit 5) */ -#define LINK_REG_INTENB1_SIGNE_Msk (0x20UL) /* SIGNE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_SACKE_Pos (4UL) /* SACKE (Bit 4) */ -#define LINK_REG_INTENB1_SACKE_Msk (0x10UL) /* SACKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL) /* PDDETINTE0 (Bit 0) */ -#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL) /* PDDETINTE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_OVRCRE_Pos (15UL) /* OVRCRE (Bit 15) */ +#define RUSB2_INTENB1_OVRCRE_Msk (0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_BCHGE_Pos (14UL) /* BCHGE (Bit 14) */ +#define RUSB2_INTENB1_BCHGE_Msk (0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_DTCHE_Pos (12UL) /* DTCHE (Bit 12) */ +#define RUSB2_INTENB1_DTCHE_Msk (0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_ATTCHE_Pos (11UL) /* ATTCHE (Bit 11) */ +#define RUSB2_INTENB1_ATTCHE_Msk (0x800UL) /* ATTCHE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_EOFERRE_Pos (6UL) /* EOFERRE (Bit 6) */ +#define RUSB2_INTENB1_EOFERRE_Msk (0x40UL) /* EOFERRE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_SIGNE_Pos (5UL) /* SIGNE (Bit 5) */ +#define RUSB2_INTENB1_SIGNE_Msk (0x20UL) /* SIGNE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_SACKE_Pos (4UL) /* SACKE (Bit 4) */ +#define RUSB2_INTENB1_SACKE_Msk (0x10UL) /* SACKE (Bitfield-Mask: 0x01) */ +#define RUSB2_INTENB1_PDDETINTE0_Pos (0UL) /* PDDETINTE0 (Bit 0) */ +#define RUSB2_INTENB1_PDDETINTE0_Msk (0x1UL) /* PDDETINTE0 (Bitfield-Mask: 0x01) */ // BRDYENB -#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL) /* PIPEBRDYE (Bit 0) */ -#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */ +#define RUSB2_BRDYENB_PIPEBRDYE_Pos (0UL) /* PIPEBRDYE (Bit 0) */ +#define RUSB2_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */ // NRDYENB -#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL) /* PIPENRDYE (Bit 0) */ -#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */ +#define RUSB2_NRDYENB_PIPENRDYE_Pos (0UL) /* PIPENRDYE (Bit 0) */ +#define RUSB2_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */ // BEMPENB -#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL) /* PIPEBEMPE (Bit 0) */ -#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */ +#define RUSB2_BEMPENB_PIPEBEMPE_Pos (0UL) /* PIPEBEMPE (Bit 0) */ +#define RUSB2_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */ // SOFCFG -#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL) /* TRNENSEL (Bit 8) */ -#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_BRDYM_Pos (6UL) /* BRDYM (Bit 6) */ -#define LINK_REG_SOFCFG_BRDYM_Msk (0x40UL) /* BRDYM (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_INTL_Pos (5UL) /* INTL (Bit 5) */ -#define LINK_REG_SOFCFG_INTL_Msk (0x20UL) /* INTL (Bitfield-Mask: 0x01) */ -#define LINK_REG_SOFCFG_EDGESTS_Pos (4UL) /* EDGESTS (Bit 4) */ -#define LINK_REG_SOFCFG_EDGESTS_Msk (0x10UL) /* EDGESTS (Bitfield-Mask: 0x01) */ +#define RUSB2_SOFCFG_TRNENSEL_Pos (8UL) /* TRNENSEL (Bit 8) */ +#define RUSB2_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */ +#define RUSB2_SOFCFG_BRDYM_Pos (6UL) /* BRDYM (Bit 6) */ +#define RUSB2_SOFCFG_BRDYM_Msk (0x40UL) /* BRDYM (Bitfield-Mask: 0x01) */ +#define RUSB2_SOFCFG_INTL_Pos (5UL) /* INTL (Bit 5) */ +#define RUSB2_SOFCFG_INTL_Msk (0x20UL) /* INTL (Bitfield-Mask: 0x01) */ +#define RUSB2_SOFCFG_EDGESTS_Pos (4UL) /* EDGESTS (Bit 4) */ +#define RUSB2_SOFCFG_EDGESTS_Msk (0x10UL) /* EDGESTS (Bitfield-Mask: 0x01) */ // PHYSET -#define LINK_REG_PHYSET_HSEB_Pos (15UL) /* HSEB (Bit 15) */ -#define LINK_REG_PHYSET_HSEB_Msk (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_REPSTART_Pos (11UL) /* REPSTART (Bit 11) */ -#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL) /* REPSTART (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_REPSEL_Pos (8UL) /* REPSEL (Bit 8) */ -#define LINK_REG_PHYSET_REPSEL_Msk (0x300UL) /* REPSEL (Bitfield-Mask: 0x03) */ -#define LINK_REG_PHYSET_CLKSEL_Pos (4UL) /* CLKSEL (Bit 4) */ -#define LINK_REG_PHYSET_CLKSEL_Msk (0x30UL) /* CLKSEL (Bitfield-Mask: 0x03) */ -#define LINK_REG_PHYSET_CDPEN_Pos (3UL) /* CDPEN (Bit 3) */ -#define LINK_REG_PHYSET_CDPEN_Msk (0x8UL) /* CDPEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_PLLRESET_Pos (1UL) /* PLLRESET (Bit 1) */ -#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL) /* PLLRESET (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSET_DIRPD_Pos (0UL) /* DIRPD (Bit 0) */ -#define LINK_REG_PHYSET_DIRPD_Msk (0x1UL) /* DIRPD (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSET_HSEB_Pos (15UL) /* HSEB (Bit 15) */ +#define RUSB2_PHYSET_HSEB_Msk (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSET_REPSTART_Pos (11UL) /* REPSTART (Bit 11) */ +#define RUSB2_PHYSET_REPSTART_Msk (0x800UL) /* REPSTART (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSET_REPSEL_Pos (8UL) /* REPSEL (Bit 8) */ +#define RUSB2_PHYSET_REPSEL_Msk (0x300UL) /* REPSEL (Bitfield-Mask: 0x03) */ +#define RUSB2_PHYSET_CLKSEL_Pos (4UL) /* CLKSEL (Bit 4) */ +#define RUSB2_PHYSET_CLKSEL_Msk (0x30UL) /* CLKSEL (Bitfield-Mask: 0x03) */ +#define RUSB2_PHYSET_CDPEN_Pos (3UL) /* CDPEN (Bit 3) */ +#define RUSB2_PHYSET_CDPEN_Msk (0x8UL) /* CDPEN (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSET_PLLRESET_Pos (1UL) /* PLLRESET (Bit 1) */ +#define RUSB2_PHYSET_PLLRESET_Msk (0x2UL) /* PLLRESET (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSET_DIRPD_Pos (0UL) /* DIRPD (Bit 0) */ +#define RUSB2_PHYSET_DIRPD_Msk (0x1UL) /* DIRPD (Bitfield-Mask: 0x01) */ // INTSTS0 -#define LINK_REG_INTSTS0_VBINT_Pos (15UL) /* VBINT (Bit 15) */ -#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_RESM_Pos (14UL) /* RESM (Bit 14) */ -#define LINK_REG_INTSTS0_RESM_Msk (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_SOFR_Pos (13UL) /* SOFR (Bit 13) */ -#define LINK_REG_INTSTS0_SOFR_Msk (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_DVST_Pos (12UL) /* DVST (Bit 12) */ -#define LINK_REG_INTSTS0_DVST_Msk (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_CTRT_Pos (11UL) /* CTRT (Bit 11) */ -#define LINK_REG_INTSTS0_CTRT_Msk (0x800UL) /* CTRT (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_BEMP_Pos (10UL) /* BEMP (Bit 10) */ -#define LINK_REG_INTSTS0_BEMP_Msk (0x400UL) /* BEMP (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_NRDY_Pos (9UL) /* NRDY (Bit 9) */ -#define LINK_REG_INTSTS0_NRDY_Msk (0x200UL) /* NRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_BRDY_Pos (8UL) /* BRDY (Bit 8) */ -#define LINK_REG_INTSTS0_BRDY_Msk (0x100UL) /* BRDY (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_VBSTS_Pos (7UL) /* VBSTS (Bit 7) */ -#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL) /* VBSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ -#define LINK_REG_INTSTS0_DVSQ_Msk (0x70UL) /* DVSQ (Bitfield-Mask: 0x07) */ -#define LINK_REG_INTSTS0_VALID_Pos (3UL) /* VALID (Bit 3) */ -#define LINK_REG_INTSTS0_VALID_Msk (0x8UL) /* VALID (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS0_CTSQ_Pos (0UL) /* CTSQ (Bit 0) */ -#define LINK_REG_INTSTS0_CTSQ_Msk (0x7UL) /* CTSQ (Bitfield-Mask: 0x07) */ +#define RUSB2_INTSTS0_VBINT_Pos (15UL) /* VBINT (Bit 15) */ +#define RUSB2_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_RESM_Pos (14UL) /* RESM (Bit 14) */ +#define RUSB2_INTSTS0_RESM_Msk (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_SOFR_Pos (13UL) /* SOFR (Bit 13) */ +#define RUSB2_INTSTS0_SOFR_Msk (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_DVST_Pos (12UL) /* DVST (Bit 12) */ +#define RUSB2_INTSTS0_DVST_Msk (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_CTRT_Pos (11UL) /* CTRT (Bit 11) */ +#define RUSB2_INTSTS0_CTRT_Msk (0x800UL) /* CTRT (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_BEMP_Pos (10UL) /* BEMP (Bit 10) */ +#define RUSB2_INTSTS0_BEMP_Msk (0x400UL) /* BEMP (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_NRDY_Pos (9UL) /* NRDY (Bit 9) */ +#define RUSB2_INTSTS0_NRDY_Msk (0x200UL) /* NRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_BRDY_Pos (8UL) /* BRDY (Bit 8) */ +#define RUSB2_INTSTS0_BRDY_Msk (0x100UL) /* BRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_VBSTS_Pos (7UL) /* VBSTS (Bit 7) */ +#define RUSB2_INTSTS0_VBSTS_Msk (0x80UL) /* VBSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define RUSB2_INTSTS0_DVSQ_Msk (0x70UL) /* DVSQ (Bitfield-Mask: 0x07) */ +#define RUSB2_INTSTS0_VALID_Pos (3UL) /* VALID (Bit 3) */ +#define RUSB2_INTSTS0_VALID_Msk (0x8UL) /* VALID (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS0_CTSQ_Pos (0UL) /* CTSQ (Bit 0) */ +#define RUSB2_INTSTS0_CTSQ_Msk (0x7UL) /* CTSQ (Bitfield-Mask: 0x07) */ // INTSTS1 -#define LINK_REG_INTSTS1_OVRCR_Pos (15UL) /* OVRCR (Bit 15) */ -#define LINK_REG_INTSTS1_OVRCR_Msk (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_BCHG_Pos (14UL) /* BCHG (Bit 14) */ -#define LINK_REG_INTSTS1_BCHG_Msk (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_DTCH_Pos (12UL) /* DTCH (Bit 12) */ -#define LINK_REG_INTSTS1_DTCH_Msk (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ -#define LINK_REG_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_L1RSMEND_Pos (9UL) /* L1RSMEND (Bit 9) */ -#define LINK_REG_INTSTS1_L1RSMEND_Msk (0x200UL) /* L1RSMEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_LPMEND_Pos (8UL) /* LPMEND (Bit 8) */ -#define LINK_REG_INTSTS1_LPMEND_Msk (0x100UL) /* LPMEND (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_EOFERR_Pos (6UL) /* EOFERR (Bit 6) */ -#define LINK_REG_INTSTS1_EOFERR_Msk (0x40UL) /* EOFERR (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_SIGN_Pos (5UL) /* SIGN (Bit 5) */ -#define LINK_REG_INTSTS1_SIGN_Msk (0x20UL) /* SIGN (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_SACK_Pos (4UL) /* SACK (Bit 4) */ -#define LINK_REG_INTSTS1_SACK_Msk (0x10UL) /* SACK (Bitfield-Mask: 0x01) */ -#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL) /* PDDETINT0 (Bit 0) */ -#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL) /* PDDETINT0 (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_OVRCR_Pos (15UL) /* OVRCR (Bit 15) */ +#define RUSB2_INTSTS1_OVRCR_Msk (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_BCHG_Pos (14UL) /* BCHG (Bit 14) */ +#define RUSB2_INTSTS1_BCHG_Msk (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_DTCH_Pos (12UL) /* DTCH (Bit 12) */ +#define RUSB2_INTSTS1_DTCH_Msk (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_ATTCH_Pos (11UL) /* ATTCH (Bit 11) */ +#define RUSB2_INTSTS1_ATTCH_Msk (0x800UL) /* ATTCH (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_L1RSMEND_Pos (9UL) /* L1RSMEND (Bit 9) */ +#define RUSB2_INTSTS1_L1RSMEND_Msk (0x200UL) /* L1RSMEND (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_LPMEND_Pos (8UL) /* LPMEND (Bit 8) */ +#define RUSB2_INTSTS1_LPMEND_Msk (0x100UL) /* LPMEND (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_EOFERR_Pos (6UL) /* EOFERR (Bit 6) */ +#define RUSB2_INTSTS1_EOFERR_Msk (0x40UL) /* EOFERR (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_SIGN_Pos (5UL) /* SIGN (Bit 5) */ +#define RUSB2_INTSTS1_SIGN_Msk (0x20UL) /* SIGN (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_SACK_Pos (4UL) /* SACK (Bit 4) */ +#define RUSB2_INTSTS1_SACK_Msk (0x10UL) /* SACK (Bitfield-Mask: 0x01) */ +#define RUSB2_INTSTS1_PDDETINT0_Pos (0UL) /* PDDETINT0 (Bit 0) */ +#define RUSB2_INTSTS1_PDDETINT0_Msk (0x1UL) /* PDDETINT0 (Bitfield-Mask: 0x01) */ // BRDYSTS -#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL) /* PIPEBRDY (Bit 0) */ -#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_BRDYSTS_PIPEBRDY_Pos (0UL) /* PIPEBRDY (Bit 0) */ +#define RUSB2_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */ // NRDYSTS -#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL) /* PIPENRDY (Bit 0) */ -#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */ +#define RUSB2_NRDYSTS_PIPENRDY_Pos (0UL) /* PIPENRDY (Bit 0) */ +#define RUSB2_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */ // BEMPSTS -#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL) /* PIPEBEMP (Bit 0) */ -#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */ +#define RUSB2_BEMPSTS_PIPEBEMP_Pos (0UL) /* PIPEBEMP (Bit 0) */ +#define RUSB2_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */ // FRMNUM -#define LINK_REG_FRMNUM_OVRN_Pos (15UL) /* OVRN (Bit 15) */ -#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */ -#define LINK_REG_FRMNUM_CRCE_Pos (14UL) /* CRCE (Bit 14) */ -#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_FRMNUM_FRNM_Pos (0UL) /* FRNM (Bit 0) */ -#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL) /* FRNM (Bitfield-Mask: 0x7ff) */ +#define RUSB2_FRMNUM_OVRN_Pos (15UL) /* OVRN (Bit 15) */ +#define RUSB2_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */ +#define RUSB2_FRMNUM_CRCE_Pos (14UL) /* CRCE (Bit 14) */ +#define RUSB2_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */ +#define RUSB2_FRMNUM_FRNM_Pos (0UL) /* FRNM (Bit 0) */ +#define RUSB2_FRMNUM_FRNM_Msk (0x7ffUL) /* FRNM (Bitfield-Mask: 0x7ff) */ // UFRMNUM -#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL) /* DVCHG (Bit 15) */ -#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */ -#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL) /* UFRNM (Bit 0) */ -#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL) /* UFRNM (Bitfield-Mask: 0x07) */ +#define RUSB2_UFRMNUM_DVCHG_Pos (15UL) /* DVCHG (Bit 15) */ +#define RUSB2_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */ +#define RUSB2_UFRMNUM_UFRNM_Pos (0UL) /* UFRNM (Bit 0) */ +#define RUSB2_UFRMNUM_UFRNM_Msk (0x7UL) /* UFRNM (Bitfield-Mask: 0x07) */ // USBADDR -#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL) /* STSRECOV0 (Bit 8) */ -#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */ -#define LINK_REG_USBADDR_USBADDR_Pos (0UL) /* USBADDR (Bit 0) */ -#define LINK_REG_USBADDR_USBADDR_Msk (0x7fUL) /* USBADDR (Bitfield-Mask: 0x7f) */ +#define RUSB2_USBADDR_STSRECOV0_Pos (8UL) /* STSRECOV0 (Bit 8) */ +#define RUSB2_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */ +#define RUSB2_USBADDR_USBADDR_Pos (0UL) /* USBADDR (Bit 0) */ +#define RUSB2_USBADDR_USBADDR_Msk (0x7fUL) /* USBADDR (Bitfield-Mask: 0x7f) */ // USBREQ -#define LINK_REG_USBREQ_BREQUEST_Pos (8UL) /* BREQUEST (Bit 8) */ -#define LINK_REG_USBREQ_BREQUEST_Msk (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */ -#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL) /* BMREQUESTTYPE (Bit 0) */ -#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL) /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */ +#define RUSB2_USBREQ_BREQUEST_Pos (8UL) /* BREQUEST (Bit 8) */ +#define RUSB2_USBREQ_BREQUEST_Msk (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */ +#define RUSB2_USBREQ_BMREQUESTTYPE_Pos (0UL) /* BMREQUESTTYPE (Bit 0) */ +#define RUSB2_USBREQ_BMREQUESTTYPE_Msk (0xffUL) /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */ // USBVAL -#define LINK_REG_USBVAL_WVALUE_Pos (0UL) /* WVALUE (Bit 0) */ -#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */ +#define RUSB2_USBVAL_WVALUE_Pos (0UL) /* WVALUE (Bit 0) */ +#define RUSB2_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */ // USBINDX -#define LINK_REG_USBINDX_WINDEX_Pos (0UL) /* WINDEX (Bit 0) */ -#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */ +#define RUSB2_USBINDX_WINDEX_Pos (0UL) /* WINDEX (Bit 0) */ +#define RUSB2_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */ // USBLENG -#define LINK_REG_USBLENG_WLENGTH_Pos (0UL) /* WLENGTH (Bit 0) */ -#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */ +#define RUSB2_USBLENG_WLENGTH_Pos (0UL) /* WLENGTH (Bit 0) */ +#define RUSB2_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */ // DCPCFG -#define LINK_REG_DCPCFG_CNTMD_Pos (8UL) /* CNTMD (Bit 8) */ -#define LINK_REG_DCPCFG_CNTMD_Msk (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ -#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCFG_DIR_Pos (4UL) /* DIR (Bit 4) */ -#define LINK_REG_DCPCFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCFG_CNTMD_Pos (8UL) /* CNTMD (Bit 8) */ +#define RUSB2_DCPCFG_CNTMD_Msk (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define RUSB2_DCPCFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define RUSB2_DCPCFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ // DCPMAXP -#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ -#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ -#define LINK_REG_DCPMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ -#define LINK_REG_DCPMAXP_MXPS_Msk (0x7fUL) /* MXPS (Bitfield-Mask: 0x7f) */ +#define RUSB2_DCPMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define RUSB2_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define RUSB2_DCPMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define RUSB2_DCPMAXP_MXPS_Msk (0x7fUL) /* MXPS (Bitfield-Mask: 0x7f) */ // DCPCTR -#define LINK_REG_DCPCTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ -#define LINK_REG_DCPCTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SUREQ_Pos (14UL) /* SUREQ (Bit 14) */ -#define LINK_REG_DCPCTR_SUREQ_Msk (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL) /* SUREQCLR (Bit 11) */ -#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL) /* SUREQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ -#define LINK_REG_DCPCTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ -#define LINK_REG_DCPCTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ -#define LINK_REG_DCPCTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ -#define LINK_REG_DCPCTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_CCPL_Pos (2UL) /* CCPL (Bit 2) */ -#define LINK_REG_DCPCTR_CCPL_Msk (0x4UL) /* CCPL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DCPCTR_PID_Pos (0UL) /* PID (Bit 0) */ -#define LINK_REG_DCPCTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ +#define RUSB2_DCPCTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define RUSB2_DCPCTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_SUREQ_Pos (14UL) /* SUREQ (Bit 14) */ +#define RUSB2_DCPCTR_SUREQ_Msk (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_SUREQCLR_Pos (11UL) /* SUREQCLR (Bit 11) */ +#define RUSB2_DCPCTR_SUREQCLR_Msk (0x800UL) /* SUREQCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define RUSB2_DCPCTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define RUSB2_DCPCTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define RUSB2_DCPCTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define RUSB2_DCPCTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_CCPL_Pos (2UL) /* CCPL (Bit 2) */ +#define RUSB2_DCPCTR_CCPL_Msk (0x4UL) /* CCPL (Bitfield-Mask: 0x01) */ +#define RUSB2_DCPCTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define RUSB2_DCPCTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ // PIPESEL -#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL) /* PIPESEL (Bit 0) */ -#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */ +#define RUSB2_PIPESEL_PIPESEL_Pos (0UL) /* PIPESEL (Bit 0) */ +#define RUSB2_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */ // PIPECFG -#define LINK_REG_PIPECFG_TYPE_Pos (14UL) /* TYPE (Bit 14) */ -#define LINK_REG_PIPECFG_TYPE_Msk (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */ -#define LINK_REG_PIPECFG_BFRE_Pos (10UL) /* BFRE (Bit 10) */ -#define LINK_REG_PIPECFG_BFRE_Msk (0x400UL) /* BFRE (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_DBLB_Pos (9UL) /* DBLB (Bit 9) */ -#define LINK_REG_PIPECFG_DBLB_Msk (0x200UL) /* DBLB (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ -#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_DIR_Pos (4UL) /* DIR (Bit 4) */ -#define LINK_REG_PIPECFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPECFG_EPNUM_Pos (0UL) /* EPNUM (Bit 0) */ -#define LINK_REG_PIPECFG_EPNUM_Msk (0xfUL) /* EPNUM (Bitfield-Mask: 0x0f) */ +#define RUSB2_PIPECFG_TYPE_Pos (14UL) /* TYPE (Bit 14) */ +#define RUSB2_PIPECFG_TYPE_Msk (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */ +#define RUSB2_PIPECFG_BFRE_Pos (10UL) /* BFRE (Bit 10) */ +#define RUSB2_PIPECFG_BFRE_Msk (0x400UL) /* BFRE (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPECFG_DBLB_Pos (9UL) /* DBLB (Bit 9) */ +#define RUSB2_PIPECFG_DBLB_Msk (0x200UL) /* DBLB (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPECFG_SHTNAK_Pos (7UL) /* SHTNAK (Bit 7) */ +#define RUSB2_PIPECFG_SHTNAK_Msk (0x80UL) /* SHTNAK (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPECFG_DIR_Pos (4UL) /* DIR (Bit 4) */ +#define RUSB2_PIPECFG_DIR_Msk (0x10UL) /* DIR (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPECFG_EPNUM_Pos (0UL) /* EPNUM (Bit 0) */ +#define RUSB2_PIPECFG_EPNUM_Msk (0xfUL) /* EPNUM (Bitfield-Mask: 0x0f) */ // PIPEMAXP -#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ -#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PIPEMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ -#define LINK_REG_PIPEMAXP_MXPS_Msk (0x1ffUL) /* MXPS (Bitfield-Mask: 0x1ff) */ +#define RUSB2_PIPEMAXP_DEVSEL_Pos (12UL) /* DEVSEL (Bit 12) */ +#define RUSB2_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */ +#define RUSB2_PIPEMAXP_MXPS_Pos (0UL) /* MXPS (Bit 0) */ +#define RUSB2_PIPEMAXP_MXPS_Msk (0x1ffUL) /* MXPS (Bitfield-Mask: 0x1ff) */ // PIPEPERI -#define LINK_REG_PIPEPERI_IFIS_Pos (12UL) /* IFIS (Bit 12) */ -#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPEPERI_IITV_Pos (0UL) /* IITV (Bit 0) */ -#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL) /* IITV (Bitfield-Mask: 0x07) */ +#define RUSB2_PIPEPERI_IFIS_Pos (12UL) /* IFIS (Bit 12) */ +#define RUSB2_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPEPERI_IITV_Pos (0UL) /* IITV (Bit 0) */ +#define RUSB2_PIPEPERI_IITV_Msk (0x7UL) /* IITV (Bitfield-Mask: 0x07) */ // PIPE_CTR -#define LINK_REG_PIPE_CTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ -#define LINK_REG_PIPE_CTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL) /* INBUFM (Bit 14) */ -#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_CSCLR_Pos (13UL) /* CSCLR (Bit 13) */ -#define LINK_REG_PIPE_CTR_CSCLR_Msk (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_CSSTS_Pos (12UL) /* CSSTS (Bit 12) */ -#define LINK_REG_PIPE_CTR_CSSTS_Msk (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL) /* ATREPM (Bit 10) */ -#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL) /* ATREPM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_ACLRM_Pos (9UL) /* ACLRM (Bit 9) */ -#define LINK_REG_PIPE_CTR_ACLRM_Msk (0x200UL) /* ACLRM (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ -#define LINK_REG_PIPE_CTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ -#define LINK_REG_PIPE_CTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ -#define LINK_REG_PIPE_CTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ -#define LINK_REG_PIPE_CTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ -#define LINK_REG_PIPE_CTR_PID_Pos (0UL) /* PID (Bit 0) */ -#define LINK_REG_PIPE_CTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ +#define RUSB2_PIPE_CTR_BSTS_Pos (15UL) /* BSTS (Bit 15) */ +#define RUSB2_PIPE_CTR_BSTS_Msk (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_INBUFM_Pos (14UL) /* INBUFM (Bit 14) */ +#define RUSB2_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_CSCLR_Pos (13UL) /* CSCLR (Bit 13) */ +#define RUSB2_PIPE_CTR_CSCLR_Msk (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_CSSTS_Pos (12UL) /* CSSTS (Bit 12) */ +#define RUSB2_PIPE_CTR_CSSTS_Msk (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_ATREPM_Pos (10UL) /* ATREPM (Bit 10) */ +#define RUSB2_PIPE_CTR_ATREPM_Msk (0x400UL) /* ATREPM (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_ACLRM_Pos (9UL) /* ACLRM (Bit 9) */ +#define RUSB2_PIPE_CTR_ACLRM_Msk (0x200UL) /* ACLRM (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_SQCLR_Pos (8UL) /* SQCLR (Bit 8) */ +#define RUSB2_PIPE_CTR_SQCLR_Msk (0x100UL) /* SQCLR (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_SQSET_Pos (7UL) /* SQSET (Bit 7) */ +#define RUSB2_PIPE_CTR_SQSET_Msk (0x80UL) /* SQSET (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_SQMON_Pos (6UL) /* SQMON (Bit 6) */ +#define RUSB2_PIPE_CTR_SQMON_Msk (0x40UL) /* SQMON (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_PBUSY_Pos (5UL) /* PBUSY (Bit 5) */ +#define RUSB2_PIPE_CTR_PBUSY_Msk (0x20UL) /* PBUSY (Bitfield-Mask: 0x01) */ +#define RUSB2_PIPE_CTR_PID_Pos (0UL) /* PID (Bit 0) */ +#define RUSB2_PIPE_CTR_PID_Msk (0x3UL) /* PID (Bitfield-Mask: 0x03) */ // DEVADD -#define LINK_REG_DEVADD_UPPHUB_Pos (11UL) /* UPPHUB (Bit 11) */ -#define LINK_REG_DEVADD_UPPHUB_Msk (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */ -#define LINK_REG_DEVADD_HUBPORT_Pos (8UL) /* HUBPORT (Bit 8) */ -#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL) /* HUBPORT (Bitfield-Mask: 0x07) */ -#define LINK_REG_DEVADD_USBSPD_Pos (6UL) /* USBSPD (Bit 6) */ -#define LINK_REG_DEVADD_USBSPD_Msk (0xc0UL) /* USBSPD (Bitfield-Mask: 0x03) */ +#define RUSB2_DEVADD_UPPHUB_Pos (11UL) /* UPPHUB (Bit 11) */ +#define RUSB2_DEVADD_UPPHUB_Msk (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */ +#define RUSB2_DEVADD_HUBPORT_Pos (8UL) /* HUBPORT (Bit 8) */ +#define RUSB2_DEVADD_HUBPORT_Msk (0x700UL) /* HUBPORT (Bitfield-Mask: 0x07) */ +#define RUSB2_DEVADD_USBSPD_Pos (6UL) /* USBSPD (Bit 6) */ +#define RUSB2_DEVADD_USBSPD_Msk (0xc0UL) /* USBSPD (Bitfield-Mask: 0x03) */ // USBBCCTRL0 -#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos (9UL) /* PDDETSTS0 (Bit 9) */ -#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL) /* CHGDETSTS0 (Bit 8) */ -#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos (7UL) /* BATCHGE0 (Bit 7) */ -#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk (0x80UL) /* BATCHGE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos (5UL) /* VDMSRCE0 (Bit 5) */ -#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk (0x20UL) /* VDMSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos (4UL) /* IDPSINKE0 (Bit 4) */ -#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk (0x10UL) /* IDPSINKE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos (3UL) /* VDPSRCE0 (Bit 3) */ -#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk (0x8UL) /* VDPSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos (2UL) /* IDMSINKE0 (Bit 2) */ -#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk (0x4UL) /* IDMSINKE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos (1UL) /* IDPSRCE0 (Bit 1) */ -#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk (0x2UL) /* IDPSRCE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBBCCTRL0_RPDME0_Pos (0UL) /* RPDME0 (Bit 0) */ -#define LINK_REG_USBBCCTRL0_RPDME0_Msk (0x1UL) /* RPDME0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_PDDETSTS0_Pos (9UL) /* PDDETSTS0 (Bit 9) */ +#define RUSB2_USBBCCTRL0_PDDETSTS0_Msk (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_CHGDETSTS0_Pos (8UL) /* CHGDETSTS0 (Bit 8) */ +#define RUSB2_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_BATCHGE0_Pos (7UL) /* BATCHGE0 (Bit 7) */ +#define RUSB2_USBBCCTRL0_BATCHGE0_Msk (0x80UL) /* BATCHGE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_VDMSRCE0_Pos (5UL) /* VDMSRCE0 (Bit 5) */ +#define RUSB2_USBBCCTRL0_VDMSRCE0_Msk (0x20UL) /* VDMSRCE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_IDPSINKE0_Pos (4UL) /* IDPSINKE0 (Bit 4) */ +#define RUSB2_USBBCCTRL0_IDPSINKE0_Msk (0x10UL) /* IDPSINKE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_VDPSRCE0_Pos (3UL) /* VDPSRCE0 (Bit 3) */ +#define RUSB2_USBBCCTRL0_VDPSRCE0_Msk (0x8UL) /* VDPSRCE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_IDMSINKE0_Pos (2UL) /* IDMSINKE0 (Bit 2) */ +#define RUSB2_USBBCCTRL0_IDMSINKE0_Msk (0x4UL) /* IDMSINKE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_IDPSRCE0_Pos (1UL) /* IDPSRCE0 (Bit 1) */ +#define RUSB2_USBBCCTRL0_IDPSRCE0_Msk (0x2UL) /* IDPSRCE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_USBBCCTRL0_RPDME0_Pos (0UL) /* RPDME0 (Bit 0) */ +#define RUSB2_USBBCCTRL0_RPDME0_Msk (0x1UL) /* RPDME0 (Bitfield-Mask: 0x01) */ // UCKSEL -#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL) /* UCKSELC (Bit 0) */ -#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */ +#define RUSB2_UCKSEL_UCKSELC_Pos (0UL) /* UCKSELC (Bit 0) */ +#define RUSB2_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */ // USBMC -#define LINK_REG_USBMC_VDCEN_Pos (7UL) /* VDCEN (Bit 7) */ -#define LINK_REG_USBMC_VDCEN_Msk (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */ -#define LINK_REG_USBMC_VDDUSBE_Pos (0UL) /* VDDUSBE (Bit 0) */ -#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL) /* VDDUSBE (Bitfield-Mask: 0x01) */ +#define RUSB2_USBMC_VDCEN_Pos (7UL) /* VDCEN (Bit 7) */ +#define RUSB2_USBMC_VDCEN_Msk (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */ +#define RUSB2_USBMC_VDDUSBE_Pos (0UL) /* VDDUSBE (Bit 0) */ +#define RUSB2_USBMC_VDDUSBE_Msk (0x1UL) /* VDDUSBE (Bitfield-Mask: 0x01) */ // PHYSLEW -#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL) /* SLEWF01 (Bit 3) */ -#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL) /* SLEWF00 (Bit 2) */ -#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL) /* SLEWR01 (Bit 1) */ -#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */ -#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL) /* SLEWR00 (Bit 0) */ -#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSLEW_SLEWF01_Pos (3UL) /* SLEWF01 (Bit 3) */ +#define RUSB2_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSLEW_SLEWF00_Pos (2UL) /* SLEWF00 (Bit 2) */ +#define RUSB2_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSLEW_SLEWR01_Pos (1UL) /* SLEWR01 (Bit 1) */ +#define RUSB2_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */ +#define RUSB2_PHYSLEW_SLEWR00_Pos (0UL) /* SLEWR00 (Bit 0) */ +#define RUSB2_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */ // LPCTRL -#define LINK_REG_LPCTRL_HWUPM_Pos (7UL) /* HWUPM (Bit 7) */ -#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */ +#define RUSB2_LPCTRL_HWUPM_Pos (7UL) /* HWUPM (Bit 7) */ +#define RUSB2_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */ // LPSTS -#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL) /* SUSPENDM (Bit 14) */ -#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */ +#define RUSB2_LPSTS_SUSPENDM_Pos (14UL) /* SUSPENDM (Bit 14) */ +#define RUSB2_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */ // BCCTRL -#define LINK_REG_BCCTRL_PDDETSTS_Pos (9UL) /* PDDETSTS (Bit 9) */ -#define LINK_REG_BCCTRL_PDDETSTS_Msk (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL) /* CHGDETSTS (Bit 8) */ -#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_DCPMODE_Pos (5UL) /* DCPMODE (Bit 5) */ -#define LINK_REG_BCCTRL_DCPMODE_Msk (0x20UL) /* DCPMODE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_VDMSRCE_Pos (4UL) /* VDMSRCE (Bit 4) */ -#define LINK_REG_BCCTRL_VDMSRCE_Msk (0x10UL) /* VDMSRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDPSINKE_Pos (3UL) /* IDPSINKE (Bit 3) */ -#define LINK_REG_BCCTRL_IDPSINKE_Msk (0x8UL) /* IDPSINKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_VDPSRCE_Pos (2UL) /* VDPSRCE (Bit 2) */ -#define LINK_REG_BCCTRL_VDPSRCE_Msk (0x4UL) /* VDPSRCE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDMSINKE_Pos (1UL) /* IDMSINKE (Bit 1) */ -#define LINK_REG_BCCTRL_IDMSINKE_Msk (0x2UL) /* IDMSINKE (Bitfield-Mask: 0x01) */ -#define LINK_REG_BCCTRL_IDPSRCE_Pos (0UL) /* IDPSRCE (Bit 0) */ -#define LINK_REG_BCCTRL_IDPSRCE_Msk (0x1UL) /* IDPSRCE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_PDDETSTS_Pos (9UL) /* PDDETSTS (Bit 9) */ +#define RUSB2_BCCTRL_PDDETSTS_Msk (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_CHGDETSTS_Pos (8UL) /* CHGDETSTS (Bit 8) */ +#define RUSB2_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_DCPMODE_Pos (5UL) /* DCPMODE (Bit 5) */ +#define RUSB2_BCCTRL_DCPMODE_Msk (0x20UL) /* DCPMODE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_VDMSRCE_Pos (4UL) /* VDMSRCE (Bit 4) */ +#define RUSB2_BCCTRL_VDMSRCE_Msk (0x10UL) /* VDMSRCE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_IDPSINKE_Pos (3UL) /* IDPSINKE (Bit 3) */ +#define RUSB2_BCCTRL_IDPSINKE_Msk (0x8UL) /* IDPSINKE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_VDPSRCE_Pos (2UL) /* VDPSRCE (Bit 2) */ +#define RUSB2_BCCTRL_VDPSRCE_Msk (0x4UL) /* VDPSRCE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_IDMSINKE_Pos (1UL) /* IDMSINKE (Bit 1) */ +#define RUSB2_BCCTRL_IDMSINKE_Msk (0x2UL) /* IDMSINKE (Bitfield-Mask: 0x01) */ +#define RUSB2_BCCTRL_IDPSRCE_Pos (0UL) /* IDPSRCE (Bit 0) */ +#define RUSB2_BCCTRL_IDPSRCE_Msk (0x1UL) /* IDPSRCE (Bitfield-Mask: 0x01) */ // PL1CTRL1 -#define LINK_REG_PL1CTRL1_L1EXTMD_Pos (14UL) /* L1EXTMD (Bit 14) */ -#define LINK_REG_PL1CTRL1_L1EXTMD_Msk (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL1_HIRDTHR_Pos (8UL) /* HIRDTHR (Bit 8) */ -#define LINK_REG_PL1CTRL1_HIRDTHR_Msk (0xf00UL) /* HIRDTHR (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PL1CTRL1_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ -#define LINK_REG_PL1CTRL1_DVSQ_Msk (0xf0UL) /* DVSQ (Bitfield-Mask: 0x0f) */ -#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL) /* L1NEGOMD (Bit 3) */ -#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL) /* L1NEGOMD (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL) /* L1RESPMD (Bit 1) */ -#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL) /* L1RESPMD (Bitfield-Mask: 0x03) */ -#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL) /* L1RESPEN (Bit 0) */ -#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL) /* L1RESPEN (Bitfield-Mask: 0x01) */ +#define RUSB2_PL1CTRL1_L1EXTMD_Pos (14UL) /* L1EXTMD (Bit 14) */ +#define RUSB2_PL1CTRL1_L1EXTMD_Msk (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */ +#define RUSB2_PL1CTRL1_HIRDTHR_Pos (8UL) /* HIRDTHR (Bit 8) */ +#define RUSB2_PL1CTRL1_HIRDTHR_Msk (0xf00UL) /* HIRDTHR (Bitfield-Mask: 0x0f) */ +#define RUSB2_PL1CTRL1_DVSQ_Pos (4UL) /* DVSQ (Bit 4) */ +#define RUSB2_PL1CTRL1_DVSQ_Msk (0xf0UL) /* DVSQ (Bitfield-Mask: 0x0f) */ +#define RUSB2_PL1CTRL1_L1NEGOMD_Pos (3UL) /* L1NEGOMD (Bit 3) */ +#define RUSB2_PL1CTRL1_L1NEGOMD_Msk (0x8UL) /* L1NEGOMD (Bitfield-Mask: 0x01) */ +#define RUSB2_PL1CTRL1_L1RESPMD_Pos (1UL) /* L1RESPMD (Bit 1) */ +#define RUSB2_PL1CTRL1_L1RESPMD_Msk (0x6UL) /* L1RESPMD (Bitfield-Mask: 0x03) */ +#define RUSB2_PL1CTRL1_L1RESPEN_Pos (0UL) /* L1RESPEN (Bit 0) */ +#define RUSB2_PL1CTRL1_L1RESPEN_Msk (0x1UL) /* L1RESPEN (Bitfield-Mask: 0x01) */ // PL1CTRL2 -#define LINK_REG_PL1CTRL2_RWEMON_Pos (12UL) /* RWEMON (Bit 12) */ -#define LINK_REG_PL1CTRL2_RWEMON_Msk (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */ -#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL) /* HIRDMON (Bit 8) */ -#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL) /* HIRDMON (Bitfield-Mask: 0x0f) */ +#define RUSB2_PL1CTRL2_RWEMON_Pos (12UL) /* RWEMON (Bit 12) */ +#define RUSB2_PL1CTRL2_RWEMON_Msk (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */ +#define RUSB2_PL1CTRL2_HIRDMON_Pos (8UL) /* HIRDMON (Bit 8) */ +#define RUSB2_PL1CTRL2_HIRDMON_Msk (0xf00UL) /* HIRDMON (Bitfield-Mask: 0x0f) */ // HL1CTRL1 -#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL) /* L1STATUS (Bit 1) */ -#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */ -#define LINK_REG_HL1CTRL1_L1REQ_Pos (0UL) /* L1REQ (Bit 0) */ -#define LINK_REG_HL1CTRL1_L1REQ_Msk (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */ +#define RUSB2_HL1CTRL1_L1STATUS_Pos (1UL) /* L1STATUS (Bit 1) */ +#define RUSB2_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */ +#define RUSB2_HL1CTRL1_L1REQ_Pos (0UL) /* L1REQ (Bit 0) */ +#define RUSB2_HL1CTRL1_L1REQ_Msk (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */ // HL1CTRL2 -#define LINK_REG_HL1CTRL2_BESL_Pos (15UL) /* BESL (Bit 15) */ -#define LINK_REG_HL1CTRL2_BESL_Msk (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */ -#define LINK_REG_HL1CTRL2_L1RWE_Pos (12UL) /* L1RWE (Bit 12) */ -#define LINK_REG_HL1CTRL2_L1RWE_Msk (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */ -#define LINK_REG_HL1CTRL2_HIRD_Pos (8UL) /* HIRD (Bit 8) */ -#define LINK_REG_HL1CTRL2_HIRD_Msk (0xf00UL) /* HIRD (Bitfield-Mask: 0x0f) */ -#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL) /* L1ADDR (Bit 0) */ -#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL) /* L1ADDR (Bitfield-Mask: 0x0f) */ +#define RUSB2_HL1CTRL2_BESL_Pos (15UL) /* BESL (Bit 15) */ +#define RUSB2_HL1CTRL2_BESL_Msk (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */ +#define RUSB2_HL1CTRL2_L1RWE_Pos (12UL) /* L1RWE (Bit 12) */ +#define RUSB2_HL1CTRL2_L1RWE_Msk (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */ +#define RUSB2_HL1CTRL2_HIRD_Pos (8UL) /* HIRD (Bit 8) */ +#define RUSB2_HL1CTRL2_HIRD_Msk (0xf00UL) /* HIRD (Bitfield-Mask: 0x0f) */ +#define RUSB2_HL1CTRL2_L1ADDR_Pos (0UL) /* L1ADDR (Bit 0) */ +#define RUSB2_HL1CTRL2_L1ADDR_Msk (0xfUL) /* L1ADDR (Bitfield-Mask: 0x0f) */ // DPUSR0R -#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL) /* DVBSTSHM (Bit 23) */ -#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_DOVCBHM_Pos (21UL) /* DOVCBHM (Bit 21) */ -#define LINK_REG_DPUSR0R_DOVCBHM_Msk (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_DOVCAHM_Pos (20UL) /* DOVCAHM (Bit 20) */ -#define LINK_REG_DPUSR0R_DOVCAHM_Msk (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_DVBSTSHM_Pos (23UL) /* DVBSTSHM (Bit 23) */ +#define RUSB2_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_DOVCBHM_Pos (21UL) /* DOVCBHM (Bit 21) */ +#define RUSB2_DPUSR0R_DOVCBHM_Msk (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_DOVCAHM_Pos (20UL) /* DOVCAHM (Bit 20) */ +#define RUSB2_DPUSR0R_DOVCAHM_Msk (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */ // DPUSR1R -#define LINK_REG_DPUSR1R_DVBSTSH_Pos (23UL) /* DVBSTSH (Bit 23) */ -#define LINK_REG_DPUSR1R_DVBSTSH_Msk (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCBH_Pos (21UL) /* DOVCBH (Bit 21) */ -#define LINK_REG_DPUSR1R_DOVCBH_Msk (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCAH_Pos (20UL) /* DOVCAH (Bit 20) */ -#define LINK_REG_DPUSR1R_DOVCAH_Msk (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL) /* DVBSTSHE (Bit 7) */ -#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL) /* DVBSTSHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCBHE_Pos (5UL) /* DOVCBHE (Bit 5) */ -#define LINK_REG_DPUSR1R_DOVCBHE_Msk (0x20UL) /* DOVCBHE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_DOVCAHE_Pos (4UL) /* DOVCAHE (Bit 4) */ -#define LINK_REG_DPUSR1R_DOVCAHE_Msk (0x10UL) /* DOVCAHE (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DVBSTSH_Pos (23UL) /* DVBSTSH (Bit 23) */ +#define RUSB2_DPUSR1R_DVBSTSH_Msk (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DOVCBH_Pos (21UL) /* DOVCBH (Bit 21) */ +#define RUSB2_DPUSR1R_DOVCBH_Msk (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DOVCAH_Pos (20UL) /* DOVCAH (Bit 20) */ +#define RUSB2_DPUSR1R_DOVCAH_Msk (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DVBSTSHE_Pos (7UL) /* DVBSTSHE (Bit 7) */ +#define RUSB2_DPUSR1R_DVBSTSHE_Msk (0x80UL) /* DVBSTSHE (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DOVCBHE_Pos (5UL) /* DOVCBHE (Bit 5) */ +#define RUSB2_DPUSR1R_DOVCBHE_Msk (0x20UL) /* DOVCBHE (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_DOVCAHE_Pos (4UL) /* DOVCAHE (Bit 4) */ +#define RUSB2_DPUSR1R_DOVCAHE_Msk (0x10UL) /* DOVCAHE (Bitfield-Mask: 0x01) */ // DPUSR2R -#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL) /* DMINTE (Bit 9) */ -#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL) /* DPINTE (Bit 8) */ -#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DMVAL_Pos (5UL) /* DMVAL (Bit 5) */ -#define LINK_REG_DPUSR2R_DMVAL_Msk (0x20UL) /* DMVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPVAL_Pos (4UL) /* DPVAL (Bit 4) */ -#define LINK_REG_DPUSR2R_DPVAL_Msk (0x10UL) /* DPVAL (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DMINT_Pos (1UL) /* DMINT (Bit 1) */ -#define LINK_REG_DPUSR2R_DMINT_Msk (0x2UL) /* DMINT (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR2R_DPINT_Pos (0UL) /* DPINT (Bit 0) */ -#define LINK_REG_DPUSR2R_DPINT_Msk (0x1UL) /* DPINT (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DMINTE_Pos (9UL) /* DMINTE (Bit 9) */ +#define RUSB2_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DPINTE_Pos (8UL) /* DPINTE (Bit 8) */ +#define RUSB2_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DMVAL_Pos (5UL) /* DMVAL (Bit 5) */ +#define RUSB2_DPUSR2R_DMVAL_Msk (0x20UL) /* DMVAL (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DPVAL_Pos (4UL) /* DPVAL (Bit 4) */ +#define RUSB2_DPUSR2R_DPVAL_Msk (0x10UL) /* DPVAL (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DMINT_Pos (1UL) /* DMINT (Bit 1) */ +#define RUSB2_DPUSR2R_DMINT_Msk (0x2UL) /* DMINT (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR2R_DPINT_Pos (0UL) /* DPINT (Bit 0) */ +#define RUSB2_DPUSR2R_DPINT_Msk (0x1UL) /* DPINT (Bitfield-Mask: 0x01) */ // DPUSRCR -#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL) /* FIXPHYPD (Bit 1) */ -#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSRCR_FIXPHY_Pos (0UL) /* FIXPHY (Bit 0) */ -#define LINK_REG_DPUSRCR_FIXPHY_Msk (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSRCR_FIXPHYPD_Pos (1UL) /* FIXPHYPD (Bit 1) */ +#define RUSB2_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSRCR_FIXPHY_Pos (0UL) /* FIXPHY (Bit 0) */ +#define RUSB2_DPUSRCR_FIXPHY_Msk (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */ // DPUSR0R_FS -#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL) /* DVBSTS0 (Bit 23) */ -#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos (21UL) /* DOVCB0 (Bit 21) */ -#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos (20UL) /* DOVCA0 (Bit 20) */ -#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DM0_Pos (17UL) /* DM0 (Bit 17) */ -#define LINK_REG_DPUSR0R_FS_DM0_Msk (0x20000UL) /* DM0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DP0_Pos (16UL) /* DP0 (Bit 16) */ -#define LINK_REG_DPUSR0R_FS_DP0_Msk (0x10000UL) /* DP0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL) /* FIXPHY0 (Bit 4) */ -#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL) /* FIXPHY0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_DRPD0_Pos (3UL) /* DRPD0 (Bit 3) */ -#define LINK_REG_DPUSR0R_FS_DRPD0_Msk (0x8UL) /* DRPD0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_RPUE0_Pos (1UL) /* RPUE0 (Bit 1) */ -#define LINK_REG_DPUSR0R_FS_RPUE0_Msk (0x2UL) /* RPUE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR0R_FS_SRPC0_Pos (0UL) /* SRPC0 (Bit 0) */ -#define LINK_REG_DPUSR0R_FS_SRPC0_Msk (0x1UL) /* SRPC0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DVBSTS0_Pos (23UL) /* DVBSTS0 (Bit 23) */ +#define RUSB2_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DOVCB0_Pos (21UL) /* DOVCB0 (Bit 21) */ +#define RUSB2_DPUSR0R_FS_DOVCB0_Msk (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DOVCA0_Pos (20UL) /* DOVCA0 (Bit 20) */ +#define RUSB2_DPUSR0R_FS_DOVCA0_Msk (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DM0_Pos (17UL) /* DM0 (Bit 17) */ +#define RUSB2_DPUSR0R_FS_DM0_Msk (0x20000UL) /* DM0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DP0_Pos (16UL) /* DP0 (Bit 16) */ +#define RUSB2_DPUSR0R_FS_DP0_Msk (0x10000UL) /* DP0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_FIXPHY0_Pos (4UL) /* FIXPHY0 (Bit 4) */ +#define RUSB2_DPUSR0R_FS_FIXPHY0_Msk (0x10UL) /* FIXPHY0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_DRPD0_Pos (3UL) /* DRPD0 (Bit 3) */ +#define RUSB2_DPUSR0R_FS_DRPD0_Msk (0x8UL) /* DRPD0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_RPUE0_Pos (1UL) /* RPUE0 (Bit 1) */ +#define RUSB2_DPUSR0R_FS_RPUE0_Msk (0x2UL) /* RPUE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR0R_FS_SRPC0_Pos (0UL) /* SRPC0 (Bit 0) */ +#define RUSB2_DPUSR0R_FS_SRPC0_Msk (0x1UL) /* SRPC0 (Bitfield-Mask: 0x01) */ // DPUSR1R_FS -#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos (23UL) /* DVBINT0 (Bit 23) */ -#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos (21UL) /* DOVRCRB0 (Bit 21) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos (20UL) /* DOVRCRA0 (Bit 20) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DMINT0_Pos (17UL) /* DMINT0 (Bit 17) */ -#define LINK_REG_DPUSR1R_FS_DMINT0_Msk (0x20000UL) /* DMINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DPINT0_Pos (16UL) /* DPINT0 (Bit 16) */ -#define LINK_REG_DPUSR1R_FS_DPINT0_Msk (0x10000UL) /* DPINT0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos (7UL) /* DVBSE0 (Bit 7) */ -#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk (0x80UL) /* DVBSE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL) /* DOVRCRBE0 (Bit 5) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL) /* DOVRCRBE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL) /* DOVRCRAE0 (Bit 4) */ -#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL) /* DOVRCRAE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos (1UL) /* DMINTE0 (Bit 1) */ -#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk (0x2UL) /* DMINTE0 (Bitfield-Mask: 0x01) */ -#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ -#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DVBINT0_Pos (23UL) /* DVBINT0 (Bit 23) */ +#define RUSB2_DPUSR1R_FS_DVBINT0_Msk (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DOVRCRB0_Pos (21UL) /* DOVRCRB0 (Bit 21) */ +#define RUSB2_DPUSR1R_FS_DOVRCRB0_Msk (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DOVRCRA0_Pos (20UL) /* DOVRCRA0 (Bit 20) */ +#define RUSB2_DPUSR1R_FS_DOVRCRA0_Msk (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DMINT0_Pos (17UL) /* DMINT0 (Bit 17) */ +#define RUSB2_DPUSR1R_FS_DMINT0_Msk (0x20000UL) /* DMINT0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DPINT0_Pos (16UL) /* DPINT0 (Bit 16) */ +#define RUSB2_DPUSR1R_FS_DPINT0_Msk (0x10000UL) /* DPINT0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DVBSE0_Pos (7UL) /* DVBSE0 (Bit 7) */ +#define RUSB2_DPUSR1R_FS_DVBSE0_Msk (0x80UL) /* DVBSE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DOVRCRBE0_Pos (5UL) /* DOVRCRBE0 (Bit 5) */ +#define RUSB2_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL) /* DOVRCRBE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DOVRCRAE0_Pos (4UL) /* DOVRCRAE0 (Bit 4) */ +#define RUSB2_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL) /* DOVRCRAE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DMINTE0_Pos (1UL) /* DMINTE0 (Bit 1) */ +#define RUSB2_DPUSR1R_FS_DMINTE0_Msk (0x2UL) /* DMINTE0 (Bitfield-Mask: 0x01) */ +#define RUSB2_DPUSR1R_FS_DPINTE0_Pos (0UL) /* DPINTE0 (Bit 0) */ +#define RUSB2_DPUSR1R_FS_DPINTE0_Msk (0x1UL) /* DPINTE0 (Bitfield-Mask: 0x01) */ /*--------------------------------------------------------------------*/ /* Register Bit Utils */ /*--------------------------------------------------------------------*/ -#define LINK_REG_PIPE_CTR_PID_NAK (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */ -#define LINK_REG_PIPE_CTR_PID_BUF (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */ -#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */ +#define RUSB2_PIPE_CTR_PID_NAK (0U << RUSB2_PIPE_CTR_PID_Pos) /* NAK response */ +#define RUSB2_PIPE_CTR_PID_BUF (1U << RUSB2_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */ +#define RUSB2_PIPE_CTR_PID_STALL (2U << RUSB2_PIPE_CTR_PID_Pos) /* STALL response */ -#define LINK_REG_DVSTCTR0_RHST_LS (1U << LINK_REG_DVSTCTR0_RHST_Pos) /* Low-speed connection */ -#define LINK_REG_DVSTCTR0_RHST_FS (2U << LINK_REG_DVSTCTR0_RHST_Pos) /* Full-speed connection */ +#define RUSB2_DVSTCTR0_RHST_LS (1U << RUSB2_DVSTCTR0_RHST_Pos) /* Low-speed connection */ +#define RUSB2_DVSTCTR0_RHST_FS (2U << RUSB2_DVSTCTR0_RHST_Pos) /* Full-speed connection */ -#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */ -#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */ +#define RUSB2_DEVADD_USBSPD_LS (1U << RUSB2_DEVADD_USBSPD_Pos) /* Target Device Low-speed */ +#define RUSB2_DEVADD_USBSPD_FS (2U << RUSB2_DEVADD_USBSPD_Pos) /* Target Device Full-speed */ -#define LINK_REG_CFIFOSEL_ISEL_WRITE (1U << LINK_REG_CFIFOSEL_ISEL_Pos) /* FIFO write AKA TX*/ +#define RUSB2_CFIFOSEL_ISEL_WRITE (1U << RUSB2_CFIFOSEL_ISEL_Pos) /* FIFO write AKA TX*/ -#define LINK_REG_FIFOSEL_BIGEND (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */ -#define LINK_REG_FIFOSEL_MBW_8BIT (0U << LINK_REG_CFIFOSEL_MBW_Pos) /* 8-bit width */ -#define LINK_REG_FIFOSEL_MBW_16BIT (1U << LINK_REG_CFIFOSEL_MBW_Pos) /* 16-bit width */ +#define RUSB2_FIFOSEL_BIGEND (1U << RUSB2_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */ +#define RUSB2_FIFOSEL_MBW_8BIT (0U << RUSB2_CFIFOSEL_MBW_Pos) /* 8-bit width */ +#define RUSB2_FIFOSEL_MBW_16BIT (1U << RUSB2_CFIFOSEL_MBW_Pos) /* 16-bit width */ -#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos) +#define RUSB2_INTSTS0_CTSQ_CTRL_RDATA (1U << RUSB2_INTSTS0_CTSQ_Pos) -#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define RUSB2_INTSTS0_DVSQ_STATE_DEF (1U << RUSB2_INTSTS0_DVSQ_Pos) /* Default state */ +#define RUSB2_INTSTS0_DVSQ_STATE_ADDR (2U << RUSB2_INTSTS0_DVSQ_Pos) /* Address state */ +#define RUSB2_INTSTS0_DVSQ_STATE_SUSP0 (4U << RUSB2_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define RUSB2_INTSTS0_DVSQ_STATE_SUSP1 (5U << RUSB2_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define RUSB2_INTSTS0_DVSQ_STATE_SUSP2 (6U << RUSB2_INTSTS0_DVSQ_Pos) /* Suspend state */ +#define RUSB2_INTSTS0_DVSQ_STATE_SUSP3 (7U << RUSB2_INTSTS0_DVSQ_Pos) /* Suspend state */ -#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos) -#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos) -#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos) +#define RUSB2_PIPECFG_TYPE_BULK (1U << RUSB2_PIPECFG_TYPE_Pos) +#define RUSB2_PIPECFG_TYPE_INT (2U << RUSB2_PIPECFG_TYPE_Pos) +#define RUSB2_PIPECFG_TYPE_ISO (3U << RUSB2_PIPECFG_TYPE_Pos) //--------------------------------------------------------------------+ // Static Assert //--------------------------------------------------------------------+ -TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size"); +TU_VERIFY_STATIC(sizeof(RUSB2_PIPE_TR_t) == 4, "incorrect size"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG ) == 0x00000000, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT ) == 0x00000002, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0 ) == 0x00000004, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA ) == 0x00000006, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0 ) == 0x00000008, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE ) == 0x0000000C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO ) == 0x00000014, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO ) == 0x00000018, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO ) == 0x0000001C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL ) == 0x00000020, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR ) == 0x00000022, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL ) == 0x00000028, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR ) == 0x0000002A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL ) == 0x0000002C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR ) == 0x0000002E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0 ) == 0x00000030, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1 ) == 0x00000032, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB ) == 0x00000036, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB ) == 0x00000038, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB ) == 0x0000003A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG ) == 0x0000003C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET ) == 0x0000003E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0 ) == 0x00000040, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1 ) == 0x00000042, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS ) == 0x00000046, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS ) == 0x00000048, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS ) == 0x0000004A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM ) == 0x0000004C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM ) == 0x0000004E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR ) == 0x00000050, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ ) == 0x00000054, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL ) == 0x00000056, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX ) == 0x00000058, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG ) == 0x0000005A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG ) == 0x0000005C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP ) == 0x0000005E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR ) == 0x00000060, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL ) == 0x00000064, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG ) == 0x00000068, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP ) == 0x0000006C, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI ) == 0x0000006E, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR ) == 0x00000070, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR ) == 0x00000090, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL ) == 0x000000C4, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC ) == 0x000000CC, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD ) == 0x000000D0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW ) == 0x000000F0, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL ) == 0x00000100, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS ) == 0x00000102, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL ) == 0x00000140, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1 ) == 0x00000144, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2 ) == 0x00000146, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1 ) == 0x00000148, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2 ) == 0x0000014A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R ) == 0x00000160, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R ) == 0x00000164, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R ) == 0x00000168, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR ) == 0x0000016A, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset"); -TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSCFG ) == 0x00000000, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BUSWAIT ) == 0x00000002, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSSTS0 ) == 0x00000004, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PLLSTA ) == 0x00000006, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DVSTCTR0 ) == 0x00000008, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, TESTMODE ) == 0x0000000C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFO ) == 0x00000014, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFO ) == 0x00000018, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFO ) == 0x0000001C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOSEL ) == 0x00000020, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOCTR ) == 0x00000022, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOSEL ) == 0x00000028, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOCTR ) == 0x0000002A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOSEL ) == 0x0000002C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOCTR ) == 0x0000002E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB0 ) == 0x00000030, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB1 ) == 0x00000032, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYENB ) == 0x00000036, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYENB ) == 0x00000038, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPENB ) == 0x0000003A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SOFCFG ) == 0x0000003C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSET ) == 0x0000003E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS0 ) == 0x00000040, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS1 ) == 0x00000042, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYSTS ) == 0x00000046, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYSTS ) == 0x00000048, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPSTS ) == 0x0000004A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, FRMNUM ) == 0x0000004C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UFRMNUM ) == 0x0000004E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBADDR ) == 0x00000050, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBREQ ) == 0x00000054, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBVAL ) == 0x00000056, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBINDX ) == 0x00000058, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBLENG ) == 0x0000005A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCFG ) == 0x0000005C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPMAXP ) == 0x0000005E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCTR ) == 0x00000060, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPESEL ) == 0x00000064, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPECFG ) == 0x00000068, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEMAXP ) == 0x0000006C, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEPERI ) == 0x0000006E, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_CTR ) == 0x00000070, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_TR ) == 0x00000090, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UCKSEL ) == 0x000000C4, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBMC ) == 0x000000CC, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DEVADD ) == 0x000000D0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSLEW ) == 0x000000F0, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPCTRL ) == 0x00000100, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPSTS ) == 0x00000102, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BCCTRL ) == 0x00000140, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL1 ) == 0x00000144, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL2 ) == 0x00000146, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL1 ) == 0x00000148, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL2 ) == 0x0000014A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R ) == 0x00000160, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R ) == 0x00000164, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR2R ) == 0x00000168, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSRCR ) == 0x0000016A, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset"); +TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset"); #ifdef __cplusplus } From 2a10d5c20bf3dd504f51b010321fc6b72bf1bb35 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 11:39:53 +0700 Subject: [PATCH 056/142] rename ra board name --- hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/board.mk | 2 +- hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_cfg.h | 0 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_clock_cfg.h | 0 .../boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_mcu_family_cfg.h | 0 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/r_ioport_cfg.h | 0 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/vector_data.h | 0 hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.c => ra4m3_ek/ra4m3_ek.c} | 0 hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.ld => ra4m3_ek/ra4m3_ek.ld} | 0 8 files changed, 1 insertion(+), 1 deletion(-) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/board.mk (90%) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_cfg.h (100%) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_clock_cfg.h (100%) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_mcu_family_cfg.h (100%) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/r_ioport_cfg.h (100%) rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/vector_data.h (100%) rename hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.c => ra4m3_ek/ra4m3_ek.c} (100%) rename hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.ld => ra4m3_ek/ra4m3_ek.ld} (100%) mode change 100755 => 100644 diff --git a/hw/bsp/ra/boards/ek_ra4m3/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk similarity index 90% rename from hw/bsp/ra/boards/ek_ra4m3/board.mk rename to hw/bsp/ra/boards/ra4m3_ek/board.mk index 19f293e54..61a7c5c4a 100644 --- a/hw/bsp/ra/boards/ek_ra4m3/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -8,7 +8,7 @@ FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek # All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/ek_ra4m3.ld +LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld # For flash-jlink target JLINK_DEVICE = R7FA4M3AF diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c rename to hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld old mode 100755 new mode 100644 similarity index 100% rename from hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld rename to hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld From e0b1de923c5411417d7818fe0611b3041b2ff2d4 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 22:39:00 +0700 Subject: [PATCH 057/142] add ra4m1_ek board --- docs/reference/supported.rst | 13 +- hw/bsp/ra/boards/ra4m1_ek/board.mk | 17 + hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h | 35 + .../boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h | 21 + .../ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h | 5 + .../ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h | 11 + .../ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h | 78 ++ .../ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h | 7 + .../ra/boards/ra4m1_ek/fsp_cfg/vector_data.h | 5 + hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c | 232 ++++++ hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld | 738 ++++++++++++++++++ hw/bsp/ra/boards/ra4m3_ek/board.mk | 2 + hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c | 18 +- 13 files changed, 1172 insertions(+), 10 deletions(-) create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.mk create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h create mode 100644 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c create mode 100644 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index ae16d361d..b3f3f41d3 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -297,8 +297,17 @@ LPC55 - `LPCXpresso 55s69 EVK `__ - `MCU-Link `__ -Renesas RX ----------- +Renesas +------- + +RA +^^ + +- `Evaluation Kit for RA4M1 `__ +- `Evaluation Kit for RA4M3 `__ + +RX +^^ - `GR-CITRUS `__ - `Renesas RX65N Target Board `__ diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk new file mode 100644 index 000000000..6a661c0b8 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk @@ -0,0 +1,17 @@ +CFLAGS += \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DCFG_TUSB_MCU=OPT_MCU_RAXXX + +FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1 +FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld + +# For flash-jlink target +JLINK_DEVICE = R7FA4M1AB +JLINK_IF = SWD + +flash: flash-jlink diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h new file mode 100644 index 000000000..b38a79b40 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h @@ -0,0 +1,35 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CFG_H_ +#define BSP_CFG_H_ + +#include "board.h" +#include "bsp_clock_cfg.h" +#include "bsp_mcu_family_cfg.h" + +#undef RA_NOT_DEFINED +#define BSP_CFG_RTOS (0) +#if defined(_RA_BOOT_IMAGE) +#define BSP_CFG_BOOT_IMAGE (1) +#endif +#define BSP_CFG_MCU_VCC_MV (3300) +#define BSP_CFG_STACK_MAIN_BYTES (0x400) +#define BSP_CFG_HEAP_BYTES (0x1000) +#define BSP_CFG_PARAM_CHECKING_ENABLE (1) +#define BSP_CFG_ASSERT (0) +#define BSP_CFG_ERROR_LOG (0) + +#define BSP_CFG_PFS_PROTECT ((1)) + +#define BSP_CFG_C_RUNTIME_INIT ((1)) +#define BSP_CFG_EARLY_INIT ((0)) + +#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0)) + +#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) + +#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) +#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) +#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) +#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 + +#endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h new file mode 100644 index 000000000..930fa3547 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h @@ -0,0 +1,21 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CLOCK_CFG_H_ +#define BSP_CLOCK_CFG_H_ +#define BSP_CFG_CLOCKS_SECURE (0) +#define BSP_CFG_CLOCKS_OVERRIDE (0) +#define BSP_CFG_XTAL_HZ (12000000) /* XTAL 12000000Hz */ +#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */ +#define BSP_CFG_HOCO_FREQUENCY (0) /* HOCO 24MHz */ +#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL Div /2 */ +#define BSP_CFG_PLL_MUL (BSP_CLOCKS_PLL_MUL_8_0) /* PLL Mul x8 */ +#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */ +#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */ +#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKA Div /1 */ +#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKB Div /2 */ +#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKC Div /1 */ +#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKD Div /1 */ +#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* FCLK Div /2 */ +#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */ +#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */ +#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* UCLK Src: PLL */ +#endif /* BSP_CLOCK_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h new file mode 100644 index 000000000..444d32e56 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h @@ -0,0 +1,5 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_CFG_H_ +#define BSP_MCU_DEVICE_CFG_H_ +#define BSP_CFG_MCU_PART_SERIES (4) +#endif /* BSP_MCU_DEVICE_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h new file mode 100644 index 000000000..d810dabb2 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h @@ -0,0 +1,11 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_R7FA4M1AB3CFP +#define BSP_MCU_FEATURE_SET ('A') +#define BSP_ROM_SIZE_BYTES (262144) +#define BSP_RAM_SIZE_BYTES (32768) +#define BSP_DATA_FLASH_SIZE_BYTES (8192) +#define BSP_PACKAGE_LQFP +#define BSP_PACKAGE_PINS (100) +#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h new file mode 100644 index 000000000..3bde2db0d --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h @@ -0,0 +1,78 @@ +/* generated configuration header file through renesas e2 studio */ +#ifndef BSP_MCU_FAMILY_CFG_H_ +#define BSP_MCU_FAMILY_CFG_H_ + +#include "bsp_mcu_device_pn_cfg.h" +#include "bsp_mcu_device_cfg.h" +#include "bsp_mcu_info.h" +#include "bsp_clock_cfg.h" + +#define BSP_MCU_GROUP_RA4M1 (1) +#define BSP_LOCO_HZ (32768) +#define BSP_MOCO_HZ (8000000) +#define BSP_SUB_CLOCK_HZ (32768) +#if BSP_CFG_HOCO_FREQUENCY == 0 +#define BSP_HOCO_HZ (24000000) +#elif BSP_CFG_HOCO_FREQUENCY == 2 + #define BSP_HOCO_HZ (32000000) + #elif BSP_CFG_HOCO_FREQUENCY == 4 + #define BSP_HOCO_HZ (48000000) + #elif BSP_CFG_HOCO_FREQUENCY == 5 + #define BSP_HOCO_HZ (64000000) + #else + #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h" + #endif +#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) +#define BSP_VECTOR_TABLE_MAX_ENTRIES (48U) + +#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) +#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) +#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) +#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26) +#define OFS_SEQ5 (1 << 28) | (1 << 30) +#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5) +#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8)) +#define BSP_CFG_USE_LOW_VOLTAGE_MODE ((0)) +#define BSP_CFG_ROM_REG_MPU_PC0_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_PC0_START (0x00FFFFFC) +#define BSP_CFG_ROM_REG_MPU_PC0_END (0x00FFFFFF) +#define BSP_CFG_ROM_REG_MPU_PC1_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_PC1_START (0x00FFFFFC) +#define BSP_CFG_ROM_REG_MPU_PC1_END (0x00FFFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION0_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION0_START (0x00FFFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION0_END (0x00FFFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION1_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION1_START (0x200FFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION1_END (0x200FFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION2_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION2_START (0x407FFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION2_END (0x407FFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION3_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION3_START (0x400DFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION3_END (0x400DFFFF) +#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT +#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) +#endif +/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */ +#define BSP_PRV_IELS_ENUM(vector) (ELC_ ## vector) + +/* + ID Code + Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings. + WARNING: This will disable debug access to the part and cannot be reversed by a debug probe. + */ +#if defined(BSP_ID_CODE_PERMANENTLY_LOCKED) + #define BSP_CFG_ID_CODE_LONG_1 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_2 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_3 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_4 (0x00000000) + #else +/* ID CODE: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */ +#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) +#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) +#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) +#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF) +#endif + +#endif /* BSP_MCU_FAMILY_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h new file mode 100644 index 000000000..cb7c07932 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h @@ -0,0 +1,7 @@ +/* generated configuration header file - do not edit */ +#ifndef R_IOPORT_CFG_H_ +#define R_IOPORT_CFG_H_ + +#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) + +#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h new file mode 100644 index 000000000..37739c12a --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h @@ -0,0 +1,5 @@ +/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ +#define TU_IRQn 0 +#define USBFS_RESUME_IRQn 1 +#define USBFS_FIFO_0_IRQn 2 +#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c new file mode 100644 index 000000000..ea2204837 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c @@ -0,0 +1,232 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Rafael Silva + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include + +#include "bsp/board.h" +#include "bsp_api.h" +#include "r_ioport.h" +#include "r_ioport_api.h" +#include "renesas.h" + +/* Key code for writing PRCR register. */ +#define BSP_PRV_PRCR_KEY (0xA500U) +#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) +#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) + +#define SW1 (BSP_IO_PORT_01_PIN_05) +#define LED1 (BSP_IO_PORT_01_PIN_06) + +#define LED_STATE_ON 1 +#define BUTTON_STATE_ACTIVE 0 + +/* ISR prototypes */ +void usbfs_interrupt_handler(void); +void usbfs_resume_handler(void); +void usbfs_d0fifo_handler(void); +void usbfs_d1fifo_handler(void); + +BSP_DONT_REMOVE const + fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { + [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ + [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ + [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ +}; +const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { + [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ + [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ + [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ +}; + +const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { + { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) }, + { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) }, + + { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, + { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, + { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, + +}; + +const ioport_cfg_t g_bsp_pin_cfg = { + .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], +}; +ioport_instance_ctrl_t g_ioport_ctrl; +const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void usbfs_interrupt_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif + +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +void usbfs_resume_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif + +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +void usbfs_d0fifo_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif + +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +void usbfs_d1fifo_handler(void) +{ + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif + +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +void board_init(void) +{ + /* Configure pins. */ + R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); + + /* Enable USB_BASE */ + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; + R_MSTP->MSTPCRB &= ~(1U << 11U); + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + +#if CFG_TUSB_OS == OPT_OS_NONE + /* Init systick */ + SysTick_Config(SystemCoreClock / 1000); +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON); +} + +uint32_t board_button_read(void) +{ + bsp_io_level_t lvl; + R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); + return lvl == BUTTON_STATE_ACTIVE; +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +#endif + +int close(int fd) +{ + (void) fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void) fd; + (void) pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void) fd; + (void) pos; + (void) whence; + return 0; +} +int isatty(int fd) +{ + (void) fd; + return 1; +} diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld new file mode 100644 index 000000000..8ddaa0a97 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld @@ -0,0 +1,738 @@ +/* generated memory regions file - do not edit */ +RAM_START = 0x20000000; +RAM_LENGTH = 0x8000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x40000; +DATA_FLASH_START = 0x40100000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x00000000; +OPTION_SETTING_LENGTH = 0x0; +OPTION_SETTING_S_START = 0x80000000; +OPTION_SETTING_S_LENGTH = 0x0; +ID_CODE_START = 0x01010018; +ID_CODE_LENGTH = 0x20; +SDRAM_START = 0x80010000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x0; +OSPI_DEVICE_0_START = 0x80020000; +OSPI_DEVICE_0_LENGTH = 0x0; +OSPI_DEVICE_1_START = 0x80030000; +OSPI_DEVICE_1_LENGTH = 0x0; + +/* + Linker File for Renesas FSP +*/ + +/* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/ +/* + XIP_SECONDARY_SLOT_IMAGE = 1; +*/ + +QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH); +OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH); +OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH); + +/* If a flat (secure) project has DEFINED RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */ +__RESERVE_NS_RAM = !DEFINED(PROJECT_NONSECURE) && DEFINED(RAM_NS_BUFFER_LENGTH) && (OPTION_SETTING_S_LENGTH != 0); + +ITCM_START = DEFINED(ITCM_START)? ITCM_START : 0; +ITCM_LENGTH = DEFINED(ITCM_LENGTH)? ITCM_LENGTH : 0; +DTCM_START = DEFINED(DTCM_START)? DTCM_START : 0; +DTCM_LENGTH = DEFINED(DTCM_LENGTH)? DTCM_LENGTH : 0; +NS_OFFSET_START = DEFINED(NS_OFFSET_START) ? NS_OFFSET_START : 0; +NS_IMAGE_OFFSET = DEFINED(PROJECT_NONSECURE) ? NS_OFFSET_START : 0; +RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0; +RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0; +RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH; +RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH; + +OPTION_SETTING_START_NS = DEFINED(PROJECT_NONSECURE) ? OPTION_SETTING_START : OPTION_SETTING_START + 0x80; + +/* This definition is used to avoid moving the counter in OPTION_SETTING regions for projects that should not configure option settings. + * Bootloader images do not configure option settings because they are owned by the bootloader. + * FSP_BOOTABLE_IMAGE is only defined in bootloader images. */ +__bl_FSP_BOOTABLE_IMAGE = 1; +__bln_FSP_BOOTABLE_IMAGE = 1; +PROJECT_SECURE_OR_FLAT = (!DEFINED(PROJECT_NONSECURE) || DEFINED(PROJECT_SECURE)) && OPTION_SETTING_LENGTH && !DEFINED(FSP_BOOTABLE_IMAGE); +USE_OPTION_SETTING_NS = DEFINED(PROJECT_NONSECURE) && !DEFINED(FSP_BOOTABLE_IMAGE); + +__bl_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_IMAGE_NUMBER == 1 ? FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH : + FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_SCRATCH_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH; +__bl_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_S_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH; +__bl_FLASH_IMAGE_END = __bl_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH; +__bl_XIP_SECONDARY_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_BOOTLOADER_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH; +__bl_XIP_SECONDARY_FLASH_IMAGE_END = __bl_XIP_SECONDARY_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH; +__bl_FLASH_NS_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END : + __bl_FLASH_IMAGE_START - FLASH_BOOTLOADER_HEADER_LENGTH + FLASH_APPLICATION_S_LENGTH; +__bl_FLASH_NSC_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END : + __bl_FLASH_NS_START - FLASH_APPLICATION_NSC_LENGTH; +__bl_RAM_NS_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : + RAM_START + RAM_LENGTH - RAM_APPLICATION_NS_LENGTH; +__bl_RAM_NSC_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : + __bl_RAM_NS_START - RAM_APPLICATION_NSC_LENGTH; +__bl_FLASH_NS_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END : + __bl_FLASH_NS_START + FLASH_BOOTLOADER_HEADER_LENGTH_2; +__bln_FLASH_IMAGE_START = __bl_FLASH_NS_IMAGE_START; +__bln_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 : + FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END : + FLASH_APPLICATION_NS_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH_2; + +XIP_SECONDARY_SLOT_IMAGE = DEFINED(XIP_SECONDARY_SLOT_IMAGE) ? XIP_SECONDARY_SLOT_IMAGE : 0; +FLASH_ORIGIN = !DEFINED(FLASH_IMAGE_START) ? FLASH_START : + XIP_SECONDARY_SLOT_IMAGE == 1 ? XIP_SECONDARY_FLASH_IMAGE_START : + FLASH_IMAGE_START; +LIMITED_FLASH_LENGTH = DEFINED(FLASH_IMAGE_LENGTH) ? FLASH_IMAGE_LENGTH : + DEFINED(FLASH_BOOTLOADER_LENGTH) ? FLASH_BOOTLOADER_LENGTH : + FLASH_LENGTH; + +/* Define memory regions. */ +MEMORY +{ + ITCM (rx) : ORIGIN = ITCM_START + NS_IMAGE_OFFSET, LENGTH = ITCM_LENGTH + DTCM (rwx) : ORIGIN = DTCM_START + NS_IMAGE_OFFSET, LENGTH = DTCM_LENGTH + FLASH (rx) : ORIGIN = FLASH_ORIGIN + NS_IMAGE_OFFSET, LENGTH = LIMITED_FLASH_LENGTH + RAM (rwx) : ORIGIN = RAM_START + NS_IMAGE_OFFSET, LENGTH = RAM_LENGTH + DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START + NS_IMAGE_OFFSET, LENGTH = DATA_FLASH_LENGTH + QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH + OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH + OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH + OSPI_DEVICE_0_RAM (rwx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH + OSPI_DEVICE_1_RAM (rwx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH + SDRAM (rwx) : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH + OPTION_SETTING (r) : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET, LENGTH = OPTION_SETTING_LENGTH + OPTION_SETTING_OFS (r) : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET, LENGTH = 0x18 + OPTION_SETTING_SAS (r) : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET + 0x34, LENGTH = OPTION_SETTING_LENGTH - 0x34 + OPTION_SETTING_S (r) : ORIGIN = OPTION_SETTING_S_START + NS_IMAGE_OFFSET, LENGTH = OPTION_SETTING_S_LENGTH + ID_CODE (rx) : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be DEFINED in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + * __qspi_flash_start__ + * __qspi_flash_end__ + * __qspi_flash_code_size__ + * __qspi_region_max_size__ + * __qspi_region_start_address__ + * __qspi_region_end_address__ + * __ospi_device_0_start__ + * __ospi_device_0_end__ + * __ospi_device_0_code_size__ + * __ospi_device_0_region_max_size__ + * __ospi_device_0_region_start_address__ + * __ospi_device_0_region_end_address__ + * __ospi_device_1_start__ + * __ospi_device_1_end__ + * __ospi_device_1_code_size__ + * __ospi_device_1_region_max_size__ + * __ospi_device_1_region_start_address__ + * __ospi_device_1_region_end_address__ + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + /* Initialized ITCM data. */ + .itcm_data : + { + /* Start of ITCM Secure Trustzone region. */ + __tz_ITCM_S = ABSOLUTE(ITCM_START); + + /* All ITCM data start */ + __itcm_data_start__ = .; + + KEEP(*(.itcm_data*)) + + /* All ITCM data end */ + __itcm_data_end__ = .; + + /* + * Start of the ITCM Non-Secure Trustzone region. + * ITCM_NS_START can be used to set a fixed address for non-secure ITCM in secure projects or flat projects. + */ + __tz_ITCM_N = DEFINED(ITCM_NS_START) ? ABSOLUTE(ITCM_NS_START) : ALIGN(__itcm_data_end__, 8192); + } > ITCM + + .text : + { + __tz_FLASH_S = ABSOLUTE(FLASH_START); + __ROM_Start = .; + + /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much + * space because ROM registers are at address 0x400 and there is very little space + * in between. */ + KEEP(*(.fixed_vectors*)) + KEEP(*(.application_vectors*)) + __Vectors_End = .; + + /* ROM Registers start at address 0x00000400 for devices that do not have the OPTION_SETTING region. */ + . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x400; + KEEP(*(.rom_registers*)) + + /* Reserving 0x100 bytes of space for ROM registers. */ + . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x500; + + /* Allocate flash write-boundary-aligned + * space for sce9 wrapped public keys for mcuboot if the module is used. + */ + . = ALIGN(128); + KEEP(*(.mcuboot_sce9_key*)) + + *(.text*) + + KEEP(*(.version)) + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + __usb_dev_descriptor_start_fs = .; + KEEP(*(.usb_device_desc_fs*)) + __usb_cfg_descriptor_start_fs = .; + KEEP(*(.usb_config_desc_fs*)) + __usb_interface_descriptor_start_fs = .; + KEEP(*(.usb_interface_desc_fs*)) + __usb_descriptor_end_fs = .; + __usb_dev_descriptor_start_hs = .; + KEEP(*(.usb_device_desc_hs*)) + __usb_cfg_descriptor_start_hs = .; + KEEP(*(.usb_config_desc_hs*)) + __usb_interface_descriptor_start_hs = .; + KEEP(*(.usb_interface_desc_hs*)) + __usb_descriptor_end_hs = .; + + KEEP(*(.eh_frame*)) + + __ROM_End = .; + } > FLASH = 0xFF + + __Vectors_Size = __Vectors_End - __Vectors; + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ + /* + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) + __copy_table_end__ = .; + } > FLASH + */ + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ + /* + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) + __zero_table_end__ = .; + } > FLASH + */ + + __etext = .; + + __tz_RAM_S = ORIGIN(RAM); + + /* If DTC is used, put the DTC vector table at the start of SRAM. + This avoids memory holes due to 1K alignment required by it. */ + .fsp_dtc_vector_table (NOLOAD) : + { + . = ORIGIN(RAM); + *(.fsp_dtc_vector_table) + } > RAM + + /* Initialized data section. */ + .data : + { + __data_start__ = .; + . = ALIGN(4); + + __Code_In_RAM_Start = .; + + KEEP(*(.code_in_ram*)) + __Code_In_RAM_End = .; + + *(vtable) + /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */ + *(.data.*) + *(.data) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + + . = ALIGN(4); + + /* All data end */ + __data_end__ = .; + + } > RAM AT > FLASH + + /* Start address of the initial values for .dtcm_data. */ + __dtcm_data_init_start = __etext + __data_end__ - __data_start__; + + /* Initialized DTCM data. */ + .dtcm_data : + { + /* Start of DTCM Secure Trustzone region. */ + __tz_DTCM_S = ABSOLUTE(DTCM_START); + + /* Initialized DTCM data start */ + __dtcm_data_start__ = .; + + KEEP(*(.dtcm_data*)) + + /* Initialized DTCM data end */ + __dtcm_data_end__ = .; + } > DTCM AT > FLASH + + /* Uninitialized DTCM data. */ + .dtcm_noinit (NOLOAD): + { + /* Uninitialized DTCM data start */ + __dtcm_noinit_start = .; + + KEEP(*(.dtcm_noinit*)) + + /* Uninitialized DTCM data end */ + __dtcm_noinit_end = .; + + /* + * Start of the DTCM Non-Secure Trustzone region. + * DTCM_NS_START can be used to set a fixed address for non-secure ITCM in secure projects or flat projects. + */ + __tz_DTCM_N = DEFINED(DTCM_NS_START) ? ABSOLUTE(DTCM_NS_START) : ALIGN(__dtcm_noinit_end, 8192); + } > DTCM + + /* TrustZone Secure Gateway Stubs Section. */ + + /* Some arithmetic is needed to eliminate unnecessary FILL for secure projects. */ + /* 1. Get the address to the next block after the .data section in FLASH. */ + DATA_END = LOADADDR(.data) + SIZEOF(.data); + /* 2. Determine the secure gateway stubs address either by the provided linker variable or the next 1024-byte block after .data */ + SGSTUBS_LOC = (DEFINED(PROJECT_SECURE) && DEFINED(FLASH_NSC_START)) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(DATA_END, 1024); + /* 3. Manually specify the start location for .gnu.sgstubs */ + .gnu.sgstubs SGSTUBS_LOC : ALIGN(1024) + { + __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024); + _start_sg = .; + *(.gnu.sgstubs*) + . = ALIGN(32); + _end_sg = .; + } > FLASH + + __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : FLASH_LENGTH < 32768 ? FLASH_LENGTH : ALIGN(32768); + FLASH_NS_IMAGE_START = DEFINED(FLASH_NS_IMAGE_START) ? FLASH_NS_IMAGE_START : __tz_FLASH_N; + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH); + + /* QSPI_FLASH section to be downloaded via debugger */ + .qspi_flash : + { + __qspi_flash_start__ = .; + KEEP(*(.qspi_flash*)) + KEEP(*(.code_in_qspi*)) + __qspi_flash_end__ = .; + } > QSPI_FLASH + __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__; + + /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */ + __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__); + .qspi_non_retentive : AT (__qspi_flash_code_addr__) + { + __qspi_non_retentive_start__ = .; + KEEP(*(.qspi_non_retentive*)) + __qspi_non_retentive_end__ = .; + } > QSPI_FLASH + __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__; + + __qspi_region_max_size__ = 0x4000000; /* Must be the same as defined in MEMORY above */ + __qspi_region_start_address__ = __qspi_flash_start__; + __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_QSPI_FLASH_N = __qspi_non_retentive_end__; + + /* Support for OctaRAM */ + .OSPI_DEVICE_0_NO_LOAD (NOLOAD): + { + . = ALIGN(4); + __ospi_device_0_start__ = .; + *(.ospi_device_0_no_load*) + . = ALIGN(4); + __ospi_device_0_end__ = .; + } > OSPI_DEVICE_0_RAM + + .OSPI_DEVICE_1_NO_LOAD (NOLOAD): + { + . = ALIGN(4); + __ospi_device_1_start__ = .; + *(.ospi_device_1_no_load*) + . = ALIGN(4); + __ospi_device_1_end__ = .; + } > OSPI_DEVICE_1_RAM + + /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0); + + /* OSPI_DEVICE_0 section to be downloaded via debugger */ + .OSPI_DEVICE_0 : + { + __ospi_device_0_start__ = .; + KEEP(*(.ospi_device_0*)) + KEEP(*(.code_in_ospi_device_0*)) + __ospi_device_0_end__ = .; + } > OSPI_DEVICE_0 + __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__; + + /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ + __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__); + .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__) + { + __ospi_device_0_non_retentive_start__ = .; + KEEP(*(.ospi_device_0_non_retentive*)) + __ospi_device_0_non_retentive_end__ = .; + } > OSPI_DEVICE_0 + __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__; + + __ospi_device_0_region_max_size__ = 0x8000000; /* Must be the same as defined in MEMORY above */ + __ospi_device_0_region_start_address__ = __ospi_device_0_start__; + __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1); + + /* OSPI_DEVICE_1 section to be downloaded via debugger */ + .OSPI_DEVICE_1 : + { + __ospi_device_1_start__ = .; + KEEP(*(.ospi_device_1*)) + KEEP(*(.code_in_ospi_device_1*)) + __ospi_device_1_end__ = .; + } > OSPI_DEVICE_1 + __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__; + + /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ + __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__); + .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__) + { + __ospi_device_1_non_retentive_start__ = .; + KEEP(*(.ospi_device_1_non_retentive*)) + __ospi_device_1_non_retentive_end__ = .; + } > OSPI_DEVICE_1 + __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__; + + __ospi_device_1_region_max_size__ = 0x10000000; /* Must be the same as defined in MEMORY above */ + __ospi_device_1_region_start_address__ = __ospi_device_1_start__; + __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__; + + /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ + __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__; + + .noinit (NOLOAD): + { + . = ALIGN(4); + __noinit_start = .; + KEEP(*(.noinit*)) + . = ALIGN(8); + /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */ + KEEP(*(.heap.*)) + __noinit_end = .; + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (NOLOAD): + { + . = ALIGN(8); + __HeapBase = .; + /* Place the STD heap here. */ + KEEP(*(.heap)) + __HeapLimit = .; + } > RAM + + /* Stacks are stored in this section. */ + .stack_dummy (NOLOAD): + { + . = ALIGN(8); + __StackLimit = .; + /* Main stack */ + KEEP(*(.stack)) + __StackTop = .; + /* Thread stacks */ + KEEP(*(.stack*)) + __StackTopAll = .; + } > RAM + + PROVIDE(__stack = __StackTopAll); + + /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used + at run time for things such as ThreadX memory pool allocations. */ + __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4); + + /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects. + * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary. + * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ + __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START - RAM_NS_BUFFER_BLOCK_LENGTH) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024); + + /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects. + * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not + * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary. + * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ + __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START - RAM_NS_BUFFER_BLOCK_LENGTH) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192); + + /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects. + * The EDMAC is a non-secure bus master and can only access non-secure RAM. */ + .ns_buffer (NOLOAD): + { + /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */ + . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .; + + KEEP(*(.ns_buffer*)) + } > RAM + + /* Data flash. */ + .data_flash : + { + . = ORIGIN(DATA_FLASH); + __tz_DATA_FLASH_S = .; + __Data_Flash_Start = .; + KEEP(*(.data_flash*)) + __Data_Flash_End = .; + + __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024); + } > DATA_FLASH + + /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ + __tz_SDRAM_S = ORIGIN(SDRAM); + + /* SDRAM */ + .sdram (NOLOAD): + { + __SDRAM_Start = .; + KEEP(*(.sdram*)) + KEEP(*(.frame*)) + __SDRAM_End = .; + } > SDRAM + + /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ + __tz_SDRAM_N = __SDRAM_End; + + /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ + __tz_ID_CODE_S = ORIGIN(ID_CODE); + + .id_code : + { + __ID_Code_Start = .; + KEEP(*(.id_code*)) + __ID_Code_End = .; + } > ID_CODE + + /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ + __tz_ID_CODE_N = __ID_Code_End; + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING_OFS); + + .option_setting_ofs : + { + __OPTION_SETTING_OFS_Start = .; + KEEP(*(.option_setting_ofs0)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_OFS_Start + 0x04 : __OPTION_SETTING_OFS_Start; + KEEP(*(.option_setting_ofs2)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_OFS_Start + 0x10 : __OPTION_SETTING_OFS_Start; + KEEP(*(.option_setting_dualsel)) + __OPTION_SETTING_OFS_End = .; + } > OPTION_SETTING_OFS = 0xFF + + .option_setting_sas : + { + __OPTION_SETTING_SAS_Start = .; + KEEP(*(.option_setting_sas)) + __OPTION_SETTING_SAS_End = .; + } > OPTION_SETTING_SAS = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_N = ABSOLUTE(OPTION_SETTING_START_NS); + + .option_setting_ns : + { + __OPTION_SETTING_NS_Start = .; + KEEP(*(.option_setting_ofs1)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x04 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_ofs3)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_banksel)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps0)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps1)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps2)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x4C : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_bps3)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps0)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps1)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps2)) + . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x6C : __OPTION_SETTING_NS_Start; + KEEP(*(.option_setting_pbps3)) + __OPTION_SETTING_NS_End = .; + } > OPTION_SETTING = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S); + + .option_setting_s : + { + __OPTION_SETTING_S_Start = .; + KEEP(*(.option_setting_ofs1_sec)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x04 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_ofs3_sec)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_banksel_sec)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec0)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec1)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec2)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x4C : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sec3)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec0)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec1)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec2)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x6C : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_pbps_sec3)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_ofs1_sel)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x84 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_ofs3_sel)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_banksel_sel)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel0)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel1)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel2)) + . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xCC : __OPTION_SETTING_S_Start; + KEEP(*(.option_setting_bps_sel3)) + __OPTION_SETTING_S_End = .; + } > OPTION_SETTING_S = 0xFF + + /* Symbol required for RA Configuration tool. */ + __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End; +} diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk index 61a7c5c4a..d668db0ea 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -13,3 +13,5 @@ LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld # For flash-jlink target JLINK_DEVICE = R7FA4M3AF JLINK_IF = SWD + +flash: flash-jlink diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c index eab102de9..327ef71d5 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c +++ b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c @@ -91,11 +91,11 @@ void usbfs_interrupt_handler(void) IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +#if CFG_TUH_ENABLED tuh_int_handler(0); #endif -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE +#if CFG_TUD_ENABLED tud_int_handler(0); #endif } @@ -104,37 +104,39 @@ void usbfs_resume_handler(void) IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +#if CFG_TUH_ENABLED tuh_int_handler(0); #endif -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE +#if CFG_TUD_ENABLED tud_int_handler(0); #endif } + void usbfs_d0fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +#if CFG_TUH_ENABLED tuh_int_handler(0); #endif -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE +#if CFG_TUD_ENABLED tud_int_handler(0); #endif } + void usbfs_d1fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +#if CFG_TUH_ENABLED tuh_int_handler(0); #endif -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE +#if CFG_TUD_ENABLED tud_int_handler(0); #endif } From ffdffc7e06080cfaf94b5c318053576d48cb604e Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 23:11:11 +0700 Subject: [PATCH 058/142] rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC also fix trailing spaces --- examples/device/cdc_msc_freertos/Makefile | 8 ++++---- examples/device/hid_composite_freertos/Makefile | 10 +++++----- hw/bsp/ch32v307/family.mk | 10 +++++----- hw/bsp/d5035_01/board.mk | 2 +- hw/bsp/da14695_dk_usb/board.mk | 3 +-- hw/bsp/da1469x_dk_pro/board.mk | 3 +-- hw/bsp/ea4088qs/board.mk | 2 +- hw/bsp/ea4357/board.mk | 2 +- hw/bsp/fomu/family.mk | 4 ++-- hw/bsp/frdm_k32l2b/board.mk | 2 +- hw/bsp/frdm_kl25z/board.mk | 2 +- hw/bsp/gd32vf103/family.mk | 4 ++-- hw/bsp/imxrt/family.mk | 4 ++-- hw/bsp/kuiic/board.mk | 4 ++-- hw/bsp/lpc15/family.mk | 4 ++-- hw/bsp/lpc18/family.mk | 2 +- hw/bsp/lpc54/family.mk | 4 ++-- hw/bsp/lpc55/family.mk | 2 +- hw/bsp/lpcxpresso11u37/board.mk | 6 +++--- hw/bsp/lpcxpresso11u68/board.mk | 6 +++--- hw/bsp/lpcxpresso1347/board.mk | 4 ++-- hw/bsp/lpcxpresso1769/board.mk | 2 +- hw/bsp/lpcxpresso51u68/board.mk | 6 +++--- hw/bsp/mbed1768/board.mk | 5 ++--- hw/bsp/mm32/family.mk | 6 +++--- hw/bsp/msp432e4/family.mk | 2 +- hw/bsp/ngx4330/board.mk | 4 ++-- hw/bsp/nrf/family.mk | 2 +- hw/bsp/nutiny_nuc121s/board.mk | 2 +- hw/bsp/nutiny_nuc125s/board.mk | 2 +- hw/bsp/nutiny_nuc126v/board.mk | 2 +- hw/bsp/nutiny_sdk_nuc120/board.mk | 2 +- hw/bsp/nutiny_sdk_nuc505/board.mk | 6 +++--- hw/bsp/ra/family.mk | 2 +- hw/bsp/rx/boards/gr_citrus/board.mk | 2 +- hw/bsp/rx/boards/rx65n_target/board.mk | 2 +- hw/bsp/samd11/family.mk | 2 +- hw/bsp/samd21/family.mk | 2 +- hw/bsp/samd51/family.mk | 2 +- hw/bsp/same54xplainedpro/board.mk | 2 +- hw/bsp/same70_qmtech/board.mk | 2 +- hw/bsp/same70_xplained/board.mk | 4 ++-- hw/bsp/samg55xplained/board.mk | 4 ++-- hw/bsp/saml2x/family.mk | 2 +- hw/bsp/sltb009a/board.mk | 2 +- hw/bsp/stm32f0/family.mk | 2 +- hw/bsp/stm32f1/family.mk | 2 +- hw/bsp/stm32f207nucleo/board.mk | 2 +- hw/bsp/stm32f303disco/board.mk | 2 +- hw/bsp/stm32f4/family.mk | 2 +- hw/bsp/stm32f7/family.mk | 2 +- hw/bsp/stm32g4/family.mk | 4 ++-- hw/bsp/stm32h7/family.mk | 3 +-- hw/bsp/stm32l0/family.mk | 2 +- hw/bsp/stm32l0538disco/board.mk | 4 ++-- hw/bsp/stm32l4/family.mk | 2 +- hw/bsp/stm32u5/family.mk | 4 ++-- hw/bsp/stm32wb/family.mk | 2 +- hw/bsp/tm4c123/family.mk | 4 ++-- hw/bsp/xmc4000/family.mk | 2 +- 60 files changed, 96 insertions(+), 100 deletions(-) diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index ed3b3f0ce..73b4ce608 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -3,14 +3,14 @@ DEPS_SUBMODULES += lib/FreeRTOS-Kernel include ../../make.mk FREERTOS_SRC = lib/FreeRTOS-Kernel -FREERTOS_PORT_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC) +FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC) INC += \ src \ src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ - $(TOP)/$(FREERTOS_PORT) + $(TOP)/$(FREERTOS_PORTABLE_SRC) # Example source EXAMPLE_SOURCE = \ @@ -27,10 +27,10 @@ SRC_C += \ $(FREERTOS_SRC)/queue.c \ $(FREERTOS_SRC)/tasks.c \ $(FREERTOS_SRC)/timers.c \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c)) SRC_S += \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s)) # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index f4410b202..9d30fddf7 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -3,21 +3,21 @@ DEPS_SUBMODULES += lib/FreeRTOS-Kernel include ../../make.mk FREERTOS_SRC = lib/FreeRTOS-Kernel -FREERTOS_PORT_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC) +FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC) INC += \ src \ src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ - $(TOP)/$(FREERTOS_PORT) + $(TOP)/$(FREERTOS_PORTABLE_SRC) # Example source EXAMPLE_SOURCE = \ src/freertos_hook.c \ src/main.c \ src/usb_descriptors.c - + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) # FreeRTOS source, all files in port folder @@ -26,10 +26,10 @@ SRC_C += \ $(FREERTOS_SRC)/queue.c \ $(FREERTOS_SRC)/tasks.c \ $(FREERTOS_SRC)/timers.c \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c)) SRC_S += \ - $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s)) + $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s)) # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk index 15f6724a8..4b06cf429 100644 --- a/hw/bsp/ch32v307/family.mk +++ b/hw/bsp/ch32v307/family.mk @@ -34,23 +34,23 @@ SRC_C += \ $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \ $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \ $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_rcc.c \ - $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c - + $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c + SRC_S += \ - $(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S + $(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(CH32V307_SDK_SRC)/Peripheral/inc # For freeRTOS port source -FREERTOS_PORT = RISC-V +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V # wch-link is not supported yet in official openOCD yet. We need to either use # 1. download openocd as part of mounriver studio http://www.mounriver.com/download or # 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch # -# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable, +# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable, # therefore we need to compile it from source as follows: # git clone https://github.com/kprasadvnsi/riscv-openocd-wch # cd riscv-openocd-wch diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk index cefd8c935..fc196b339 100644 --- a/hw/bsp/d5035_01/board.mk +++ b/hw/bsp/d5035_01/board.mk @@ -52,7 +52,7 @@ INC += \ $(TOP)/hw/mcu/microchip/same51/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAME51J19 diff --git a/hw/bsp/da14695_dk_usb/board.mk b/hw/bsp/da14695_dk_usb/board.mk index 2ca7f8529..1f7bc1588 100644 --- a/hw/bsp/da14695_dk_usb/board.mk +++ b/hw/bsp/da14695_dk_usb/board.mk @@ -31,7 +31,7 @@ INC += \ $(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure # For flash-jlink target JLINK_DEVICE = DA14695 @@ -52,4 +52,3 @@ flash-dialog: $(BUILD)/$(PROJECT).bin @echo go >> $(BUILD)/$(BOARD).jlink @echo exit >> $(BUILD)/$(BOARD).jlink $(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink - diff --git a/hw/bsp/da1469x_dk_pro/board.mk b/hw/bsp/da1469x_dk_pro/board.mk index d9dd5cd65..f9bf480de 100644 --- a/hw/bsp/da1469x_dk_pro/board.mk +++ b/hw/bsp/da1469x_dk_pro/board.mk @@ -31,7 +31,7 @@ INC += \ $(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure # For flash-jlink target JLINK_DEVICE = DA14699 @@ -52,4 +52,3 @@ flash-dialog: $(BUILD)/$(PROJECT).bin @echo go >> $(BUILD)/$(BOARD).jlink @echo exit >> $(BUILD)/$(BOARD).jlink $(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink - diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk index 54195b20c..376840fb1 100644 --- a/hw/bsp/ea4088qs/board.mk +++ b/hw/bsp/ea4088qs/board.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4088 diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk index 4556e98f6..6fd229166 100644 --- a/hw/bsp/ea4357/board.mk +++ b/hw/bsp/ea4357/board.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_43xx # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4357_M4 diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk index 8f8f3d011..d0b819120 100644 --- a/hw/bsp/fomu/family.mk +++ b/hw/bsp/fomu/family.mk @@ -19,12 +19,12 @@ INC += \ $(TOP)/$(FAMILY_PATH)/include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V # flash using dfu-util $(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin @echo "Create $@" python $(TOP)/hw/bsp/$(BOARD)/dfu.py -b $^ -D 0x1209:0x5bf0 $@ - + flash: $(BUILD)/$(PROJECT).dfu dfu-util -D $^ diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk index f922fc433..feb0a25f4 100644 --- a/hw/bsp/frdm_k32l2b/board.mk +++ b/hw/bsp/frdm_k32l2b/board.mk @@ -39,7 +39,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk index 2ac089404..fd616f7ed 100644 --- a/hw/bsp/frdm_kl25z/board.mk +++ b/hw/bsp/frdm_kl25z/board.mk @@ -40,7 +40,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/gd32vf103/family.mk b/hw/bsp/gd32vf103/family.mk index c0c144f5c..1725559c4 100644 --- a/hw/bsp/gd32vf103/family.mk +++ b/hw/bsp/gd32vf103/family.mk @@ -44,7 +44,7 @@ SRC_C += \ $(LIBC_STUBS)/isatty.c \ $(LIBC_STUBS)/fstat.c \ $(LIBC_STUBS)/lseek.c \ - $(LIBC_STUBS)/read.c + $(LIBC_STUBS)/read.c SRC_S += \ $(STARTUP_ASM)/startup_gd32vf103.S \ @@ -57,7 +57,7 @@ INC += \ $(TOP)/$(GD32VF103_SDK_SOC)/Common/Include/Usb # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V # For flash-jlink target JLINK_IF = jtag diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index f2273cb56..6788de8df 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -30,7 +30,7 @@ MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT) # All source paths should be relative to the top level. LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld -# TODO for net_lwip_webserver example, but may not needed !! +# TODO for net_lwip_webserver example, but may not needed !! LDFLAGS += \ -Wl,--defsym,__stack_size__=0x800 \ @@ -59,7 +59,7 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 # UF2 generation, iMXRT need to strip to text only before conversion APPLICATION_ADDR = 0x6000C000 diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk index 94646dbde..cb3459586 100644 --- a/hw/bsp/kuiic/board.mk +++ b/hw/bsp/kuiic/board.mk @@ -35,12 +35,12 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/port \ $(TOP)/$(SDK_DIR)/drivers/lpuart \ $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers + $(TOP)/$(MCU_DIR)/drivers SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk index fee0e0106..0ad1220d6 100644 --- a/hw/bsp/lpc15/family.mk +++ b/hw/bsp/lpc15/family.mk @@ -12,7 +12,7 @@ CFLAGS += \ -D__USE_LPCOPEN \ -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_LPC15XX \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # mcu driver cause following warnings CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual @@ -36,4 +36,4 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk index 8ba05c9c9..fbe6ad834 100644 --- a/hw/bsp/lpc18/family.mk +++ b/hw/bsp/lpc18/family.mk @@ -34,4 +34,4 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_18xx # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk index 3af679bda..0ec59f9bf 100644 --- a/hw/bsp/lpc54/family.mk +++ b/hw/bsp/lpc54/family.mk @@ -11,7 +11,7 @@ CFLAGS += \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' ifeq ($(PORT), 1) $(info "PORT1 High Speed") @@ -51,4 +51,4 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk index 58fc18a5c..789f7727d 100644 --- a/hw/bsp/lpc55/family.mk +++ b/hw/bsp/lpc55/family.mk @@ -65,4 +65,4 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index a9e63ad67..61e5eda7e 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -12,7 +12,7 @@ CFLAGS += \ -DCFG_EXAMPLE_VIDEO_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # mcu driver cause following warnings CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls @@ -36,11 +36,11 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = LPC11U37/401 -# flash using pyocd +# flash using pyocd flash: $(BUILD)/$(PROJECT).hex pyocd flash -t lpc11u37 $< diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index 9647b8b8f..cd6ad3617 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -11,7 +11,7 @@ CFLAGS += \ -D__USE_LPCOPEN \ -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x @@ -32,11 +32,11 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = LPC11U68 -# flash using pyocd +# flash using pyocd flash: $(BUILD)/$(PROJECT).hex pyocd flash -t lpc11u68 $< diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index 79405c896..25d6fa7a3 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -12,7 +12,7 @@ CFLAGS += \ -DCFG_EXAMPLE_VIDEO_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # startup.c and lpc_types.h cause following errors CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls @@ -36,7 +36,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1347 diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk index ecafccc49..d459c8b7b 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -34,7 +34,7 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1769 diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 6e39bbcad..b1a126c51 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -9,7 +9,7 @@ CFLAGS += \ -DCPU_LPC51U68JBD64 \ -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter @@ -36,14 +36,14 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/common \ $(TOP)/$(SDK_DIR)/drivers/flexcomm \ $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ - $(TOP)/$(SDK_DIR)/drivers/lpc_gpio + $(TOP)/$(SDK_DIR)/drivers/lpc_gpio SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 JLINK_DEVICE = LPC51U68 PYOCD_TARGET = LPC51U68 diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk index a65d6eacb..6940bbb55 100644 --- a/hw/bsp/mbed1768/board.mk +++ b/hw/bsp/mbed1768/board.mk @@ -34,12 +34,11 @@ INC += \ $(TOP)/$(MCU_DIR)/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = LPC1768 -# flash using pyocd +# flash using pyocd flash: $(BUILD)/$(PROJECT).hex pyocd flash -t lpc1768 $< - diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk index c1147b4e9..81af0d166 100644 --- a/hw/bsp/mm32/family.mk +++ b/hw/bsp/mm32/family.mk @@ -11,7 +11,7 @@ CFLAGS += \ -mcpu=cortex-m3 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_MM32F327X + -DCFG_TUSB_MCU=OPT_MCU_MM32F327X # suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=cast-qual @@ -22,7 +22,7 @@ SRC_C += \ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_gpio.c \ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_rcc.c \ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_uart.c \ - + INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ @@ -30,7 +30,7 @@ INC += \ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # flash target using on-board flash: flash-jlink diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk index 7f823b1aa..2383bc604 100644 --- a/hw/bsp/msp432e4/family.mk +++ b/hw/bsp/msp432e4/family.mk @@ -34,7 +34,7 @@ INC += \ SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = MSP432E401Y diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk index 26f8ae760..99c1f194c 100644 --- a/hw/bsp/ngx4330/board.mk +++ b/hw/bsp/ngx4330/board.mk @@ -37,11 +37,11 @@ INC += \ $(TOP)/$(MCU_DIR)/inc/config_43xx # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = LPC4330 -JLINK_IF = swd +JLINK_IF = swd # flash using jlink flash: flash-jlink diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index c79d7e654..4102c8187 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -42,7 +42,7 @@ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S ASFLAGS += -D__HEAP_SIZE=0 # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = $(MCU_VARIANT)_xxaa diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk index 69092dfd5..aa8f00e70 100644 --- a/hw/bsp/nutiny_nuc121s/board.mk +++ b/hw/bsp/nutiny_nuc121s/board.mk @@ -35,7 +35,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC121SC2AE diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk index 0272564c4..bf7610a7b 100644 --- a/hw/bsp/nutiny_nuc125s/board.mk +++ b/hw/bsp/nutiny_nuc125s/board.mk @@ -31,7 +31,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC125SC2AE diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk index 3d9e239af..46f53420c 100644 --- a/hw/bsp/nutiny_nuc126v/board.mk +++ b/hw/bsp/nutiny_nuc126v/board.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC126VG4AE diff --git a/hw/bsp/nutiny_sdk_nuc120/board.mk b/hw/bsp/nutiny_sdk_nuc120/board.mk index b06d4873e..b1f9245a6 100644 --- a/hw/bsp/nutiny_sdk_nuc120/board.mk +++ b/hw/bsp/nutiny_sdk_nuc120/board.mk @@ -30,7 +30,7 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = NUC120LE3 diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk index 3118dc7f8..3e48d3998 100644 --- a/hw/bsp/nutiny_sdk_nuc505/board.mk +++ b/hw/bsp/nutiny_sdk_nuc505/board.mk @@ -42,14 +42,14 @@ INC += \ $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = NUC505YO13Y # Note -# To be able to program the SPI flash, it need to boot with ICP mode "1011". -# However, in ICP mode, opencod cannot establish connection to the mcu. +# To be able to program the SPI flash, it need to boot with ICP mode "1011". +# However, in ICP mode, opencod cannot establish connection to the mcu. # Therefore, there is no easy command line flash for NUC505 # It is probably better to just use Nuvoton NuMicro ICP programming on windows to program the board # - 1111 "SPI" (run from internal flash) diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index 3c681a7c3..d48272e61 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -52,4 +52,4 @@ INC += \ # For freeRTOS port source # hack to use the port provided by renesas -FREERTOS_PORT = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port +FREERTOS_PORTABLE_SRC = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk index 7bef40614..e3af8d9b0 100644 --- a/hw/bsp/rx/boards/gr_citrus/board.mk +++ b/hw/bsp/rx/boards/gr_citrus/board.mk @@ -9,7 +9,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx63n LD_FILE = $(BOARD_PATH)/r5f5631fd.ld # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600 # For flash-jlink target JLINK_DEVICE = R5F5631F diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk index 18c7d354d..90bc0efbb 100644 --- a/hw/bsp/rx/boards/rx65n_target/board.mk +++ b/hw/bsp/rx/boards/rx65n_target/board.mk @@ -12,7 +12,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx65n LD_FILE = $(BOARD_PATH)/r5f565ne.ld # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600 # For flash-jlink target JLINK_DEVICE = R5F565NE diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk index ef1f1424d..dc6678b30 100644 --- a/hw/bsp/samd11/family.mk +++ b/hw/bsp/samd11/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 158ea000f..6d02d7fa6 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -37,7 +37,7 @@ INC += \ $(TOP)/hw/mcu/microchip/samd21/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk index aa3af5318..3ecc5aa66 100644 --- a/hw/bsp/samd51/family.mk +++ b/hw/bsp/samd51/family.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/hw/mcu/microchip/samd51/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk index 7d7ede0f0..1c6732231 100644 --- a/hw/bsp/same54xplainedpro/board.mk +++ b/hw/bsp/same54xplainedpro/board.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/hw/mcu/microchip/same54/CMSIS/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAME54P20 diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk index 77dfbe499..1dcb8bfcd 100644 --- a/hw/bsp/same70_qmtech/board.mk +++ b/hw/bsp/same70_qmtech/board.mk @@ -44,7 +44,7 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7 # For flash-jlink target JLINK_DEVICE = SAME70N19B diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk index 2f94512d0..95c4aaaa2 100644 --- a/hw/bsp/same70_xplained/board.mk +++ b/hw/bsp/same70_xplained/board.mk @@ -44,7 +44,7 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7 # For flash-jlink target JLINK_DEVICE = SAME70Q21B @@ -53,4 +53,4 @@ JLINK_DEVICE = SAME70Q21B # Note: SAME70's GPNVM1 must be set to 1 to boot from flash with # edbg -t same70 -F w0,1,1 flash: $(BUILD)/$(PROJECT).bin - edbg --verbose -t same70 -pv -f $< + edbg --verbose -t same70 -pv -f $< diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk index 886430231..7cc9487fd 100644 --- a/hw/bsp/samg55xplained/board.mk +++ b/hw/bsp/samg55xplained/board.mk @@ -42,11 +42,11 @@ INC += \ $(TOP)/$(ASF_DIR)/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = ATSAMG55J19 # flash using edbg from https://github.com/ataradov/edbg flash: $(BUILD)/$(PROJECT).bin - edbg --verbose -t samg55 -pv -f $< + edbg --verbose -t samg55 -pv -f $< diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index 8ea553514..6022158de 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk index d4318b5e2..f9c1dd4db 100644 --- a/hw/bsp/sltb009a/board.mk +++ b/hw/bsp/sltb009a/board.mk @@ -35,7 +35,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = EFM32GG12B810F1024 diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk index d57b14d53..08e349a81 100644 --- a/hw/bsp/stm32f0/family.mk +++ b/hw/bsp/stm32f0/family.mk @@ -53,4 +53,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk index 72ca259b7..cd1d587f1 100644 --- a/hw/bsp/stm32f1/family.mk +++ b/hw/bsp/stm32f1/family.mk @@ -44,7 +44,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = stm32f103c8 diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f207nucleo/board.mk index f418c6c04..55581e1ec 100644 --- a/hw/bsp/stm32f207nucleo/board.mk +++ b/hw/bsp/stm32f207nucleo/board.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 # For flash-jlink target JLINK_DEVICE = stm32f207zg diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index 371aba0f3..b81de4ee4 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -40,7 +40,7 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # For flash-jlink target JLINK_DEVICE = stm32f303vc diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk index bc9504038..394c4a72f 100644 --- a/hw/bsp/stm32f4/family.mk +++ b/hw/bsp/stm32f4/family.mk @@ -52,7 +52,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 0dcaa0453..b44381586 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -66,4 +66,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk index f8f04384a..5ed84422d 100644 --- a/hw/bsp/stm32g4/family.mk +++ b/hw/bsp/stm32g4/family.mk @@ -12,7 +12,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk # -------------- CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32G4 - + # GCC Flags GCC_CFLAGS += \ -flto \ @@ -53,7 +53,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index 2641edba5..8042248a8 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -68,5 +68,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1 - +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk index 622fa61e0..67a5c69b8 100644 --- a/hw/bsp/stm32l0/family.mk +++ b/hw/bsp/stm32l0/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk index b25380c5c..72e887adf 100644 --- a/hw/bsp/stm32l0538disco/board.mk +++ b/hw/bsp/stm32l0538disco/board.mk @@ -41,12 +41,12 @@ INC += \ $(TOP)/hw/bsp/$(BOARD) # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 # For flash-jlink target JLINK_DEVICE = STM32L053R8 -# Path to STM32 Cube Programmer CLI, should be added into system path +# Path to STM32 Cube Programmer CLI, should be added into system path STM32Prog = STM32_Programmer_CLI # flash target using on-board stlink diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk index 3ba459dc2..0e84d1af0 100644 --- a/hw/bsp/stm32l4/family.mk +++ b/hw/bsp/stm32l4/family.mk @@ -55,7 +55,7 @@ INC += \ $(TOP)/$(BOARD_PATH) # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk index 1cfb81e43..23d7f4dda 100644 --- a/hw/bsp/stm32u5/family.mk +++ b/hw/bsp/stm32u5/family.mk @@ -16,7 +16,7 @@ CFLAGS += \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32U5 -# suppress warning caused by vendor mcu driver +# suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter #src/portable/st/synopsys/dcd_synopsys.c @@ -39,7 +39,7 @@ INC += \ $(TOP)/$(BOARD_PATH) # For freeRTOS port source -FREERTOS_PORT = ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC = ARM_CM33_NTZ/non_secure # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk index 66f8ff4e2..97210889c 100644 --- a/hw/bsp/stm32wb/family.mk +++ b/hw/bsp/stm32wb/family.mk @@ -38,7 +38,7 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk index 73b65f00c..021b47fd3 100644 --- a/hw/bsp/tm4c123/family.mk +++ b/hw/bsp/tm4c123/family.mk @@ -12,7 +12,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_TM4C123 \ -uvectors \ -DTM4C123GH6PM - + # mcu driver cause following warnings CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual @@ -33,4 +33,4 @@ SRC_C += \ $(MCU_DIR)/Source/GCC/tm4c123_startup.c # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk index 134098dac..1094f3b72 100644 --- a/hw/bsp/xmc4000/family.mk +++ b/hw/bsp/xmc4000/family.mk @@ -37,4 +37,4 @@ INC += \ $(TOP)/$(MCU_DIR)/XMCLib/inc # For freeRTOS port source -FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F From e7d212f33760f13b0102a307569aac0ed8e14bd2 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 16 Mar 2023 23:21:15 +0700 Subject: [PATCH 059/142] more fix --- hw/bsp/stm32u5/family.mk | 2 +- src/portable/renesas/rusb2/rusb2_ra.h | 6 +++--- src/portable/renesas/rusb2/rusb2_rx.h | 6 +++--- src/portable/renesas/rusb2/rusb2_type.h | 6 +++--- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk index 23d7f4dda..e1c496dee 100644 --- a/hw/bsp/stm32u5/family.mk +++ b/hw/bsp/stm32u5/family.mk @@ -39,7 +39,7 @@ INC += \ $(TOP)/$(BOARD_PATH) # For freeRTOS port source -FREERTOS_PORTABLE_SRC = ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure # flash target using on-board stlink flash: flash-stlink diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h index 24658e95a..5785850cc 100644 --- a/src/portable/renesas/rusb2/rusb2_ra.h +++ b/src/portable/renesas/rusb2/rusb2_ra.h @@ -24,8 +24,8 @@ * This file is part of the TinyUSB stack. */ -#ifndef _LINK_RA_H_ -#define _LINK_RA_H_ +#ifndef _RUSB2_RA_H_ +#define _RUSB2_RA_H_ #ifdef __cplusplus extern "C" { @@ -57,4 +57,4 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) } #endif -#endif /* _LINK_RA_H_ */ +#endif /* _RUSB2_RA_H_ */ diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h index c28689df1..397c0d56c 100644 --- a/src/portable/renesas/rusb2/rusb2_rx.h +++ b/src/portable/renesas/rusb2/rusb2_rx.h @@ -26,8 +26,8 @@ * This file is part of the TinyUSB stack. */ -#ifndef _LINK_RX_H_ -#define _LINK_RX_H_ +#ifndef _RUSB2_RX_H_ +#define _RUSB2_RX_H_ #ifdef __cplusplus extern "C" { @@ -71,4 +71,4 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) } #endif -#endif /* _LINK_RX_H_ */ +#endif /* _RUSB2_RX_H_ */ diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h index 6a5c7f8ff..7a2898366 100644 --- a/src/portable/renesas/rusb2/rusb2_type.h +++ b/src/portable/renesas/rusb2/rusb2_type.h @@ -24,8 +24,8 @@ * This file is part of the TinyUSB stack. */ -#ifndef _TUSB_LINK_TYPE_H_ -#define _TUSB_LINK_TYPE_H_ +#ifndef _TUSB_RUSB2_TYPE_H_ +#define _TUSB_RUSB2_TYPE_H_ #include @@ -1666,4 +1666,4 @@ TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect of } #endif -#endif /* _TUSB_LINK_TYPE_H_ */ +#endif /* _TUSB_RUSB2_TYPE_H_ */ From c12795734c3434db999d3198173335050a3b59a4 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 10:59:08 +0700 Subject: [PATCH 060/142] reduce number of supported RA to only those that is tested --- README.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.rst b/README.rst index a8d471a03..566af8584 100644 --- a/README.rst +++ b/README.rst @@ -51,7 +51,7 @@ The stack supports the following MCUs: - **Renesas:** - RX Series: 63N, 65N, 72N - - RA Series: RA2A1, RA2E1, RA2E2, RA2l1, RA4E1, RA4M1, RA4M2, RA4M3, RA4W1, RA6E1, RA6M1, RA6M2, RA6M3, RA6M4, RA6M5, RA6T1, RA6T2 + - RA Series: RA4M1, RA4M3 - **Silabs:** EFM32GG - **Sony:** CXD56 From f349ae77029c3a82bd9509c1ad57e3e6cd815596 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 13:58:01 +0700 Subject: [PATCH 061/142] fix enumerate one device at a time --- src/host/usbh.c | 35 +++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/src/host/usbh.c b/src/host/usbh.c index 12b0ed203..45a2a0c66 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -54,8 +54,6 @@ // USBH-HCD common data structure //--------------------------------------------------------------------+ -// device0 struct must be strictly a subset of normal device struct -// TODO refactor later typedef struct { // port @@ -63,15 +61,13 @@ typedef struct uint8_t hub_addr; uint8_t hub_port; uint8_t speed; + volatile uint8_t enumerating; - struct TU_ATTR_PACKED - { - volatile uint8_t connected : 1; - volatile uint8_t addressed : 1; - volatile uint8_t configured : 1; - volatile uint8_t suspended : 1; - }; - +// struct TU_ATTR_PACKED { +// uint8_t speed : 4; // packed speed to save footprint +// volatile uint8_t enumerating : 1; +// uint8_t TU_RESERVED : 3; +// }; } usbh_dev0_t; typedef struct { @@ -402,10 +398,18 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) switch (event.event_id) { case HCD_EVENT_DEVICE_ATTACH: - // TODO due to the shared _usbh_ctrl_buf, we must complete enumerating + // due to the shared _usbh_ctrl_buf, we must complete enumerating // one device before enumerating another one. - TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport); - enum_new_device(&event); + if ( _dev0.enumerating ) + { + TU_LOG1("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport); + osal_queue_send(_usbh_q, &event, in_isr); + }else + { + TU_LOG1("[%u:] USBH DEVICE ATTACH\r\n", event.rhport); + _dev0.enumerating = 1; + enum_new_device(&event); + } break; case HCD_EVENT_DEVICE_REMOVE: @@ -1623,6 +1627,9 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) static void enum_full_complete(void) { + // mark enumeration as complete + _dev0.enumerating = 0; + #if CFG_TUH_HUB // get next hub status if (_dev0.hub_addr) hub_edpt_status_xfer(_dev0.hub_addr); From 317177c83d3c28d66bfe60be971ff37a44bd84df Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 14:06:25 +0700 Subject: [PATCH 062/142] update host example, add pio-pico-usb for rp2040 --- examples/host/bare_api/CMakeLists.txt | 5 +++++ examples/host/bare_api/src/tusb_config.h | 4 ++-- examples/host/cdc_msc_hid/CMakeLists.txt | 5 +++++ examples/host/cdc_msc_hid/src/tusb_config.h | 6 +++--- examples/host/hid_controller/CMakeLists.txt | 5 +++++ examples/host/hid_controller/src/tusb_config.h | 7 +++---- examples/host/msc_file_explorer/CMakeLists.txt | 4 ++++ examples/host/msc_file_explorer/src/tusb_config.h | 6 +++--- hw/bsp/rp2040/family.mk | 3 --- src/class/cdc/cdc_host.c | 8 ++++---- src/common/tusb_common.h | 6 ++++++ src/common/tusb_types.h | 5 ----- 12 files changed, 40 insertions(+), 24 deletions(-) diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index 4879613b4..616edd4ac 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -25,3 +25,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h index 701aa6d90..64be41a4e 100644 --- a/examples/host/bare_api/src/tusb_config.h +++ b/examples/host/bare_api/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -100,7 +100,7 @@ // max device support (excluding hub device) // 1 hub typically has 4 ports -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) // Max endpoint per device #define CFG_TUH_ENDPOINT_MAX 8 diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index dbba6bf44..d7d1a54d7 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -28,3 +28,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 139a921d1..4b50f2096 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,8 +101,8 @@ #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- HID -------------// #define CFG_TUH_HID_EPIN_BUFSIZE 64 diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index aa50b5a52..ac3070b82 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -26,3 +26,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h index e6d6f873d..2e0dd0dbe 100644 --- a/examples/host/hid_controller/src/tusb_config.h +++ b/examples/host/hid_controller/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,9 +101,8 @@ #define CFG_TUH_MSC 0 #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -// 1 hub typically has 4 ports -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- HID -------------// diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt index 2c06eafee..7955b3078 100644 --- a/examples/host/msc_file_explorer/CMakeLists.txt +++ b/examples/host/msc_file_explorer/CMakeLists.txt @@ -32,3 +32,7 @@ target_include_directories(${PROJECT} PUBLIC # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h index ddf8368f4..eaf3ea6d4 100644 --- a/examples/host/msc_file_explorer/src/tusb_config.h +++ b/examples/host/msc_file_explorer/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,8 +101,8 @@ #define CFG_TUH_HID 0 // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- MSC -------------// #define CFG_TUH_MSC_MAXLUN 4 // typical for most card reader diff --git a/hw/bsp/rp2040/family.mk b/hw/bsp/rp2040/family.mk index cf6b53793..25d1ad9c5 100644 --- a/hw/bsp/rp2040/family.mk +++ b/hw/bsp/rp2040/family.mk @@ -13,9 +13,6 @@ $(BUILD): all: $(BUILD) $(MAKE) -C $(BUILD) -clean: - $(RM) -rf $(BUILD) - flash: flash-pyocd flash-uf2: @$(CP) $(BUILD)/$(PROJECT).uf2 /media/$(USER)/RPI-RP2 diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index e9c3d34cb..011ee49dc 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) } } - return TUSB_INDEX_INVALID; + return TU_INDEX_INVALID_8; } @@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i; } - return TUSB_INDEX_INVALID; + return TU_INDEX_INVALID_8; } bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info) @@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer) uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - TU_ASSERT(idx != TUSB_INDEX_INVALID, ); + TU_ASSERT(idx != TU_INDEX_INVALID_8, ); switch(state) { diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 957491aa9..faccf8726 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,6 +75,12 @@ #include "tusb_timeout.h" // TODO remove +enum +{ + TU_INDEX_INVALID_8 = 0xFFu +}; + + //--------------------------------------------------------------------+ // Optional API implemented by application if needed // TODO move to a more ovious place/file diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 7266a525e..d567bd482 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -273,11 +273,6 @@ enum CONTROL_STAGE_ACK }; -enum -{ - TUSB_INDEX_INVALID = 0xff -}; - //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ From e1fda007f6ad7f05452cd2bb02f8578197b9339e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 14:46:02 +0700 Subject: [PATCH 063/142] minor refactor to invalid index --- src/host/usbh.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/src/host/usbh.c b/src/host/usbh.c index 45a2a0c66..aeab681e9 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -118,10 +118,6 @@ typedef struct { // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -// Invalid driver ID in itf2drv[] ep2drv[][] mapping -enum { DRVID_INVALID = 0xFFu }; -enum { CONTROLLER_INVALID = 0xFFu }; - #if CFG_TUSB_DEBUG >= 2 #define DRIVER_NAME(_name) .name = _name, #else @@ -199,7 +195,7 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1 // sum of end device + hub #define TOTAL_DEVICES (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB) -static uint8_t _usbh_controller = CONTROLLER_INVALID; +static uint8_t _usbh_controller = TU_INDEX_INVALID_8; // Device with address = 0 for enumeration static usbh_dev0_t _dev0; @@ -307,13 +303,13 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr) static void clear_device(usbh_device_t* dev) { tu_memclr(dev, sizeof(usbh_device_t)); - memset(dev->itf2drv, DRVID_INVALID, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , DRVID_INVALID, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, TU_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , TU_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping } bool tuh_inited(void) { - return _usbh_controller != CONTROLLER_INVALID; + return _usbh_controller != TU_INDEX_INVALID_8; } bool tuh_init(uint8_t controller_id) @@ -402,11 +398,11 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) // one device before enumerating another one. if ( _dev0.enumerating ) { - TU_LOG1("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport); + TU_LOG_USBH("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport); osal_queue_send(_usbh_q, &event, in_isr); }else { - TU_LOG1("[%u:] USBH DEVICE ATTACH\r\n", event.rhport); + TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport); _dev0.enumerating = 1; enum_new_device(&event); } @@ -1362,11 +1358,11 @@ static void process_enumeration(tuh_xfer_t* xfer) dev->configured = 1; - // Start the Set Configuration process for interfaces (itf = DRVID_INVALID) + // Start the Set Configuration process for interfaces (itf = TU_INDEX_INVALID_8) // Since driver can perform control transfer within its set_config, this is done asynchronously. // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete() - // TODO use separated API instead of using DRVID_INVALID - usbh_driver_set_config_complete(daddr, DRVID_INVALID); + // TODO use separated API instead of using TU_INDEX_INVALID_8 + usbh_driver_set_config_complete(daddr, TU_INDEX_INVALID_8); } break; @@ -1566,7 +1562,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur uint8_t const itf_num = desc_itf->bInterfaceNumber+i; // Interface number must not be used already - TU_ASSERT( DRVID_INVALID == dev->itf2drv[itf_num] ); + TU_ASSERT( TU_INDEX_INVALID_8 == dev->itf2drv[itf_num] ); dev->itf2drv[itf_num] = drv_id; } @@ -1600,7 +1596,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) // IAD binding interface such as CDCs should return itf_num + 1 when complete // with usbh_driver_set_config_complete() uint8_t const drv_id = dev->itf2drv[itf_num]; - if (drv_id != DRVID_INVALID) + if (drv_id != TU_INDEX_INVALID_8) { usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num); From 511f5be8b34f0a28b20773f2d39bda575f07065f Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 14:46:34 +0700 Subject: [PATCH 064/142] bump up pico-pio-usb dependency --- tools/get_deps.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 3aa95ece5..2d4fcf5de 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -17,8 +17,8 @@ deps_list = { 'hw/mcu/nxp/lpcopen' : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git' ], 'hw/mcu/nxp/mcux-sdk' : ['ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294', 'https://github.com/NXPmicro/mcux-sdk.git' ], 'hw/mcu/nxp/nxp_sdk' : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git' ], - 'hw/mcu/raspberry_pi/Pico-PIO-USB' : ['9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git' ], - 'hw/mcu/renesas/fsp' : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git' ], + 'hw/mcu/raspberry_pi/Pico-PIO-USB' : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git' ], + 'hw/mcu/renesas/fsp' : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git' ], 'hw/mcu/renesas/rx' : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git' ], 'hw/mcu/silabs/cmsis-dfp-efm32gg12b' : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git' ], 'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git' ], From 6763521ec7f3979dcd7bc0b37a756f8d13399cbb Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 15:31:21 +0700 Subject: [PATCH 065/142] remove all submodules --- .gitmodules | 9 --------- lib/FreeRTOS-Kernel | 1 - lib/lwip | 1 - tools/get_deps.py | 30 +++++++++++++++++++++--------- tools/uf2 | 1 - 5 files changed, 21 insertions(+), 21 deletions(-) delete mode 160000 lib/FreeRTOS-Kernel delete mode 160000 lib/lwip delete mode 160000 tools/uf2 diff --git a/.gitmodules b/.gitmodules index 469192026..e69de29bb 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,9 +0,0 @@ -[submodule "tools/uf2"] - path = tools/uf2 - url = https://github.com/microsoft/uf2.git -[submodule "lib/lwip"] - path = lib/lwip - url = https://github.com/lwip-tcpip/lwip.git -[submodule "lib/FreeRTOS-Kernel"] - path = lib/FreeRTOS-Kernel - url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git diff --git a/lib/FreeRTOS-Kernel b/lib/FreeRTOS-Kernel deleted file mode 160000 index 2a604f4a2..000000000 --- a/lib/FreeRTOS-Kernel +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f diff --git a/lib/lwip b/lib/lwip deleted file mode 160000 index 159e31b68..000000000 --- a/lib/lwip +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 159e31b689577dbf69cf0683bbaffbd71fa5ee10 diff --git a/tools/get_deps.py b/tools/get_deps.py index 2d4fcf5de..358f1cb9d 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -3,8 +3,17 @@ import subprocess from pathlib import Path from multiprocessing import Pool +# Mandatory Dependencies that is always fetched # path, url, commit (Alphabet sorted by path) -deps_list = { +deps_mandatory = { + 'lib/FreeRTOS-Kernel' : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git' ], + 'lib/lwip' : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git' ], + 'tools/uf2' : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git' ], +} + +# Optional Dependencies per MCU +# path, url, commit (Alphabet sorted by path) +deps_optional = { 'hw/mcu/allwinner' : ['8e5e89e8e132c0fd90e72d5422e5d3d68232b756', 'https://github.com/hathach/allwinner_driver.git' ], 'hw/mcu/bridgetek/ft9xx/ft90x-sdk' : ['91060164afe239fcb394122e8bf9eb24d3194eb1', 'https://github.com/BRTSG-FOSS/ft90x-sdk.git' ], 'hw/mcu/broadcom' : ['08370086080759ed54ac1136d62d2ad24c6fa267', 'https://github.com/adafruit/broadcom-peripherals.git' ], @@ -55,22 +64,22 @@ deps_list = { 'hw/mcu/ti' : ['143ed6cc20a7615d042b03b21e070197d473e6e5', 'https://github.com/hathach/ti_driver.git' ], 'hw/mcu/wch/ch32v307' : ['17761f5cf9dbbf2dcf665b7c04934188add20082', 'https://github.com/openwch/ch32v307.git' ], 'lib/CMSIS_5' : ['20285262657d1b482d132d20d755c8c330d55c1f', 'https://github.com/ARM-software/CMSIS_5.git' ], - 'lib/FreeRTOS-Kernel' : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git' ], - 'lib/lwip' : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git' ], 'lib/sct_neopixel' : ['e73e04ca63495672d955f9268e003cffe168fcd8', 'https://github.com/gsteiert/sct_neopixel.git' ], - 'tools/uf2' : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git' ], } +# combined 2 deps +deps_all = {**deps_mandatory, **deps_optional} + # TOP is tinyusb root dir TOP = Path(__file__).parent.parent.resolve() def get_a_dep(d): - if d not in deps_list.keys(): + if d not in deps_all.keys(): print('{} is not found in dependency list') return 1 - commit = deps_list[d][0] - url = deps_list[d][1] + commit = deps_all[d][0] + url = deps_all[d][1] print('cloning {} with {}'.format(d, url)) p = Path(TOP / d) @@ -94,8 +103,11 @@ def get_a_dep(d): if __name__ == "__main__": + if len(sys.argv) <= 1: + sys.exit(1) + status = 0 - all_deps = sys.argv[1:] + deps = list(deps_mandatory.keys()) + sys.argv[1:] with Pool() as pool: - status = sum(pool.map(get_a_dep, all_deps)) + status = sum(pool.map(get_a_dep, deps)) sys.exit(status) diff --git a/tools/uf2 b/tools/uf2 deleted file mode 160000 index 196154077..000000000 --- a/tools/uf2 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 19615407727073e36d81bf239c52108ba92e7660 From 323a56e309654601d1eaeaa4114e03f750c58a36 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 15:39:59 +0700 Subject: [PATCH 066/142] bump up freeRTOS deps to version 10.5.1 --- tools/get_deps.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 358f1cb9d..24e5f383a 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -6,7 +6,7 @@ from multiprocessing import Pool # Mandatory Dependencies that is always fetched # path, url, commit (Alphabet sorted by path) deps_mandatory = { - 'lib/FreeRTOS-Kernel' : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git' ], + 'lib/FreeRTOS-Kernel' : ['def7d2df2b0506d3d249334974f51e427c17a41c', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git' ], 'lib/lwip' : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git' ], 'tools/uf2' : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git' ], } @@ -96,6 +96,7 @@ def get_a_dep(d): head = result.stdout.decode("utf-8").splitlines()[0] if commit != head: + subprocess.run("{} reset --hard".format(git_cmd, commit), shell=True) subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True) subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) From 2faad42cb1d258155f714e5140bb27bc1ed30caf Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 15:54:25 +0700 Subject: [PATCH 067/142] update ci - remove submodules init - pre-commit: forbid new submodule, run in ci --- .github/workflows/build_aarch64.yml | 3 --- .github/workflows/build_arm.yml | 8 +------- .github/workflows/build_iar.yml | 8 +++----- .github/workflows/build_msp430.yml | 5 +---- .github/workflows/build_renesas.yml | 3 --- .github/workflows/build_riscv.yml | 3 --- .github/workflows/build_win_mac.yml | 3 --- .github/workflows/pre-commit.yml | 3 +++ .pre-commit-config.yaml | 3 ++- 9 files changed, 10 insertions(+), 29 deletions(-) diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml index 30df2bdf0..cc8ddb070 100644 --- a/.github/workflows/build_aarch64.yml +++ b/.github/workflows/build_aarch64.yml @@ -42,9 +42,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Checkout hathach/linkermap uses: actions/checkout@v3 with: diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index b5a92d6e3..7aecb8386 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -65,9 +65,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Checkout hathach/linkermap uses: actions/checkout@v3 with: @@ -145,9 +142,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Build run: python3 tools/build_board.py ${{ matrix.example }} @@ -275,4 +269,4 @@ jobs: - name: Test dfu_runtime run: | ./flash.sh dfu_runtime.elf - while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done + while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index afb6efb6b..a5d24892f 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -30,7 +30,7 @@ jobs: family: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can - # run IAR build. Too many matrix can hurt due to setup/teardown overhead. + # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g4 stm32h7 stm32l4' steps: - name: Clean workspace @@ -42,10 +42,8 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout submodules and dependencies - run: | - git submodule update --init lib/FreeRTOS-Kernel lib/lwip - python3 tools/get_family_deps.py ${{ matrix.family }} + - name: Get Dependencies + run: python3 tools/get_family_deps.py ${{ matrix.family }} - name: Build run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml index 6832c54b3..7cb60dceb 100644 --- a/.github/workflows/build_msp430.yml +++ b/.github/workflows/build_msp430.yml @@ -21,7 +21,7 @@ concurrency: group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }} cancel-in-progress: true -jobs: +jobs: build-msp430: runs-on: ubuntu-latest strategy: @@ -40,9 +40,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Checkout hathach/linkermap uses: actions/checkout@v3 with: diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml index 7ce674485..ffdeedb71 100644 --- a/.github/workflows/build_renesas.yml +++ b/.github/workflows/build_renesas.yml @@ -39,9 +39,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Checkout hathach/linkermap uses: actions/checkout@v3 with: diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml index 876ebbdef..87c7b522e 100644 --- a/.github/workflows/build_riscv.yml +++ b/.github/workflows/build_riscv.yml @@ -41,9 +41,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Checkout hathach/linkermap uses: actions/checkout@v3 with: diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml index 7c884abd9..4b743a686 100644 --- a/.github/workflows/build_win_mac.yml +++ b/.github/workflows/build_win_mac.yml @@ -46,9 +46,6 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 - - name: Checkout common submodules in lib - run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip - - name: Get Dependencies run: python3 tools/get_family_deps.py stm32f4 diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index d2150d13f..6deee872f 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -26,6 +26,9 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 + - name: Run pre-commit + uses: pre-commit/action@v3.0.0 + - name: Run codespell uses: codespell-project/actions-codespell@master diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 865307896..ea2372f07 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -4,11 +4,12 @@ repos: - repo: https://github.com/pre-commit/pre-commit-hooks - rev: v4.0.1 + rev: v4.4.0 hooks: - id: check-yaml - id: trailing-whitespace - id: end-of-file-fixer + - id: forbid-submodules - repo: local hooks: From 3623ba1884ddff23e9b64766cb6dd032f1425846 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 16:12:49 +0700 Subject: [PATCH 068/142] fix trailing space and new line temporarily disable codespell --- .gitattributes | 6 +- .github/ISSUE_TEMPLATE/bug_report.yml | 6 +- .github/workflows/trigger.yml | 4 +- .pre-commit-config.yaml | 10 +- .readthedocs.yaml | 1 - docs/assets/stack.svg | 2 +- docs/contributing/code_of_conduct.rst | 2 +- docs/info/changelog.rst | 54 +- docs/info/contributors.rst | 2 +- docs/reference/getting_started.rst | 14 +- examples/device/audio_4_channel_mic/skip.txt | 2 +- .../device/audio_4_channel_mic/src/main.c | 2 +- .../src/plot_audio_samples.py | 1 - .../audio_4_channel_mic/src/usb_descriptors.c | 2 +- examples/device/audio_test/CMakeLists.txt | 2 +- examples/device/audio_test/skip.txt | 2 +- examples/device/audio_test/src/main.c | 2 +- .../audio_test/src/plot_audio_samples.py | 3 +- .../device/audio_test/src/usb_descriptors.c | 2 +- .../audio_test_multi_rate/CMakeLists.txt | 2 +- .../device/audio_test_multi_rate/skip.txt | 2 +- .../device/audio_test_multi_rate/src/main.c | 10 +- .../src/plot_audio_samples.py | 3 +- .../audio_test_multi_rate/src/tusb_config.h | 2 +- .../src/usb_descriptors.c | 2 +- .../src/usb_descriptors.h | 4 +- examples/device/board_test/src/CMakeLists.txt | 2 +- examples/device/board_test/src/main.c | 2 +- examples/device/cdc_dual_ports/CMakeLists.txt | 2 +- examples/device/cdc_dual_ports/src/main.c | 2 +- .../cdc_dual_ports/src/usb_descriptors.c | 2 +- examples/device/cdc_msc/CMakeLists.txt | 2 +- examples/device/cdc_msc/skip.txt | 2 +- examples/device/cdc_msc/src/main.c | 2 +- examples/device/cdc_msc/src/msc_disk.c | 2 +- examples/device/cdc_msc/src/usb_descriptors.c | 2 +- examples/device/cdc_msc_freertos/src/main.c | 2 +- .../device/cdc_msc_freertos/src/msc_disk.c | 2 +- .../cdc_msc_freertos/src/usb_descriptors.c | 2 +- examples/device/dfu_runtime/CMakeLists.txt | 2 +- examples/device/dfu_runtime/src/main.c | 2 +- .../dynamic_configuration/CMakeLists.txt | 2 +- .../device/dynamic_configuration/skip.txt | 2 +- .../device/dynamic_configuration/src/main.c | 2 +- .../dynamic_configuration/src/msc_disk.c | 2 +- .../src/usb_descriptors.c | 2 +- .../device/hid_boot_interface/CMakeLists.txt | 2 +- examples/device/hid_boot_interface/Makefile | 2 +- examples/device/hid_boot_interface/src/main.c | 2 +- .../hid_boot_interface/src/usb_descriptors.c | 2 +- .../hid_boot_interface/src/usb_descriptors.h | 2 +- examples/device/hid_composite/CMakeLists.txt | 2 +- examples/device/hid_composite/src/main.c | 2 +- .../hid_composite/src/usb_descriptors.c | 2 +- .../hid_composite/src/usb_descriptors.h | 2 +- .../device/hid_composite_freertos/src/main.c | 2 +- .../src/usb_descriptors.c | 2 +- .../src/usb_descriptors.h | 2 +- .../device/hid_generic_inout/CMakeLists.txt | 2 +- examples/device/hid_generic_inout/hid_test.js | 3 +- examples/device/hid_generic_inout/src/main.c | 2 +- .../hid_generic_inout/src/usb_descriptors.c | 2 +- .../hid_multiple_interface/CMakeLists.txt | 2 +- examples/device/midi_test/CMakeLists.txt | 2 +- examples/device/midi_test/src/main.c | 2 +- .../device/midi_test/src/usb_descriptors.c | 2 +- examples/device/msc_dual_lun/CMakeLists.txt | 2 +- examples/device/msc_dual_lun/skip.txt | 2 +- examples/device/msc_dual_lun/src/main.c | 2 +- .../device/msc_dual_lun/src/msc_disk_dual.c | 2 +- .../device/msc_dual_lun/src/usb_descriptors.c | 2 +- .../device/net_lwip_webserver/CMakeLists.txt | 2 +- examples/device/net_lwip_webserver/skip.txt | 2 +- .../device/net_lwip_webserver/src/arch/cc.h | 32 +- .../device/net_lwip_webserver/src/lwipopts.h | 28 +- examples/device/net_lwip_webserver/src/main.c | 6 +- .../net_lwip_webserver/src/usb_descriptors.c | 4 +- examples/device/uac2_headset/CMakeLists.txt | 2 +- examples/device/uac2_headset/src/main.c | 4 +- .../device/uac2_headset/src/usb_descriptors.c | 2 +- .../device/uac2_headset/src/usb_descriptors.h | 2 +- examples/device/usbtmc/CMakeLists.txt | 2 +- examples/device/usbtmc/src/main.c | 2 +- examples/device/usbtmc/visaQuery.py | 26 +- examples/device/video_capture/CMakeLists.txt | 2 +- examples/device/video_capture/src/main.c | 2 +- .../video_capture/src/usb_descriptors.c | 2 +- .../video_capture/src/usb_descriptors.h | 2 +- examples/device/webusb_serial/CMakeLists.txt | 2 +- examples/device/webusb_serial/src/main.c | 2 +- .../webusb_serial/src/usb_descriptors.c | 2 +- .../webusb_serial/src/usb_descriptors.h | 2 +- .../dual/host_hid_to_device_cdc/src/main.c | 2 +- .../src/usb_descriptors.c | 2 +- examples/host/bare_api/src/main.c | 2 +- examples/host/cdc_msc_hid/src/main.c | 2 +- examples/host/cdc_msc_hid/src/msc_app.c | 3 +- examples/host/hid_controller/src/main.c | 2 +- examples/host/msc_file_explorer/src/main.c | 2 +- examples/host/msc_file_explorer/src/msc_app.c | 2 +- examples/rules.mk | 2 +- hw/bsp/ansi_escape.h | 2 +- hw/bsp/board.c | 2 +- hw/bsp/board.h | 2 +- .../boards/raspberrypi_zero_w/board.h | 2 +- .../boards/raspberrypi_zero_w/board.mk | 2 +- hw/bsp/broadcom_32bit/family.c | 2 +- .../boards/raspberrypi_cm4/board.h | 2 +- .../boards/raspberrypi_zero2w/board.h | 2 +- hw/bsp/broadcom_64bit/family.c | 2 +- hw/bsp/brtmm90x/family.c | 7 +- hw/bsp/brtmm90x/family.mk | 8 +- .../ch32v307/boards/ch32v307v-r1-1v0/board.h | 2 +- .../boards/ch32v307v-r1-1v0/debug_uart.c | 4 +- hw/bsp/ch32v307/ch32v307.ld | 35 +- hw/bsp/ch32v307/ch32v30x_conf.h | 7 +- hw/bsp/ch32v307/ch32v30x_it.c | 2 - hw/bsp/ch32v307/ch32v30x_it.h | 2 - hw/bsp/ch32v307/core_riscv.h | 7 +- hw/bsp/ch32v307/system_ch32v30x.c | 140 ++-- hw/bsp/ch32v307/system_ch32v30x.h | 9 +- hw/bsp/da14695_dk_usb/da14695_dk_usb.c | 2 +- hw/bsp/da14695_dk_usb/da1469x.ld | 1 - hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c | 2 +- hw/bsp/da1469x_dk_pro/da1469x.ld | 1 - hw/bsp/ea4088qs/ea4088qs.c | 2 +- hw/bsp/ea4088qs/lpc4088.ld | 54 +- hw/bsp/ea4357/ea4357.c | 2 +- hw/bsp/ea4357/lpc4357.ld | 106 +-- hw/bsp/ea4357/pca9532.c | 6 +- hw/bsp/ea4357/pca9532.h | 2 +- hw/bsp/esp32s2/boards/CMakeLists.txt | 2 +- .../adafruit_feather_esp32s2/board.cmake | 2 +- .../boards/adafruit_feather_esp32s2/board.h | 2 +- .../boards/adafruit_magtag_29gray/board.cmake | 2 +- .../boards/adafruit_magtag_29gray/board.h | 2 +- .../boards/adafruit_metro_esp32s2/board.cmake | 2 +- .../boards/adafruit_metro_esp32s2/board.h | 2 +- hw/bsp/esp32s2/boards/esp32s2.c | 3 +- .../boards/espressif_kaluga_1/board.cmake | 2 +- .../esp32s2/boards/espressif_kaluga_1/board.h | 2 +- .../boards/espressif_saola_1/board.cmake | 2 +- .../esp32s2/boards/espressif_saola_1/board.h | 2 +- .../components/led_strip/CMakeLists.txt | 1 - hw/bsp/esp32s2/family.cmake | 2 +- hw/bsp/esp32s2/family.mk | 1 - hw/bsp/esp32s3/boards/CMakeLists.txt | 2 +- hw/bsp/esp32s3/boards/esp32s3.c | 3 +- .../boards/espressif_addax_1/board.cmake | 2 +- .../esp32s3/boards/espressif_addax_1/board.h | 2 +- .../boards/espressif_s3_devkitc/board.cmake | 2 +- .../boards/espressif_s3_devkitc/board.h | 2 +- .../boards/espressif_s3_devkitm/board.cmake | 2 +- .../boards/espressif_s3_devkitm/board.h | 2 +- .../components/led_strip/CMakeLists.txt | 1 - hw/bsp/esp32s3/family.cmake | 2 +- hw/bsp/esp32s3/family.mk | 1 - hw/bsp/f1c100s/README.md | 2 +- hw/bsp/f1c100s/board.h | 2 +- hw/bsp/f1c100s/board.mk | 6 +- hw/bsp/f1c100s/f1c100s.c | 4 +- hw/bsp/family_support.cmake | 2 +- hw/bsp/fomu/boards/fomu/board.mk | 2 +- hw/bsp/fomu/fomu.c | 2 +- hw/bsp/fomu/include/hw/common.h | 2 +- hw/bsp/fomu/include/irq.h | 2 +- hw/bsp/frdm_k32l2b/board.h | 2 +- hw/bsp/frdm_k32l2b/frdm_k32l2b.c | 12 +- hw/bsp/frdm_kl25z/frdm_kl25z.c | 4 +- hw/bsp/gd32vf103/family.c | 2 +- hw/bsp/gd32vf103/system_gd32vf103.c | 10 +- hw/bsp/imxrt/boards/metro_m7_1011/board.h | 2 +- .../boards/metro_m7_1011/metro_m7_1011.ld | 2 +- hw/bsp/imxrt/boards/mimxrt1010_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1015_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1020_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1024_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1060_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1064_evk/board.h | 2 +- hw/bsp/imxrt/boards/teensy_40/board.h | 2 +- hw/bsp/imxrt/boards/teensy_40/board.mk | 2 +- hw/bsp/imxrt/boards/teensy_41/board.h | 2 +- hw/bsp/imxrt/boards/teensy_41/board.mk | 2 +- hw/bsp/imxrt/family.c | 2 +- hw/bsp/kuiic/K32L2B31xxxxA_flash.ld | 1 - hw/bsp/kuiic/board.h | 2 +- hw/bsp/kuiic/kuiic.c | 16 +- hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld | 60 +- hw/bsp/lpc15/family.c | 2 +- .../lpc18/boards/lpcxpresso18s37/lpc1837.ld | 86 +-- hw/bsp/lpc18/boards/mcb1800/lpc1857.ld | 106 +-- hw/bsp/lpc18/family.c | 2 +- hw/bsp/lpc54/boards/lpcxpresso54628/board.mk | 2 +- hw/bsp/lpc54/family.c | 2 +- .../LPC55S69_cm33_core0_uf2.ld | 1 - hw/bsp/lpc55/family.c | 2 +- hw/bsp/lpcxpresso11u37/lpc11u37.ld | 50 +- hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c | 2 +- hw/bsp/lpcxpresso11u68/lpc11u68.ld | 68 +- hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c | 2 +- hw/bsp/lpcxpresso1347/lpc1347.ld | 68 +- hw/bsp/lpcxpresso1347/lpcxpresso1347.c | 4 +- hw/bsp/lpcxpresso1769/lpc1769.ld | 54 +- hw/bsp/lpcxpresso1769/lpcxpresso1769.c | 2 +- hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c | 2 +- hw/bsp/mbed1768/lpc1768.ld | 54 +- hw/bsp/mbed1768/mbed1768.c | 2 +- hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld | 8 +- .../boards/mm32f327x_mb39/mm32f327x_mb39.c | 4 +- hw/bsp/ngx4330/ngx4330.c | 2 +- hw/bsp/ngx4330/ngx4330.ld | 80 +-- hw/bsp/nrf/boards/adafruit_clue/board.h | 2 +- .../boards/adafruit_clue/nrf52840_s140_v6.ld | 4 +- .../arduino_nano33_ble/arduino_nano33_ble.ld | 2 +- hw/bsp/nrf/boards/arduino_nano33_ble/board.h | 2 +- .../circuitplayground_bluefruit/board.h | 2 +- .../nrf52840_s140_v6.ld | 4 +- .../boards/feather_nrf52840_express/board.h | 2 +- .../nrf52840_s140_v6.ld | 4 +- .../nrf/boards/feather_nrf52840_sense/board.h | 2 +- .../nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h | 2 +- .../itsybitsy_nrf52840/nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h | 2 +- .../nrf/boards/nrf52840_mdk_dongle/board.mk | 2 +- hw/bsp/nrf/boards/pca10056/board.h | 2 +- hw/bsp/nrf/boards/pca10059/board.h | 2 +- hw/bsp/nrf/boards/pca10100/board.h | 2 +- hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h | 2 +- hw/bsp/nrf/family.c | 2 +- hw/bsp/nutiny_nuc121s/nuc121_flash.ld | 2 +- hw/bsp/nutiny_nuc121s/nutiny_nuc121.c | 2 +- hw/bsp/nutiny_nuc125s/nuc125_flash.ld | 2 +- hw/bsp/nutiny_nuc125s/nutiny_nuc125.c | 2 +- hw/bsp/nutiny_nuc126v/nutiny_nuc126.c | 2 +- hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c | 2 +- hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c | 2 +- .../boards/olimex_emz64/olimex_emz64.c | 2 +- hw/bsp/pic32mz/family.c | 2 +- hw/bsp/rp2040/board.h | 2 +- .../boards/raspberry_pi_pico/board.cmake | 2 +- hw/bsp/rp2040/family.cmake | 2 +- hw/bsp/rx/boards/gr_citrus/gr_citrus.c | 6 +- hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 2 +- .../samd11_xplained/samd11d14am_flash.ld | 4 +- hw/bsp/samd21/boards/atsamd21_xpro/board.h | 2 +- .../boards/circuitplayground_express/board.h | 2 +- hw/bsp/samd21/boards/curiosity_nano/board.h | 2 +- .../samd21/boards/feather_m0_express/board.h | 2 +- hw/bsp/samd21/boards/itsybitsy_m0/board.h | 2 +- hw/bsp/samd21/boards/luna_d21/board.h | 2 +- hw/bsp/samd21/boards/luna_d21/board.mk | 1 - hw/bsp/samd21/boards/metro_m0_express/board.h | 2 +- hw/bsp/samd21/boards/qtpy/board.h | 2 +- hw/bsp/samd21/boards/seeeduino_xiao/board.h | 2 +- hw/bsp/samd21/boards/trinket_m0/board.h | 1 - hw/bsp/samd21/boards/trinket_m0/board.mk | 1 - hw/bsp/samd21/family.c | 2 +- .../samd51/boards/feather_m4_express/board.h | 2 +- hw/bsp/samd51/boards/itsybitsy_m4/board.h | 2 +- hw/bsp/samd51/boards/metro_m4_express/board.h | 2 +- .../samd51/boards/metro_m4_express/board.mk | 1 - hw/bsp/samd51/boards/pybadge/board.h | 2 +- hw/bsp/samd51/boards/pyportal/board.h | 2 +- hw/bsp/samd51/family.c | 2 +- hw/bsp/same54xplainedpro/same54p20a_flash.ld | 4 +- hw/bsp/same54xplainedpro/same54p20a_sram.ld | 4 +- hw/bsp/samg55xplained/samg55xplained.c | 2 +- hw/bsp/saml2x/boards/atsaml21_xpro/board.h | 2 +- hw/bsp/saml2x/boards/saml22_feather/board.h | 2 +- .../boards/saml22_feather/saml22_feather.ld | 4 +- hw/bsp/saml2x/boards/sensorwatch_m0/board.h | 2 +- .../boards/sensorwatch_m0/sensorwatch_m0.ld | 4 +- hw/bsp/saml2x/family.c | 2 +- hw/bsp/sltb009a/sltb009a.c | 4 +- hw/bsp/spresense/board_spresense.c | 6 +- .../stm32f0/boards/stm32f070rbnucleo/board.h | 2 +- .../stm32f0/boards/stm32f070rbnucleo/board.mk | 2 +- .../stm32f070rbnucleo/stm32F070rbtx_flash.ld | 14 +- .../stm32f072disco/STM32F072RBTx_FLASH.ld | 8 +- hw/bsp/stm32f0/boards/stm32f072disco/board.h | 2 +- hw/bsp/stm32f0/boards/stm32f072eval/board.h | 2 +- hw/bsp/stm32f0/family.c | 2 +- hw/bsp/stm32f0/stm32f0xx_hal_conf.h | 51 +- .../stm32f103_bluepill/STM32F103X8_FLASH.ld | 6 +- .../stm32f1/boards/stm32f103_bluepill/board.h | 2 +- .../stm32f103_mini_2/STM32F103XC_FLASH.ld | 6 +- .../stm32f1/boards/stm32f103_mini_2/board.h | 2 +- hw/bsp/stm32f1/family.c | 8 +- hw/bsp/stm32f1/stm32f1xx_hal_conf.h | 44 +- hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld | 8 +- hw/bsp/stm32f207nucleo/stm32f207nucleo.c | 4 +- hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h | 56 +- hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld | 18 +- hw/bsp/stm32f303disco/stm32f303disco.c | 2 +- hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h | 38 +- .../feather_stm32f405/STM32F405RGTx_FLASH.ld | 18 +- .../stm32f4/boards/feather_stm32f405/board.h | 2 +- .../boards/pyboardv11/STM32F405RGTx_FLASH.ld | 18 +- hw/bsp/stm32f4/boards/pyboardv11/board.h | 2 +- .../stm32f401blackpill/STM32F401VCTx_FLASH.ld | 8 +- .../stm32f4/boards/stm32f401blackpill/board.h | 2 +- .../stm32f401blackpill/stm32f4xx_hal_conf.h | 82 +-- .../stm32f407disco/STM32F407VGTx_FLASH.ld | 18 +- hw/bsp/stm32f4/boards/stm32f407disco/board.h | 2 +- .../stm32f407disco/stm32f4xx_hal_conf.h | 82 +-- .../stm32f411blackpill/STM32F411CEUx_FLASH.ld | 8 +- .../stm32f4/boards/stm32f411blackpill/board.h | 2 +- .../stm32f411blackpill/stm32f4xx_hal_conf.h | 82 +-- .../stm32f411disco/STM32F411VETx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f411disco/board.h | 2 +- .../stm32f411disco/stm32f4xx_hal_conf.h | 82 +-- .../stm32f412disco/STM32F412ZGTx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f412disco/board.h | 2 +- .../stm32f412disco/stm32f4xx_hal_conf.h | 82 +-- .../stm32f412nucleo/STM32F412ZGTx_FLASH.ld | 8 +- .../stm32f412nucleo/stm32f4xx_hal_conf.h | 82 +-- .../stm32f439nucleo/stm32f4xx_hal_conf.h | 70 +- hw/bsp/stm32f4/family.c | 2 +- hw/bsp/stm32f7/boards/stlinkv3mini/board.h | 2 +- hw/bsp/stm32f7/boards/stm32f723disco/board.h | 2 +- hw/bsp/stm32f7/boards/stm32f746disco/board.h | 2 +- .../stm32f746nucleo/STM32F746ZGTx_FLASH.ld | 6 +- hw/bsp/stm32f7/boards/stm32f746nucleo/board.h | 2 +- .../stm32f746nucleo/stm32f7xx_hal_conf.h | 52 +- .../stm32f767nucleo/STM32F767ZITx_FLASH.ld | 8 +- hw/bsp/stm32f7/boards/stm32f767nucleo/board.h | 2 +- .../stm32f7/boards/stm32f767nucleo/board.mk | 2 +- .../stm32f767nucleo/stm32f7xx_hal_conf.h | 52 +- hw/bsp/stm32f7/boards/stm32f769disco/board.h | 2 +- .../stm32g474nucleo/STM32G474RETx_FLASH.ld | 8 +- hw/bsp/stm32g4/family.c | 2 +- hw/bsp/stm32g4/stm32g4xx_hal_conf.h | 26 +- hw/bsp/stm32h7/boards/daisyseed/board.mk | 1 - .../boards/daisyseed/stm32h750ibkx_flash.ld | 2 - .../boards/stm32h743eval/stm32h743xx_flash.ld | 8 +- .../stm32h743nucleo/stm32h743xx_flash.ld | 8 +- hw/bsp/stm32h7/boards/stm32h745disco/board.mk | 1 - .../STM32H743IITX_FLASH.ld | 2 - .../boards/waveshare_openh743i/board.mk | 2 +- hw/bsp/stm32h7/family.c | 2 +- hw/bsp/stm32h7/stm32h7xx_hal_conf.h | 6 +- .../stm32l052dap52/STM32L052K8Ux_FLASH.ld | 8 +- hw/bsp/stm32l0/boards/stm32l052dap52/board.h | 34 +- hw/bsp/stm32l0/family.c | 2 +- hw/bsp/stm32l0/stm32l0xx_hal_conf.h | 49 +- hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld | 8 +- hw/bsp/stm32l0538disco/stm32l0538disco.c | 2 +- hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h | 102 +-- .../stm32l412nucleo/STM32L412KBUx_FLASH.ld | 14 +- hw/bsp/stm32l4/boards/stm32l412nucleo/board.h | 6 +- .../stm32l476disco/STM32L476VGTx_FLASH.ld | 14 +- hw/bsp/stm32l4/boards/stm32l476disco/board.h | 2 +- .../stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld | 12 +- hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h | 2 +- .../stm32l4r5nucleo/STM32L4RXxI_FLASH.ld | 6 +- hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h | 2 +- hw/bsp/stm32l4/stm32l4xx_hal_conf.h | 10 +- hw/bsp/stm32u5/stm32u5xx_hal_conf.h | 1 - .../stm32wb55nucleo/stm32wb55xx_flash_cm4.ld | 8 +- hw/bsp/stm32wb/family.c | 2 +- hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk | 2 +- .../tm4c123/boards/ek-tm4c123gxl/tm4c123.ld | 24 +- hw/bsp/tm4c123/family.c | 1 - hw/bsp/xmc4000/boards/xmc4500_relax/board.h | 2 +- hw/mcu/bridgetek/ft9xx/Readme.md | 4 +- hw/mcu/bridgetek/ft9xx/scripts/crt0.S | 8 +- hw/mcu/dialog/README.md | 4 +- .../SDK_10.0.8.105/sdk/bsp/arm_license.txt | 1 - .../sdk/bsp/include/cmsis_compiler.h | 1 - .../sdk/bsp/include/cmsis_gcc.h | 10 +- .../SDK_10.0.8.105/sdk/bsp/include/core_cm0.h | 2 +- .../sdk/bsp/include/core_cm33.h | 4 +- .../sdk/bsp/include/mpu_armv8.h | 33 +- hw/mcu/dialog/da1469x/da1469x.ld | 1 - hw/mcu/dialog/da1469x/include/mcu/mcu.h | 1 - .../nrf5x/s140_nrf52_6.1.1_API/include/ble.h | 2 +- .../s140_nrf52_6.1.1_API/include/ble_gap.h | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 16 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.h | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S | 6 +- lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h | 12 +- .../Syscalls/SEGGER_RTT_Syscalls_GCC.c | 4 +- .../Syscalls/SEGGER_RTT_Syscalls_KEIL.c | 42 +- lib/fatfs/source/00history.txt | 1 - lib/fatfs/source/00readme.txt | 1 - lib/fatfs/source/diskio.c | 1 - lib/fatfs/source/ff.c | 1 - lib/fatfs/source/ffsystem.c | 1 - lib/networking/dhserver.c | 10 +- lib/networking/dhserver.h | 6 +- lib/networking/dnserver.c | 8 +- lib/networking/dnserver.h | 6 +- lib/networking/ndis.h | 10 +- lib/networking/rndis_protocol.h | 28 +- lib/networking/rndis_reports.c | 14 +- src/class/audio/audio.h | 6 +- src/class/audio/audio_device.c | 6 +- src/class/audio/audio_device.h | 4 +- src/class/bth/bth_device.h | 2 +- src/class/cdc/cdc_device.c | 12 +- src/class/cdc/cdc_device.h | 2 +- src/class/cdc/cdc_host.h | 2 +- src/class/cdc/cdc_rndis.h | 2 +- src/class/cdc/cdc_rndis_host.c | 2 +- src/class/cdc/cdc_rndis_host.h | 2 +- src/class/hid/hid.h | 2 +- src/class/midi/midi.h | 2 +- src/class/midi/midi_device.c | 2 +- src/class/midi/midi_device.h | 2 +- src/class/msc/msc.h | 2 +- src/class/msc/msc_device.h | 2 +- src/class/msc/msc_host.c | 12 +- src/class/msc/msc_host.h | 2 +- src/class/net/ecm_rndis_device.c | 2 +- src/class/net/ncm_device.c | 2 +- src/class/net/net_device.h | 2 +- src/class/usbtmc/usbtmc.h | 1 - src/class/usbtmc/usbtmc_device.c | 4 +- src/class/vendor/vendor_device.h | 2 +- src/class/vendor/vendor_host.c | 2 +- src/class/vendor/vendor_host.h | 2 +- src/class/video/video_device.c | 2 +- src/common/tusb_compiler.h | 4 +- src/common/tusb_timeout.h | 2 +- src/common/tusb_verify.h | 2 +- src/device/dcd.h | 2 +- src/device/usbd.c | 4 +- src/device/usbd_pvt.h | 2 +- src/host/hcd.h | 2 +- src/host/hub.c | 4 +- src/host/usbh.h | 2 +- src/osal/osal.h | 2 +- src/osal/osal_freertos.h | 2 +- src/osal/osal_none.h | 2 +- src/osal/osal_pico.h | 2 +- src/osal/osal_rtx4.h | 4 +- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 78 +- src/portable/chipidea/ci_hs/ci_hs_type.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 2 +- src/portable/ehci/ehci.c | 6 +- src/portable/espressif/esp32sx/dcd_esp32sx.c | 1 - src/portable/mentor/musb/dcd_musb.c | 8 +- src/portable/mentor/musb/hcd_musb.c | 4 +- src/portable/microchip/pic/dcd_pic.c | 4 +- .../microchip/pic32mz/usbhs_registers.h | 40 +- src/portable/microchip/samg/dcd_samg.c | 2 +- .../microchip/samx7x/common_usb_regs.h | 6 +- src/portable/microchip/samx7x/dcd_samx7x.c | 36 +- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- src/portable/nuvoton/nuc120/dcd_nuc120.c | 6 +- src/portable/nuvoton/nuc121/dcd_nuc121.c | 6 +- src/portable/nuvoton/nuc505/dcd_nuc505.c | 6 +- src/portable/nxp/khci/dcd_khci.c | 6 +- src/portable/nxp/khci/hcd_khci.c | 4 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 2 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.h | 2 +- src/portable/nxp/lpc17_40/hcd_lpc17_40.c | 3 +- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 7 +- .../transdimension/common_transdimension.h | 2 +- .../nxp/transdimension/dcd_transdimension.c | 2 +- .../nxp/transdimension/hcd_transdimension.c | 2 +- src/portable/ohci/ohci.c | 3 +- .../raspberrypi/pio_usb/dcd_pio_usb.c | 2 +- src/portable/raspberrypi/rp2040/rp2040_usb.h | 2 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 45 +- src/portable/st/synopsys/synopsys_common.h | 672 +++++++++--------- src/portable/sunxi/dcd_sunxi_musb.c | 6 +- src/portable/template/dcd_template.c | 2 +- src/portable/valentyusb/eptri/dcd_eptri.c | 2 +- src/portable/valentyusb/eptri/dcd_eptri.h | 2 +- src/portable/wch/ch32v307/dcd_usbhs.c | 8 +- test/fuzz/dcd_fuzz.cc | 4 +- test/fuzz/device/cdc/CMakeLists.txt | 2 +- test/fuzz/device/cdc/src/fuzz.cc | 4 +- test/fuzz/device/msc/CMakeLists.txt | 2 +- test/fuzz/device/msc/src/fuzz.cc | 1 - test/fuzz/device/net/CMakeLists.txt | 2 +- test/fuzz/device/net/src/arch/cc.h | 32 +- test/fuzz/device/net/src/fuzz.cc | 2 +- test/fuzz/device/net/src/lwipopts.h | 28 +- test/fuzz/dicts/cdc.dict | 1 - test/fuzz/make.mk | 3 +- test/fuzz/msc_fuzz.cc | 2 +- test/fuzz/net_fuzz.cc | 2 +- test/fuzz/rules.mk | 6 +- .../test/device/msc/test_msc_device.c | 2 +- test/unit-test/test/device/usbd/test_usbd.c | 2 +- test/unit-test/test/test_fifo.c | 2 +- .../unit-test/vendor/ceedling/lib/ceedling.rb | 1 - .../lib/ceedling/build_invoker_utils.rb | 14 +- .../ceedling/lib/ceedling/cacheinator.rb | 10 +- .../lib/ceedling/cacheinator_helper.rb | 2 +- .../ceedling/lib/ceedling/cmock_builder.rb | 8 +- .../ceedling/lib/ceedling/configurator.rb | 1 - .../lib/ceedling/configurator_plugins.rb | 2 +- .../lib/ceedling/configurator_setup.rb | 2 +- .../lib/ceedling/configurator_validator.rb | 78 +- .../ceedling/lib/ceedling/erb_wrapper.rb | 2 +- .../ceedling/lib/ceedling/file_finder.rb | 1 - .../lib/ceedling/file_finder_helper.rb | 22 +- .../lib/ceedling/file_system_utils.rb | 14 +- .../lib/ceedling/file_system_wrapper.rb | 2 +- .../ceedling/lib/ceedling/flaginator.rb | 14 +- .../ceedling/lib/ceedling/generator_helper.rb | 8 +- .../lib/ceedling/generator_test_results.rb | 2 +- .../generator_test_results_sanity_checker.rb | 22 +- .../vendor/ceedling/lib/ceedling/loginator.rb | 6 +- .../vendor/ceedling/lib/ceedling/makefile.rb | 4 +- .../vendor/ceedling/lib/ceedling/objects.yml | 2 +- .../vendor/ceedling/lib/ceedling/par_map.rb | 1 - .../vendor/ceedling/lib/ceedling/plugin.rb | 8 +- .../ceedling/lib/ceedling/plugin_builder.rb | 4 +- .../lib/ceedling/plugin_reportinator.rb | 40 +- .../ceedling/plugin_reportinator_helper.rb | 10 +- .../preprocessinator_includes_handler.rb | 2 +- .../lib/ceedling/project_config_manager.rb | 2 +- .../ceedling/lib/ceedling/rake_utils.rb | 2 +- .../ceedling/lib/ceedling/reportinator.rb | 4 +- .../ceedling/lib/ceedling/rules_cmock.rake | 2 +- .../lib/ceedling/rules_preprocess.rake | 5 +- .../ceedling/lib/ceedling/rules_release.rake | 1 - .../rules_release_deep_dependencies.rake | 3 +- .../ceedling/lib/ceedling/rules_tests.rake | 1 - .../rules_tests_deep_dependencies.rake | 1 - .../ceedling/lib/ceedling/setupinator.rb | 8 +- .../ceedling/lib/ceedling/stream_wrapper.rb | 2 +- .../ceedling/lib/ceedling/streaminator.rb | 2 +- .../lib/ceedling/streaminator_helper.rb | 2 +- .../ceedling/lib/ceedling/system_utils.rb | 6 +- .../ceedling/lib/ceedling/task_invoker.rb | 20 +- .../ceedling/lib/ceedling/tasks_base.rake | 1 - .../lib/ceedling/tasks_filesystem.rake | 2 - .../ceedling/lib/ceedling/tasks_release.rake | 11 +- .../ceedling/lib/ceedling/tasks_tests.rake | 1 - .../lib/ceedling/test_invoker_helper.rb | 8 +- .../vendor/ceedling/plugins/beep/lib/beep.rb | 1 - .../ceedling/plugins/bullseye/README.md | 2 +- .../plugins/bullseye/assets/template.erb | 1 - .../ceedling/plugins/bullseye/lib/bullseye.rb | 26 +- .../ceedling/plugins/colour_report/README.md | 2 +- .../command_hooks/lib/command_hooks.rb | 1 - .../plugins/compile_commands_json/README.md | 2 +- .../plugins/fake_function_framework/Rakefile | 2 +- .../examples/fff_example/project.yml | 2 +- .../examples/fff_example/src/display.c | 2 +- .../lib/fff_mock_generator.rb | 2 +- .../spec/fff_mock_header_generator_spec.rb | 2 +- .../spec/fff_mock_source_generator_spec.rb | 2 +- .../spec/header_generator.rb | 2 +- .../src/fff_unity_helper.h | 2 +- .../ceedling/plugins/gcov/assets/template.erb | 1 - .../plugins/gcov/lib/reportinator_helper.rb | 2 +- .../plugins/json_tests_report/README.md | 4 +- .../lib/json_tests_report.rb | 4 +- .../plugins/module_generator/README.md | 4 +- .../config/module_generator.yml | 2 +- .../stdout_gtestlike_tests_report/README.md | 4 +- .../plugins/stdout_ide_tests_report/README.md | 2 +- .../stdout_pretty_tests_report/README.md | 2 +- .../assets/template.erb | 1 - .../lib/stdout_pretty_tests_report.rb | 8 +- .../ceedling/plugins/subprojects/README.md | 14 +- .../plugins/subprojects/subprojects.rake | 3 +- .../plugins/teamcity_tests_report/README.md | 2 +- .../vendor/c_exception/lib/CException.c | 1 - .../vendor/c_exception/lib/meson.build | 2 +- .../vendor/ceedling/vendor/cmock/src/cmock.c | 1 - .../ceedling/vendor/cmock/src/meson.build | 2 +- .../vendor/ceedling/vendor/diy/lib/diy.rb | 60 +- .../ceedling/vendor/diy/lib/diy/factory.rb | 5 +- .../vendor/unity/auto/generate_config.yml | 2 +- .../ceedling/vendor/unity/src/meson.build | 2 +- tools/build_board.py | 2 +- tools/build_utils.py | 2 +- tools/iar_template.ipcf | 2 +- tools/mksunxi.py | 2 +- tools/pcapng_to_corpus.py | 10 +- tools/usb_drivers/tinyusb_win_usbser.inf | 2 +- 581 files changed, 2553 insertions(+), 2694 deletions(-) diff --git a/.gitattributes b/.gitattributes index 2342decc3..140ae8929 100644 --- a/.gitattributes +++ b/.gitattributes @@ -1,10 +1,10 @@ # Set the default behavior, in case people don't have core.autocrlf set. * text=auto -*.c text -*.cpp text +*.c text +*.cpp text *.h text -*.icf text +*.icf text *.js text *.json text *.ld text diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml index 8c39b95e1..dc5f0ee16 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.yml +++ b/.github/ISSUE_TEMPLATE/bug_report.yml @@ -54,7 +54,7 @@ body: Exact steps in chronological order, details should be specific e.g if you use a command/script to test with, please post it as well. 1. Go to '...' 2. Click on '....' - 3. See error + 3. See error validations: required: true @@ -63,9 +63,9 @@ body: label: Debug Log as txt file placeholder: | Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events. - + Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability. - Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. + Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md) validations: required: false diff --git a/.github/workflows/trigger.yml b/.github/workflows/trigger.yml index 11e58d86c..86c699dac 100644 --- a/.github/workflows/trigger.yml +++ b/.github/workflows/trigger.yml @@ -43,7 +43,7 @@ jobs: if [ -n "$(git status --porcelain)" ]; then git add . git commit --message "Update from https://github.com/$GITHUB_REPOSITORY/commit/$GITHUB_SHA" - git push + git push fi - name: Create tinyusb_src Release @@ -53,7 +53,7 @@ jobs: cd tinyusb_src git tag ${{ github.event.release.tag_name }} git push origin ${{ github.event.release.tag_name }} - + # Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release bb="For release note, please checkout https://github.com/hathach/tinyusb/releases/tag/${{ github.event.release.tag_name }}" curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index ea2372f07..976f04e63 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -13,11 +13,11 @@ repos: - repo: local hooks: - - id: codespell - name: codespell - entry: codespell - types_or: [c, header] - language: system + #- id: codespell + # name: codespell + # entry: codespell + # types_or: [c, header] + # language: system - id: unit-test name: unit-test diff --git a/.readthedocs.yaml b/.readthedocs.yaml index e83cd90fd..1421b397a 100644 --- a/.readthedocs.yaml +++ b/.readthedocs.yaml @@ -15,4 +15,3 @@ python: submodules: include: [] recursive: false - \ No newline at end of file diff --git a/docs/assets/stack.svg b/docs/assets/stack.svg index 85fe35e96..ed46c8649 100644 --- a/docs/assets/stack.svg +++ b/docs/assets/stack.svg @@ -1 +1 @@ - \ No newline at end of file + diff --git a/docs/contributing/code_of_conduct.rst b/docs/contributing/code_of_conduct.rst index b52bf14c5..82627099f 120000 --- a/docs/contributing/code_of_conduct.rst +++ b/docs/contributing/code_of_conduct.rst @@ -1 +1 @@ -../../CODE_OF_CONDUCT.rst \ No newline at end of file +../../CODE_OF_CONDUCT.rst diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst index 451e3dace..ca715cb58 100644 --- a/docs/info/changelog.rst +++ b/docs/info/changelog.rst @@ -15,7 +15,7 @@ Changelog - Fix tu_fifo memory overflown when repeatedly write to overwritable fifo (accumulated more than 2 depths) - Better support for IAR (ARM) with ci build check for stm32 mcus. - Fix Windows build for some mingw gnu make situations - + Controller Driver (DCD & HCD) ----------------------------- @@ -27,7 +27,7 @@ Controller Driver (DCD & HCD) - Fix endpoint internal state when closed - Fix reception of large ISO packets -- [rp2040] +- [rp2040] - [dcd] Implement workaround for Errata 15. This enable SOF when bulk-in endpoint is in use and reduce its bandwidth to only 80% - [hcd] Fix shared irq slots filling up when hcd_init() is called multiple times @@ -51,7 +51,7 @@ Device Stack - Support port name strings - fix MS Header wTotalLength computation - + - [HID] - Add FIDO descriptor template @@ -60,7 +60,7 @@ Device Stack - [CDC] - Fix autoflush for FIFO < MPS - - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data + - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data - [USBTMC] Fix packet size with highspeed @@ -100,14 +100,14 @@ Controller Driver (DCD & HCD) - Fix overwrite with grstctl when disable endpoint - [EHCI] Fix an issue with EHCI driver - [msp430] Fix for possible bug in msp430-elf-gcc 9.3.0 -- [nrf5x] Fix DMA access race condition using atomic function +- [nrf5x] Fix DMA access race condition using atomic function - [pic32] Fix PIC32 santiy - [rp2040] - Add PICO-PIO-USB as controller (device/host) support for rp2040 - Use shared IRQ handlers, so user can also hook the USB IRQ - Fix resumed signal not reported to device stack -- [stm32fsdev] Add support for stm32wb55 +- [stm32fsdev] Add support for stm32wb55 Device Stack ------------ @@ -159,7 +159,7 @@ Controller Driver (DCD & HCD) - [F1C100s] Add new DCD for Allwinner F1C100s family - [PIC32MZ] Add new DCD for PIC32MZ - [nRF] Fix/Enhance various race condition with: EASY DMA, request HFXO, EPOUT -- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed, +- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed, - [RP2040] various update/fix for hcd/dcd - [FT9XX] new DCD port for Bridgetek FT90x and FT93x devices - [DA1469X] Fix resume @@ -246,7 +246,7 @@ RP2040 ^^^^^^ - Add RP2040 suspend & resume support -- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet +- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet Device Stack ------------ @@ -267,7 +267,7 @@ DFU ^^^ - Enhance DFU implementation to support multiple alternate interface and better support bwPollTimeout -- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU +- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU HID ^^^ @@ -287,7 +287,7 @@ UAC2 ^^^^ - Fix bug and enhance of UAC2 - + Vendor ^^^^^^ @@ -479,7 +479,7 @@ Host Controller Driver (HCD) - Move echi/ohci files to portable/ - Rename hcd_lpc18_43 to hcd_transdimension - Sub hcd API with hcd_ehci_init(), hcd_ehci_register_addr() - + - Update NXP transdimention hcd_init() to reset controller to host mode - Ported hcd to rt10xx @@ -529,13 +529,13 @@ Device Controller Driver - ESP32-S2: - Add bus suspend and wakeup support - + - SAMD21: - Fix (walkaround) samd21 setup_packet overflow by USB DMA - + - STM32 Synopsys: - Rework USB FIFO allocation scheme and allow RX FIFO size reduction - + - Sony CXD56 - Update Update Spresense SDK to 2.0.2 - Fix dcd issues with setup packets @@ -554,17 +554,17 @@ USB Device - CDC - Allow to transmit data, even if the host does not support control line states i.e set DTR - + - HID - change default CFG_TUD_HID_EP_BUFSIZE from 16 to 64 - + - MIDI - Fix midi sysex sending bug - + - MSC - Invoke only scsi complete callback after status transaction is complete. - Fix scsi_mode_sense6_t padding, which cause IAR compiler internal error. - + - USBTMC - Change interrupt endpoint example size to 8 instead of 2 for better compatibility with mcu @@ -614,20 +614,20 @@ Device Controller Driver - Fix FIFO flush during stall - Implement dcd_edpt_close() API - Support F105, F107 - + - Enhance STM32 fsdev - Improve dcd fifo allocation - Fix ISTR race condition - Support remap USB IRQ on supported MCUs - Implement dcd_edpt_close() API - + - Enhance NUC 505: enhance set configure behavior - Enhance SAMD - Fix race condition with setup packet - Add SAMD11 option `OPT_MCU_SAMD11` - Add SAME5x option `OPT_MCU_SAME5X` - + - Fix SAMG control data toggle and stall race condition - Enhance nRF @@ -659,7 +659,7 @@ USB Device - `usbd_driver_open()` add max length argument, and return length of interface (0 for not supported). Return value is used for finding appropriate driver - Add application implemented class driver via `usbd_app_driver_get_cb()` - IAD is handled to assign driver id - + - Added `tud_descriptor_device_qualifier_cb()` callback - Optimize `tu_fifo` bulk write/read transfer - Forward non-std control request to class driver @@ -675,12 +675,12 @@ USB Device - Send zero length packet for end of data when needed - Add `tud_cdc_tx_complete_cb()` callback - Change tud_cdc_n_write_flush() return number of bytes forced to transfer, and flush when writing enough data to fifo - + - MIDI: - Add packet interface - Add multiple jack descriptors - Fix MIDI driver for sysex - + - DFU Runtime: fix response to SET_INTERFACE and DFU_GETSTATUS request - Rename some configure macro to make it clear that those are used directly for endpoint transfer @@ -688,7 +688,7 @@ USB Device - CFG_TUD_CDC_EPSIZE to CFG_TUD_CDC_EP_BUFSIZE - CFG_TUD_MSC_BUFSIZE to CFG_TUD_MSC_EP_BUFSIZE - CFG_TUD_MIDI_EPSIZE to CFG_TUD_MIDI_EP_BUFSIZE - + - HID: - Fix gamepad template descriptor - Add multiple HID interface API @@ -700,7 +700,7 @@ USB Host - Rework USB host stack (still work in progress) - Fix compile error with pipehandle - Rework usbh control and enumeration as non-blocking - + - Improve Hub, MSC, HID host driver Examples @@ -713,7 +713,7 @@ Examples - Enhance `net_lwip_webserver` example - Add multiple configuration: RNDIS for Windows, CDC-ECM for macOS (Linux will work with both) - Update lwip to STABLE-2_1_2_RELEASE for net_lwip_webserver - + - Added new Audio example: audio_test uac2_headsest New Boards diff --git a/docs/info/contributors.rst b/docs/info/contributors.rst index b3748ccb5..02608919f 120000 --- a/docs/info/contributors.rst +++ b/docs/info/contributors.rst @@ -1 +1 @@ -../../CONTRIBUTORS.rst \ No newline at end of file +../../CONTRIBUTORS.rst diff --git a/docs/reference/getting_started.rst b/docs/reference/getting_started.rst index e328757ba..ef4a6ba61 100644 --- a/docs/reference/getting_started.rst +++ b/docs/reference/getting_started.rst @@ -44,18 +44,18 @@ For your convenience, TinyUSB contains a handful of examples for both host and d $ git clone https://github.com/hathach/tinyusb tinyusb $ cd tinyusb -Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them +Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them .. code-block:: $ git submodule update --init lib -Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. +Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. Build ^^^^^ -To build example, first change directory to an example folder. +To build example, first change directory to an example folder. .. code-block:: @@ -118,7 +118,7 @@ To compile for debugging add ``DEBUG=1``\ , for example Log ~~~ -Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet. +Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet. .. code-block:: @@ -127,7 +127,7 @@ Should you have an issue running example and/or submitting an bug report. You co Logger ~~~~~~ -By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: +By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: * `LOGGER=rtt`: use `Segger RTT protocol `_ @@ -178,12 +178,12 @@ IAR Project Connection files are provided to import TinyUSB stack into your proj * Take example of STM32F0: - + - You need `stm32l0xx.h`, `startup_stm32f0xx.s`, `system_stm32f0xx.c`. - `STM32L0xx_HAL_Driver` is only needed to run examples, TinyUSB stack itself doesn't rely on MCU's SDKs. -* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects) +* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects) Click `New Group ...`, name it to `TUSB`, Click `Add Variable ...`, name it to `TUSB_DIR`, change it's value to the path of your TinyUSB stack, for example `C:\\tinyusb` diff --git a/examples/device/audio_4_channel_mic/skip.txt b/examples/device/audio_4_channel_mic/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_4_channel_mic/skip.txt +++ b/examples/device/audio_4_channel_mic/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c index a6af5fd19..26d8c48c5 100644 --- a/examples/device/audio_4_channel_mic/src/main.c +++ b/examples/device/audio_4_channel_mic/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber diff --git a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py index 9ab15135d..8312b4e28 100644 --- a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py +++ b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py @@ -31,4 +31,3 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode 4 Channel') plt.show() - \ No newline at end of file diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c index 8929f3057..8bf9eebc4 100644 --- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c +++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt index cb321f9a8..f6e10e2ea 100644 --- a/examples/device/audio_test/CMakeLists.txt +++ b/examples/device/audio_test/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/audio_test/skip.txt b/examples/device/audio_test/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_test/skip.txt +++ b/examples/device/audio_test/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c index 56961e427..f9cc63cdd 100644 --- a/examples/device/audio_test/src/main.c +++ b/examples/device/audio_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber diff --git a/examples/device/audio_test/src/plot_audio_samples.py b/examples/device/audio_test/src/plot_audio_samples.py index 2303df3d0..1504684a6 100644 --- a/examples/device/audio_test/src/plot_audio_samples.py +++ b/examples/device/audio_test/src/plot_audio_samples.py @@ -32,7 +32,6 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode') plt.show() - + samples = np.array(myrecording) np.savetxt('Output.csv', samples, delimiter=",", fmt='%s') - \ No newline at end of file diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c index da3e203d7..891e90802 100644 --- a/examples/device/audio_test/src/usb_descriptors.c +++ b/examples/device/audio_test/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt index cb321f9a8..f6e10e2ea 100644 --- a/examples/device/audio_test_multi_rate/CMakeLists.txt +++ b/examples/device/audio_test_multi_rate/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/audio_test_multi_rate/skip.txt b/examples/device/audio_test_multi_rate/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_test_multi_rate/skip.txt +++ b/examples/device/audio_test_multi_rate/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c index 0e11a509b..4dd53dd34 100644 --- a/examples/device/audio_test_multi_rate/src/main.c +++ b/examples/device/audio_test_multi_rate/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber @@ -165,7 +165,7 @@ bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_reque (void)rhport; //uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex)); uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue)); - + // Clear buffer when streaming format is changed if(alt != 0) { @@ -257,7 +257,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * return false; } } - + // Clock Source unit if ( entityID == UAC2_ENTITY_CLOCK ) { @@ -279,7 +279,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * return false; } } - + return false; // Yet not implemented } @@ -491,7 +491,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin pData_32[cnt] = (uint32_t)startVal++ << 16U; } } - + return true; } diff --git a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py index 4a5f15a9c..c92e49957 100644 --- a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py +++ b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py @@ -32,7 +32,6 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode') plt.show() - + samples = np.array(myrecording) np.savetxt('Output.csv', samples, delimiter=",", fmt='%s') - \ No newline at end of file diff --git a/examples/device/audio_test_multi_rate/src/tusb_config.h b/examples/device/audio_test_multi_rate/src/tusb_config.h index d8b6511d6..1c8288bce 100644 --- a/examples/device/audio_test_multi_rate/src/tusb_config.h +++ b/examples/device/audio_test_multi_rate/src/tusb_config.h @@ -111,7 +111,7 @@ extern "C" { // How many formats are used, need to adjust USB descriptor if changed #define CFG_TUD_AUDIO_FUNC_1_N_FORMATS 2 - + // 16bit in 16bit slots #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX 2 #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX 16 diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c index 92e791a72..276bf8aa0 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h index 77e2fe6c1..8d8a03e49 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 HiFiPhile @@ -99,4 +99,4 @@ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) -#endif \ No newline at end of file +#endif diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt index e4e1f4e9a..37625f441 100644 --- a/examples/device/board_test/src/CMakeLists.txt +++ b/examples/device/board_test/src/CMakeLists.txt @@ -2,7 +2,7 @@ idf_component_register(SRCS "main.c" INCLUDE_DIRS "." REQUIRES freertos soc) - + file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake) if(EXISTS ${board_cmake}) diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c index 0289ca15f..e8e393717 100644 --- a/examples/device/board_test/src/main.c +++ b/examples/device/board_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/cdc_dual_ports/CMakeLists.txt +++ b/examples/device/cdc_dual_ports/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c index 0264f0566..c0296191b 100644 --- a/examples/device/cdc_dual_ports/src/main.c +++ b/examples/device/cdc_dual_ports/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c index 4eb8c7c27..8be404cc9 100644 --- a/examples/device/cdc_dual_ports/src/usb_descriptors.c +++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/examples/device/cdc_msc/CMakeLists.txt +++ b/examples/device/cdc_msc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/cdc_msc/skip.txt b/examples/device/cdc_msc/skip.txt index d844feae8..eadb6e74a 100644 --- a/examples/device/cdc_msc/skip.txt +++ b/examples/device/cdc_msc/skip.txt @@ -1 +1 @@ -mcu:SAMD11 \ No newline at end of file +mcu:SAMD11 diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c index c83299e59..207dd728c 100644 --- a/examples/device/cdc_msc/src/main.c +++ b/examples/device/cdc_msc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c index e67e381ce..f8f37a577 100644 --- a/examples/device/cdc_msc/src/msc_disk.c +++ b/examples/device/cdc_msc/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c index 6b59ed50f..44c849277 100644 --- a/examples/device/cdc_msc/src/usb_descriptors.c +++ b/examples/device/cdc_msc/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index cfb14aa2b..0e8a24d02 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c index a895f4738..707c8d578 100644 --- a/examples/device/cdc_msc_freertos/src/msc_disk.c +++ b/examples/device/cdc_msc_freertos/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c index 30a712275..822442724 100644 --- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c +++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/dfu_runtime/CMakeLists.txt +++ b/examples/device/dfu_runtime/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c index bd9a91c27..4ec2fa31d 100644 --- a/examples/device/dfu_runtime/src/main.c +++ b/examples/device/dfu_runtime/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/examples/device/dynamic_configuration/CMakeLists.txt +++ b/examples/device/dynamic_configuration/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/dynamic_configuration/skip.txt b/examples/device/dynamic_configuration/skip.txt index d844feae8..eadb6e74a 100644 --- a/examples/device/dynamic_configuration/skip.txt +++ b/examples/device/dynamic_configuration/skip.txt @@ -1 +1 @@ -mcu:SAMD11 \ No newline at end of file +mcu:SAMD11 diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c index 33a603343..90794e979 100644 --- a/examples/device/dynamic_configuration/src/main.c +++ b/examples/device/dynamic_configuration/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c index e8cb03fdd..27856a1a4 100644 --- a/examples/device/dynamic_configuration/src/msc_disk.c +++ b/examples/device/dynamic_configuration/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c index 092229b99..0590bd679 100644 --- a/examples/device/dynamic_configuration/src/usb_descriptors.c +++ b/examples/device/dynamic_configuration/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_boot_interface/CMakeLists.txt +++ b/examples/device/hid_boot_interface/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile index d58a539e8..b3f2cc588 100644 --- a/examples/device/hid_boot_interface/Makefile +++ b/examples/device/hid_boot_interface/Makefile @@ -8,7 +8,7 @@ INC += \ EXAMPLE_SOURCE = \ src/main.c \ src/usb_descriptors.c - + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) include ../../rules.mk diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c index b13428041..1a155996a 100644 --- a/examples/device/hid_boot_interface/src/main.c +++ b/examples/device/hid_boot_interface/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c index a0d7e9f15..10345ab41 100644 --- a/examples/device/hid_boot_interface/src/usb_descriptors.c +++ b/examples/device/hid_boot_interface/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.h b/examples/device/hid_boot_interface/src/usb_descriptors.h index 57cf0e2c0..6fee9e223 100644 --- a/examples/device/hid_boot_interface/src/usb_descriptors.h +++ b/examples/device/hid_boot_interface/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_composite/CMakeLists.txt +++ b/examples/device/hid_composite/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c index 05315f266..4edb045c2 100644 --- a/examples/device/hid_composite/src/main.c +++ b/examples/device/hid_composite/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c index 2988baee2..347bbf29a 100644 --- a/examples/device/hid_composite/src/usb_descriptors.c +++ b/examples/device/hid_composite/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/src/usb_descriptors.h b/examples/device/hid_composite/src/usb_descriptors.h index ca8925ad9..e733d31dd 100644 --- a/examples/device/hid_composite/src/usb_descriptors.h +++ b/examples/device/hid_composite/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c index 7c9619c4b..ca02af100 100644 --- a/examples/device/hid_composite_freertos/src/main.c +++ b/examples/device/hid_composite_freertos/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c index 4df12d3db..30f327d5e 100644 --- a/examples/device/hid_composite_freertos/src/usb_descriptors.c +++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.h b/examples/device/hid_composite_freertos/src/usb_descriptors.h index ca8925ad9..e733d31dd 100644 --- a/examples/device/hid_composite_freertos/src/usb_descriptors.h +++ b/examples/device/hid_composite_freertos/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_generic_inout/CMakeLists.txt +++ b/examples/device/hid_generic_inout/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_generic_inout/hid_test.js b/examples/device/hid_generic_inout/hid_test.js index daa958fd5..16bc723e2 100644 --- a/examples/device/hid_generic_inout/hid_test.js +++ b/examples/device/hid_generic_inout/hid_test.js @@ -48,7 +48,7 @@ if( deviceInfo ) { function anySupportedBoard(d) { - + for (var key in boards) { if (boards.hasOwnProperty(key)) { if (isDevice(boards[key],d)) { @@ -65,4 +65,3 @@ function isDevice(board,d){ // product id 0xff is matches all return d.vendorId==board[0] && (d.productId==board[1] || board[1] == 0xFFFF); } - diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c index 5b7daf118..6649b49b5 100644 --- a/examples/device/hid_generic_inout/src/main.c +++ b/examples/device/hid_generic_inout/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c index cd4838407..8377a0f47 100644 --- a/examples/device/hid_generic_inout/src/usb_descriptors.c +++ b/examples/device/hid_generic_inout/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_multiple_interface/CMakeLists.txt +++ b/examples/device/hid_multiple_interface/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/midi_test/CMakeLists.txt +++ b/examples/device/midi_test/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c index 3310348bd..66fa72063 100644 --- a/examples/device/midi_test/src/main.c +++ b/examples/device/midi_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c index c84a873b1..4845dcf57 100644 --- a/examples/device/midi_test/src/usb_descriptors.c +++ b/examples/device/midi_test/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt index 9e834ae21..9188ab06c 100644 --- a/examples/device/msc_dual_lun/CMakeLists.txt +++ b/examples/device/msc_dual_lun/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/msc_dual_lun/skip.txt b/examples/device/msc_dual_lun/skip.txt index 3549c702a..47e561cf0 100644 --- a/examples/device/msc_dual_lun/skip.txt +++ b/examples/device/msc_dual_lun/skip.txt @@ -1,2 +1,2 @@ mcu:SAMD11 -mcu:MKL25ZXX \ No newline at end of file +mcu:MKL25ZXX diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c index 96790d20c..0a7284939 100644 --- a/examples/device/msc_dual_lun/src/main.c +++ b/examples/device/msc_dual_lun/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c index 2b773b43b..b1047acdb 100644 --- a/examples/device/msc_dual_lun/src/msc_disk_dual.c +++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c index d8dbb5ce3..2de81111c 100644 --- a/examples/device/msc_dual_lun/src/usb_descriptors.c +++ b/examples/device/msc_dual_lun/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt index 9fe1a325e..5f1e37931 100644 --- a/examples/device/net_lwip_webserver/CMakeLists.txt +++ b/examples/device/net_lwip_webserver/CMakeLists.txt @@ -80,4 +80,4 @@ if (EXISTS ${TOP}/lib/lwip/src) # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) -endif() \ No newline at end of file +endif() diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt index 68761b058..b0e5235ac 100644 --- a/examples/device/net_lwip_webserver/skip.txt +++ b/examples/device/net_lwip_webserver/skip.txt @@ -7,4 +7,4 @@ mcu:STM32L0 mcu:MKL25ZXX family:broadcom_64bit family:broadcom_32bit -board:curiosity_nano \ No newline at end of file +board:curiosity_nano diff --git a/examples/device/net_lwip_webserver/src/arch/cc.h b/examples/device/net_lwip_webserver/src/arch/cc.h index 56a0cacf7..9f30b91cb 100644 --- a/examples/device/net_lwip_webserver/src/arch/cc.h +++ b/examples/device/net_lwip_webserver/src/arch/cc.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Adam Dunkels * */ @@ -42,7 +42,7 @@ typedef int sys_prot_t; #if defined (__ICCARM__) #define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x #define PACK_STRUCT_USE_INCLUDES @@ -50,7 +50,7 @@ typedef int sys_prot_t; #elif defined (__CC_ARM) #define PACK_STRUCT_BEGIN __packed -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x diff --git a/examples/device/net_lwip_webserver/src/lwipopts.h b/examples/device/net_lwip_webserver/src/lwipopts.h index a215017c7..336c9243d 100644 --- a/examples/device/net_lwip_webserver/src/lwipopts.h +++ b/examples/device/net_lwip_webserver/src/lwipopts.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Simon Goldschmidt * */ diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c index 33b4d38b6..88081ffe2 100644 --- a/examples/device/net_lwip_webserver/src/main.c +++ b/examples/device/net_lwip_webserver/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence @@ -39,7 +39,7 @@ and likely their manufacturer has not tested such functionality. Some code work The smartphone may only have an ECM driver, but refuse to automatically pick ECM (unlike the OSes above); try modifying ./examples/devices/net_lwip_webserver/usb_descriptors.c so that CONFIG_ID_ECM is default. -The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens, +The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens, try changing the first byte of tud_network_mac_address[] below from 0x02 to 0x00 (clearing bit 1). */ @@ -170,7 +170,7 @@ bool dns_query_proc(const char *name, ip4_addr_t *addr) bool tud_network_recv_cb(const uint8_t *src, uint16_t size) { - /* this shouldn't happen, but if we get another packet before + /* this shouldn't happen, but if we get another packet before parsing the previous, we must signal our inability to accept it */ if (received_frame) return false; diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c index bee51790a..3c0ed3db7 100644 --- a/examples/device/net_lwip_webserver/src/usb_descriptors.c +++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -77,7 +77,7 @@ tusb_desc_device_t const desc_device = .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, .bDeviceProtocol = MISC_PROTOCOL_IAD, - + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, .idVendor = 0xCafe, diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/uac2_headset/CMakeLists.txt +++ b/examples/device/uac2_headset/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c index 01707d51b..bafd40d34 100644 --- a/examples/device/uac2_headset/src/main.c +++ b/examples/device/uac2_headset/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg @@ -176,7 +176,7 @@ static bool tud_audio_clock_get_request(uint8_t rhport, audio_control_request_t rangef.subrange[i].bRes = 0; TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes); } - + return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &rangef, sizeof(rangef)); } } diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c index 07c86b903..0a0b4c602 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.c +++ b/examples/device/uac2_headset/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 342b4fac1..5525c916a 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenbreg diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt index c49603c26..b4678dc5e 100644 --- a/examples/device/usbtmc/CMakeLists.txt +++ b/examples/device/usbtmc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c index 6945d8743..da7f0418a 100644 --- a/examples/device/usbtmc/src/main.c +++ b/examples/device/usbtmc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/usbtmc/visaQuery.py b/examples/device/usbtmc/visaQuery.py index c4e5ad2b9..ca65daf97 100644 --- a/examples/device/usbtmc/visaQuery.py +++ b/examples/device/usbtmc/visaQuery.py @@ -36,8 +36,8 @@ def test_trig(): time.sleep(0.3) # SRQ may have some delay assert (inst.read_stb() & 0x40), "SRQ not set after 0.3 seconds" assert (inst.read_stb() == 0) - - + + def test_mav(): inst.write("delay 50") inst.read_stb() # clear STB @@ -45,15 +45,15 @@ def test_mav(): inst.write("123") time.sleep(0.3) assert (inst.read_stb() & 0x10), "MAV not set after 0.5 seconds" - + rsp = inst.read() assert(rsp == "123\r\n") - - + + def test_srq(): assert (inst.read_stb() == 0) inst.write("123") - + #inst.enable_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE) #waitrsp = inst.wait_on_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, 5000) #inst.discard_events(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE) @@ -64,7 +64,7 @@ def test_srq(): assert (stb == 0x50),msg assert (inst.read_stb() == 0x10), "SRQ set at second read!" - + rsp = inst.read() assert(rsp == "123\r\n") @@ -110,7 +110,7 @@ def test_abort_in(): inst.timeout = 800 y = inst.read() assert(y == "xxx\r\n") - + def test_indicate(): # perform indicator pulse usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM) @@ -120,8 +120,8 @@ def test_indicate(): assert(retv == b'\x01') else: assert((retv[1] == pyvisa.constants.StatusCode(0)) and (retv[0] == b'\x01')), f"indicator pulse failed: retv={retv}" - - + + def test_multi_read(): old_chunk_size = inst.chunk_size longstr = "0123456789abcdefghijklmnopqrstuvwxyz" * 10 @@ -133,7 +133,7 @@ def test_multi_read(): y = inst.read() assert (x + "\r\n" == y) #inst.chunk_size = old_chunk_size - + def test_stall_ep0(): usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM) inst.read_stb() @@ -143,7 +143,7 @@ def test_stall_ep0(): assert(False) except pyvisa.VisaIOError: pass - + assert (inst.read_stb() == 0) @@ -153,7 +153,7 @@ print(reslist) if (len(reslist) == 0): sys.exit() - + inst = rm.open_resource(reslist[0]); inst.timeout = 3000 diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt index b92a2b804..f1ef247e1 100644 --- a/examples/device/video_capture/CMakeLists.txt +++ b/examples/device/video_capture/CMakeLists.txt @@ -31,4 +31,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 3ceebe821..08db1b00f 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index 0cf772010..af18d15d1 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index f1ed3c8e9..93f148a82 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenbreg diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/webusb_serial/CMakeLists.txt +++ b/examples/device/webusb_serial/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c index 604d30a83..24456f9f3 100644 --- a/examples/device/webusb_serial/src/main.c +++ b/examples/device/webusb_serial/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c index 99f5caaf9..b2593001c 100644 --- a/examples/device/webusb_serial/src/usb_descriptors.c +++ b/examples/device/webusb_serial/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/webusb_serial/src/usb_descriptors.h b/examples/device/webusb_serial/src/usb_descriptors.h index 19f1ff3f3..a1c4a2cf1 100644 --- a/examples/device/webusb_serial/src/usb_descriptors.h +++ b/examples/device/webusb_serial/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c index bd7870274..817c63c70 100644 --- a/examples/dual/host_hid_to_device_cdc/src/main.c +++ b/examples/dual/host_hid_to_device_cdc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c index 6b0a89127..63b6bc603 100644 --- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c +++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c index 51cab2de0..bb7fa850e 100644 --- a/examples/host/bare_api/src/main.c +++ b/examples/host/bare_api/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index b34810252..23312296f 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 797d55f8a..e9c9676b8 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -68,4 +68,3 @@ void tuh_msc_umount_cb(uint8_t dev_addr) (void) dev_addr; printf("A MassStorage device is unmounted\r\n"); } - diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c index 299a3ff10..3380e9246 100644 --- a/examples/host/hid_controller/src/main.c +++ b/examples/host/hid_controller/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c index ab2cfd498..40c88a7d3 100644 --- a/examples/host/msc_file_explorer/src/main.c +++ b/examples/host/msc_file_explorer/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c index eef28fe12..003e2865b 100644 --- a/examples/host/msc_file_explorer/src/msc_app.c +++ b/examples/host/msc_file_explorer/src/msc_app.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/rules.mk b/examples/rules.mk index f8e4001ec..56ad89fd0 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -283,4 +283,4 @@ copy-artifact: $(BIN) # Print out the value of a make variable. # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile print-%: - @echo $* = $($*) \ No newline at end of file + @echo $* = $($*) diff --git a/hw/bsp/ansi_escape.h b/hw/bsp/ansi_escape.h index 6e62ee20a..15af2f3ab 100644 --- a/hw/bsp/ansi_escape.h +++ b/hw/bsp/ansi_escape.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 14858c2b6..e715bdf2e 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/board.h b/hw/bsp/board.h index 0a10294d0..036556731 100644 --- a/hw/bsp/board.h +++ b/hw/bsp/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk index 52e9e45c4..77811d18d 100644 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk @@ -2,4 +2,4 @@ CFLAGS += -mcpu=arm1176jzf-s \ -DBCM_VERSION=2835 \ -DCFG_TUSB_MCU=OPT_MCU_BCM2835 -SUFFIX = +SUFFIX = diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c index f7a11fb49..42ad4b666 100644 --- a/hw/bsp/broadcom_32bit/family.c +++ b/hw/bsp/broadcom_32bit/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c index f7a11fb49..42ad4b666 100644 --- a/hw/bsp/broadcom_64bit/family.c +++ b/hw/bsp/broadcom_64bit/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c index 3b6b03904..f812c922f 100644 --- a/hw/bsp/brtmm90x/family.c +++ b/hw/bsp/brtmm90x/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2021 Bridgetek Pte Ltd @@ -70,7 +70,7 @@ void board_init(void) board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG)); #ifdef BOARD_GPIO_LED - gpio_function(BOARD_GPIO_LED, pad_func_0); + gpio_function(BOARD_GPIO_LED, pad_func_0); gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA); gpio_dir(BOARD_GPIO_LED, pad_dir_output); #endif @@ -233,7 +233,7 @@ int board_uart_write(void const *buf, int len) uint32_t board_millis(void) { uint32_t safe_ms; - + CRITICAL_SECTION_BEGIN safe_ms = timer_ms; CRITICAL_SECTION_END @@ -254,4 +254,3 @@ void chip_reboot(void) dbg_memory_copy(0xfe, 0, 0, 255); #endif } - diff --git a/hw/bsp/brtmm90x/family.mk b/hw/bsp/brtmm90x/family.mk index 0ddf47a3a..6df0bfdfe 100644 --- a/hw/bsp/brtmm90x/family.mk +++ b/hw/bsp/brtmm90x/family.mk @@ -5,7 +5,7 @@ SKIP_NANOLIB = 1 # Set to use FT90X prebuilt libraries. FT9XX_PREBUILT_LIBS = 0 ifeq ($(FT9XX_PREBUILT_LIBS),1) -# If the FT90X toolchain is installed on Windows systems then the SDK +# If the FT90X toolchain is installed on Windows systems then the SDK # include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware INC += "$(FT9XX_SDK)/include" @@ -21,7 +21,7 @@ endif # Add include files which are within the TinyUSB directory structure. INC += \ - $(TOP)/$(BOARD_PATH) + $(TOP)/$(BOARD_PATH) # Add required C Compiler flags for FT90X. CFLAGS += \ @@ -30,7 +30,7 @@ CFLAGS += \ -fvar-tracking-assignments \ -fmessage-length=0 \ -ffunction-sections \ - -DCFG_TUSB_MCU=OPT_MCU_FT90X + -DCFG_TUSB_MCU=OPT_MCU_FT90X # Maximum USB device speed supported by the board CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED @@ -45,7 +45,7 @@ LDFLAGS += $(addprefix -L,$(LDINC)) \ -Wl,-lc # Additional Source files for FT90X. -SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c +SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c # Linker library. ifneq ($(FT9XX_PREBUILT_LIBS),1) diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h index 0eab34916..7b488096e 100644 --- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h +++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2023 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c index 45fc9e3aa..db3551ca7 100644 --- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c +++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c @@ -36,7 +36,7 @@ static unsigned int tx_produce; static volatile unsigned int tx_consume; void USART1_IRQHandler(void) __attribute__((naked)); -void USART1_IRQHandler(void) { +void USART1_IRQHandler(void) { __asm volatile ("call USART1_IRQHandler_impl; mret"); } @@ -57,7 +57,7 @@ __attribute__((used)) void USART1_IRQHandler_impl(void) void uart_write(char c) { unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; - + NVIC_DisableIRQ(USART1_IRQn); if((tx_consume != tx_produce) || (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)) { tx_buf[tx_produce] = c; diff --git a/hw/bsp/ch32v307/ch32v307.ld b/hw/bsp/ch32v307/ch32v307.ld index af7c06615..55bd10cd0 100644 --- a/hw/bsp/ch32v307/ch32v307.ld +++ b/hw/bsp/ch32v307/ch32v307.ld @@ -41,7 +41,7 @@ SECTIONS *(.glue_7t) *(.gnu.linkonce.t.*) . = ALIGN(4); - } >FLASH AT>FLASH + } >FLASH AT>FLASH .fini : { @@ -50,31 +50,31 @@ SECTIONS } >FLASH AT>FLASH PROVIDE( _etext = . ); - PROVIDE( _eitcm = . ); + PROVIDE( _eitcm = . ); .preinit_array : { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .init_array : { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .ctors : { /* gcc uses crtbegin.o to find the start of @@ -95,8 +95,8 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .dtors : { KEEP (*crtbegin.o(.dtors)) @@ -104,17 +104,17 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } >FLASH AT>FLASH + } >FLASH AT>FLASH .dalign : { . = ALIGN(4); PROVIDE(_data_vma = .); - } >RAM AT>FLASH + } >RAM AT>FLASH .dlalign : { - . = ALIGN(4); + . = ALIGN(4); PROVIDE(_data_lma = .); } >FLASH AT>FLASH @@ -145,7 +145,7 @@ SECTIONS *(.sbss*) *(.gnu.linkonce.sb.*) *(.bss*) - *(.gnu.linkonce.b.*) + *(.gnu.linkonce.b.*) *(COMMON*) . = ALIGN(4); PROVIDE( _ebss = .); @@ -156,15 +156,12 @@ SECTIONS .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size : { - PROVIDE( _heap_end = . ); + PROVIDE( _heap_end = . ); . = ALIGN(4); PROVIDE(_susrstack = . ); . = . + __stack_size; PROVIDE( _eusrstack = .); __freertos_irq_stack_top = .; - } >RAM + } >RAM } - - - diff --git a/hw/bsp/ch32v307/ch32v30x_conf.h b/hw/bsp/ch32v307/ch32v30x_conf.h index 399feaf68..0b86ad390 100644 --- a/hw/bsp/ch32v307/ch32v30x_conf.h +++ b/hw/bsp/ch32v307/ch32v30x_conf.h @@ -6,7 +6,7 @@ * Description : Library configuration file. * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 -*******************************************************************************/ +*******************************************************************************/ #ifndef __CH32V30x_CONF_H #define __CH32V30x_CONF_H @@ -36,8 +36,3 @@ #endif /* __CH32V30x_CONF_H */ - - - - - diff --git a/hw/bsp/ch32v307/ch32v30x_it.c b/hw/bsp/ch32v307/ch32v30x_it.c index d348dd989..c329c5613 100644 --- a/hw/bsp/ch32v307/ch32v30x_it.c +++ b/hw/bsp/ch32v307/ch32v30x_it.c @@ -45,5 +45,3 @@ __attribute__((used)) void HardFault_Handler_impl(void) { } } - - diff --git a/hw/bsp/ch32v307/ch32v30x_it.h b/hw/bsp/ch32v307/ch32v30x_it.h index 42f285edf..f3977a8be 100644 --- a/hw/bsp/ch32v307/ch32v30x_it.h +++ b/hw/bsp/ch32v307/ch32v30x_it.h @@ -14,5 +14,3 @@ #endif /* __CH32V30x_IT_H */ - - diff --git a/hw/bsp/ch32v307/core_riscv.h b/hw/bsp/ch32v307/core_riscv.h index 2e94ec683..a7ce10a00 100644 --- a/hw/bsp/ch32v307/core_riscv.h +++ b/hw/bsp/ch32v307/core_riscv.h @@ -336,7 +336,7 @@ RV_STATIC_INLINE void NVIC_SystemReset(void) } -/* Core_Exported_Functions */ +/* Core_Exported_Functions */ extern uint32_t __get_FFLAGS(void); extern void __set_FFLAGS(uint32_t value); extern uint32_t __get_FRM(void); @@ -377,8 +377,3 @@ extern uint32_t __get_SP(void); #endif - - - - - diff --git a/hw/bsp/ch32v307/system_ch32v30x.c b/hw/bsp/ch32v307/system_ch32v30x.c index 12b18d7b8..23f783df4 100644 --- a/hw/bsp/ch32v307/system_ch32v30x.c +++ b/hw/bsp/ch32v307/system_ch32v30x.c @@ -8,17 +8,17 @@ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ -#include "ch32v30x.h" +#include "ch32v30x.h" -/* -* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after +/* +* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after * reset the HSI is used as SYSCLK source). -* If none of the define below is enabled, the HSI is used as System clock source. +* If none of the define below is enabled, the HSI is used as System clock source. */ // #define SYSCLK_FREQ_HSE HSE_VALUE -/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ //#define SYSCLK_FREQ_48MHz 48000000 -/* #define SYSCLK_FREQ_56MHz 56000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ //#define SYSCLK_FREQ_72MHz 72000000 //#define SYSCLK_FREQ_96MHz 96000000 //#define SYSCLK_FREQ_120MHz 120000000 @@ -60,7 +60,7 @@ static void SetSysClock(void); #elif defined SYSCLK_FREQ_48MHz static void SetSysClockTo48(void); #elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); + static void SetSysClockTo56(void); #elif defined SYSCLK_FREQ_72MHz static void SetSysClockTo72(void); @@ -90,7 +90,7 @@ void SystemInit (void) RCC->CFGR0 &= (uint32_t)0xF8FF0000; #else RCC->CFGR0 &= (uint32_t)0xF0FF0000; -#endif +#endif RCC->CTLR &= (uint32_t)0xFEF6FFFF; RCC->CTLR &= (uint32_t)0xFFFBFFFF; @@ -101,8 +101,8 @@ void SystemInit (void) RCC->INTR = 0x00FF0000; RCC->CFGR2 = 0x00000000; #else - RCC->INTR = 0x009F0000; -#endif + RCC->INTR = 0x009F0000; +#endif SetSysClock(); } @@ -118,18 +118,18 @@ void SystemCoreClockUpdate (void) uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0; tmp = RCC->CFGR0 & RCC_SWS; - + switch (tmp) { case 0x00: SystemCoreClock = HSI_VALUE; break; - case 0x04: + case 0x04: SystemCoreClock = HSE_VALUE; break; - case 0x08: + case 0x08: pllmull = RCC->CFGR0 & RCC_PLLMULL; - pllsource = RCC->CFGR0 & RCC_PLLSRC; + pllsource = RCC->CFGR0 & RCC_PLLSRC; pllmull = ( pllmull >> 18) + 2; #ifdef CH32V30x_D8 @@ -149,7 +149,7 @@ void SystemCoreClockUpdate (void) SystemCoreClock = (HSI_VALUE >> 1) * pllmull; } else - { + { if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET) { SystemCoreClock = (HSE_VALUE >> 1) * pllmull; @@ -167,9 +167,9 @@ void SystemCoreClockUpdate (void) SystemCoreClock = HSI_VALUE; break; } - + tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; - SystemCoreClock >>= tmp; + SystemCoreClock >>= tmp; } /********************************************************************* @@ -188,7 +188,7 @@ static void SetSysClock(void) #elif defined SYSCLK_FREQ_48MHz SetSysClockTo48(); #elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); + SetSysClockTo56(); #elif defined SYSCLK_FREQ_72MHz SetSysClockTo72(); #elif defined SYSCLK_FREQ_96MHz @@ -199,9 +199,9 @@ static void SetSysClock(void) SetSysClockTo144(); #endif - + /* If none of the define above is enabled, the HSI is used as System clock - * source (default after reset) + * source (default after reset) */ } @@ -218,14 +218,14 @@ static void SetSysClock(void) static void SetSysClockToHSE(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -235,20 +235,20 @@ static void SetSysClockToHSE(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; - + /* Select HSE as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; /* Wait till HSE is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) @@ -256,11 +256,11 @@ static void SetSysClockToHSE(void) } } else - { + { /* If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_24MHz @@ -275,14 +275,14 @@ static void SetSysClockToHSE(void) static void SetSysClockTo24(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -292,13 +292,13 @@ static void SetSysClockTo24(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; @@ -318,18 +318,18 @@ static void SetSysClockTo24(void) } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_48MHz @@ -344,14 +344,14 @@ static void SetSysClockTo24(void) static void SetSysClockTo48(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - + + RCC->CTLR |= ((uint32_t)RCC_HSEON); /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -361,14 +361,14 @@ static void SetSysClockTo48(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; @@ -389,19 +389,19 @@ static void SetSysClockTo48(void) } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_56MHz @@ -416,14 +416,14 @@ static void SetSysClockTo48(void) static void SetSysClockTo56(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -433,17 +433,17 @@ static void SetSysClockTo56(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; - + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); @@ -462,19 +462,19 @@ static void SetSysClockTo56(void) /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_72MHz @@ -489,14 +489,14 @@ static void SetSysClockTo56(void) static void SetSysClockTo72(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -506,17 +506,17 @@ static void SetSysClockTo72(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; - + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); @@ -532,20 +532,20 @@ static void SetSysClockTo72(void) /* Wait till PLL is ready */ while((RCC->CTLR & RCC_PLLRDY) == 0) { - } + } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ } } diff --git a/hw/bsp/ch32v307/system_ch32v30x.h b/hw/bsp/ch32v307/system_ch32v30x.h index 0e0ef4e51..ad81058c7 100644 --- a/hw/bsp/ch32v307/system_ch32v30x.h +++ b/hw/bsp/ch32v307/system_ch32v30x.h @@ -7,16 +7,16 @@ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ -#ifndef __SYSTEM_CH32V30x_H +#ifndef __SYSTEM_CH32V30x_H #define __SYSTEM_CH32V30x_H #ifdef __cplusplus extern "C" { -#endif +#endif extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ -/* System_Exported_Functions */ +/* System_Exported_Functions */ extern void SystemInit(void); extern void SystemCoreClockUpdate(void); @@ -25,6 +25,3 @@ extern void SystemCoreClockUpdate(void); #endif #endif /*__CH32V30x_SYSTEM_H */ - - - diff --git a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c index a4d996810..3abb488f2 100644 --- a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c +++ b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/hw/bsp/da14695_dk_usb/da1469x.ld b/hw/bsp/da14695_dk_usb/da1469x.ld index 96507d6e7..8cc1d9d99 100644 --- a/hw/bsp/da14695_dk_usb/da1469x.ld +++ b/hw/bsp/da14695_dk_usb/da1469x.ld @@ -242,4 +242,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c index 13113fb95..abe7f54cb 100644 --- a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c +++ b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/hw/bsp/da1469x_dk_pro/da1469x.ld b/hw/bsp/da1469x_dk_pro/da1469x.ld index 96507d6e7..8cc1d9d99 100644 --- a/hw/bsp/da1469x_dk_pro/da1469x.ld +++ b/hw/bsp/da1469x_dk_pro/da1469x.ld @@ -242,4 +242,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c index 7150ed393..ace72fef0 100644 --- a/hw/bsp/ea4088qs/ea4088qs.c +++ b/hw/bsp/ea4088qs/ea4088qs.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ea4088qs/lpc4088.ld b/hw/bsp/ea4088qs/lpc4088.ld index 4b1cddd6e..5897707f6 100644 --- a/hw/bsp/ea4088qs/lpc4088.ld +++ b/hw/bsp/ea4088qs/lpc4088.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */ - RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */ + RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc64 = 0x10000000 ; /* RamLoc64 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */ - __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */ - __base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */ - __base_RAM2 = 0x20000000 ; /* RAM2 */ - __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc64 = 0x10000000 ; /* RamLoc64 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */ + __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */ + __base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */ + __base_RAM2 = 0x20000000 ; /* RAM2 */ + __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamPeriph32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamPeriph32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamPeriph32 + } > RamPeriph32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamPeriph32*) . = ALIGN(4) ; - } > RamPeriph32 + } > RamPeriph32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc64 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c index f88d3b89e..68bcaa123 100644 --- a/hw/bsp/ea4357/ea4357.c +++ b/hw/bsp/ea4357/ea4357.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ea4357/lpc4357.ld b/hw/bsp/ea4357/lpc4357.ld index 14a0df328..e3dfbfda1 100644 --- a/hw/bsp/ea4357/lpc4357.ld +++ b/hw/bsp/ea4357/lpc4357.ld @@ -11,44 +11,44 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ - __base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ - __base_Flash = 0x1a000000 ; /* Flash */ - __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ - __base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ - __base_Flash2 = 0x1b000000 ; /* Flash2 */ - __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ - __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ - __base_RAM2 = 0x10080000 ; /* RAM2 */ - __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ - __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ - __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ - __base_RAM4 = 0x20008000 ; /* RAM4 */ - __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ - __base_RAM5 = 0x2000c000 ; /* RAM5 */ - __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ + __base_Flash = 0x1a000000 ; /* Flash */ + __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ + __base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ + __base_Flash2 = 0x1b000000 ; /* Flash2 */ + __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ + __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ + __base_RAM2 = 0x10080000 ; /* RAM2 */ + __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ + __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ + __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ + __base_RAM4 = 0x20008000 ; /* RAM4 */ + __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ + __base_RAM5 = 0x2000c000 ; /* RAM5 */ + __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -119,9 +119,9 @@ SECTIONS } > MFlashA512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlashA512 @@ -135,7 +135,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -216,7 +216,7 @@ SECTIONS *(.bss.$RamLoc40*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamLoc40 + } > RamLoc40 /* BSS section for RamAHB32 */ .bss_RAM3 : ALIGN(4) @@ -226,7 +226,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamAHB32 + } > RamAHB32 /* BSS section for RamAHB16 */ .bss_RAM4 : ALIGN(4) @@ -236,7 +236,7 @@ SECTIONS *(.bss.$RamAHB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM4 = .) ; - } > RamAHB16 + } > RamAHB16 /* BSS section for RamAHB_ETB16 */ .bss_RAM5 : ALIGN(4) @@ -246,7 +246,7 @@ SECTIONS *(.bss.$RamAHB_ETB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM5 = .) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -265,7 +265,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamLoc40*) . = ALIGN(4) ; - } > RamLoc40 + } > RamLoc40 /* NOINIT section for RamAHB32 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -273,7 +273,7 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* NOINIT section for RamAHB16 */ .noinit_RAM4 (NOLOAD) : ALIGN(4) @@ -281,7 +281,7 @@ SECTIONS *(.noinit.$RAM4*) *(.noinit.$RamAHB16*) . = ALIGN(4) ; - } > RamAHB16 + } > RamAHB16 /* NOINIT section for RamAHB_ETB16 */ .noinit_RAM5 (NOLOAD) : ALIGN(4) @@ -289,13 +289,13 @@ SECTIONS *(.noinit.$RAM5*) *(.noinit.$RamAHB_ETB16*) . = ALIGN(4) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -303,11 +303,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -321,4 +321,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/ea4357/pca9532.c b/hw/bsp/ea4357/pca9532.c index eae3805c2..150167cde 100644 --- a/hw/bsp/ea4357/pca9532.c +++ b/hw/bsp/ea4357/pca9532.c @@ -57,7 +57,7 @@ static uint16_t ledStateShadow = 0; * Local Functions *****************************************************************************/ -static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) +static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) { I2CM_XFER_T i2cData; @@ -75,7 +75,7 @@ static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) return SUCCESS; } -static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) +static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) { I2CM_XFER_T i2cData; @@ -181,7 +181,7 @@ uint16_t pca9532_getLedState (uint32_t shadow) * A blinking LED may be reported as on or off depending on * its state when reading the Input register. */ - + buf[0] = PCA9532_INPUT0; I2CWrite(PCA9532_I2C_ADDR, buf, 1); diff --git a/hw/bsp/ea4357/pca9532.h b/hw/bsp/ea4357/pca9532.h index 7a7c6e145..f21c1ff09 100644 --- a/hw/bsp/ea4357/pca9532.h +++ b/hw/bsp/ea4357/pca9532.h @@ -48,7 +48,7 @@ #define KEY_MASK 0x000F /* - * MMC Card Detect and MMC Write Protect are mapped to LED4 + * MMC Card Detect and MMC Write Protect are mapped to LED4 * and LED5 on the PCA9532. Please note that WP is active low. */ diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt index c3c687a70..ff90acbde 100644 --- a/hw/bsp/esp32s2/boards/CMakeLists.txt +++ b/hw/bsp/esp32s2/boards/CMakeLists.txt @@ -8,5 +8,5 @@ include("${BOARD}/board.cmake") target_include_directories(${COMPONENT_TARGET} PUBLIC "${TOP}/hw" - "${TOP}/src" + "${TOP}/src" ) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake index d33962676..e39ceb887 100644 --- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h index 43e00901d..1f8dc2cea 100644 --- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake index d33962676..e39ceb887 100644 --- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h index 16e30b685..084a7aaf2 100644 --- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h index 49a2474bc..2ec80ef47 100644 --- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/esp32s2.c b/hw/bsp/esp32s2/boards/esp32s2.c index a7ca82deb..015d8305b 100644 --- a/hw/bsp/esp32s2/boards/esp32s2.c +++ b/hw/bsp/esp32s2/boards/esp32s2.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len) (void) buf; (void) len; return 0; } - diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake +++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h index 6bb44f76d..0acb9c439 100644 --- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h +++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake +++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h index f450b9a8b..e068efef9 100644 --- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h +++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt index 6d0fcbc86..8266c5a1c 100644 --- a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt +++ b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt @@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}" PRIV_INCLUDE_DIRS "" PRIV_REQUIRES "driver" REQUIRES "") - diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake index f3d41d041..0973adcac 100644 --- a/hw/bsp/esp32s2/family.cmake +++ b/hw/bsp/esp32s2/family.cmake @@ -1,7 +1,7 @@ cmake_minimum_required(VERSION 3.5) # Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") +set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s2) set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/family.mk b/hw/bsp/esp32s2/family.mk index b95098e15..fba0f038b 100644 --- a/hw/bsp/esp32s2/family.mk +++ b/hw/bsp/esp32s2/family.mk @@ -21,4 +21,3 @@ UF2_FAMILY_ID = 0xbfdd4eee $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin @echo CREATE $@ $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ - diff --git a/hw/bsp/esp32s3/boards/CMakeLists.txt b/hw/bsp/esp32s3/boards/CMakeLists.txt index e1b921ae9..311c6e900 100644 --- a/hw/bsp/esp32s3/boards/CMakeLists.txt +++ b/hw/bsp/esp32s3/boards/CMakeLists.txt @@ -10,5 +10,5 @@ idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PAT target_include_directories(${COMPONENT_TARGET} PUBLIC "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" - "${TOP}/src" + "${TOP}/src" ) diff --git a/hw/bsp/esp32s3/boards/esp32s3.c b/hw/bsp/esp32s3/boards/esp32s3.c index a7ca82deb..015d8305b 100644 --- a/hw/bsp/esp32s3/boards/esp32s3.c +++ b/hw/bsp/esp32s3/boards/esp32s3.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len) (void) buf; (void) len; return 0; } - diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h index fff24ba44..d4690f732 100644 --- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h +++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h index c7940c56e..fe33b5c43 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h index c7940c56e..fe33b5c43 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt index 6d0fcbc86..8266c5a1c 100644 --- a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt +++ b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt @@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}" PRIV_INCLUDE_DIRS "" PRIV_REQUIRES "driver" REQUIRES "") - diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake index 511dd58bb..0bcad035e 100644 --- a/hw/bsp/esp32s3/family.cmake +++ b/hw/bsp/esp32s3/family.cmake @@ -1,7 +1,7 @@ cmake_minimum_required(VERSION 3.5) # Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") +set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s3) set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/family.mk b/hw/bsp/esp32s3/family.mk index cf153ffc2..d82a1c969 100644 --- a/hw/bsp/esp32s3/family.mk +++ b/hw/bsp/esp32s3/family.mk @@ -23,4 +23,3 @@ UF2_FAMILY_ID = 0xc47e5767 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin @echo CREATE $@ $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ - diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index 4aa1e153b..f7a863c34 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) diff --git a/hw/bsp/f1c100s/board.h b/hw/bsp/f1c100s/board.h index 238ac796d..0ef9a1700 100644 --- a/hw/bsp/f1c100s/board.h +++ b/hw/bsp/f1c100s/board.h @@ -1 +1 @@ -// Nothing valuable here \ No newline at end of file +// Nothing valuable here diff --git a/hw/bsp/f1c100s/board.mk b/hw/bsp/f1c100s/board.mk index 5fe26a9ea..9062483b0 100644 --- a/hw/bsp/f1c100s/board.mk +++ b/hw/bsp/f1c100s/board.mk @@ -32,7 +32,7 @@ SRC_C += \ $(MCU_DIR)/machine/sys-spi-flash.c \ $(MCU_DIR)/machine/f1c100s-intc.c \ $(MCU_DIR)/lib/malloc.c \ - $(MCU_DIR)/lib/printf.c + $(MCU_DIR)/lib/printf.c SRC_S += \ $(MCU_DIR)/machine/start.S \ @@ -47,6 +47,6 @@ INC += \ flash: flash-xfel exec: $(BUILD)/$(PROJECT).bin - xfel ddr + xfel ddr xfel write 0x80000000 $< - xfel exec 0x80000000 \ No newline at end of file + xfel exec 0x80000000 diff --git a/hw/bsp/f1c100s/f1c100s.c b/hw/bsp/f1c100s/f1c100s.c index d45072ecb..5dcae33f7 100644 --- a/hw/bsp/f1c100s/f1c100s.c +++ b/hw/bsp/f1c100s/f1c100s.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -125,6 +125,6 @@ static void timer_init(void) { f1c100s_intc_set_isr(F1C100S_IRQ_TIMER0, timer_handler); f1c100s_intc_enable_irq(F1C100S_IRQ_TIMER0); } -#else +#else static void timer_init(void) { } #endif diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 601cd54f5..08bb20bc3 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -139,4 +139,4 @@ if (NOT TARGET _family_support_marker) # save it in case of re-inclusion set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "") -endif() \ No newline at end of file +endif() diff --git a/hw/bsp/fomu/boards/fomu/board.mk b/hw/bsp/fomu/boards/fomu/board.mk index 8ced11412..b5545c89a 100644 --- a/hw/bsp/fomu/boards/fomu/board.mk +++ b/hw/bsp/fomu/boards/fomu/board.mk @@ -1 +1 @@ -# place holder \ No newline at end of file +# place holder diff --git a/hw/bsp/fomu/fomu.c b/hw/bsp/fomu/fomu.c index 33c630303..e079e7c5b 100644 --- a/hw/bsp/fomu/fomu.c +++ b/hw/bsp/fomu/fomu.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/fomu/include/hw/common.h b/hw/bsp/fomu/include/hw/common.h index 6a97ca2e9..b902bc4f2 100644 --- a/hw/bsp/fomu/include/hw/common.h +++ b/hw/bsp/fomu/include/hw/common.h @@ -30,4 +30,4 @@ static inline uint32_t csr_readl(uint32_t addr) { return *(volatile uint32_t *)addr; } -#endif /* _HW_COMMON_H_ */ \ No newline at end of file +#endif /* _HW_COMMON_H_ */ diff --git a/hw/bsp/fomu/include/irq.h b/hw/bsp/fomu/include/irq.h index a82218907..dc96c228d 100644 --- a/hw/bsp/fomu/include/irq.h +++ b/hw/bsp/fomu/include/irq.h @@ -68,4 +68,4 @@ static inline unsigned int irq_pending(void) } #endif -#endif /* __IRQ_H */ \ No newline at end of file +#endif /* __IRQ_H */ diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/frdm_k32l2b/board.h index 825367915..8d21fdcd4 100644 --- a/hw/bsp/frdm_k32l2b/board.h +++ b/hw/bsp/frdm_k32l2b/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c index 924bb18e9..8d2b39500 100644 --- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c +++ b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -56,10 +56,10 @@ void board_init(void) gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, kPORT_MuxAsGpio }; PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); @@ -68,7 +68,7 @@ void board_init(void) PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); /* PORTA2 (pin 24) is configured as LPUART0_TX */ PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); - + SIM->SOPT5 = ((SIM->SOPT5 & /* Mask bits to zero which are setting */ (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/frdm_kl25z/frdm_kl25z.c index 8d93fdbaa..46f85f6a5 100644 --- a/hw/bsp/frdm_kl25z/frdm_kl25z.c +++ b/hw/bsp/frdm_kl25z/frdm_kl25z.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -103,7 +103,7 @@ void board_init(void) // Button CLOCK_EnableClock(BUTTON_PIN_CLOCK); port_pin_config_t button_port = { - .pullSelect = kPORT_PullUp, + .pullSelect = kPORT_PullUp, .mux = BUTTON_PIN_FUNCTION, }; PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c index 60a326d27..113c4c304 100644 --- a/hw/bsp/gd32vf103/family.c +++ b/hw/bsp/gd32vf103/family.c @@ -44,7 +44,7 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); } // According to GD32VF103 user manual clock tree: // Systick clock = AHB clock / 4. -#define TIMER_TICKS ((SystemCoreClock / 4) / 1000) +#define TIMER_TICKS ((SystemCoreClock / 4) / 1000) #define BUTTON_PORT GPIOA #define BUTTON_PIN GPIO_PIN_0 diff --git a/hw/bsp/gd32vf103/system_gd32vf103.c b/hw/bsp/gd32vf103/system_gd32vf103.c index c2001a980..200852abf 100644 --- a/hw/bsp/gd32vf103/system_gd32vf103.c +++ b/hw/bsp/gd32vf103/system_gd32vf103.c @@ -95,7 +95,7 @@ void SystemInit(void) /* reset the RCC clock configuration to the default reset state */ /* enable IRC8M */ RCU_CTL |= RCU_CTL_IRC8MEN; - + /* reset SCS, AHBPSC, APB1PSC, APB2PSC, ADCPSC, CKOUT0SEL bits */ RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | RCU_CFG0_ADCPSC | RCU_CFG0_ADCPSC_2 | RCU_CFG0_CKOUT0SEL); @@ -107,7 +107,7 @@ void SystemInit(void) RCU_CTL &= ~(RCU_CTL_HXTALBPS); /* reset PLLSEL, PREDV0_LSB, PLLMF, USBFSPSC bits */ - + RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | RCU_CFG0_USBFSPSC | RCU_CFG0_PLLMF_4); RCU_CFG1 = 0x00000000U; @@ -141,12 +141,12 @@ void SystemCoreClockUpdate(void) case SEL_IRC8M: SystemCoreClock = IRC8M_VALUE; break; - + /* HXTAL is selected as CK_SYS */ case SEL_HXTAL: SystemCoreClock = HXTAL_VALUE; break; - + /* PLL is selected as CK_SYS */ case SEL_PLL: /* PLL clock source selection, HXTAL or IRC8M/2 */ @@ -313,7 +313,7 @@ static void system_clock_72m_hxtal(void) /* APB1 = AHB/2 */ RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; - /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */ + /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */ RCU_CFG0 &= ~(RCU_CFG0_PLLMF | RCU_CFG0_PLLMF_4); RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL18); diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.h b/hw/bsp/imxrt/boards/metro_m7_1011/board.h index 7fa2f8541..3c172ebb9 100644 --- a/hw/bsp/imxrt/boards/metro_m7_1011/board.h +++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld index 30dd84373..960fc6891 100644 --- a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld +++ b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld @@ -35,7 +35,7 @@ MEMORY { m_flash_config (RX) : ORIGIN = 0x60000400, LENGTH = 0x00000C00 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 - + m_interrupts (RX) : ORIGIN = 0x6000C000, LENGTH = 0x00000400 m_text (RX) : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400) m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00008000 diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h index 4f21b52fa..926f45618 100644 --- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h index 932ce7fd7..10d9fad07 100644 --- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h index 56ed5855b..284bb08e7 100644 --- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h index 152c9ab18..9100072e2 100644 --- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h index 0472f608c..beb69bf2b 100644 --- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h index 7fa37e33f..0f45f72e1 100644 --- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h index 5f51e91a2..37ad94eef 100644 --- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_40/board.h b/hw/bsp/imxrt/boards/teensy_40/board.h index b3cc0a8c5..cac773442 100644 --- a/hw/bsp/imxrt/boards/teensy_40/board.h +++ b/hw/bsp/imxrt/boards/teensy_40/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_40/board.mk b/hw/bsp/imxrt/boards/teensy_40/board.mk index 0ad5ea5c0..45ca0fb6e 100644 --- a/hw/bsp/imxrt/boards/teensy_40/board.mk +++ b/hw/bsp/imxrt/boards/teensy_40/board.mk @@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062 JLINK_DEVICE = MIMXRT1062xxx6A # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli -# Make sure it is in your PATH +# Make sure it is in your PATH flash: $(BUILD)/$(PROJECT).hex teensy_loader_cli --mcu=imxrt1062 -v -w $< diff --git a/hw/bsp/imxrt/boards/teensy_41/board.h b/hw/bsp/imxrt/boards/teensy_41/board.h index b0b4931c7..72c18f540 100644 --- a/hw/bsp/imxrt/boards/teensy_41/board.h +++ b/hw/bsp/imxrt/boards/teensy_41/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_41/board.mk b/hw/bsp/imxrt/boards/teensy_41/board.mk index 0ad5ea5c0..45ca0fb6e 100644 --- a/hw/bsp/imxrt/boards/teensy_41/board.mk +++ b/hw/bsp/imxrt/boards/teensy_41/board.mk @@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062 JLINK_DEVICE = MIMXRT1062xxx6A # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli -# Make sure it is in your PATH +# Make sure it is in your PATH flash: $(BUILD)/$(PROJECT).hex teensy_loader_cli --mcu=imxrt1062 -v -w $< diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index e28a6174a..5eb672c24 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld index 5420ffc00..f478a99c7 100644 --- a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld +++ b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld @@ -214,4 +214,3 @@ SECTIONS ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } - diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kuiic/board.h index 78ad83a2e..1e2d4f18b 100644 --- a/hw/bsp/kuiic/board.h +++ b/hw/bsp/kuiic/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kuiic/kuiic.c index 7aaa9e03c..97677d47a 100644 --- a/hw/bsp/kuiic/kuiic.c +++ b/hw/bsp/kuiic/kuiic.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -96,10 +96,10 @@ void board_init(void) CLOCK_EnableClock(kCLOCK_PortD); CLOCK_EnableClock(kCLOCK_PortE); - + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; GPIO_PinInit(GPIOA, 1U, &led_config); - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); led_config.outputLogic = 0; GPIO_PinInit(GPIOA, 2U, &led_config); PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); @@ -108,10 +108,10 @@ void board_init(void) gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, kPORT_MuxAsGpio }; PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); @@ -121,7 +121,7 @@ void board_init(void) PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); /* PORTA2 (pin 24) is configured as LPUART0_TX */ PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); - + SIM->SOPT5 = ((SIM->SOPT5 & /* Mask bits to zero which are setting */ (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) diff --git a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld index 6dd12ade1..d8079717e 100644 --- a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld +++ b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld @@ -13,29 +13,29 @@ MEMORY { /* Define each memory region */ - MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ - Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */ - Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */ - Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */ + MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ + Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */ + Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */ + Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash256 = 0x0 ; /* MFlash256 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ - __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ - __base_Ram0_16 = 0x2000000 ; /* Ram0_16 */ - __base_RAM = 0x2000000 ; /* RAM */ - __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */ - __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */ - __base_Ram1_16 = 0x2004000 ; /* Ram1_16 */ - __base_RAM2 = 0x2004000 ; /* RAM2 */ - __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */ - __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */ - __base_Ram2_4 = 0x2008000 ; /* Ram2_4 */ - __base_RAM3 = 0x2008000 ; /* RAM3 */ - __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */ - __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */ + __base_MFlash256 = 0x0 ; /* MFlash256 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ + __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ + __base_Ram0_16 = 0x2000000 ; /* Ram0_16 */ + __base_RAM = 0x2000000 ; /* RAM */ + __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */ + __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */ + __base_Ram1_16 = 0x2004000 ; /* Ram1_16 */ + __base_RAM2 = 0x2004000 ; /* RAM2 */ + __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */ + __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */ + __base_Ram2_4 = 0x2008000 ; /* Ram2_4 */ + __base_RAM3 = 0x2008000 ; /* RAM3 */ + __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */ + __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */ ENTRY(ResetISR) @@ -84,9 +84,9 @@ SECTIONS } > MFlash256 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash256 @@ -98,9 +98,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > MFlash256 __exidx_end = .; - + _etext = .; - + /* DATA section for Ram1_16 */ .data_RAM2 : ALIGN(4) @@ -225,11 +225,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_16 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -243,4 +243,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c index 7f5984a3e..30a3e51e1 100644 --- a/hw/bsp/lpc15/family.c +++ b/hw/bsp/lpc15/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld index 51fd1539d..f12c1760c 100644 --- a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld +++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld @@ -12,43 +12,43 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ -__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ -__base_Flash = 0x1a000000 ; /* Flash */ -__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ -__base_Flash2 = 0x1b000000 ; /* Flash2 */ -__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ -__base_RAM = 0x10000000 ; /* RAM */ -__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ -__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ -__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ -__base_RAM2 = 0x10080000 ; /* RAM2 */ -__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ -__base_RAM3 = 0x20000000 ; /* RAM3 */ -__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ -__base_RAM4 = 0x20008000 ; /* RAM4 */ -__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ -__base_RAM5 = 0x2000c000 ; /* RAM5 */ -__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ +__base_Flash = 0x1a000000 ; /* Flash */ +__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ +__base_Flash2 = 0x1b000000 ; /* Flash2 */ +__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ +__base_RAM = 0x10000000 ; /* RAM */ +__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ +__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ +__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ +__base_RAM2 = 0x10080000 ; /* RAM2 */ +__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ +__base_RAM3 = 0x20000000 ; /* RAM3 */ +__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ +__base_RAM4 = 0x20008000 ; /* RAM4 */ +__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ +__base_RAM5 = 0x2000c000 ; /* RAM5 */ +__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -137,9 +137,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) __exidx_end = .; } > MFlashA512 - + _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -377,17 +377,17 @@ SECTIONS . = ALIGN(4) ; _end_noinit = .; PROVIDE(__end_noinit_RAM = .) ; - PROVIDE(__end_noinit_RamLoc32 = .) ; + PROVIDE(__end_noinit_RamLoc32 = .) ; } > RamLoc32 AT> RamLoc32 PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -401,4 +401,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld index 9a308e342..9a67e8946 100644 --- a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld +++ b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld @@ -11,44 +11,44 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ -__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ -__base_Flash = 0x1a000000 ; /* Flash */ -__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ -__base_Flash2 = 0x1b000000 ; /* Flash2 */ -__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ -__base_RAM = 0x10000000 ; /* RAM */ -__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ -__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ -__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ -__base_RAM2 = 0x10080000 ; /* RAM2 */ -__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ -__base_RAM3 = 0x20000000 ; /* RAM3 */ -__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ -__base_RAM4 = 0x20008000 ; /* RAM4 */ -__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ -__base_RAM5 = 0x2000c000 ; /* RAM5 */ -__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ -__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ +__base_Flash = 0x1a000000 ; /* Flash */ +__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ +__base_Flash2 = 0x1b000000 ; /* Flash2 */ +__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ +__base_RAM = 0x10000000 ; /* RAM */ +__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ +__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ +__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ +__base_RAM2 = 0x10080000 ; /* RAM2 */ +__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ +__base_RAM3 = 0x20000000 ; /* RAM3 */ +__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ +__base_RAM4 = 0x20008000 ; /* RAM4 */ +__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ +__base_RAM5 = 0x2000c000 ; /* RAM5 */ +__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -118,9 +118,9 @@ SECTIONS } > MFlashA512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlashA512 @@ -134,7 +134,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -215,7 +215,7 @@ SECTIONS *(.bss.$RamLoc40*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamLoc40 + } > RamLoc40 /* BSS section for RamAHB32 */ .bss_RAM3 : ALIGN(4) @@ -225,7 +225,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamAHB32 + } > RamAHB32 /* BSS section for RamAHB16 */ .bss_RAM4 : ALIGN(4) @@ -235,7 +235,7 @@ SECTIONS *(.bss.$RamAHB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM4 = .) ; - } > RamAHB16 + } > RamAHB16 /* BSS section for RamAHB_ETB16 */ .bss_RAM5 : ALIGN(4) @@ -245,7 +245,7 @@ SECTIONS *(.bss.$RamAHB_ETB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM5 = .) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -264,7 +264,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamLoc40*) . = ALIGN(4) ; - } > RamLoc40 + } > RamLoc40 /* NOINIT section for RamAHB32 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -272,7 +272,7 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* NOINIT section for RamAHB16 */ .noinit_RAM4 (NOLOAD) : ALIGN(4) @@ -280,7 +280,7 @@ SECTIONS *(.noinit.$RAM4*) *(.noinit.$RamAHB16*) . = ALIGN(4) ; - } > RamAHB16 + } > RamAHB16 /* NOINIT section for RamAHB_ETB16 */ .noinit_RAM5 (NOLOAD) : ALIGN(4) @@ -288,13 +288,13 @@ SECTIONS *(.noinit.$RAM5*) *(.noinit.$RamAHB_ETB16*) . = ALIGN(4) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -302,11 +302,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -320,4 +320,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index 72c20e034..57f9d55da 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk index 925374cc8..5f15e2bbe 100644 --- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk +++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk @@ -15,4 +15,4 @@ PYOCD_TARGET = LPC54628 #flash: flash-pyocd -flash: flash-jlink \ No newline at end of file +flash: flash-jlink diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c index 621788948..fe9cfcc47 100644 --- a/hw/bsp/lpc54/family.c +++ b/hw/bsp/lpc54/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld index 6b5d852aa..e2197b972 100644 --- a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld +++ b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld @@ -231,4 +231,3 @@ SECTIONS ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } - diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c index 5b6c56dd3..3ed00e7da 100644 --- a/hw/bsp/lpc55/family.c +++ b/hw/bsp/lpc55/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpcxpresso11u37/lpc11u37.ld index 6a2dfb7f5..8e0a4e4c6 100644 --- a/hw/bsp/lpcxpresso11u37/lpc11u37.ld +++ b/hw/bsp/lpcxpresso11u37/lpc11u37.ld @@ -12,24 +12,24 @@ MEMORY { /* Define each memory region */ - MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ - RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ - RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ + RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ + RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash128 = 0x0 ; /* MFlash128 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ - __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ - __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ - __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ - __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ - __base_RAM2 = 0x20004000 ; /* RAM2 */ - __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_MFlash128 = 0x0 ; /* MFlash128 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ + __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ + __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ + __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ + __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ + __base_RAM2 = 0x20004000 ; /* RAM2 */ + __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -74,9 +74,9 @@ SECTIONS } > MFlash128 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash128 @@ -88,9 +88,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > MFlash128 __exidx_end = .; - + _etext = .; - + /* DATA section for RamUsb2 */ .data_RAM2 : ALIGN(4) @@ -176,11 +176,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) ) ); @@ -192,4 +192,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c index 11f1797a2..79cd685c3 100644 --- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c +++ b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpcxpresso11u68/lpc11u68.ld index 56d9e4b89..4a35b192e 100644 --- a/hw/bsp/lpcxpresso11u68/lpc11u68.ld +++ b/hw/bsp/lpcxpresso11u68/lpc11u68.ld @@ -11,29 +11,29 @@ MEMORY { /* Define each memory region */ - MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ - Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ - Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ + MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ + Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash256 = 0x0 ; /* MFlash256 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ - __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ - __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ - __base_RAM2 = 0x20000000 ; /* RAM2 */ - __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ - __base_RAM3 = 0x20004000 ; /* RAM3 */ - __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_MFlash256 = 0x0 ; /* MFlash256 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ + __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ + __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ + __base_RAM2 = 0x20000000 ; /* RAM2 */ + __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ + __base_RAM3 = 0x20004000 ; /* RAM3 */ + __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -82,9 +82,9 @@ SECTIONS } > MFlash256 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash256 @@ -98,7 +98,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* possible MTB section for Ram1_2 */ .mtb_buffer_RAM2 (NOLOAD) : { @@ -172,7 +172,7 @@ SECTIONS *(.bss.$Ram1_2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > Ram1_2 + } > Ram1_2 /* BSS section for Ram2USB_2 */ .bss_RAM3 : ALIGN(4) @@ -182,7 +182,7 @@ SECTIONS *(.bss.$Ram2USB_2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > Ram2USB_2 + } > Ram2USB_2 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -201,7 +201,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$Ram1_2*) . = ALIGN(4) ; - } > Ram1_2 + } > Ram1_2 /* NOINIT section for Ram2USB_2 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -209,13 +209,13 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$Ram2USB_2*) . = ALIGN(4) ; - } > Ram2USB_2 + } > Ram2USB_2 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > Ram0_32 @@ -223,11 +223,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) ) ); @@ -239,4 +239,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c index e33a5c6e5..a04e43867 100644 --- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c +++ b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso1347/lpc1347.ld b/hw/bsp/lpcxpresso1347/lpc1347.ld index 42a4bb25c..a2111cd1c 100644 --- a/hw/bsp/lpcxpresso1347/lpc1347.ld +++ b/hw/bsp/lpcxpresso1347/lpc1347.ld @@ -11,29 +11,29 @@ MEMORY { /* Define each memory region */ - MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */ - RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ - RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ - RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ + MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */ + RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ + RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash64 = 0x0 ; /* MFlash64 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */ - __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */ - __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ - __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ - __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ - __base_RAM2 = 0x20004000 ; /* RAM2 */ - __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __base_RamPeriph2 = 0x20000000 ; /* RamPeriph2 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */ + __base_MFlash64 = 0x0 ; /* MFlash64 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */ + __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */ + __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ + __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ + __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ + __base_RAM2 = 0x20004000 ; /* RAM2 */ + __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_RamPeriph2 = 0x20000000 ; /* RamPeriph2 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -82,9 +82,9 @@ SECTIONS } > MFlash64 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash64 @@ -98,7 +98,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamUsb2 */ .data_RAM2 : ALIGN(4) @@ -153,7 +153,7 @@ SECTIONS *(.bss.$RamUsb2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamUsb2 + } > RamUsb2 /* BSS section for RamPeriph2 */ .bss_RAM3 : ALIGN(4) @@ -163,7 +163,7 @@ SECTIONS *(.bss.$RamPeriph2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamPeriph2 + } > RamPeriph2 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -182,7 +182,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamUsb2*) . = ALIGN(4) ; - } > RamUsb2 + } > RamUsb2 /* NOINIT section for RamPeriph2 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -190,13 +190,13 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamPeriph2*) . = ALIGN(4) ; - } > RamPeriph2 + } > RamPeriph2 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc8 @@ -204,11 +204,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -222,4 +222,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c index a9a67ae3a..8ee611037 100644 --- a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c +++ b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -64,7 +64,7 @@ const uint32_t ExtRateIn = 0; /* Pin muxing table, only items that need changing from their default pin state are in this table. */ -static const PINMUX_GRP_T pinmuxing[] = +static const PINMUX_GRP_T pinmuxing[] = { {0, 1, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_INACT)}, /* PIO0_1 used for CLKOUT */ {0, 2, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_PULLUP)}, /* PIO0_2 used for SSEL */ diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpcxpresso1769/lpc1769.ld index d1c83d8e2..095bd3d92 100644 --- a/hw/bsp/lpcxpresso1769/lpc1769.ld +++ b/hw/bsp/lpcxpresso1769/lpc1769.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ - __base_RAM2 = 0x2007c000 ; /* RAM2 */ - __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ + __base_RAM2 = 0x2007c000 ; /* RAM2 */ + __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamAHB32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamAHB32 + } > RamAHB32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c index b7bce93d2..24333ad1a 100644 --- a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c index 6bade7743..c94b0d6d8 100644 --- a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c +++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/mbed1768/lpc1768.ld b/hw/bsp/mbed1768/lpc1768.ld index d1c83d8e2..095bd3d92 100644 --- a/hw/bsp/mbed1768/lpc1768.ld +++ b/hw/bsp/mbed1768/lpc1768.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ - __base_RAM2 = 0x2007c000 ; /* RAM2 */ - __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ + __base_RAM2 = 0x2007c000 ; /* RAM2 */ + __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamAHB32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamAHB32 + } > RamAHB32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/mbed1768/mbed1768.c index 08cf3adbd..9f3d294d3 100644 --- a/hw/bsp/mbed1768/mbed1768.c +++ b/hw/bsp/mbed1768/mbed1768.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld index 0b45ee7bd..796ed04f6 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -110,7 +110,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -121,7 +121,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -149,7 +149,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c index 9793ba241..c3f5bc16d 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -57,7 +57,7 @@ const int baudrate = 115200; void board_init (void) { -// usb clock +// usb clock USB_DeviceClockInit(); if ( SysTick_Config(SystemCoreClock / 1000) ) diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c index 4fc314165..d61f775c7 100644 --- a/hw/bsp/ngx4330/ngx4330.c +++ b/hw/bsp/ngx4330/ngx4330.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ngx4330/ngx4330.ld b/hw/bsp/ngx4330/ngx4330.ld index 7bd363f08..300869c20 100644 --- a/hw/bsp/ngx4330/ngx4330.ld +++ b/hw/bsp/ngx4330/ngx4330.ld @@ -12,39 +12,39 @@ MEMORY { /* Define each memory region */ - RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */ - RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ - SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */ + RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */ + RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */ } /* Define a symbol for the top of each memory region */ - __base_RamLoc128 = 0x10000000 ; /* RamLoc128 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */ - __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */ - __base_RamLoc72 = 0x10080000 ; /* RamLoc72 */ - __base_RAM2 = 0x10080000 ; /* RAM2 */ - __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */ - __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */ - __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ - __base_RAM4 = 0x20008000 ; /* RAM4 */ - __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ - __base_RAM5 = 0x2000c000 ; /* RAM5 */ - __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __base_SPIFI = 0x14000000 ; /* SPIFI */ - __base_Flash = 0x14000000 ; /* Flash */ - __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */ - __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */ + __base_RamLoc128 = 0x10000000 ; /* RamLoc128 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */ + __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */ + __base_RamLoc72 = 0x10080000 ; /* RamLoc72 */ + __base_RAM2 = 0x10080000 ; /* RAM2 */ + __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ + __base_RAM4 = 0x20008000 ; /* RAM4 */ + __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ + __base_RAM5 = 0x2000c000 ; /* RAM5 */ + __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __base_SPIFI = 0x14000000 ; /* SPIFI */ + __base_Flash = 0x14000000 ; /* Flash */ + __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */ + __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */ ENTRY(ResetISR) @@ -103,9 +103,9 @@ SECTIONS } > SPIFI /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > SPIFI @@ -117,9 +117,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > SPIFI __exidx_end = .; - + _etext = .; - + /* DATA section for RamLoc72 */ .data_RAM2 : ALIGN(4) @@ -322,11 +322,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc128 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -340,4 +340,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.h b/hw/bsp/nrf/boards/adafruit_clue/board.h index 2c58e8fe8..8d6df786e 100644 --- a/hw/bsp/nrf/boards/adafruit_clue/board.h +++ b/hw/bsp/nrf/boards/adafruit_clue/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100755 --- a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld index f570740b6..f609f743f 100755 --- a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld +++ b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld @@ -20,7 +20,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h index d548e01c3..00fa8d8ea 100644 --- a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h +++ b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h index a86c9dc7f..3dd354efa 100644 --- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h +++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100755 --- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h index 3208a948a..8e6ce3230 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h +++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h index ece6e34cb..605deea24 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h +++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h index 132173a80..33c370f53 100644 --- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h +++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h index 01dd1f24f..072cb2714 100644 --- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h +++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk index 3afa234aa..f25ec8f34 100644 --- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk +++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk @@ -12,4 +12,4 @@ $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex flash: $(BUILD)/$(PROJECT).zip @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0) - $(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200 \ No newline at end of file + $(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200 diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h index ab12d21aa..50d3067b3 100644 --- a/hw/bsp/nrf/boards/pca10056/board.h +++ b/hw/bsp/nrf/boards/pca10056/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/pca10059/board.h b/hw/bsp/nrf/boards/pca10059/board.h index 0810be648..ea3f4030d 100644 --- a/hw/bsp/nrf/boards/pca10059/board.h +++ b/hw/bsp/nrf/boards/pca10059/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/pca10100/board.h b/hw/bsp/nrf/boards/pca10100/board.h index 881133035..2b2579732 100644 --- a/hw/bsp/nrf/boards/pca10100/board.h +++ b/hw/bsp/nrf/boards/pca10100/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h index dcf829d9c..bc203f073 100644 --- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h +++ b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index a07332d4c..02cec31ef 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld index 3966b276e..0c599a561 100644 --- a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld +++ b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld @@ -69,7 +69,7 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - + *(.rodata*) KEEP(*(.eh_frame*)) diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c index 7117a3422..ec66f8deb 100644 --- a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c +++ b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld index 3966b276e..0c599a561 100644 --- a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld +++ b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld @@ -69,7 +69,7 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - + *(.rodata*) KEEP(*(.eh_frame*)) diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c index 7117a3422..ec66f8deb 100644 --- a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c +++ b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c index da62e7bd2..90fa2ffd8 100644 --- a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c +++ b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c index 0d78116b8..9e7eacb23 100644 --- a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c +++ b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c index 49e66d2d0..1fc97e3dc 100644 --- a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c +++ b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c index e47ec5f31..0bb6cb728 100644 --- a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c +++ b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c index 786f04978..895e23899 100644 --- a/hw/bsp/pic32mz/family.c +++ b/hw/bsp/pic32mz/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h index e7eab088e..1eeeaf9af 100644 --- a/hw/bsp/rp2040/board.h +++ b/hw/bsp/rp2040/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake index 8280c835d..f9887c09c 100644 --- a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake +++ b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake @@ -1 +1 @@ -set(PICO_BOARD pico) \ No newline at end of file +set(PICO_BOARD pico) diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 678bce274..5d80ab66e 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -55,7 +55,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") set(TINYUSB_DEBUG_LEVEL 1) endif() - + target_compile_definitions(tinyusb_common_base INTERFACE CFG_TUSB_MCU=OPT_MCU_RP2040 CFG_TUSB_OS=${TINYUSB_OPT_OS} diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c index 9bd9399f6..4f87153ac 100644 --- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c +++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c @@ -33,9 +33,9 @@ * - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire. * * The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2). - * + * * Connect the pins between GR-CITRUS and JLink as follows. - * + * * | Function | GR-CITRUS pin | JLink pin No.| note | * |:---------:|:-------------:|:------------:|:--------:| * | VTref | 3.3V | 1 | | @@ -91,7 +91,7 @@ void INT_Excep_SCI0_TXI0(void) { uint8_t *buf = sci0_buf[0].buf; uint32_t cnt = sci0_buf[0].cnt; - + if (!buf || !cnt) { SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); return; diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c index 3c729ad50..691038fc8 100644 --- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c +++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -126,7 +126,7 @@ void INT_Excep_SCI5_TXI5(void) { uint8_t *buf = sci_buf[0].buf; uint32_t cnt = sci_buf[0].cnt; - + if (!buf || !cnt) { SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); return; diff --git a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld index 8b3124c0e..9e12acec8 100644 --- a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld +++ b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.h b/hw/bsp/samd21/boards/atsamd21_xpro/board.h index a3e03997c..315e40c78 100644 --- a/hw/bsp/samd21/boards/atsamd21_xpro/board.h +++ b/hw/bsp/samd21/boards/atsamd21_xpro/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.h b/hw/bsp/samd21/boards/circuitplayground_express/board.h index 2d7da1c0b..0037db00d 100644 --- a/hw/bsp/samd21/boards/circuitplayground_express/board.h +++ b/hw/bsp/samd21/boards/circuitplayground_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.h b/hw/bsp/samd21/boards/curiosity_nano/board.h index 67924d809..1a4a833a3 100644 --- a/hw/bsp/samd21/boards/curiosity_nano/board.h +++ b/hw/bsp/samd21/boards/curiosity_nano/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h index b9292b9af..8e0caa6bd 100644 --- a/hw/bsp/samd21/boards/feather_m0_express/board.h +++ b/hw/bsp/samd21/boards/feather_m0_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.h b/hw/bsp/samd21/boards/itsybitsy_m0/board.h index 177fb695e..6ee814da5 100644 --- a/hw/bsp/samd21/boards/itsybitsy_m0/board.h +++ b/hw/bsp/samd21/boards/itsybitsy_m0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/luna_d21/board.h b/hw/bsp/samd21/boards/luna_d21/board.h index 2e0a2a60f..776063636 100644 --- a/hw/bsp/samd21/boards/luna_d21/board.h +++ b/hw/bsp/samd21/boards/luna_d21/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/luna_d21/board.mk b/hw/bsp/samd21/boards/luna_d21/board.mk index 27a634e3a..508a72b1f 100644 --- a/hw/bsp/samd21/boards/luna_d21/board.mk +++ b/hw/bsp/samd21/boards/luna_d21/board.mk @@ -8,4 +8,3 @@ JLINK_DEVICE = ATSAMD21G18 # flash using dfu-util flash: $(BUILD)/$(PROJECT).bin dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $< - diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h index 13b7556b0..d26aae53c 100644 --- a/hw/bsp/samd21/boards/metro_m0_express/board.h +++ b/hw/bsp/samd21/boards/metro_m0_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/qtpy/board.h b/hw/bsp/samd21/boards/qtpy/board.h index 6f8325e49..9ba39e966 100644 --- a/hw/bsp/samd21/boards/qtpy/board.h +++ b/hw/bsp/samd21/boards/qtpy/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.h b/hw/bsp/samd21/boards/seeeduino_xiao/board.h index 0d1e9cef1..1bd63d6d9 100644 --- a/hw/bsp/samd21/boards/seeeduino_xiao/board.h +++ b/hw/bsp/samd21/boards/seeeduino_xiao/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/trinket_m0/board.h b/hw/bsp/samd21/boards/trinket_m0/board.h index c8692e6bd..741f2a7f3 100644 --- a/hw/bsp/samd21/boards/trinket_m0/board.h +++ b/hw/bsp/samd21/boards/trinket_m0/board.h @@ -31,4 +31,3 @@ // UART #define UART_SERCOM 0 - diff --git a/hw/bsp/samd21/boards/trinket_m0/board.mk b/hw/bsp/samd21/boards/trinket_m0/board.mk index 803ffe892..6addf13b7 100644 --- a/hw/bsp/samd21/boards/trinket_m0/board.mk +++ b/hw/bsp/samd21/boards/trinket_m0/board.mk @@ -2,4 +2,3 @@ CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/trinket_m0.ld - diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c index 494dc393a..308fb51b5 100644 --- a/hw/bsp/samd21/family.c +++ b/hw/bsp/samd21/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/feather_m4_express/board.h b/hw/bsp/samd51/boards/feather_m4_express/board.h index 1d5ed8040..4629643fd 100644 --- a/hw/bsp/samd51/boards/feather_m4_express/board.h +++ b/hw/bsp/samd51/boards/feather_m4_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/itsybitsy_m4/board.h b/hw/bsp/samd51/boards/itsybitsy_m4/board.h index 0760d4288..272315771 100644 --- a/hw/bsp/samd51/boards/itsybitsy_m4/board.h +++ b/hw/bsp/samd51/boards/itsybitsy_m4/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h index ab10ae4f8..5d7734576 100644 --- a/hw/bsp/samd51/boards/metro_m4_express/board.h +++ b/hw/bsp/samd51/boards/metro_m4_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.mk b/hw/bsp/samd51/boards/metro_m4_express/board.mk index d7953cc24..57a680e91 100644 --- a/hw/bsp/samd51/boards/metro_m4_express/board.mk +++ b/hw/bsp/samd51/boards/metro_m4_express/board.mk @@ -7,4 +7,3 @@ LD_FILE = $(BOARD_PATH)/$(BOARD).ld JLINK_DEVICE = ATSAMD51J19 flash: flash-bossac - diff --git a/hw/bsp/samd51/boards/pybadge/board.h b/hw/bsp/samd51/boards/pybadge/board.h index 1d5ed8040..4629643fd 100644 --- a/hw/bsp/samd51/boards/pybadge/board.h +++ b/hw/bsp/samd51/boards/pybadge/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/pyportal/board.h b/hw/bsp/samd51/boards/pyportal/board.h index 9e51ded32..ff04c900b 100644 --- a/hw/bsp/samd51/boards/pyportal/board.h +++ b/hw/bsp/samd51/boards/pyportal/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c index 020e638c4..3da89ee14 100644 --- a/hw/bsp/samd51/family.c +++ b/hw/bsp/samd51/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same54xplainedpro/same54p20a_flash.ld index 97072bfe6..1f427a066 100644 --- a/hw/bsp/same54xplainedpro/same54p20a_flash.ld +++ b/hw/bsp/same54xplainedpro/same54p20a_flash.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same54xplainedpro/same54p20a_sram.ld index 6219f4afe..e6e33ec48 100644 --- a/hw/bsp/same54xplainedpro/same54p20a_sram.ld +++ b/hw/bsp/same54xplainedpro/same54p20a_sram.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c index 027c88e2f..6e1ed56a9 100644 --- a/hw/bsp/samg55xplained/samg55xplained.c +++ b/hw/bsp/samg55xplained/samg55xplained.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, hathach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h index a3e03997c..315e40c78 100644 --- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.h b/hw/bsp/saml2x/boards/saml22_feather/board.h index 13a326000..72e9897b6 100644 --- a/hw/bsp/saml2x/boards/saml22_feather/board.h +++ b/hw/bsp/saml2x/boards/saml22_feather/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld index d1aaa44fc..156c3e7e4 100644 --- a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld +++ b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h index 7fc690ab2..735f6afc8 100644 --- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld index d1aaa44fc..156c3e7e4 100644 --- a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c index 470fde750..f119d23a1 100644 --- a/hw/bsp/saml2x/family.c +++ b/hw/bsp/saml2x/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/sltb009a/sltb009a.c index b5eb5ed5d..2a5d112a8 100644 --- a/hw/bsp/sltb009a/sltb009a.c +++ b/hw/bsp/sltb009a/sltb009a.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Rafael Silva (@perigoso) @@ -712,7 +712,7 @@ uint32_t board_millis(void) * @retval None */ void assert_failed(char *file, uint32_t line) -{ +{ /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ diff --git a/hw/bsp/spresense/board_spresense.c b/hw/bsp/spresense/board_spresense.c index 256bccd15..5f778ad70 100644 --- a/hw/bsp/spresense/board_spresense.c +++ b/hw/bsp/spresense/board_spresense.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2019 Sony Semiconductor Solutions Corporation @@ -64,7 +64,7 @@ void board_led_write(bool state) // a '1' means active (pressed), a '0' means inactive. uint32_t board_button_read(void) { - if (board_gpio_read(BUTTON_PIN)) + if (board_gpio_read(BUTTON_PIN)) { return 0; } @@ -96,7 +96,7 @@ uint32_t board_millis(void) /* Wait until RTC is available */ while (g_rtc_enabled == false); - if (clock_gettime(CLOCK_MONOTONIC, &tp)) + if (clock_gettime(CLOCK_MONOTONIC, &tp)) { return 0; } diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h index 7c527e2c2..9af81e63c 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk index cf787a103..1cc443352 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk @@ -12,4 +12,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf JLINK_DEVICE = stm32f070rb # flash target using on-board stlink -flash: flash-stlink \ No newline at end of file +flash: flash-stlink diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld index 4a6491510..6bb9d33cb 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld @@ -102,12 +102,12 @@ SECTIONS . = ALIGN(4); } >FLASH - .ARM.extab : { + .ARM.extab : { . = ALIGN(4); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(4); } >FLASH - + .ARM : { . = ALIGN(4); __exidx_start = .; @@ -124,7 +124,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(4); } >FLASH - + .init_array : { . = ALIGN(4); @@ -134,7 +134,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); . = ALIGN(4); } >FLASH - + .fini_array : { . = ALIGN(4); @@ -149,7 +149,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections into "RAM" Ram type memory */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -158,9 +158,9 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ - + } >RAM AT> FLASH - + /* Uninitialized data section into "RAM" Ram type memory */ . = ALIGN(4); .bss : diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld index f0879e929..8715e0723 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld +++ b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.h b/hw/bsp/stm32f0/boards/stm32f072disco/board.h index 0b1824b8e..1febd01e8 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/board.h +++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.h b/hw/bsp/stm32f0/boards/stm32f072eval/board.h index 8869d5dc9..7dcfa3e85 100644 --- a/hw/bsp/stm32f0/boards/stm32f072eval/board.h +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c index 884208fb1..bfa843494 100644 --- a/hw/bsp/stm32f0/family.c +++ b/hw/bsp/stm32f0/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h index 0bf053e13..b205464f3 100644 --- a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h +++ b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F0xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_CAN_MODULE_ENABLED */ /*#define HAL_CEC_MODULE_ENABLED */ @@ -65,15 +65,15 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - * Timeout value + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value */ #if !defined (HSE_STARTUP_TIMEOUT) #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ @@ -82,24 +82,24 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** - * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup - * Timeout value + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value */ -#if !defined (HSI_STARTUP_TIMEOUT) +#if !defined (HSI_STARTUP_TIMEOUT) #define HSI_STARTUP_TIMEOUT 5000U /*!< Time out for HSI start up */ -#endif /* HSI_STARTUP_TIMEOUT */ +#endif /* HSI_STARTUP_TIMEOUT */ /** * @brief Internal High Speed oscillator for ADC (HSI14) value. */ -#if !defined (HSI14_VALUE) +#if !defined (HSI14_VALUE) #define HSI14_VALUE 14000000U /*!< Value of the Internal High Speed oscillator for ADC in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -108,7 +108,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -117,8 +117,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE 32000U +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000U #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -127,7 +127,7 @@ */ #if !defined (LSE_VALUE) #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ +#endif /* LSE_VALUE */ /** * @brief Time out for LSE start up value in ms. @@ -143,8 +143,8 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ -#define VDD_VALUE 3300U /*!< Value of VDD in mv */ + */ +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)(1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority (lowest by default) */ /* Warning: Must be set to higher priority for HAL_Delay() */ /* and HAL_GetTick() usage under interrupt context */ @@ -175,14 +175,14 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ - #define USE_FULL_ASSERT 1 + #define USE_FULL_ASSERT 1 /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -299,7 +299,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -308,8 +308,8 @@ void assert_failed(const char* file, uint32_t line); #else #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - +#endif /* USE_FULL_ASSERT */ + #ifdef __cplusplus } #endif @@ -318,4 +318,3 @@ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld index c434ca038..95836522e 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h index 57a607ed5..8fa8f4ffa 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld index da637d1b0..524ac7c03 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h index bedce7f14..c8dba4268 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c index 6f0471096..5e112de70 100644 --- a/hw/bsp/stm32f1/family.c +++ b/hw/bsp/stm32f1/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -53,7 +53,7 @@ void USBWakeUp_IRQHandler(void) void board_init(void) { board_stm32f1_clock_init(); - + // Enable All GPIOs clocks __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -70,7 +70,7 @@ void board_init(void) NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - + // LED GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitStruct.Pin = LED_PIN; @@ -153,7 +153,7 @@ void HardFault_Handler (void) * @retval None */ void assert_failed(const char *file, uint32_t line) -{ +{ /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ diff --git a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h index 5243e5bca..45ef993da 100644 --- a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h +++ b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h @@ -32,7 +32,7 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ #define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ @@ -69,9 +69,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #if defined(USE_STM3210C_EVAL) #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ #else @@ -86,7 +86,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ @@ -95,7 +95,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -119,7 +119,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -151,7 +151,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -168,7 +168,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -176,9 +176,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -190,7 +190,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -205,13 +205,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -233,7 +233,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -243,7 +243,7 @@ #ifdef HAL_GPIO_MODULE_ENABLED #include "stm32f1xx_hal_gpio.h" #endif /* HAL_GPIO_MODULE_ENABLED */ - + #ifdef HAL_EXTI_MODULE_ENABLED #include "stm32f1xx_hal_exti.h" #endif /* HAL_EXTI_MODULE_ENABLED */ @@ -251,7 +251,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f1xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CAN_MODULE_ENABLED #include "stm32f1xx_hal_can.h" #endif /* HAL_CAN_MODULE_ENABLED */ @@ -310,15 +310,15 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f1xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ +#endif /* HAL_PCCARD_MODULE_ENABLED */ #ifdef HAL_SD_MODULE_ENABLED #include "stm32f1xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ +#endif /* HAL_SD_MODULE_ENABLED */ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f1xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_SPI_MODULE_ENABLED #include "stm32f1xx_hal_spi.h" @@ -358,7 +358,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -367,8 +367,8 @@ void assert_failed(const char* file, uint32_t line); #else #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - +#endif /* USE_FULL_ASSERT */ + #ifdef __cplusplus } #endif diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld index 5010435ae..3fce1b578 100644 --- a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld +++ b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c index d77643661..80f762c93 100644 --- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c +++ b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -105,7 +105,7 @@ void SystemClock_Config(void) void board_init(void) { SystemClock_Config(); - + #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); diff --git a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h index 2ab46b260..b38a9d951 100644 --- a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h +++ b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F2xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */ @@ -42,7 +42,7 @@ /* #define HAL_DMA_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ #define HAL_EXTI_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ @@ -52,8 +52,8 @@ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SD_MODULE_ENABLED */ @@ -65,7 +65,7 @@ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ #define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED /* #define HAL_HCD_MODULE_ENABLED */ @@ -73,9 +73,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -86,7 +86,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ @@ -95,7 +95,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -113,8 +113,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the Internal oscillator in Hz*/ @@ -126,7 +126,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -163,7 +163,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -180,7 +180,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 5U /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -190,7 +190,7 @@ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -202,7 +202,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -217,7 +217,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -228,7 +228,7 @@ #define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ #define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - + /* ################## SPI peripheral configuration ########################## */ /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver @@ -240,7 +240,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -258,7 +258,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f2xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f2xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -276,7 +276,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f2xx_hal_cryp.h" + #include "stm32f2xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DAC_MODULE_ENABLED @@ -294,7 +294,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f2xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f2xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -309,7 +309,7 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f2xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ +#endif /* HAL_PCCARD_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f2xx_hal_hash.h" @@ -378,14 +378,14 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f2xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -402,6 +402,6 @@ #endif #endif /* __STM32F2xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld index 7f46c71b2..981107af1 100644 --- a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld +++ b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index 940c49d26..ac9bda983 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h index 0abcbb019..82d3765af 100644 --- a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h +++ b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F3xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -57,7 +57,7 @@ /* #define HAL_OPAMP_MODULE_ENABLED */ /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_PWR_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SDADC_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ @@ -73,15 +73,15 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - * Timeout value + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value */ #if !defined (HSE_STARTUP_TIMEOUT) #define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */ @@ -90,25 +90,25 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (8000000U) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** - * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup - * Timeout value + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value */ -#if !defined (HSI_STARTUP_TIMEOUT) +#if !defined (HSI_STARTUP_TIMEOUT) #define HSI_STARTUP_TIMEOUT (5000U) /*!< Time out for HSI start up */ -#endif /* HSI_STARTUP_TIMEOUT */ +#endif /* HSI_STARTUP_TIMEOUT */ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (40000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (40000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -124,11 +124,11 @@ */ #if !defined (LSE_STARTUP_TIMEOUT) #define LSE_STARTUP_TIMEOUT (5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ +#endif /* LSE_STARTUP_TIMEOUT */ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source + * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. * - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal) * - External clock not generated on EVAL 373 @@ -256,8 +256,8 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f3xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_HRTIM_MODULE_ENABLED #include "stm32f3xx_hal_hrtim.h" #endif /* HAL_HRTIM_MODULE_ENABLED */ diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld index 9eb53bcc0..0dc2879a4 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h index 19d0a1ea4..d1ad2a6ce 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld index 9eb53bcc0..0dc2879a4 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.h b/hw/bsp/stm32f4/boards/pyboardv11/board.h index 685919c57..c126f0666 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/board.h +++ b/hw/bsp/stm32f4/boards/pyboardv11/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld index 2bc5f6c14..b91f456ca 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h index e1fef7277..e6c99a462 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h index 2ab9a1d57..16f081cfb 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld index aac6577ea..549787945 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.h b/hw/bsp/stm32f4/boards/stm32f407disco/board.h index 693e0393f..c38f354ce 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld index 56dcea605..45912ac32 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(4); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h index e1fef7277..e6c99a462 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h index 2ab9a1d57..16f081cfb 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld index 4477229ea..85bf5c4c4 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.h b/hw/bsp/stm32f4/boards/stm32f411disco/board.h index 008a94a5d..57d1e061e 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld index 2372cc1d9..38dd3d321 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.h b/hw/bsp/stm32f4/boards/stm32f412disco/board.h index 7f4a4fa15..d61b70eb9 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld index 2372cc1d9..38dd3d321 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h index a2c11d717..7bbd6b54f 100644 --- a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -263,7 +263,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -281,7 +281,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -303,7 +303,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -325,7 +325,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -340,11 +340,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -425,7 +425,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -464,7 +464,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c index 93ab5bb35..a308bae05 100644 --- a/hw/bsp/stm32f4/family.c +++ b/hw/bsp/stm32f4/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h index d0ef6625f..ed02df061 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.h b/hw/bsp/stm32f7/boards/stm32f723disco/board.h index 93d83efc6..258786b7f 100644 --- a/hw/bsp/stm32f7/boards/stm32f723disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.h b/hw/bsp/stm32f7/boards/stm32f746disco/board.h index ee342b9f5..1c7e6dd2b 100644 --- a/hw/bsp/stm32f7/boards/stm32f746disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld index e1e60bc78..eeb0e29f3 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h index 92c109a72..cf895af87 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h index 234191b00..03dec8f0d 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h @@ -2,7 +2,7 @@ ****************************************************************************** * @file stm32f7xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration file. + * @brief HAL configuration file. ****************************************************************************** * @attention * @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F7xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -44,7 +44,7 @@ #define HAL_DMA_MODULE_ENABLED /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ @@ -58,7 +58,7 @@ /* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -84,9 +84,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -97,7 +97,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -106,7 +106,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -124,8 +124,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ @@ -137,7 +137,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -185,7 +185,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -202,7 +202,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -211,7 +211,7 @@ /* Section 2: PHY configuration section */ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x00000FFF) /* PHY Configuration delay */ #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) @@ -223,7 +223,7 @@ #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -238,7 +238,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -261,7 +261,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -275,7 +275,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f7xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f7xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -301,7 +301,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" + #include "stm32f7xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -323,7 +323,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f7xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f7xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -338,7 +338,7 @@ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f7xx_hal_hash.h" @@ -443,14 +443,14 @@ #ifdef HAL_MDIOS_MODULE_ENABLED #include "stm32f7xx_hal_mdios.h" #endif /* HAL_MDIOS_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -467,6 +467,6 @@ #endif #endif /* __STM32F7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld index 3785f9cbf..520a75539 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h index 1283f2313..e053572a7 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk index a460245b2..be5862612 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk @@ -1,5 +1,5 @@ PORT ?= 0 -SPEED ?= full +SPEED ?= full CFLAGS += \ -DSTM32F767xx \ diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h index 234191b00..03dec8f0d 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h @@ -2,7 +2,7 @@ ****************************************************************************** * @file stm32f7xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration file. + * @brief HAL configuration file. ****************************************************************************** * @attention * @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F7xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -44,7 +44,7 @@ #define HAL_DMA_MODULE_ENABLED /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ @@ -58,7 +58,7 @@ /* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -84,9 +84,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -97,7 +97,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -106,7 +106,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -124,8 +124,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ @@ -137,7 +137,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -185,7 +185,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -202,7 +202,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -211,7 +211,7 @@ /* Section 2: PHY configuration section */ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x00000FFF) /* PHY Configuration delay */ #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) @@ -223,7 +223,7 @@ #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -238,7 +238,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -261,7 +261,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -275,7 +275,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f7xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f7xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -301,7 +301,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" + #include "stm32f7xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -323,7 +323,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f7xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f7xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -338,7 +338,7 @@ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f7xx_hal_hash.h" @@ -443,14 +443,14 @@ #ifdef HAL_MDIOS_MODULE_ENABLED #include "stm32f7xx_hal_mdios.h" #endif /* HAL_MDIOS_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -467,6 +467,6 @@ #endif #endif /* __STM32F7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.h b/hw/bsp/stm32f7/boards/stm32f769disco/board.h index 5ec217f5f..472af0b98 100644 --- a/hw/bsp/stm32f7/boards/stm32f769disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld index 9c327483b..c43829994 100644 --- a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld +++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld @@ -135,7 +135,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -146,7 +146,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -174,7 +174,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -186,5 +186,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index f3ba54576..f5177fd10 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h index ad5f7dbd4..632c4f0ac 100644 --- a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h +++ b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef STM32G4xx_HAL_CONF_H @@ -30,10 +30,10 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ - -#define HAL_MODULE_ENABLED + +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */ @@ -111,9 +111,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -124,7 +124,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/ @@ -145,10 +145,10 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature.*/ -#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /** * @brief External Low Speed oscillator (LSE) value. @@ -156,7 +156,7 @@ The real value may vary depending on the variations in voltage and temperature.* */ #if !defined (LSE_VALUE) #define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ +#endif /* LSE_VALUE */ #if !defined (LSE_STARTUP_TIMEOUT) #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ @@ -177,10 +177,10 @@ The real value may vary depending on the variations in voltage and temperature.* /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ +#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ #define USE_RTOS 0U #define PREFETCH_ENABLE 0U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ The real value may vary depending on the variations in voltage and temperature.* /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk index 4d718f04e..d53782496 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.mk +++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk @@ -16,4 +16,3 @@ JLINK_DEVICE = stm32h750ibk6_m7 # flash target using on-board stlink flash: flash-stlink - diff --git a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld index 83904067a..3588ada5b 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld +++ b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld @@ -172,5 +172,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld index 7ee40671c..336afc01f 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld @@ -118,7 +118,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -129,7 +129,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >DTCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -157,7 +157,7 @@ SECTIONS . = ALIGN(8); } >DTCMRAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -169,5 +169,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld index 7ee40671c..336afc01f 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld @@ -118,7 +118,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -129,7 +129,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >DTCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -157,7 +157,7 @@ SECTIONS . = ALIGN(8); } >DTCMRAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -169,5 +169,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk index b51b109f6..86347ade7 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk @@ -19,4 +19,3 @@ JLINK_DEVICE = stm32h745xi_m7 # flash target using on-board stlink flash: flash-stlink - diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld index e99bb977b..697a1a1df 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld @@ -171,5 +171,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk index fbf4b55c6..e8202d9fc 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk @@ -21,4 +21,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf JLINK_DEVICE = stm32h743ii # flash target using jlink -flash: flash-jlink \ No newline at end of file +flash: flash-jlink diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 65ffc8ef4..35b2cd55b 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -91,7 +91,7 @@ void board_init(void) #endif NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif - + GPIO_InitTypeDef GPIO_InitStruct; // LED diff --git a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h index a7cc6d826..216fc82f2 100644 --- a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h +++ b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h @@ -1,7 +1,7 @@ /** ****************************************************************************** * @file stm32h7xx_hal_conf_template.h - * @brief HAL configuration template file. + * @brief HAL configuration template file. * This file should be copied to the application folder and renamed * to stm32h7xx_hal_conf.h. ****************************************************************************** @@ -32,7 +32,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32H7xx_HAL_CONF_H @@ -478,6 +478,6 @@ #endif #endif /* __STM32H7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld index dfefe59f1..d4d5b6ca5 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h index 8ad3e43c8..c8963199b 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -58,43 +58,43 @@ static inline void board_stm32l0_clock_init(void) RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; static RCC_CRSInitTypeDef RCC_CRSInitStruct; - + /* Enable HSI Oscillator to be used as System clock source Enable HSI48 Oscillator to be used as USB clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - + HAL_RCC_OscConfig(&RCC_OscInitStruct); + /* Select HSI48 as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - - /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2 + + /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0); - + /*Configure the clock recovery system (CRS)**********************************/ - + /*Enable CRS Clock*/ - __HAL_RCC_CRS_CLK_ENABLE(); - + __HAL_RCC_CRS_CLK_ENABLE(); + /* Default Synchro Signal division factor (not divided) */ - RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ - RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; /* HSI48 is synchronized with USB SOF at 1KHz rate */ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); - RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; + RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; /* Set the TRIM[5:0] to the default value*/ - RCC_CRSInitStruct.HSI48CalibrationValue = 0x20; - /* Start automatic synchronization */ + RCC_CRSInitStruct.HSI48CalibrationValue = 0x20; + /* Start automatic synchronization */ HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct); } diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c index dcd71a513..6bce88b39 100644 --- a/hw/bsp/stm32l0/family.c +++ b/hw/bsp/stm32l0/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h index cc20ea8e0..e3a131043 100644 --- a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h +++ b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h @@ -2,22 +2,22 @@ ****************************************************************************** * @file stm32l0xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration template file. + * @brief HAL configuration template file. * This file should be copied to the application folder and renamed * to stm32l0xx_hal_conf.h. ****************************************************************************** * @attention * - *

© Copyright (c) 2016 STMicroelectronics. + *

© Copyright (c) 2016 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32L0xx_HAL_CONF_H @@ -32,9 +32,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */ /*#define HAL_CRC_MODULE_ENABLED */ @@ -69,9 +69,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -90,7 +90,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -108,7 +108,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -128,24 +128,24 @@ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ - + /* Tip: To avoid modifying this file each time you need to use different HSE, === you can define the HSE value in your toolchain compiler preprocessor. */ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U +#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U #define PREREAD_ENABLE 0U #define BUFFER_CACHE_DISABLE 0U /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -191,13 +191,13 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED #include "stm32l0xx_hal_rcc.h" #endif /* HAL_RCC_MODULE_ENABLED */ - + #ifdef HAL_GPIO_MODULE_ENABLED #include "stm32l0xx_hal_gpio.h" #endif /* HAL_GPIO_MODULE_ENABLED */ @@ -233,11 +233,11 @@ #ifdef HAL_FIREWALL_MODULE_ENABLED #include "stm32l0xx_hal_firewall.h" #endif /* HAL_FIREWALL_MODULE_ENABLED */ - + #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32l0xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_I2C_MODULE_ENABLED #include "stm32l0xx_hal_i2c.h" #endif /* HAL_I2C_MODULE_ENABLED */ @@ -257,7 +257,7 @@ #ifdef HAL_LPTIM_MODULE_ENABLED #include "stm32l0xx_hal_lptim.h" #endif /* HAL_LPTIM_MODULE_ENABLED */ - + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l0xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -316,7 +316,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -332,7 +332,6 @@ #endif #endif /* __STM32L0xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld index 79427d80b..033dcc0ad 100644 --- a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld +++ b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0538disco/stm32l0538disco.c index f4c38d150..46f6f0ff6 100644 --- a/hw/bsp/stm32l0538disco/stm32l0538disco.c +++ b/hw/bsp/stm32l0538disco/stm32l0538disco.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h index 773b74e29..a917214c3 100644 --- a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h +++ b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h @@ -7,39 +7,39 @@ * * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved. * - * Redistribution and use in source and binary forms, with or without + * Redistribution and use in source and binary forms, with or without * modification, are permitted, provided that the following conditions are met: * - * 1. Redistribution of source code must retain the above copyright notice, + * 1. Redistribution of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products + * 3. Neither the name of STMicroelectronics nor the names of other + * contributors to this software may be used to endorse or promote products * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this + * 4. This software, including modifications and/or derivative works of this * software, must execute solely and exclusively on microcontroller or * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. + * 5. Redistribution and use of this software other than as permitted under + * this license is void and will automatically terminate your rights under + * this license. * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32L0xx_HAL_CONF_H @@ -54,36 +54,36 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED // #define HAL_ADC_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ #define HAL_DMA_MODULE_ENABLED /* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED /* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ +/* #define HAL_LCD_MODULE_ENABLED */ /* #define HAL_LPTIM_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED //#define HAL_RNG_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ //#define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ /* #define HAL_TSC_MODULE_ENABLED */ -/* #define HAL_UART_MODULE_ENABLED */ -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_UART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ //#define HAL_PCD_MODULE_ENABLED #define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ @@ -93,9 +93,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -114,7 +114,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -123,7 +123,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -132,7 +132,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -152,24 +152,24 @@ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ - + /* Tip: To avoid modifying this file each time you need to use different HSE, === you can define the HSE value in your toolchain compiler preprocessor. */ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U #define PREREAD_ENABLE 1U #define BUFFER_CACHE_DISABLE 0U /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -185,7 +185,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -199,7 +199,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32l0xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32l0xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -211,7 +211,7 @@ #ifdef HAL_COMP_MODULE_ENABLED #include "stm32l0xx_hal_comp.h" #endif /* HAL_COMP_MODULE_ENABLED */ - + #ifdef HAL_CRC_MODULE_ENABLED #include "stm32l0xx_hal_crc.h" #endif /* HAL_CRC_MODULE_ENABLED */ @@ -231,7 +231,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32l0xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_I2C_MODULE_ENABLED #include "stm32l0xx_hal_i2c.h" #endif /* HAL_I2C_MODULE_ENABLED */ @@ -251,7 +251,7 @@ #ifdef HAL_LPTIM_MODULE_ENABLED #include "stm32l0xx_hal_lptim.h" #endif /* HAL_LPTIM_MODULE_ENABLED */ - + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l0xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -310,7 +310,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -326,6 +326,6 @@ #endif #endif /* __STM32L0xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld index d4b86b3e3..4ae4a4cf4 100644 --- a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld @@ -83,8 +83,8 @@ SECTIONS . = ALIGN(8); } >FLASH - .ARM.extab : - { + .ARM.extab : + { . = ALIGN(8); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(8); @@ -105,7 +105,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(8); } >FLASH - + .init_array : { . = ALIGN(8); @@ -129,7 +129,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(8); _sdata = .; /* create a global symbol at data start */ @@ -140,7 +140,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -168,7 +168,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -180,5 +180,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h index 704d742cc..72d17b760 100644 --- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -94,7 +94,7 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLN = 10; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - + HAL_RCC_OscConfig(&RCC_OscInitStruct); /** Initializes the CPU, AHB and APB buses clocks @@ -122,7 +122,7 @@ static inline void board_clock_init(void) RCC_CRSInitStruct.HSI48CalibrationValue = 32; HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); - + /* Select HSI48 output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld index d6865f49d..3bb13ed85 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld @@ -82,8 +82,8 @@ SECTIONS . = ALIGN(8); } >FLASH - .ARM.extab : - { + .ARM.extab : + { . = ALIGN(8); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(8); @@ -104,7 +104,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(8); } >FLASH - + .init_array : { . = ALIGN(8); @@ -128,7 +128,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(8); _sdata = .; /* create a global symbol at data start */ @@ -139,7 +139,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -167,7 +167,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -179,5 +179,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.h b/hw/bsp/stm32l4/boards/stm32l476disco/board.h index 42c657d5e..9d4351b39 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/board.h +++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld index c1a490a70..02c07dd74 100644 --- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld @@ -102,12 +102,12 @@ SECTIONS . = ALIGN(4); } >ROM - .ARM.extab : { + .ARM.extab : { . = ALIGN(4); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(4); } >ROM - + .ARM : { . = ALIGN(4); __exidx_start = .; @@ -124,7 +124,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(4); } >ROM - + .init_array : { . = ALIGN(4); @@ -134,7 +134,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); . = ALIGN(4); } >ROM - + .fini_array : { . = ALIGN(4); @@ -149,7 +149,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections into "RAM" Ram type memory */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -158,7 +158,7 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ - + } >RAM AT> ROM /* Uninitialized data section into "RAM" Ram type memory */ diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h index 1df389aed..47ada6bb9 100644 --- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld index f77c72d1b..267a87a8b 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h index 1df389aed..47ada6bb9 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h index 312f86da1..25dbc0523 100644 --- a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h +++ b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h @@ -50,7 +50,7 @@ /* #define HAL_NAND_MODULE_ENABLED */ // #define HAL_NOR_MODULE_ENABLED // #define HAL_SRAM_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED //#define HAL_I2C_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ @@ -115,7 +115,7 @@ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency * which is subject to manufacturing process variations. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. The real value my vary depending on manufacturing process variations.*/ #endif /* HSI48_VALUE */ @@ -123,7 +123,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -142,7 +142,7 @@ /** * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * frequency. */ #if !defined (EXTERNAL_SAI1_CLOCK_VALUE) @@ -151,7 +151,7 @@ /** * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * frequency. */ #if !defined (EXTERNAL_SAI2_CLOCK_VALUE) diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h index 15dffa813..87c3683de 100644 --- a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h +++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h @@ -503,4 +503,3 @@ #endif #endif /* STM32U5xx_HAL_CONF_H */ - diff --git a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld index 660f30161..916f11866 100644 --- a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld +++ b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld @@ -113,7 +113,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -124,7 +124,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM1 AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -152,7 +152,7 @@ SECTIONS . = ALIGN(8); } >RAM1 - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -167,5 +167,3 @@ SECTIONS MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED } - - diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c index 525d637ea..e9ca59866 100644 --- a/hw/bsp/stm32wb/family.c +++ b/hw/bsp/stm32wb/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk index d60365d1d..0ff24ab60 100644 --- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk +++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk @@ -1,5 +1,5 @@ CFLAGS += -DTM4C123GH6PM - + LD_FILE = $(BOARD_PATH)/tm4c123.ld # For flash-jlink target diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld index e2720a9ac..351857bd6 100644 --- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld +++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld @@ -6,37 +6,37 @@ _Min_Heap_Size = 0; /* required amount of heap */ _Min_Stack_Size = 0x1000; /* required amount of stack */ -MEMORY +MEMORY { FLASH(rx) : ORIGIN = 0x00000000, LENGTH = 256K SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 32K } -SECTIONS +SECTIONS { - .text : + .text : { . = ALIGN(4) ; - *(.vectors) - *(.text) + *(.vectors) + *(.text) *(.text.*) *(.init) *(.fini) *(.rodata) *(.rodata.*) - . = ALIGN(4) ; - __end_text = . ; + . = ALIGN(4) ; + __end_text = . ; } >FLASH - + .data : AT(ADDR(.text) + SIZEOF(.text)) { . = ALIGN(4); - __start_data = . ; + __start_data = . ; __la_data = LOADADDR(.data); - *(.data) + *(.data) *(.data.*) . = ALIGN(4); - __end_data = . ; + __end_data = . ; } >SRAM @@ -47,7 +47,7 @@ SECTIONS __bss_start__ = __start_bss; *(.bss) *(.bss.*) - *(.COMMON) + *(.COMMON) __end_bss = . ; . = ALIGN(4); }>SRAM diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c index 87b94289b..3f4f43220 100644 --- a/hw/bsp/tm4c123/family.c +++ b/hw/bsp/tm4c123/family.c @@ -175,4 +175,3 @@ uint32_t board_millis (void) return system_ticks; } #endif - diff --git a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h index 3e2cb9583..2d4764f40 100644 --- a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h +++ b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/mcu/bridgetek/ft9xx/Readme.md b/hw/mcu/bridgetek/ft9xx/Readme.md index 1db91058c..adf8fc765 100644 --- a/hw/mcu/bridgetek/ft9xx/Readme.md +++ b/hw/mcu/bridgetek/ft9xx/Readme.md @@ -2,6 +2,6 @@ **BridgeTek** provides a hardware abstraction library with software source code for the SDKs for FT9xx software family. -Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`. +Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`. -Registers definition files, and included peripheral register definition files have licenses that allow for redistribution. +Registers definition files, and included peripheral register definition files have licenses that allow for redistribution. diff --git a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S index 62fa266ee..380b31c37 100644 --- a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S +++ b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S @@ -50,11 +50,11 @@ _start: codestart: jmp init - + .global _exithook _exithook: # Debugger uses '_exithook' at 0x90 to catch program exit return - + init: # Disable all interrupts ldk $r0,0x80 @@ -63,12 +63,12 @@ init: .else sta.b 0x100e3,$r0 .endif - + # Reset all peripherals # lda.l $r0, 0x10018 # bins.l $r0, $r0, 0x23F # Set bit 31 # sta.l 0x10018, $r0 - + # Initialize DATA by copying from program memory ldk.l $r0,__data_load_start ldk.l $r1,__data_load_end diff --git a/hw/mcu/dialog/README.md b/hw/mcu/dialog/README.md index 69676f081..33d270aac 100644 --- a/hw/mcu/dialog/README.md +++ b/hw/mcu/dialog/README.md @@ -3,7 +3,5 @@ **Dialog Semiconductors** provides SDKs for DA146x MCU family. Most of the files there can't be redistributed. Registers definition file `DA1469xAB.h` and some **ARM** originated headers are have licenses that allow -for redistribution. +for redistribution. Whole SDK repository can be downloaded from Dialog Semiconductor web page `https://www.dialog.com` - - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt index b324eb286..7e8067a6f 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt @@ -24,4 +24,3 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ---------------------------------------------------------------------------*/ - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h index fdb1a971c..8f871ea31 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h @@ -268,4 +268,3 @@ #endif /* __CMSIS_COMPILER_H */ - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h index 47a4b59d8..812c3789a 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h @@ -47,9 +47,9 @@ #ifndef __STATIC_INLINE #define __STATIC_INLINE static inline #endif -#ifndef __STATIC_FORCEINLINE +#ifndef __STATIC_FORCEINLINE #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif +#endif #ifndef __NO_RETURN #define __NO_RETURN __attribute__((__noreturn__)) #endif @@ -586,7 +586,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. - + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \return PSPLIM Register value */ @@ -631,7 +631,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. - + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set */ @@ -768,7 +768,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) { #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_get_fpscr) +#if __has_builtin(__builtin_arm_get_fpscr) // Re-enable using built-in when GCC has been fixed // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h index e2cf6b966..a8cd3ea45 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h @@ -62,7 +62,7 @@ */ #include "cmsis_version.h" - + /* CMSIS CM0 definitions */ #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h index 7249e1331..05b61383e 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h @@ -2065,7 +2065,7 @@ typedef struct /* Special LR values for Secure/Non-Secure call handling and exception handling */ -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ @@ -2080,7 +2080,7 @@ typedef struct /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else +#else #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ #endif diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h index bc3b05109..50bb56333 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h @@ -103,7 +103,7 @@ (MPU_RLAR_EN_Msk)) #if defined(MPU_RLAR_PXN_Pos) - + /** \brief Region Limit Address Register with PXN value * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. @@ -114,7 +114,7 @@ ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ (MPU_RLAR_EN_Msk)) - + #endif /** @@ -124,7 +124,7 @@ typedef struct { uint32_t RBAR; /*!< Region Base Address Register value */ uint32_t RLAR; /*!< Region Limit Address Register value */ } ARM_MPU_Region_t; - + /** Enable the MPU. * \param MPU_Control Default access permissions for unconfigured regions. */ @@ -185,11 +185,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at const uint8_t reg = idx / 4U; const uint32_t pos = ((idx % 4U) * 8U); const uint32_t mask = 0xFFU << pos; - + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { return; // invalid index } - + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); } @@ -236,7 +236,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) * \param rnr Region number to be cleared. */ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) -{ +{ ARM_MPU_ClrRegionEx(MPU_NS, rnr); } #endif @@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) { mpu->RNR = rnr; @@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) { ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); @@ -269,10 +269,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) { - ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); } #endif @@ -284,7 +284,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) { uint32_t i; - for (i = 0U; i < len; ++i) + for (i = 0U; i < len; ++i) { dst[i] = src[i]; } @@ -296,7 +296,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; if (cnt == 1U) { @@ -305,7 +305,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ } else { uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; - + mpu->RNR = rnrBase; while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { uint32_t c = MPU_TYPE_RALIASES - rnrOffset; @@ -316,7 +316,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ rnrBase += MPU_TYPE_RALIASES; mpu->RNR = rnrBase; } - + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); } } @@ -326,7 +326,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU, rnr, table, cnt); } @@ -337,11 +337,10 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); } #endif #endif - diff --git a/hw/mcu/dialog/da1469x/da1469x.ld b/hw/mcu/dialog/da1469x/da1469x.ld index c91dea841..0133f3759 100644 --- a/hw/mcu/dialog/da1469x/da1469x.ld +++ b/hw/mcu/dialog/da1469x/da1469x.ld @@ -225,4 +225,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/mcu/dialog/da1469x/include/mcu/mcu.h b/hw/mcu/dialog/da1469x/include/mcu/mcu.h index 1e6736785..38961e828 100644 --- a/hw/mcu/dialog/da1469x/include/mcu/mcu.h +++ b/hw/mcu/dialog/da1469x/include/mcu/mcu.h @@ -162,4 +162,3 @@ void mcu_gpio_exit_sleep(void); #endif #endif /* __MCU_MCU_H_ */ - diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h index 76a432bfd..9ba24f458 100644 --- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h +++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h @@ -539,7 +539,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v /**@brief Remove a Vendor Specific base UUID. - * + * * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows * the application to reuse memory allocated for Vendor Specific base UUIDs. * diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h index c434fefb3..e11149435 100644 --- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h +++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h @@ -1666,7 +1666,7 @@ SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr * * @retval ::NRF_SUCCESS Address successfully retrieved. * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. * @retval ::NRF_ERROR_INVALID_STATE The advertising set is currently not advertising. */ SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr)); diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c index a7ae013dd..c8de8e0f3 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c @@ -62,7 +62,7 @@ Additional information: WrOff == (RdOff - 1): Buffer is full WrOff > RdOff: Free space includes wrap-around WrOff < RdOff: Used space includes wrap-around - (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0): + (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0): Buffer full and wrap-around after next byte @@ -504,7 +504,7 @@ static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) { * Reads characters from SEGGER real-time-terminal control block * which have been previously stored by the application. * Do not lock against interrupts and multiple access. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data via other channels, such as TCP/IP or UART. * * Parameters @@ -693,7 +693,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe * Function description * Reads characters from SEGGER real-time-terminal control block * which have been previously stored by the application. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data via other channels, such as TCP/IP or UART. * * Parameters @@ -708,7 +708,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe * This function must not be called when J-Link might also do RTT. * This function locks against all other RTT operations. I.e. during * the read operation, writing is also locked. -* If only one consumer reads from the up buffer, +* If only one consumer reads from the up buffer, * call sEGGER_RTT_ReadUpBufferNoLock() instead. */ unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) { @@ -766,7 +766,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz * Function description * Stores a specified number of characters in SEGGER RTT * control block. -* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application +* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application * and overwrites data if the data does not fit into the buffer. * * Parameters @@ -779,7 +779,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz * (2) For performance reasons this function does not call Init() * and may only be called after RTT has been initialized. * Either by calling SEGGER_RTT_Init() or calling another RTT API function first. -* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link +* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link * connection reads RTT data. */ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { @@ -946,7 +946,7 @@ CopyStraight: * Stores a specified number of characters in SEGGER RTT * control block inside a buffer. * SEGGER_RTT_WriteDownBufferNoLock does not lock the application. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data from other channels, such as TCP/IP or UART. * * Parameters @@ -1116,7 +1116,7 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig * This function must not be called when J-Link might also do RTT. * This function locks against all other RTT operations. I.e. during * the write operation, writing from the application is also locked. -* If only one consumer writes to the down buffer, +* If only one consumer writes to the down buffer, * call SEGGER_RTT_WriteDownBufferNoLock() instead. */ unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h index 3c04df55f..07eb4f39e 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h @@ -44,7 +44,7 @@ ---------------------------END-OF-HEADER------------------------------ File : SEGGER_RTT.h Purpose : Implementation of SEGGER real-time transfer which allows - real-time communication on targets which support debugger + real-time communication on targets which support debugger memory accesses while the CPU is running. Revision: $Rev: 17697 $ ---------------------------------------------------------------------- diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S index 78cde4d75..aec372eec 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S @@ -36,9 +36,9 @@ Additional information: #define _THUMB_CODE .code 16 #define _WORD .word #define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax" - #define _ALIGN(Exp) .align Exp + #define _ALIGN(Exp) .align Exp #define _PLACE_LITS .ltorg - #define _DATA_SECT_START + #define _DATA_SECT_START #define _C_STARTUP _start #define _STACK_END __stack_end__ #define _RAMFUNC @@ -58,7 +58,7 @@ Additional information: #define _THUMB_CODE THUMB #define _WORD DCD #define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp) - #define _ALIGN(Exp) alignrom Exp + #define _ALIGN(Exp) alignrom Exp #define _PLACE_LITS #define _DATA_SECT_START DATA #define _C_STARTUP __iar_program_start diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h index 5e79d7e67..fda5a5f51 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h @@ -91,12 +91,12 @@ Revision: $Rev: 18601 $ * * RTT memcpy configuration * -* memcpy() is good for large amounts of data, +* memcpy() is good for large amounts of data, * but the overhead is big for small amounts, which are usually stored via RTT. * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. * * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. -* This is may be required with memory access restrictions, +* This is may be required with memory access restrictions, * such as on Cortex-A devices with MMU. */ #ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP @@ -105,7 +105,7 @@ Revision: $Rev: 18601 $ // // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets // -//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) //#endif @@ -204,7 +204,7 @@ Revision: $Rev: 18601 $ : \ : \ ); - + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ "or %0, %0, a1 \n\t" \ "csrs mstatus, %0 \n\t" \ @@ -345,8 +345,8 @@ Revision: $Rev: 18601 $ #define SEGGER_RTT_LOCK() { \ unsigned long LockState; \ LockState = get_psw() & 0x010000; \ - clrpsw_i(); - + clrpsw_i(); + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | LockState); \ } #endif diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c index da4a4b5f5..6bf670a02 100644 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c +++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c @@ -44,7 +44,7 @@ ---------------------------END-OF-HEADER------------------------------ File : SEGGER_RTT_Syscalls_GCC.c Purpose : Low-level functions for using printf() via RTT in GCC. - To use RTT for printf output, include this file in your + To use RTT for printf output, include this file in your application. Revision: $Rev: 17697 $ ---------------------------------------------------------------------- @@ -62,7 +62,7 @@ Revision: $Rev: 17697 $ ********************************************************************** */ // -// If necessary define the _reent struct +// If necessary define the _reent struct // to match the one passed by the used standard library. // struct _reent; diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c index f7f5aed48..ba9772d3e 100644 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c +++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c @@ -110,7 +110,7 @@ const char __stderr_name[] = "STDERR"; * * Parameters: * c - character to output -* +* */ void _ttywrch(int c) { fputc(c, stdout); // stdout @@ -127,9 +127,9 @@ void _ttywrch(int c) { * Parameters: * sName - sName of the device/file to open * OpenMode - This parameter is currently ignored -* +* * Return value: -* != 0 - Handle to the object to open, otherwise +* != 0 - Handle to the object to open, otherwise * == 0 -"device" is not handled by this module * */ @@ -153,7 +153,7 @@ FILEHANDLE _sys_open(const char * sName, int OpenMode) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * 0 - device/file closed * @@ -176,7 +176,7 @@ int _sys_close(FILEHANDLE hFile) { * pBuffer - Pointer to the data that shall be written * NumBytes - Number of bytes to write * Mode - The Mode that shall be used -* +* * Return value: * Number of bytes *not* written to the file/device * @@ -205,7 +205,7 @@ int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumByte * pBuffer - Pointer to buffer to store the read data * NumBytes - Number of bytes to read * Mode - The Mode that shall be used -* +* * Return value: * Number of bytes read from the file/device * @@ -223,12 +223,12 @@ int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int * _sys_istty * * Function description: -* This function shall return whether the opened file +* This function shall return whether the opened file * is a console device or not. * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * 1 - Device is a console * 0 - Device is not a console @@ -250,10 +250,10 @@ int _sys_istty(FILEHANDLE hFile) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* Pos - -* +* Pos - +* * Return value: -* int - +* int - * */ int _sys_seek(FILEHANDLE hFile, long Pos) { @@ -267,13 +267,13 @@ int _sys_seek(FILEHANDLE hFile, long Pos) { * _sys_ensure * * Function description: -* +* * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: -* int - +* int - * */ int _sys_ensure(FILEHANDLE hFile) { @@ -290,7 +290,7 @@ int _sys_ensure(FILEHANDLE hFile) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * Length of the file * @@ -305,17 +305,17 @@ long _sys_flen(FILEHANDLE hFile) { * _sys_tmpnam * * Function description: -* This function converts the file number fileno for a temporary +* This function converts the file number fileno for a temporary * file to a unique filename, for example, tmp0001. * * Parameters: * pBuffer - Pointer to a buffer to store the name * FileNum - file number to convert * MaxLen - Size of the buffer -* +* * Return value: * 1 - Error -* 0 - Success +* 0 - Success * */ int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) { @@ -335,7 +335,7 @@ int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) { * Parameters: * cmd - Pointer to the command string * len - Length of the string -* +* * Return value: * == NULL - Command was not successfully executed * == sCmd - Command was passed successfully @@ -355,7 +355,7 @@ char * _sys_command_string(char * cmd, int len) { * * Parameters: * ReturnCode - Return code from the main function -* +* * */ void _sys_exit(int ReturnCode) { @@ -373,7 +373,7 @@ void _sys_exit(int ReturnCode) { * * Parameters: * ch - Character to output -* +* * */ int stdout_putchar(int ch) { diff --git a/lib/fatfs/source/00history.txt b/lib/fatfs/source/00history.txt index 7a153a229..f7898cbd9 100644 --- a/lib/fatfs/source/00history.txt +++ b/lib/fatfs/source/00history.txt @@ -366,4 +366,3 @@ R0.15 (November 6, 2022) Fixed f_mkfs() creates broken exFAT volume when the size of volume is >= 2^32 sectors. Fixed string functions cannot write the unicode characters not in BMP when FF_LFN_UNICODE == 2 (UTF-8). Fixed a compatibility issue in identification of GPT header. - diff --git a/lib/fatfs/source/00readme.txt b/lib/fatfs/source/00readme.txt index 3de3aeaa2..48c02a42d 100644 --- a/lib/fatfs/source/00readme.txt +++ b/lib/fatfs/source/00readme.txt @@ -18,4 +18,3 @@ FILES module is only a generic file system layer and it does not depend on any specific storage device. You need to provide a low level disk I/O module written to control the storage device that attached to the target system. - diff --git a/lib/fatfs/source/diskio.c b/lib/fatfs/source/diskio.c index 179e387a2..3cb423db3 100644 --- a/lib/fatfs/source/diskio.c +++ b/lib/fatfs/source/diskio.c @@ -226,4 +226,3 @@ DRESULT disk_ioctl ( return RES_PARERR; } - diff --git a/lib/fatfs/source/ff.c b/lib/fatfs/source/ff.c index 6d412fa0e..05ca02f0a 100644 --- a/lib/fatfs/source/ff.c +++ b/lib/fatfs/source/ff.c @@ -7081,4 +7081,3 @@ FRESULT f_setcp ( return FR_OK; } #endif /* FF_CODE_PAGE == 0 */ - diff --git a/lib/fatfs/source/ffsystem.c b/lib/fatfs/source/ffsystem.c index d5c5134bf..bc0047dce 100644 --- a/lib/fatfs/source/ffsystem.c +++ b/lib/fatfs/source/ffsystem.c @@ -205,4 +205,3 @@ void ff_mutex_give ( } #endif /* FF_FS_REENTRANT */ - diff --git a/lib/networking/dhserver.c b/lib/networking/dhserver.c index 8cd22ddb9..2f14f7a09 100644 --- a/lib/networking/dhserver.c +++ b/lib/networking/dhserver.c @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -267,7 +267,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const DHCP_OFFER, config->domain, config->dns, - entry->lease, + entry->lease, *netif_ip4_addr(netif), config->router, *netif_ip4_netmask(netif)); @@ -309,7 +309,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const DHCP_ACK, config->domain, config->dns, - entry->lease, + entry->lease, *netif_ip4_addr(netif), config->router, *netif_ip4_netmask(netif)); diff --git a/lib/networking/dhserver.h b/lib/networking/dhserver.h index 2a0b15854..b3642459a 100644 --- a/lib/networking/dhserver.h +++ b/lib/networking/dhserver.h @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE diff --git a/lib/networking/dnserver.c b/lib/networking/dnserver.c index 539cc2cea..6d15fee02 100644 --- a/lib/networking/dnserver.c +++ b/lib/networking/dnserver.c @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -165,7 +165,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const answer->ttl = htonl(32); answer->len = htons(4); answer->addr = host_addr.addr; - + udp_sendto(upcb, out, addr, port); pbuf_free(out); diff --git a/lib/networking/dnserver.h b/lib/networking/dnserver.h index a062e3aa7..50b29be89 100644 --- a/lib/networking/dnserver.h +++ b/lib/networking/dnserver.h @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE diff --git a/lib/networking/ndis.h b/lib/networking/ndis.h index 06258e6bb..29b07749c 100644 --- a/lib/networking/ndis.h +++ b/lib/networking/ndis.h @@ -16,14 +16,14 @@ */ /* - * ndis.h - * + * ndis.h + * * Modified by Colin O'Flynn * ntddndis.h modified by Benedikt Spranger - * - * Thanks to the cygwin development team, + * + * Thanks to the cygwin development team, * especially to Casper S. Hornstrup - * + * * THIS SOFTWARE IS NOT COPYRIGHTED * * This source code is offered for use in the public domain. You may diff --git a/lib/networking/rndis_protocol.h b/lib/networking/rndis_protocol.h index b45860eeb..3d07d6fa3 100644 --- a/lib/networking/rndis_protocol.h +++ b/lib/networking/rndis_protocol.h @@ -39,7 +39,7 @@ #ifndef _RNDIS_H #define _RNDIS_H -/** +/** \addtogroup RNDIS @{ */ @@ -112,7 +112,7 @@ typedef struct{ rndis_MinorVersion_t MinorVersion; rndis_MaxTransferSize_t MaxTransferSize; } rndis_initialize_msg_t; - + /* Response: */ typedef struct{ rndis_MessageType_t MessageType; @@ -129,7 +129,7 @@ typedef struct{ rndis_AfListOffset_t AfListOffset; rndis_AfListSize_t AfListSize; } rndis_initialize_cmplt_t; - + /*** Remote NDIS Halt Message ***/ typedef struct{ @@ -137,7 +137,7 @@ typedef struct{ rndis_MessageLength_t MessageLength; rndis_RequestId_t RequestId; } rndis_halt_msg_t; - + typedef uint32_t rndis_Oid_t; typedef uint32_t rndis_InformationBufferLength_t; typedef uint32_t rndis_InformationBufferOffset_t; @@ -153,7 +153,7 @@ typedef struct{ rndis_InformationBufferOffset_t InformationBufferOffset; rndis_DeviceVcHandle_t DeviceVcHandle; } rndis_query_msg_t; - + /* Response: */ typedef struct{ @@ -164,7 +164,7 @@ typedef struct{ rndis_InformationBufferLength_t InformationBufferLength; rndis_InformationBufferOffset_t InformationBufferOffset; } rndis_query_cmplt_t; - + /*** Remote NDIS Set Message ***/ typedef struct{ rndis_MessageType_t MessageType; @@ -175,7 +175,7 @@ typedef struct{ rndis_InformationBufferOffset_t InformationBufferOffset; rndis_DeviceVcHandle_t DeviceVcHandle; } rndis_set_msg_t; - + /* Response */ typedef struct{ rndis_MessageType_t MessageType; @@ -199,9 +199,9 @@ typedef struct{ rndis_ParameterNameLength_t ParameterNameLength; rndis_ParameterType_t ParameterType; rndis_ParameterValueOffset_t ParameterValueOffset; - rndis_ParameterValueLength_t ParameterValueLength; + rndis_ParameterValueLength_t ParameterValueLength; }rndis_config_parameter_t; - + typedef uint32_t rndis_Reserved_t; /*** Remote NDIS Soft Reset Message ***/ @@ -210,7 +210,7 @@ typedef struct{ rndis_MessageLength_t MessageLength; rndis_Reserved_t Reserved; } rndis_reset_msg_t; - + typedef uint32_t rndis_AddressingReset_t; /* Response: */ @@ -220,7 +220,7 @@ typedef struct{ rndis_Status_t Status; rndis_AddressingReset_t AddressingReset; } rndis_reset_cmplt_t; - + /*** Remote NDIS Indicate Status Message ***/ typedef struct{ rndis_MessageType_t MessageType; @@ -229,7 +229,7 @@ typedef struct{ rndis_Status_t StatusBufferLength; rndis_Status_t StatusBufferOffset; } rndis_indicate_status_t; - + typedef uint32_t rndis_DiagStatus_t; typedef uint32_t rndis_ErrorOffset_t; @@ -237,14 +237,14 @@ typedef struct { rndis_DiagStatus_t DiagStatus; rndis_ErrorOffset_t ErrorOffset; }rndis_diagnostic_info_t; - + /*** Remote NDIS Keepalive Message */ typedef struct{ rndis_MessageType_t MessageType; rndis_MessageLength_t MessageLength; rndis_RequestId_t RequestId; }rndis_keepalive_msg_t; - + /* Response: */ typedef struct{ rndis_MessageType_t MessageType; diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c index d129466c8..cc14f174c 100644 --- a/lib/networking/rndis_reports.c +++ b/lib/networking/rndis_reports.c @@ -7,17 +7,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -45,7 +45,7 @@ static rndis_state_t rndis_state; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t ndis_report[8] = { 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; -static const uint32_t OIDSupportedList[] = +static const uint32_t OIDSupportedList[] = { OID_GEN_SUPPORTED_LIST, OID_GEN_HARDWARE_STATUS, @@ -203,8 +203,8 @@ static void rndis_handle_set_msg(void) { rndis_packetFilter(oid_packet_filter); rndis_state = rndis_data_initialized; - } - else + } + else { rndis_state = rndis_initialized; } @@ -266,7 +266,7 @@ void rndis_class_set_handler(uint8_t *data, int size) case REMOTE_NDIS_QUERY_MSG: rndis_query(); break; - + case REMOTE_NDIS_SET_MSG: rndis_handle_set_msg(); break; diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h index ba497906b..70d431282 100644 --- a/src/class/audio/audio.h +++ b/src/class/audio/audio.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -824,10 +824,10 @@ typedef struct TU_ATTR_PACKED uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t direction : 1; ///< Direction type. tusb_dir_t } bmRequestType_bit; - + uint8_t bmRequestType; }; - + uint8_t bRequest; ///< Request type audio_cs_req_t uint8_t bChannelNumber; uint8_t bControlSelector; diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index f21dfee64..32ba5761e 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber, Jerzy Kasenberg @@ -1525,7 +1525,7 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin #endif } } - + } } p_desc = tu_desc_next(p_desc); @@ -2124,7 +2124,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 { if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id); - // Schedule a transmit with the new value if EP is not busy + // Schedule a transmit with the new value if EP is not busy if (!usbd_edpt_busy(rhport, audio->ep_fb)) { // Schedule next transmission - value is changed bytud_audio_n_fb_set() in the meantime or the old value gets sent diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h index 0ef100fa4..7c88b99fc 100644 --- a/src/class/audio/audio_device.h +++ b/src/class/audio/audio_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) @@ -473,7 +473,7 @@ TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id); // the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb // expects 16.16 format and handles the conversion to 10.14 on FS. // -// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the +// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the // driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format. // Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value. diff --git a/src/class/bth/bth_device.h b/src/class/bth/bth_device.h index 1b90d0915..921bd7a1a 100755 --- a/src/class/bth/bth_device.h +++ b/src/class/bth/bth_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index f372fe462..a82ef1d62 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -386,7 +386,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t bool const rts = tu_bit_test(request->wValue, 1); p_cdc->line_state = (uint8_t) request->wValue; - + // Disable fifo overwriting if DTR bit is set tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr); @@ -433,7 +433,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ if ( ep_addr == p_cdc->ep_out ) { tu_fifo_write_n(&p_cdc->rx_ff, p_cdc->epout_buf, (uint16_t) xferred_bytes); - + // Check for wanted char and invoke callback if needed if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) ) { @@ -445,14 +445,14 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ } } } - + // invoke receive callback (if there is still data) if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff) ) tud_cdc_rx_cb(itf); - + // prepare for OUT transaction _prep_out_transaction(p_cdc); } - + // Data sent to host, we continue to fetch from tx fifo to send. // Note: This will cause incorrect baudrate set in line coding. // Though maybe the baudrate is not really important !!! diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index f8a004df4..a6e07aa5c 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index c759527e6..4090d0e9f 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis.h b/src/class/cdc/cdc_rndis.h index e0f129fe3..ad153e0ac 100644 --- a/src/class/cdc/cdc_rndis.h +++ b/src/class/cdc/cdc_rndis.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index 44de85b45..41d21bbad 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h index 447cc4e97..bb431ec1f 100644 --- a/src/class/cdc/cdc_rndis_host.h +++ b/src/class/cdc/cdc_rndis_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h index d9b0ead10..fbd3eef38 100644 --- a/src/class/hid/hid.h +++ b/src/class/hid/hid.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi.h b/src/class/midi/midi.h index 74dc41749..8b78c6555 100644 --- a/src/class/midi/midi.h +++ b/src/class/midi/midi.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index 5dea43431..e3e7826da 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h index 211edc8d1..1c6f996be 100644 --- a/src/class/midi/midi_device.h +++ b/src/class/midi/midi_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h index 84b6e4d79..7f25a29ba 100644 --- a/src/class/msc/msc.h +++ b/src/class/msc/msc.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h index 5839b168d..72f95be06 100644 --- a/src/class/msc/msc_device.h +++ b/src/class/msc/msc_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 6724e486c..2fddeb818 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -232,23 +232,23 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, msc_cbw_t cbw; cbw_init(&cbw, lun); - + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read10_t); - + scsi_read10_t const cmd_read10 = { .cmd_code = SCSI_CMD_READ_10, .lba = tu_htonl(lba), .block_count = tu_htons(block_count) }; - + memcpy(cbw.command, &cmd_read10, cbw.cmd_len); - + return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg); } - + bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg) { msch_interface_t* p_msc = get_itf(dev_addr); diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5134b63c2..6c0e5c9dd 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index a072bfd79..8ac7cbd01 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index aa13c9535..9e9580249 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -430,7 +430,7 @@ static void handle_incoming_datagram(uint32_t len) { ncm_interface.num_datagrams++; } - + tud_network_recv_renew(); } diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h index 6e294465b..133689deb 100644 --- a/src/class/net/net_device.h +++ b/src/class/net/net_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h index fd52d766e..3c5e86d4c 100644 --- a/src/class/usbtmc/usbtmc.h +++ b/src/class/usbtmc/usbtmc.h @@ -316,4 +316,3 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_interrupt_488_t) == 2u, "struct wrong length"); #endif - diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index a4e6eaeb3..8dbda14c5 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -83,7 +83,7 @@ tu_static char logMsg[150]; // Buffer size must be an exact multiple of the max packet size for both // bulk (up to 64 bytes for FS, 512 bytes for HS). In addation, this driver -// imposes a minimum buffer size of 32 bytes. +// imposes a minimum buffer size of 32 bytes. #define USBTMCD_BUFFER_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) /* @@ -598,7 +598,7 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request uint32_t ep_addr = (request->wIndex); // At this point, a transfer MAY be in progress. Based on USB spec, when clearing bulk EP HALT, - // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if + // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if // the EP is not halted. The only USBD API interface to do this is to stall and then un-stall the EP. if(ep_addr == usbtmc_state.ep_bulk_out) { diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 2bb6afa67..9abafda50 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/vendor/vendor_host.c b/src/class/vendor/vendor_host.c index dbea1228d..e66c5007f 100644 --- a/src/class/vendor/vendor_host.c +++ b/src/class/vendor/vendor_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/vendor/vendor_host.h b/src/class/vendor/vendor_host.h index 65223fbca..acfebe7a4 100644 --- a/src/class/vendor/vendor_host.h +++ b/src/class/vendor/vendor_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 02a490aee..d6e98602b 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 30478ba6d..1057d7ca3 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -239,7 +239,7 @@ #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16)) #define TU_BSWAP32(u32) (_builtin_revl(u32)) -#else +#else #error "Compiler attribute porting is required" #endif diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h index ce53955f0..533e67ab8 100644 --- a/src/common/tusb_timeout.h +++ b/src/common/tusb_timeout.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index a52a6d269..12355e8be 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/device/dcd.h b/src/device/dcd.h index 93170732f..00419ff05 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/device/usbd.c b/src/device/usbd.c index 7733cc2e2..0fb236a88 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1398,11 +1398,11 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_ep->bEndpointAddress); - + TU_ASSERT(dcd_edpt_iso_activate); TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX); TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed)); - + _usbd_dev.ep_status[epnum][dir].stalled = false; _usbd_dev.ep_status[epnum][dir].busy = false; _usbd_dev.ep_status[epnum][dir].claimed = false; diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index f860ab0a1..8393d3469 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/host/hcd.h b/src/host/hcd.h index a400626e4..623c12a12 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/host/hub.c b/src/host/hub.c index 3da5358b2..b84042fb6 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -202,7 +202,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer, 0); - + TU_ASSERT(tuh_edpt_open(dev_addr, desc_ep)); hub_interface_t* p_hub = get_itf(dev_addr); diff --git a/src/host/usbh.h b/src/host/usbh.h index 37de7093c..7942de5c2 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal.h b/src/osal/osal.h index afa3826fc..f092e8ffb 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index 9393d1f26..477f64892 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 2e2b3c7ce..5f407378e 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h index 8b428d642..e6efa0968 100644 --- a/src/osal/osal_pico.h +++ b/src/osal/osal_pico.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h index dea1c12c8..e443135e0 100644 --- a/src/osal/osal_rtx4.h +++ b/src/osal/osal_rtx4.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Tian Yunhao (t123yh) @@ -115,7 +115,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd os_mbx_declare(_name##__mbox, _depth); \ _declare_box(_name##__pool, sizeof(_type), _depth); \ osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox }; - + typedef struct { diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c index efca5bdcb..95dfda49c 100644 --- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c +++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2021 Bridgetek Pte Ltd @@ -24,15 +24,15 @@ * This file is part of the TinyUSB stack. */ -/* - * Contains code adapted from Bridgetek Pte Ltd via license terms stated +/* + * Contains code adapted from Bridgetek Pte Ltd via license terms stated * in https://brtchip.com/BRTSourceCodeLicenseAgreement */ #include "tusb_option.h" #if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X) + (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X) #include #include @@ -58,7 +58,7 @@ struct ft9xx_xfer_state { volatile uint8_t ready; // OUT Transfer has been received and waiting for transfer. volatile uint8_t valid; // Transfer is pending and total_size, remain_size, and buff_ptr are valid. - + int16_t total_size; // Total transfer size in bytes for this transfer. int16_t remain_size; // Total remaining in transfer. uint8_t *buff_ptr; // Pointer to buffer to transmit from or receive to. @@ -92,7 +92,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len // Manage an OUT transfer from the host. // This can be up-to the maximum packet size of the endpoint. -// Continuation of a transfer beyond the maximum packet size is performed +// Continuation of a transfer beyond the maximum packet size is performed // by the interrupt handler. static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes) { @@ -125,7 +125,7 @@ static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_ // Manage an IN transfer to the host. // This can be up-to the maximum packet size of the endpoint. -// Continuation of a transfer beyond the maximum packet size is performed +// Continuation of a transfer beyond the maximum packet size is performed // by the interrupt handler. static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes) { @@ -196,7 +196,7 @@ static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t return xfer_bytes; } -// Reset all non-control endpoints to a default state. +// Reset all non-control endpoints to a default state. // Control endpoint is always enabled and ready. All others disabled. static void _ft9xx_reset_edpts(void) { @@ -208,7 +208,7 @@ static void _ft9xx_reset_edpts(void) // Disable hardware. USBD_EP_CR_REG(i) = 0; } - + // Enable interrupts from USB device control. USBD_REG(cmie) = MASK_USBD_CMIE_ALL; } @@ -319,7 +319,7 @@ static void _dcd_ft9xx_detach(void) } // Determine the speed of the USB to which we are connected. -// Set the speed of the PHY accordingly. +// Set the speed of the PHY accordingly. // High speed can be disabled through CFG_TUSB_RHPORT0_MODE or CFG_TUD_MAX_SPEED settings. static void _ft9xx_usb_speed(void) { @@ -379,16 +379,16 @@ static void _ft9xx_usb_speed(void) } // Send a buffer to the USB IN FIFO. -// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data +// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data // to the FIFO using the most efficient MCU streamout combination. -// If streaming is disabled then it will send each byte of the buffer in turn +// If streaming is disabled then it will send each byte of the buffer in turn // to the FIFO. The is no reason to not stream. // The total number of bytes sent to the FIFO is returned. static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_t length) { uint16_t bytes_read = 0; uint16_t buff_size = length; - + #ifdef USBD_USE_STREAMS volatile uint8_t *data_reg; @@ -423,7 +423,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_ bytes_read = buff_size; } #else // USBD_USE_STREAMS - + bytes_read = buff_size; while (buff_size--) { @@ -438,7 +438,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_ // Receive a buffer from the USB OUT FIFO. // When the macro USBD_USE_STREAMS is defined this will stream from the FIFO // to a buffer of data using the most efficient MCU streamin combination. -// If streaming is disabled then it will receive each byte from the FIFO in turn +// If streaming is disabled then it will receive each byte from the FIFO in turn // to the buffer. The is no reason to not stream. // The total number of bytes received from the FIFO is returned. static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t length) @@ -448,7 +448,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len #endif // USBD_USE_STREAMS uint16_t bytes_read = 0; uint16_t buff_size = length; - + if (length > 0) { if (ep_number == USBD_EP_0) @@ -596,7 +596,7 @@ void dcd_remote_wakeup(uint8_t rhport) SYS->MSC0CFG = SYS->MSC0CFG | MASK_SYS_MSC0CFG_DEV_RMWAKEUP; // At least 2 ms of delay needed for RESUME Data K state. - delayms(2); + delayms(2); SYS->MSC0CFG &= ~MASK_SYS_MSC0CFG_DEV_RMWAKEUP; @@ -621,7 +621,7 @@ void dcd_connect(uint8_t rhport) // Determine bus speed and signal speed to tusb. _ft9xx_usb_speed(); } - + // Setup the control endpoint only. #if CFG_TUD_ENDPOINT0_SIZE == 64 USBD_EP_CR_REG(USBD_EP_0) = (USBD_EP0_MAX_SIZE_64 << BIT_USBD_EP0_MAX_SIZE); @@ -702,7 +702,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) TU_LOG1("FT9xx endpoint size not valid: requested %d max 1024\r\n", ep_size); return false; } - // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the + // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the // requested size. ep_buff_size = 8 << ep_reg_size; @@ -714,7 +714,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) if (ep_xfer[ep_number].type != USBD_EP_TYPE_DISABLED) { // This could be because an endpoint has been assigned with the same number. - // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There + // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There // cannot been an 0x81 and 0x01 endpoint. TU_LOG1("FT9xx endpoint %d already assigned\r\n", ep_number); return false; @@ -723,7 +723,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) // Check that there is enough buffer RAM to allocate to this new endpoint. // Available buffer RAM depends on the device revision. // The IN and OUT buffer RAM should be the same size. - if (ep_dir == USBD_DIR_IN) + if (ep_dir == USBD_DIR_IN) total_ram = USBD_RAMTOTAL_IN; else total_ram = USBD_RAMTOTAL_OUT; @@ -753,7 +753,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) if (total_ram < ep_buff_size) { TU_LOG1("FT9xx insufficient buffer RAM for endpoint %d\r\n", ep_number); - return false; + return false; } // Set the type of this endpoint in the control register. @@ -827,7 +827,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to ep_xfer[ep_number].total_size = total_bytes; ep_xfer[ep_number].remain_size = total_bytes; ep_xfer[ep_number].buff_ptr = buffer; - + if (ep_number == USBD_EP_0) { ep_xfer[USBD_EP_0].dir = ep_dir; @@ -876,7 +876,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to // then report the transfer complete with dcd_event_xfer_complete. ep_xfer[ep_number].valid = 1; } - } + } status = true; } else @@ -922,7 +922,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) CRITICAL_SECTION_END } -// Clear stall (non-control endpoint), data toggle is also reset to DATA0 +// Clear stall (non-control endpoint), data toggle is also reset to DATA0 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { uint8_t ep_number = tu_edpt_number(ep_addr); @@ -1025,7 +1025,7 @@ void dcd_int_handler(uint8_t rhport) // Host has sent a SETUP packet. Receive this into the SETUP packet store. _ft9xx_dusb_out(USBD_EP_0, (uint8_t *)_ft9xx_setup_packet, sizeof(USB_device_request)); - + // Send the packet to tinyusb. dcd_event_setup_received(BOARD_TUD_RHPORT, _ft9xx_setup_packet, true); @@ -1046,13 +1046,13 @@ void dcd_int_handler(uint8_t rhport) { xfer_bytes = (uint16_t)ep_xfer[USBD_EP_0].total_size; - // Transfer incoming data from an OUT packet to the buffer supplied. + // Transfer incoming data from an OUT packet to the buffer supplied. if (ep_xfer[USBD_EP_0].dir == TUSB_DIR_OUT) { xfer_bytes = _ft9xx_edpt_xfer_out(USBD_EP_0, ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes); } // Now signal completion of data packet. - dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), + dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true); // Incoming FIFO has been cleared. @@ -1097,13 +1097,13 @@ void dcd_int_handler(uint8_t rhport) // Start or continue an OUT transfer. if (ep_xfer[ep_number].dir == TUSB_DIR_OUT) { - xfer_bytes = _ft9xx_edpt_xfer_out(ep_number, - ep_xfer[ep_number].buff_ptr, + xfer_bytes = _ft9xx_edpt_xfer_out(ep_number, + ep_xfer[ep_number].buff_ptr, (uint16_t)ep_xfer[ep_number].remain_size); // Report each OUT packet received to the stack. - dcd_event_xfer_complete(BOARD_TUD_RHPORT, - ep_number /* | TUSB_DIR_OUT_MASK */, + dcd_event_xfer_complete(BOARD_TUD_RHPORT, + ep_number /* | TUSB_DIR_OUT_MASK */, xfer_bytes, XFER_RESULT_SUCCESS, true); ep_xfer[ep_number].buff_ptr += xfer_bytes; @@ -1114,8 +1114,8 @@ void dcd_int_handler(uint8_t rhport) { if (ep_xfer[ep_number].remain_size > 0) { - xfer_bytes = _ft9xx_edpt_xfer_in(ep_number, - ep_xfer[ep_number].buff_ptr, + xfer_bytes = _ft9xx_edpt_xfer_in(ep_number, + ep_xfer[ep_number].buff_ptr, (uint16_t)ep_xfer[ep_number].remain_size); ep_xfer[ep_number].buff_ptr += xfer_bytes; @@ -1124,8 +1124,8 @@ void dcd_int_handler(uint8_t rhport) if (ep_xfer[ep_number].remain_size == 0) { - dcd_event_xfer_complete(BOARD_TUD_RHPORT, - ep_number | TUSB_DIR_IN_MASK, + dcd_event_xfer_complete(BOARD_TUD_RHPORT, + ep_number | TUSB_DIR_IN_MASK, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true); } } @@ -1151,7 +1151,7 @@ void dcd_int_handler(uint8_t rhport) // once the transfer is initiated. // Strictly this should not happen for a non-control endpoint. Interrupts // are disabled when there are no transfers setup for an endpoint. - ep_xfer[ep_number].ready = 1; + ep_xfer[ep_number].ready = 1; } } } @@ -1159,13 +1159,13 @@ void dcd_int_handler(uint8_t rhport) } } -// Power management interrupt handler. +// Power management interrupt handler. // This handles USB device related power management interrupts only. void ft9xx_usbd_pm_ISR(void) { uint16_t pmcfg = SYS->PMCFG_H; - // Main interrupt handler is responible for + // Main interrupt handler is responible for if (pmcfg & MASK_SYS_PMCFG_DEV_CONN_DEV) { // Signal connection interrupt diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h index 728a86b86..31b5a012d 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_type.h +++ b/src/portable/chipidea/ci_hs/ci_hs_type.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 5bccf81a7..bc6736cf2 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -545,7 +545,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes); } } - + // only number of bytes in the IOC qtd dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true); } diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index d0396daea..d607627b4 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 7140897a1..ee9dfb11f 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -566,7 +566,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms) case EHCI_QTYPE_ITD: // TODO support hs/fs ISO case EHCI_QTYPE_SITD: case EHCI_QTYPE_FSTN: - + default: break; } @@ -683,7 +683,7 @@ void hcd_int_handler(uint8_t rhport) uint32_t int_status = regs->status; int_status &= regs->inten; - + regs->status = int_status; // Acknowledge handled interrupt if (int_status == 0) return; diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index 41240f737..1fcfb6241 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -874,4 +874,3 @@ void dcd_int_disable (uint8_t rhport) } #endif // #if OPT_MCU_ESP32S2 || OPT_MCU_ESP32S3 - diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 0ba53d4d0..487761847 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA @@ -572,7 +572,7 @@ static void process_bus_reset(uint8_t rhport) _dcd.pipe0.buf = NULL; USB0->TXIE = 1; /* Enable only EP0 */ - USB0->RXIE = 0; + USB0->RXIE = 0; /* Clear FIFO settings */ for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { @@ -722,7 +722,7 @@ void dcd_edpt_close_all(uint8_t rhport) unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn); NVIC_DisableIRQ(USB0_IRQn); USB0->TXIE = 1; /* Enable only EP0 */ - USB0->RXIE = 0; + USB0->RXIE = 0; for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { regs->TXMAXP = 0; regs->TXCSRH = 0; @@ -854,7 +854,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) if (tu_edpt_dir(ep_addr)) { /* IN */ regs->TXCSRL = USB_TXCSRL1_CLRDT; } else { /* OUT */ - regs->RXCSRL = USB_RXCSRL1_CLRDT; + regs->RXCSRL = USB_RXCSRL1_CLRDT; } if (ie) NVIC_EnableIRQ(USB0_IRQn); } diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c index 85e18e3aa..9eb2e005e 100644 --- a/src/portable/mentor/musb/hcd_musb.c +++ b/src/portable/mentor/musb/hcd_musb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA @@ -588,7 +588,7 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); return USB0->FRAME; diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c index 6cf0e6285..6986c8317 100644 --- a/src/portable/microchip/pic/dcd_pic.c +++ b/src/portable/microchip/pic/dcd_pic.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Koji Kitayama @@ -486,7 +486,7 @@ void dcd_init(uint8_t rhport) #else U1PWRCbits.USBPWR = 1; #endif - + #if TU_PIC_INT_SIZE == 4 uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt); diff --git a/src/portable/microchip/pic32mz/usbhs_registers.h b/src/portable/microchip/pic32mz/usbhs_registers.h index 93b552322..03fe78bbd 100644 --- a/src/portable/microchip/pic32mz/usbhs_registers.h +++ b/src/portable/microchip/pic32mz/usbhs_registers.h @@ -21,7 +21,7 @@ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. *******************************************************************************/ /******************************************************************************* - USBHS Peripheral Library Register Definitions + USBHS Peripheral Library Register Definitions File Name: usbhs_registers.h @@ -50,16 +50,16 @@ #define USBHS_REG_INTRRX 0x004 #define USBHS_REG_INTRTXE 0x006 #define USBHS_REG_INTRRXE 0x008 -#define USBHS_REG_INTRUSB 0x00A -#define USBHS_REG_INTRUSBE 0x00B +#define USBHS_REG_INTRUSB 0x00A +#define USBHS_REG_INTRUSBE 0x00B #define USBHS_REG_FRAME 0x00C #define USBHS_REG_INDEX 0x00E #define USBHS_REG_TESTMODE 0x00F /******************************************************* - * Endpoint Control Status Registers (CSR). These values + * Endpoint Control Status Registers (CSR). These values * should be added to either the 0x10 to access the - * register through Indexed CSR. To access the actual + * register through Indexed CSR. To access the actual * CSR, see ahead in this header file. ******************************************************/ @@ -99,20 +99,20 @@ #define USBHS_EP_DEVICE_RX_SEND_STALL 0x20 /* FADDR - Device Function Address */ -typedef union +typedef union { - struct __attribute__((packed)) + struct __attribute__((packed)) { unsigned FUNC:7; unsigned :1; }; - uint8_t w; + uint8_t w; } __USBHS_FADDR_t; /* POWER - Control Resume and Suspend signalling */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -126,14 +126,14 @@ typedef union unsigned ISOUPD:1; }; struct - { + { uint8_t w; }; } __USBHS_POWER_t; /* INTRTXE - Transmit endpoint interrupt enable */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -155,7 +155,7 @@ typedef union } __USBHS_INTRTXE_t; /* INTRRXE - Receive endpoint interrupt enable */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -198,7 +198,7 @@ typedef union } __USBHS_INTRUSBE_t; /* FRAME - Frame number */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -213,7 +213,7 @@ typedef union } __USBHS_FRAME_t; /* INDEX - Endpoint index */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -228,7 +228,7 @@ typedef union } __USBHS_INDEX_t; /* TESTMODE - Test mode register */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -248,7 +248,7 @@ typedef union } __USBHS_TESTMODE_t; -/* COUNT0 - Indicates the amount of data received in endpoint 0 */ +/* COUNT0 - Indicates the amount of data received in endpoint 0 */ typedef union { struct __attribute__((packed)) @@ -627,7 +627,7 @@ typedef union }; uint16_t w; -} __USBHS_TXMAXP_t; +} __USBHS_TXMAXP_t; /* TXFIFOSZ - Size of the transmit endpoint FIFO */ typedef struct __attribute__((packed)) @@ -781,7 +781,7 @@ typedef union } __USBHS_DMACNTL_t; -/* Endpoint Control and Status Register Set */ +/* Endpoint Control and Status Register Set */ typedef struct __attribute__((packed)) { volatile __USBHS_TXMAXP_t TXMAXPbits; @@ -906,7 +906,7 @@ typedef struct __attribute__((aligned(4),packed)) volatile __USBHS_TXFIFOADD_t TXFIFOADDbits; volatile __USBHS_RXFIFOADD_t RXFIFOADDbits; - + volatile uint32_t VCONTROL; volatile uint16_t HWVERS; volatile uint8_t padding1[10]; @@ -923,7 +923,7 @@ typedef struct __attribute__((aligned(4),packed)) volatile __USBHS_TARGET_ADDR_t TADDR[16]; volatile __USBHS_EPCSR_t EPCSR[16]; volatile uint32_t DMA_INTR; - volatile __USBHS_DMA_CHANNEL_t DMA_CHANNEL[8]; + volatile __USBHS_DMA_CHANNEL_t DMA_CHANNEL[8]; volatile uint32_t RQPKTXOUNT[16]; } usbhs_registers_t; diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 814e680fb..e3fa51e31 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/src/portable/microchip/samx7x/common_usb_regs.h b/src/portable/microchip/samx7x/common_usb_regs.h index d232f0bcb..db4a81e0e 100644 --- a/src/portable/microchip/samx7x/common_usb_regs.h +++ b/src/portable/microchip/samx7x/common_usb_regs.h @@ -2007,7 +2007,7 @@ /** \brief DEVDMA hardware registers */ typedef struct -{ +{ __IO uint32_t DEVDMANXTDSC; /**< (DEVDMA Offset: 0x00) Device DMA Channel Next Descriptor Address Register */ __IO uint32_t DEVDMAADDRESS; /**< (DEVDMA Offset: 0x04) Device DMA Channel Address Register */ __IO uint32_t DEVDMACONTROL; /**< (DEVDMA Offset: 0x08) Device DMA Channel Control Register */ @@ -2016,7 +2016,7 @@ typedef struct /** \brief HSTDMA hardware registers */ typedef struct -{ +{ __IO uint32_t HSTDMANXTDSC; /**< (HSTDMA Offset: 0x00) Host DMA Channel Next Descriptor Address Register */ __IO uint32_t HSTDMAADDRESS; /**< (HSTDMA Offset: 0x04) Host DMA Channel Address Register */ __IO uint32_t HSTDMACONTROL; /**< (HSTDMA Offset: 0x08) Host DMA Channel Control Register */ @@ -2025,7 +2025,7 @@ typedef struct /** \brief USBHS hardware registers */ typedef struct -{ +{ __IO uint32_t DEVCTRL; /**< (USBHS Offset: 0x00) Device General Control Register */ __I uint32_t DEVISR; /**< (USBHS Offset: 0x04) Device Global Interrupt Status Register */ __O uint32_t DEVICR; /**< (USBHS Offset: 0x08) Device Global Interrupt Clear Register */ diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 24657872b..2bbb345d6 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -241,7 +241,7 @@ static void dcd_ep_handler(uint8_t ep_ix) if (int_status & DEVEPTISR_RXOUTI) { uint8_t *ptr = EP_GET_FIFO_PTR(0,8); - + if (count && xfer->total_len) { uint16_t remain = xfer->total_len - xfer->queued_len; @@ -252,7 +252,7 @@ static void dcd_ep_handler(uint8_t ep_ix) if (xfer->buffer) { memcpy(xfer->buffer + xfer->queued_len, ptr, count); - } else + } else { tu_fifo_write_n(xfer->fifo, ptr, count); } @@ -281,7 +281,7 @@ static void dcd_ep_handler(uint8_t ep_ix) { // TX not complete dcd_transmit_packet(xfer, 0); - } else + } else { // TX complete dcd_event_xfer_complete(0, 0x80 + 0, xfer->total_len, XFER_RESULT_SUCCESS, true); @@ -292,7 +292,7 @@ static void dcd_ep_handler(uint8_t ep_ix) } } } - } else + } else { if (int_status & DEVEPTISR_RXOUTI) { @@ -333,7 +333,7 @@ static void dcd_ep_handler(uint8_t ep_ix) { // TX not complete dcd_transmit_packet(xfer, ep_ix); - } else + } else { // TX complete dcd_event_xfer_complete(0, 0x80 + ep_ix, xfer->total_len, XFER_RESULT_SUCCESS, true); @@ -359,7 +359,7 @@ static void dcd_dma_handler(uint8_t ep_ix) if(USB_REG->DEVEPTCFG[ep_ix] & DEVEPTCFG_EPDIR) { dcd_event_xfer_complete(0, 0x80 + ep_ix, count, XFER_RESULT_SUCCESS, true); - } else + } else { dcd_event_xfer_complete(0, ep_ix, count, XFER_RESULT_SUCCESS, true); } @@ -507,12 +507,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) // Enable Endpoint 0 Interrupts USB_REG->DEVIER = DEVIER_PEP_0; return true; - } else + } else { // Endpoint configuration is not successful return false; } - } else + } else { // Enable the endpoint USB_REG->DEVEPT |= ((0x01 << epnum) << DEVEPT_EPEN0_Pos); @@ -544,7 +544,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) { USB_REG->DEVIER = ((0x01 << epnum) << DEVIER_PEP_0_Pos); return true; - } else + } else { // Endpoint configuration is not successful return false; @@ -583,7 +583,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix) { memcpy(ptr, xfer->buffer + xfer->queued_len, len); } - else + else { tu_fifo_read_n(xfer->fifo, ptr, len); } @@ -595,7 +595,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix) { // Control endpoint: clear the interrupt flag to send the data USB_REG->DEVEPTICR[0] = DEVEPTICR_TXINIC; - } else + } else { // Other endpoint types: clear the FIFO control flag to send the data USB_REG->DEVEPTIDR[ep_ix] = DEVEPTIDR_FIFOCONC; @@ -616,7 +616,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t xfer->total_len = total_bytes; xfer->queued_len = 0; xfer->fifo = NULL; - + if (EP_DMA_SUPPORT(epnum) && total_bytes != 0) { // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the @@ -648,12 +648,12 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t // and the DMA transfer must be not started. // It is the end of transfer return false; - } else + } else { if (dir == TUSB_DIR_OUT) { USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES; - } else + } else { dcd_transmit_packet(xfer,epnum); } @@ -701,20 +701,20 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 // Clean invalidate cache of linear part CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31); - + USB_REG->DEVDMA[epnum - 1].DEVDMAADDRESS = (uint32_t)info.ptr_lin; if (info.len_wrap) { // Clean invalidate cache of wrapped part CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31); - + dma_desc[epnum - 1].next_desc = 0; dma_desc[epnum - 1].buff_addr = (uint32_t)info.ptr_wrap; dma_desc[epnum - 1].chnl_ctrl = udd_dma_ctrl_wrap | (info.len_wrap << DEVDMACONTROL_BUFF_LENGTH_Pos); // Clean cache of wrapped DMA descriptor CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t)); - + udd_dma_ctrl_lin |= DEVDMASTATUS_DESC_LDST; USB_REG->DEVDMA[epnum - 1].DEVDMANXTDSC = (uint32_t)&dma_desc[epnum - 1]; } else { @@ -743,7 +743,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 if (dir == TUSB_DIR_OUT) { USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES; - } else + } else { dcd_transmit_packet(xfer,epnum); } diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 4aeb85fc0..eee5686f4 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c index 2fdc05f36..fb12122e0 100644 --- a/src/portable/nuvoton/nuc120/dcd_nuc120.c +++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex, - so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to - implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for + The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex, + so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to + implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for EP0_IN and EP0_OUT respectively. This leaves up to four for user usage. */ diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c index a56b5f8e8..873b1b7ef 100644 --- a/src/portable/nuvoton/nuc121/dcd_nuc121.c +++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex, - so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to - implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for + The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex, + so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to + implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for EP0_IN and EP0_OUT respectively. This leaves up to six for user usage. */ diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 3fa7c1ec1..3a92c9794 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition + The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition to dedicated support for the control endpoint (EP0). The non-user endpoints - are referred to as "user" EPs in this code, and follow the datasheet + are referred to as "user" EPs in this code, and follow the datasheet nomenclature of EPA through EPL. */ @@ -389,7 +389,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to while (total_bytes < USBD->CEPRXCNT); for (int count = 0; count < total_bytes; count++) *buffer++ = USBD->CEPDAT_BYTE; - + dcd_event_xfer_complete(0, ep_addr, total_bytes, XFER_RESULT_SUCCESS, true); } } diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 13eb105cd..b6daec3de 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Koji Kitayama @@ -296,7 +296,7 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - _dcd.addr = dev_addr & 0x7F; + _dcd.addr = dev_addr & 0x7F; /* Response with status first before changing device address */ dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); } @@ -528,7 +528,7 @@ void dcd_int_handler(uint8_t rhport) if (is & USB_ISTAT_SLEEP_MASK) { // TU_LOG2("Suspend: "); TU_LOG2_HEX(is); - // Note Host usually has extra delay after bus reset (without SOF), which could falsely + // Note Host usually has extra delay after bus reset (without SOF), which could falsely // detected as Sleep event. Though usbd has debouncing logic so we are good KHCI->ISTAT = USB_ISTAT_SLEEP_MASK; process_bus_sleep(rhport); diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 0f5fa6275..35763f121 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji Kitayama @@ -414,7 +414,7 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); uint32_t frmnum = KHCI->FRMNUML; diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 0894a5eeb..86149afd8 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h index 07daa32e4..654b80866 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c index ad9ed59b4..372dcf51f 100644 --- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) @@ -44,4 +44,3 @@ void hcd_int_disable(uint8_t rhport) } #endif - diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 124656307..5368ef868 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -373,7 +373,7 @@ void dcd_edpt_close_all (uint8_t rhport) void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - + uint8_t ep_id = ep_addr2id(ep_addr); _dcd.ep[ep_id][0].cmd_sts.active = _dcd.ep[ep_id][0].cmd_sts.active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual) _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1; @@ -426,7 +426,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to static void bus_reset(uint8_t rhport) { tu_memclr(&_dcd, sizeof(dcd_data_t)); - edpt_reset_all(rhport); + edpt_reset_all(rhport); // disable all endpoints as specified by LPC55S69 UM Table 778 for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++) @@ -575,4 +575,3 @@ void dcd_int_handler(uint8_t rhport) } #endif - diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h index 69074de41..95ae1903e 100644 --- a/src/portable/nxp/transdimension/common_transdimension.h +++ b/src/portable/nxp/transdimension/common_transdimension.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 1f27a6872..983d7cfcf 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -569,7 +569,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes); } } - + // only number of bytes in the IOC qtd dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true); } diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 392764ff6..0b3e9e4ef 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index b615743b8..260804d3d 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -715,4 +715,3 @@ void hcd_int_handler(uint8_t hostid) #endif - diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 1bc5594d8..e6daf6827 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index a06407f23..9f8e58d42 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -47,7 +47,7 @@ typedef struct hw_endpoint { // Is this a valid struct bool configured; - + // Transfer direction (i.e. IN is rx for host but tx for device) // allows us to common up transfer functions bool rx; diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index e49c0b52e..1677cfa12 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Nathan Conrad @@ -181,7 +181,7 @@ static void dcd_handle_bus_reset(void); static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix); static void dcd_ep_ctr_handler(void); -// PMA allocation/access +// PMA allocation/access static uint8_t open_ep_count; static uint16_t ep_buf_ptr; ///< Points to first free memory location static void dcd_pma_alloc_reset(void); @@ -249,7 +249,7 @@ void dcd_init (uint8_t rhport) asm("NOP"); } USB->CNTR = 0; // Enable USB - + USB->BTABLE = DCD_STM32_BTABLE_BASE; USB->ISTR = 0; // Clear pending interrupts @@ -263,7 +263,7 @@ void dcd_init (uint8_t rhport) USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM; dcd_handle_bus_reset(); - + // Enable pull-up if supported if ( dcd_connect ) dcd_connect(rhport); } @@ -464,12 +464,12 @@ static void dcd_handle_bus_reset(void) //__IO uint16_t * const epreg = &(EPREG(0)); USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag - + for(uint32_t i=0; iep_idx = ep_idx; pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS); - + *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr; *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr; - + return true; } @@ -1035,7 +1035,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endpo { pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS); } - + pcd_set_ep_address(USB, ep_idx, tu_edpt_number(p_endpoint_desc->bEndpointAddress)); // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint) // or being double-buffered (bulk endpoints) @@ -1250,11 +1250,11 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN { // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies tu_fifo_buffer_info_t info; - tu_fifo_get_read_info(ff, &info); - + tu_fifo_get_read_info(ff, &info); + uint16_t cnt_lin = TU_MIN(wNBytes, info.len_lin); uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap); - + // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part, // last lin byte will be combined with wrapped part // To ensure PMA is always access 16bit aligned (dst aligned to 16 bit) @@ -1352,7 +1352,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB // Copy last linear byte & first wrapped byte uint16_t tmp; dcd_read_packet_memory(&tmp, src, 2); - + ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = (uint8_t)tmp; ((uint8_t*)info.ptr_wrap)[0] = (uint8_t)(tmp >> 8U); src += 2; @@ -1379,4 +1379,3 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB } #endif - diff --git a/src/portable/st/synopsys/synopsys_common.h b/src/portable/st/synopsys/synopsys_common.h index 6f0602fe9..ce3195b23 100644 --- a/src/portable/st/synopsys/synopsys_common.h +++ b/src/portable/st/synopsys/synopsys_common.h @@ -2,15 +2,15 @@ ****************************************************************************** * @file synopsys_common.h * @author MCD Application Team - * @brief CMSIS Cortex-M3 Device USB OTG peripheral Header File. - * This file contains the USB OTG peripheral register's definitions, bits + * @brief CMSIS Cortex-M3 Device USB OTG peripheral Header File. + * This file contains the USB OTG peripheral register's definitions, bits * definitions and memory mapping for STM32F1xx devices. - * + * * This file contains: * - Data structures and the address mapping for the USB OTG peripheral * - The Peripheral's registers declarations and bits definition * - Macros to access the peripheral's registers hardware - * + * ****************************************************************************** * @attention * @@ -40,7 +40,7 @@ #define __OM volatile #define __IOM volatile -/** +/** * @brief __USB_OTG_Core_register */ @@ -66,11 +66,11 @@ typedef struct __IO uint32_t DIEPTXF[0x0F]; /*!< dev Periodic Transmit FIFO Address offset: 0x104 */ } USB_OTG_GlobalTypeDef; -/** +/** * @brief __device_Registers */ -typedef struct +typedef struct { __IO uint32_t DCFG; /*!< dev Configuration Register Address offset: 800h*/ __IO uint32_t DCTL; /*!< dev Control Register Address offset: 804h*/ @@ -87,18 +87,18 @@ typedef struct __IO uint32_t DTHRCTL; /*!< dev thr Address offset: 830h*/ __IO uint32_t DIEPEMPMSK; /*!< dev empty msk Address offset: 834h*/ __IO uint32_t DEACHINT; /*!< dedicated EP interrupt Address offset: 838h*/ - __IO uint32_t DEACHMSK; /*!< dedicated EP msk Address offset: 83Ch*/ + __IO uint32_t DEACHMSK; /*!< dedicated EP msk Address offset: 83Ch*/ uint32_t Reserved40; /*!< dedicated EP mask Address offset: 840h*/ __IO uint32_t DINEP1MSK; /*!< dedicated EP mask Address offset: 844h*/ uint32_t Reserved44[15]; /*!< Reserved 844-87Ch*/ __IO uint32_t DOUTEP1MSK; /*!< dedicated EP msk Address offset: 884h*/ } USB_OTG_DeviceTypeDef; -/** +/** * @brief __IN_Endpoint-Specific_Register */ -typedef struct +typedef struct { __IO uint32_t DIEPCTL; /*!< dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ uint32_t Reserved04; /*!< Reserved 900h + (ep_num * 20h) + 04h*/ @@ -110,11 +110,11 @@ typedef struct uint32_t Reserved18; /*!< Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ } USB_OTG_INEndpointTypeDef; -/** +/** * @brief __OUT_Endpoint-Specific_Registers */ -typedef struct +typedef struct { __IO uint32_t DOEPCTL; /*!< dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ uint32_t Reserved04; /*!< Reserved B00h + (ep_num * 20h) + 04h*/ @@ -125,11 +125,11 @@ typedef struct uint32_t Reserved18[2]; /*!< Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ } USB_OTG_OUTEndpointTypeDef; -/** +/** * @brief __Host_Mode_Register_Structures */ -typedef struct +typedef struct { __IO uint32_t HCFG; /*!< Host Configuration Register 400h*/ __IO uint32_t HFIR; /*!< Host Frame Interval Register 404h*/ @@ -140,7 +140,7 @@ typedef struct __IO uint32_t HAINTMSK; /*!< Host All Channels Interrupt Mask 418h*/ } USB_OTG_HostTypeDef; -/** +/** * @brief __Host_Channel_Specific_Registers */ @@ -177,60 +177,60 @@ typedef struct /* */ /******************************************************************************/ /******************** Bit definition for USB_OTG_GOTGCTL register ***********/ -#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U) +#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U) #define USB_OTG_GOTGCTL_SRQSCS_Msk (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */ #define USB_OTG_GOTGCTL_SRQSCS USB_OTG_GOTGCTL_SRQSCS_Msk /*!< Session request success */ -#define USB_OTG_GOTGCTL_SRQ_Pos (1U) +#define USB_OTG_GOTGCTL_SRQ_Pos (1U) #define USB_OTG_GOTGCTL_SRQ_Msk (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */ #define USB_OTG_GOTGCTL_SRQ USB_OTG_GOTGCTL_SRQ_Msk /*!< Session request */ -#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U) +#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U) #define USB_OTG_GOTGCTL_HNGSCS_Msk (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */ #define USB_OTG_GOTGCTL_HNGSCS USB_OTG_GOTGCTL_HNGSCS_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U) +#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U) #define USB_OTG_GOTGCTL_HNPRQ_Msk (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */ #define USB_OTG_GOTGCTL_HNPRQ USB_OTG_GOTGCTL_HNPRQ_Msk /*!< HNP request */ -#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U) +#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U) #define USB_OTG_GOTGCTL_HSHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */ #define USB_OTG_GOTGCTL_HSHNPEN USB_OTG_GOTGCTL_HSHNPEN_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U) +#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U) #define USB_OTG_GOTGCTL_DHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */ #define USB_OTG_GOTGCTL_DHNPEN USB_OTG_GOTGCTL_DHNPEN_Msk /*!< Device HNP enabled */ -#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U) +#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U) #define USB_OTG_GOTGCTL_CIDSTS_Msk (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */ #define USB_OTG_GOTGCTL_CIDSTS USB_OTG_GOTGCTL_CIDSTS_Msk /*!< Connector ID status */ -#define USB_OTG_GOTGCTL_DBCT_Pos (17U) +#define USB_OTG_GOTGCTL_DBCT_Pos (17U) #define USB_OTG_GOTGCTL_DBCT_Msk (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */ #define USB_OTG_GOTGCTL_DBCT USB_OTG_GOTGCTL_DBCT_Msk /*!< Long/short debounce time */ -#define USB_OTG_GOTGCTL_ASVLD_Pos (18U) +#define USB_OTG_GOTGCTL_ASVLD_Pos (18U) #define USB_OTG_GOTGCTL_ASVLD_Msk (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */ #define USB_OTG_GOTGCTL_ASVLD USB_OTG_GOTGCTL_ASVLD_Msk /*!< A-session valid */ -#define USB_OTG_GOTGCTL_BSVLD_Pos (19U) +#define USB_OTG_GOTGCTL_BSVLD_Pos (19U) #define USB_OTG_GOTGCTL_BSVLD_Msk (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */ #define USB_OTG_GOTGCTL_BSVLD USB_OTG_GOTGCTL_BSVLD_Msk /*!< B-session valid */ /******************** Bit definition for USB_OTG_HCFG register ********************/ -#define USB_OTG_HCFG_FSLSPCS_Pos (0U) +#define USB_OTG_HCFG_FSLSPCS_Pos (0U) #define USB_OTG_HCFG_FSLSPCS_Msk (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */ #define USB_OTG_HCFG_FSLSPCS USB_OTG_HCFG_FSLSPCS_Msk /*!< FS/LS PHY clock select */ #define USB_OTG_HCFG_FSLSPCS_0 (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */ #define USB_OTG_HCFG_FSLSPCS_1 (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCFG_FSLSS_Pos (2U) +#define USB_OTG_HCFG_FSLSS_Pos (2U) #define USB_OTG_HCFG_FSLSS_Msk (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */ #define USB_OTG_HCFG_FSLSS USB_OTG_HCFG_FSLSS_Msk /*!< FS- and LS-only support */ /******************** Bit definition for USB_OTG_DCFG register ********************/ -#define USB_OTG_DCFG_DSPD_Pos (0U) +#define USB_OTG_DCFG_DSPD_Pos (0U) #define USB_OTG_DCFG_DSPD_Msk (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */ #define USB_OTG_DCFG_DSPD USB_OTG_DCFG_DSPD_Msk /*!< Device speed */ #define USB_OTG_DCFG_DSPD_0 (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */ #define USB_OTG_DCFG_DSPD_1 (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */ -#define USB_OTG_DCFG_NZLSOHSK_Pos (2U) +#define USB_OTG_DCFG_NZLSOHSK_Pos (2U) #define USB_OTG_DCFG_NZLSOHSK_Msk (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */ #define USB_OTG_DCFG_NZLSOHSK USB_OTG_DCFG_NZLSOHSK_Msk /*!< Nonzero-length status OUT handshake */ -#define USB_OTG_DCFG_DAD_Pos (4U) +#define USB_OTG_DCFG_DAD_Pos (4U) #define USB_OTG_DCFG_DAD_Msk (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */ #define USB_OTG_DCFG_DAD USB_OTG_DCFG_DAD_Msk /*!< Device address */ #define USB_OTG_DCFG_DAD_0 (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */ @@ -241,120 +241,120 @@ typedef struct #define USB_OTG_DCFG_DAD_5 (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */ #define USB_OTG_DCFG_DAD_6 (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */ -#define USB_OTG_DCFG_PFIVL_Pos (11U) +#define USB_OTG_DCFG_PFIVL_Pos (11U) #define USB_OTG_DCFG_PFIVL_Msk (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */ #define USB_OTG_DCFG_PFIVL USB_OTG_DCFG_PFIVL_Msk /*!< Periodic (micro)frame interval */ #define USB_OTG_DCFG_PFIVL_0 (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */ #define USB_OTG_DCFG_PFIVL_1 (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */ -#define USB_OTG_DCFG_PERSCHIVL_Pos (24U) +#define USB_OTG_DCFG_PERSCHIVL_Pos (24U) #define USB_OTG_DCFG_PERSCHIVL_Msk (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */ #define USB_OTG_DCFG_PERSCHIVL USB_OTG_DCFG_PERSCHIVL_Msk /*!< Periodic scheduling interval */ #define USB_OTG_DCFG_PERSCHIVL_0 (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */ #define USB_OTG_DCFG_PERSCHIVL_1 (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */ /******************** Bit definition for USB_OTG_PCGCR register ********************/ -#define USB_OTG_PCGCR_STPPCLK_Pos (0U) +#define USB_OTG_PCGCR_STPPCLK_Pos (0U) #define USB_OTG_PCGCR_STPPCLK_Msk (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */ #define USB_OTG_PCGCR_STPPCLK USB_OTG_PCGCR_STPPCLK_Msk /*!< Stop PHY clock */ -#define USB_OTG_PCGCR_GATEHCLK_Pos (1U) +#define USB_OTG_PCGCR_GATEHCLK_Pos (1U) #define USB_OTG_PCGCR_GATEHCLK_Msk (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */ #define USB_OTG_PCGCR_GATEHCLK USB_OTG_PCGCR_GATEHCLK_Msk /*!< Gate HCLK */ -#define USB_OTG_PCGCR_PHYSUSP_Pos (4U) +#define USB_OTG_PCGCR_PHYSUSP_Pos (4U) #define USB_OTG_PCGCR_PHYSUSP_Msk (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */ #define USB_OTG_PCGCR_PHYSUSP USB_OTG_PCGCR_PHYSUSP_Msk /*!< PHY suspended */ /******************** Bit definition for USB_OTG_GOTGINT register ********************/ -#define USB_OTG_GOTGINT_SEDET_Pos (2U) +#define USB_OTG_GOTGINT_SEDET_Pos (2U) #define USB_OTG_GOTGINT_SEDET_Msk (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */ #define USB_OTG_GOTGINT_SEDET USB_OTG_GOTGINT_SEDET_Msk /*!< Session end detected */ -#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U) +#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U) #define USB_OTG_GOTGINT_SRSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */ #define USB_OTG_GOTGINT_SRSSCHG USB_OTG_GOTGINT_SRSSCHG_Msk /*!< Session request success status change */ -#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U) +#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U) #define USB_OTG_GOTGINT_HNSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */ #define USB_OTG_GOTGINT_HNSSCHG USB_OTG_GOTGINT_HNSSCHG_Msk /*!< Host negotiation success status change */ -#define USB_OTG_GOTGINT_HNGDET_Pos (17U) +#define USB_OTG_GOTGINT_HNGDET_Pos (17U) #define USB_OTG_GOTGINT_HNGDET_Msk (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */ #define USB_OTG_GOTGINT_HNGDET USB_OTG_GOTGINT_HNGDET_Msk /*!< Host negotiation detected */ -#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U) +#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U) #define USB_OTG_GOTGINT_ADTOCHG_Msk (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */ #define USB_OTG_GOTGINT_ADTOCHG USB_OTG_GOTGINT_ADTOCHG_Msk /*!< A-device timeout change */ -#define USB_OTG_GOTGINT_DBCDNE_Pos (19U) +#define USB_OTG_GOTGINT_DBCDNE_Pos (19U) #define USB_OTG_GOTGINT_DBCDNE_Msk (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */ #define USB_OTG_GOTGINT_DBCDNE USB_OTG_GOTGINT_DBCDNE_Msk /*!< Debounce done */ /******************** Bit definition for USB_OTG_DCTL register ********************/ -#define USB_OTG_DCTL_RWUSIG_Pos (0U) +#define USB_OTG_DCTL_RWUSIG_Pos (0U) #define USB_OTG_DCTL_RWUSIG_Msk (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */ #define USB_OTG_DCTL_RWUSIG USB_OTG_DCTL_RWUSIG_Msk /*!< Remote wakeup signaling */ -#define USB_OTG_DCTL_SDIS_Pos (1U) +#define USB_OTG_DCTL_SDIS_Pos (1U) #define USB_OTG_DCTL_SDIS_Msk (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */ #define USB_OTG_DCTL_SDIS USB_OTG_DCTL_SDIS_Msk /*!< Soft disconnect */ -#define USB_OTG_DCTL_GINSTS_Pos (2U) +#define USB_OTG_DCTL_GINSTS_Pos (2U) #define USB_OTG_DCTL_GINSTS_Msk (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */ #define USB_OTG_DCTL_GINSTS USB_OTG_DCTL_GINSTS_Msk /*!< Global IN NAK status */ -#define USB_OTG_DCTL_GONSTS_Pos (3U) +#define USB_OTG_DCTL_GONSTS_Pos (3U) #define USB_OTG_DCTL_GONSTS_Msk (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */ #define USB_OTG_DCTL_GONSTS USB_OTG_DCTL_GONSTS_Msk /*!< Global OUT NAK status */ -#define USB_OTG_DCTL_TCTL_Pos (4U) +#define USB_OTG_DCTL_TCTL_Pos (4U) #define USB_OTG_DCTL_TCTL_Msk (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */ #define USB_OTG_DCTL_TCTL USB_OTG_DCTL_TCTL_Msk /*!< Test control */ #define USB_OTG_DCTL_TCTL_0 (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */ #define USB_OTG_DCTL_TCTL_1 (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */ #define USB_OTG_DCTL_TCTL_2 (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */ -#define USB_OTG_DCTL_SGINAK_Pos (7U) +#define USB_OTG_DCTL_SGINAK_Pos (7U) #define USB_OTG_DCTL_SGINAK_Msk (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */ #define USB_OTG_DCTL_SGINAK USB_OTG_DCTL_SGINAK_Msk /*!< Set global IN NAK */ -#define USB_OTG_DCTL_CGINAK_Pos (8U) +#define USB_OTG_DCTL_CGINAK_Pos (8U) #define USB_OTG_DCTL_CGINAK_Msk (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */ #define USB_OTG_DCTL_CGINAK USB_OTG_DCTL_CGINAK_Msk /*!< Clear global IN NAK */ -#define USB_OTG_DCTL_SGONAK_Pos (9U) +#define USB_OTG_DCTL_SGONAK_Pos (9U) #define USB_OTG_DCTL_SGONAK_Msk (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */ #define USB_OTG_DCTL_SGONAK USB_OTG_DCTL_SGONAK_Msk /*!< Set global OUT NAK */ -#define USB_OTG_DCTL_CGONAK_Pos (10U) +#define USB_OTG_DCTL_CGONAK_Pos (10U) #define USB_OTG_DCTL_CGONAK_Msk (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */ #define USB_OTG_DCTL_CGONAK USB_OTG_DCTL_CGONAK_Msk /*!< Clear global OUT NAK */ -#define USB_OTG_DCTL_POPRGDNE_Pos (11U) +#define USB_OTG_DCTL_POPRGDNE_Pos (11U) #define USB_OTG_DCTL_POPRGDNE_Msk (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */ #define USB_OTG_DCTL_POPRGDNE USB_OTG_DCTL_POPRGDNE_Msk /*!< Power-on programming done */ /******************** Bit definition for USB_OTG_HFIR register ********************/ -#define USB_OTG_HFIR_FRIVL_Pos (0U) +#define USB_OTG_HFIR_FRIVL_Pos (0U) #define USB_OTG_HFIR_FRIVL_Msk (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HFIR_FRIVL USB_OTG_HFIR_FRIVL_Msk /*!< Frame interval */ /******************** Bit definition for USB_OTG_HFNUM register ********************/ -#define USB_OTG_HFNUM_FRNUM_Pos (0U) +#define USB_OTG_HFNUM_FRNUM_Pos (0U) #define USB_OTG_HFNUM_FRNUM_Msk (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HFNUM_FRNUM USB_OTG_HFNUM_FRNUM_Msk /*!< Frame number */ -#define USB_OTG_HFNUM_FTREM_Pos (16U) +#define USB_OTG_HFNUM_FTREM_Pos (16U) #define USB_OTG_HFNUM_FTREM_Msk (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_HFNUM_FTREM USB_OTG_HFNUM_FTREM_Msk /*!< Frame time remaining */ /******************** Bit definition for USB_OTG_DSTS register ********************/ -#define USB_OTG_DSTS_SUSPSTS_Pos (0U) +#define USB_OTG_DSTS_SUSPSTS_Pos (0U) #define USB_OTG_DSTS_SUSPSTS_Msk (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */ #define USB_OTG_DSTS_SUSPSTS USB_OTG_DSTS_SUSPSTS_Msk /*!< Suspend status */ -#define USB_OTG_DSTS_ENUMSPD_Pos (1U) +#define USB_OTG_DSTS_ENUMSPD_Pos (1U) #define USB_OTG_DSTS_ENUMSPD_Msk (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */ #define USB_OTG_DSTS_ENUMSPD USB_OTG_DSTS_ENUMSPD_Msk /*!< Enumerated speed */ #define USB_OTG_DSTS_ENUMSPD_0 (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */ #define USB_OTG_DSTS_ENUMSPD_1 (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */ -#define USB_OTG_DSTS_EERR_Pos (3U) +#define USB_OTG_DSTS_EERR_Pos (3U) #define USB_OTG_DSTS_EERR_Msk (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */ #define USB_OTG_DSTS_EERR USB_OTG_DSTS_EERR_Msk /*!< Erratic error */ -#define USB_OTG_DSTS_FNSOF_Pos (8U) +#define USB_OTG_DSTS_FNSOF_Pos (8U) #define USB_OTG_DSTS_FNSOF_Msk (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */ #define USB_OTG_DSTS_FNSOF USB_OTG_DSTS_FNSOF_Msk /*!< Frame number of the received SOF */ /******************** Bit definition for USB_OTG_GAHBCFG register ********************/ -#define USB_OTG_GAHBCFG_GINT_Pos (0U) +#define USB_OTG_GAHBCFG_GINT_Pos (0U) #define USB_OTG_GAHBCFG_GINT_Msk (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */ #define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINT_Msk /*!< Global interrupt mask */ -#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U) +#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U) #define USB_OTG_GAHBCFG_HBSTLEN_Msk (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */ #define USB_OTG_GAHBCFG_HBSTLEN USB_OTG_GAHBCFG_HBSTLEN_Msk /*!< Burst length/type */ #define USB_OTG_GAHBCFG_HBSTLEN_0 (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */ @@ -362,99 +362,99 @@ typedef struct #define USB_OTG_GAHBCFG_HBSTLEN_2 (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */ #define USB_OTG_GAHBCFG_HBSTLEN_3 (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */ #define USB_OTG_GAHBCFG_HBSTLEN_4 (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */ -#define USB_OTG_GAHBCFG_DMAEN_Pos (5U) +#define USB_OTG_GAHBCFG_DMAEN_Pos (5U) #define USB_OTG_GAHBCFG_DMAEN_Msk (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */ #define USB_OTG_GAHBCFG_DMAEN USB_OTG_GAHBCFG_DMAEN_Msk /*!< DMA enable */ -#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U) +#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U) #define USB_OTG_GAHBCFG_TXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */ #define USB_OTG_GAHBCFG_TXFELVL USB_OTG_GAHBCFG_TXFELVL_Msk /*!< TxFIFO empty level */ -#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U) +#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U) #define USB_OTG_GAHBCFG_PTXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */ #define USB_OTG_GAHBCFG_PTXFELVL USB_OTG_GAHBCFG_PTXFELVL_Msk /*!< Periodic TxFIFO empty level */ /******************** Bit definition for USB_OTG_GUSBCFG register ********************/ -#define USB_OTG_GUSBCFG_TOCAL_Pos (0U) +#define USB_OTG_GUSBCFG_TOCAL_Pos (0U) #define USB_OTG_GUSBCFG_TOCAL_Msk (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */ #define USB_OTG_GUSBCFG_TOCAL USB_OTG_GUSBCFG_TOCAL_Msk /*!< FS timeout calibration */ #define USB_OTG_GUSBCFG_TOCAL_0 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */ #define USB_OTG_GUSBCFG_TOCAL_1 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */ #define USB_OTG_GUSBCFG_TOCAL_2 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */ -#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U) +#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U) #define USB_OTG_GUSBCFG_PHYSEL_Msk (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */ #define USB_OTG_GUSBCFG_PHYSEL USB_OTG_GUSBCFG_PHYSEL_Msk /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */ -#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U) +#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U) #define USB_OTG_GUSBCFG_SRPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */ #define USB_OTG_GUSBCFG_SRPCAP USB_OTG_GUSBCFG_SRPCAP_Msk /*!< SRP-capable */ -#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U) +#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U) #define USB_OTG_GUSBCFG_HNPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */ #define USB_OTG_GUSBCFG_HNPCAP USB_OTG_GUSBCFG_HNPCAP_Msk /*!< HNP-capable */ -#define USB_OTG_GUSBCFG_TRDT_Pos (10U) +#define USB_OTG_GUSBCFG_TRDT_Pos (10U) #define USB_OTG_GUSBCFG_TRDT_Msk (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */ #define USB_OTG_GUSBCFG_TRDT USB_OTG_GUSBCFG_TRDT_Msk /*!< USB turnaround time */ #define USB_OTG_GUSBCFG_TRDT_0 (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */ #define USB_OTG_GUSBCFG_TRDT_1 (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */ #define USB_OTG_GUSBCFG_TRDT_2 (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */ #define USB_OTG_GUSBCFG_TRDT_3 (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */ -#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U) +#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U) #define USB_OTG_GUSBCFG_PHYLPCS_Msk (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */ #define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPCS_Msk /*!< PHY Low-power clock select */ -#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U) +#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U) #define USB_OTG_GUSBCFG_ULPIFSLS_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */ #define USB_OTG_GUSBCFG_ULPIFSLS USB_OTG_GUSBCFG_ULPIFSLS_Msk /*!< ULPI FS/LS select */ -#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U) +#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U) #define USB_OTG_GUSBCFG_ULPIAR_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */ #define USB_OTG_GUSBCFG_ULPIAR USB_OTG_GUSBCFG_ULPIAR_Msk /*!< ULPI Auto-resume */ -#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U) +#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U) #define USB_OTG_GUSBCFG_ULPICSM_Msk (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */ #define USB_OTG_GUSBCFG_ULPICSM USB_OTG_GUSBCFG_ULPICSM_Msk /*!< ULPI Clock SuspendM */ -#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U) +#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U) #define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */ #define USB_OTG_GUSBCFG_ULPIEVBUSD USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */ -#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U) +#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U) #define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */ #define USB_OTG_GUSBCFG_ULPIEVBUSI USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */ -#define USB_OTG_GUSBCFG_TSDPS_Pos (22U) +#define USB_OTG_GUSBCFG_TSDPS_Pos (22U) #define USB_OTG_GUSBCFG_TSDPS_Msk (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */ #define USB_OTG_GUSBCFG_TSDPS USB_OTG_GUSBCFG_TSDPS_Msk /*!< TermSel DLine pulsing selection */ -#define USB_OTG_GUSBCFG_PCCI_Pos (23U) +#define USB_OTG_GUSBCFG_PCCI_Pos (23U) #define USB_OTG_GUSBCFG_PCCI_Msk (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */ #define USB_OTG_GUSBCFG_PCCI USB_OTG_GUSBCFG_PCCI_Msk /*!< Indicator complement */ -#define USB_OTG_GUSBCFG_PTCI_Pos (24U) +#define USB_OTG_GUSBCFG_PTCI_Pos (24U) #define USB_OTG_GUSBCFG_PTCI_Msk (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */ #define USB_OTG_GUSBCFG_PTCI USB_OTG_GUSBCFG_PTCI_Msk /*!< Indicator pass through */ -#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U) +#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U) #define USB_OTG_GUSBCFG_ULPIIPD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */ #define USB_OTG_GUSBCFG_ULPIIPD USB_OTG_GUSBCFG_ULPIIPD_Msk /*!< ULPI interface protect disable */ -#define USB_OTG_GUSBCFG_FHMOD_Pos (29U) +#define USB_OTG_GUSBCFG_FHMOD_Pos (29U) #define USB_OTG_GUSBCFG_FHMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */ #define USB_OTG_GUSBCFG_FHMOD USB_OTG_GUSBCFG_FHMOD_Msk /*!< Forced host mode */ -#define USB_OTG_GUSBCFG_FDMOD_Pos (30U) +#define USB_OTG_GUSBCFG_FDMOD_Pos (30U) #define USB_OTG_GUSBCFG_FDMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */ #define USB_OTG_GUSBCFG_FDMOD USB_OTG_GUSBCFG_FDMOD_Msk /*!< Forced peripheral mode */ -#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U) +#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U) #define USB_OTG_GUSBCFG_CTXPKT_Msk (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */ #define USB_OTG_GUSBCFG_CTXPKT USB_OTG_GUSBCFG_CTXPKT_Msk /*!< Corrupt Tx packet */ /******************** Bit definition for USB_OTG_GRSTCTL register ********************/ -#define USB_OTG_GRSTCTL_CSRST_Pos (0U) +#define USB_OTG_GRSTCTL_CSRST_Pos (0U) #define USB_OTG_GRSTCTL_CSRST_Msk (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */ #define USB_OTG_GRSTCTL_CSRST USB_OTG_GRSTCTL_CSRST_Msk /*!< Core soft reset */ -#define USB_OTG_GRSTCTL_HSRST_Pos (1U) +#define USB_OTG_GRSTCTL_HSRST_Pos (1U) #define USB_OTG_GRSTCTL_HSRST_Msk (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */ #define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_HSRST_Msk /*!< HCLK soft reset */ -#define USB_OTG_GRSTCTL_FCRST_Pos (2U) +#define USB_OTG_GRSTCTL_FCRST_Pos (2U) #define USB_OTG_GRSTCTL_FCRST_Msk (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */ #define USB_OTG_GRSTCTL_FCRST USB_OTG_GRSTCTL_FCRST_Msk /*!< Host frame counter reset */ -#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U) +#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U) #define USB_OTG_GRSTCTL_RXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */ #define USB_OTG_GRSTCTL_RXFFLSH USB_OTG_GRSTCTL_RXFFLSH_Msk /*!< RxFIFO flush */ -#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) +#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) #define USB_OTG_GRSTCTL_TXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */ #define USB_OTG_GRSTCTL_TXFFLSH USB_OTG_GRSTCTL_TXFFLSH_Msk /*!< TxFIFO flush */ -#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) +#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) #define USB_OTG_GRSTCTL_TXFNUM_Msk (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */ #define USB_OTG_GRSTCTL_TXFNUM USB_OTG_GRSTCTL_TXFNUM_Msk /*!< TxFIFO number */ #define USB_OTG_GRSTCTL_TXFNUM_0 (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */ @@ -462,44 +462,44 @@ typedef struct #define USB_OTG_GRSTCTL_TXFNUM_2 (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */ #define USB_OTG_GRSTCTL_TXFNUM_3 (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */ #define USB_OTG_GRSTCTL_TXFNUM_4 (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */ -#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U) +#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U) #define USB_OTG_GRSTCTL_DMAREQ_Msk (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */ #define USB_OTG_GRSTCTL_DMAREQ USB_OTG_GRSTCTL_DMAREQ_Msk /*!< DMA request signal */ -#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U) +#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U) #define USB_OTG_GRSTCTL_AHBIDL_Msk (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */ #define USB_OTG_GRSTCTL_AHBIDL USB_OTG_GRSTCTL_AHBIDL_Msk /*!< AHB master idle */ /******************** Bit definition for USB_OTG_DIEPMSK register ********************/ -#define USB_OTG_DIEPMSK_XFRCM_Pos (0U) +#define USB_OTG_DIEPMSK_XFRCM_Pos (0U) #define USB_OTG_DIEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPMSK_XFRCM USB_OTG_DIEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPMSK_EPDM_Pos (1U) +#define USB_OTG_DIEPMSK_EPDM_Pos (1U) #define USB_OTG_DIEPMSK_EPDM_Msk (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPMSK_EPDM USB_OTG_DIEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPMSK_TOM_Pos (3U) +#define USB_OTG_DIEPMSK_TOM_Pos (3U) #define USB_OTG_DIEPMSK_TOM_Msk (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPMSK_TOM USB_OTG_DIEPMSK_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U) +#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U) #define USB_OTG_DIEPMSK_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPMSK_ITTXFEMSK USB_OTG_DIEPMSK_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U) +#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U) #define USB_OTG_DIEPMSK_INEPNMM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DIEPMSK_INEPNMM USB_OTG_DIEPMSK_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U) +#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U) #define USB_OTG_DIEPMSK_INEPNEM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPMSK_INEPNEM USB_OTG_DIEPMSK_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPMSK_TXFURM_Pos (8U) +#define USB_OTG_DIEPMSK_TXFURM_Pos (8U) #define USB_OTG_DIEPMSK_TXFURM_Msk (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPMSK_TXFURM USB_OTG_DIEPMSK_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPMSK_BIM_Pos (9U) +#define USB_OTG_DIEPMSK_BIM_Pos (9U) #define USB_OTG_DIEPMSK_BIM_Msk (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPMSK_BIM USB_OTG_DIEPMSK_BIM_Msk /*!< BNA interrupt mask */ /******************** Bit definition for USB_OTG_HPTXSTS register ********************/ -#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U) +#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U) #define USB_OTG_HPTXSTS_PTXFSAVL_Msk (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HPTXSTS_PTXFSAVL USB_OTG_HPTXSTS_PTXFSAVL_Msk /*!< Periodic transmit data FIFO space available */ -#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U) +#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U) #define USB_OTG_HPTXSTS_PTXQSAV_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */ #define USB_OTG_HPTXSTS_PTXQSAV USB_OTG_HPTXSTS_PTXQSAV_Msk /*!< Periodic transmit request queue space available */ #define USB_OTG_HPTXSTS_PTXQSAV_0 (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */ @@ -511,7 +511,7 @@ typedef struct #define USB_OTG_HPTXSTS_PTXQSAV_6 (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */ #define USB_OTG_HPTXSTS_PTXQSAV_7 (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U) +#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U) #define USB_OTG_HPTXSTS_PTXQTOP_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */ #define USB_OTG_HPTXSTS_PTXQTOP USB_OTG_HPTXSTS_PTXQTOP_Msk /*!< Top of the periodic transmit request queue */ #define USB_OTG_HPTXSTS_PTXQTOP_0 (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */ @@ -524,36 +524,36 @@ typedef struct #define USB_OTG_HPTXSTS_PTXQTOP_7 (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */ /******************** Bit definition for USB_OTG_HAINT register ********************/ -#define USB_OTG_HAINT_HAINT_Pos (0U) +#define USB_OTG_HAINT_HAINT_Pos (0U) #define USB_OTG_HAINT_HAINT_Msk (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HAINT_HAINT USB_OTG_HAINT_HAINT_Msk /*!< Channel interrupts */ /******************** Bit definition for USB_OTG_DOEPMSK register ********************/ -#define USB_OTG_DOEPMSK_XFRCM_Pos (0U) +#define USB_OTG_DOEPMSK_XFRCM_Pos (0U) #define USB_OTG_DOEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DOEPMSK_XFRCM USB_OTG_DOEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPMSK_EPDM_Pos (1U) +#define USB_OTG_DOEPMSK_EPDM_Pos (1U) #define USB_OTG_DOEPMSK_EPDM_Msk (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DOEPMSK_EPDM USB_OTG_DOEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ #define USB_OTG_DOEPMSK_AHBERRM_Pos (2U) #define USB_OTG_DOEPMSK_AHBERRM_Msk (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */ #define USB_OTG_DOEPMSK_AHBERRM USB_OTG_DOEPMSK_AHBERRM_Msk /*!< OUT transaction AHB Error interrupt mask */ -#define USB_OTG_DOEPMSK_STUPM_Pos (3U) +#define USB_OTG_DOEPMSK_STUPM_Pos (3U) #define USB_OTG_DOEPMSK_STUPM_Msk (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */ #define USB_OTG_DOEPMSK_STUPM USB_OTG_DOEPMSK_STUPM_Msk /*!< SETUP phase done mask */ -#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U) +#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U) #define USB_OTG_DOEPMSK_OTEPDM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */ #define USB_OTG_DOEPMSK_OTEPDM USB_OTG_DOEPMSK_OTEPDM_Msk /*!< OUT token received when endpoint disabled mask */ -#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U) +#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U) #define USB_OTG_DOEPMSK_OTEPSPRM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */ #define USB_OTG_DOEPMSK_OTEPSPRM USB_OTG_DOEPMSK_OTEPSPRM_Msk /*!< Status Phase Received mask */ -#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U) +#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U) #define USB_OTG_DOEPMSK_B2BSTUP_Msk (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */ #define USB_OTG_DOEPMSK_B2BSTUP USB_OTG_DOEPMSK_B2BSTUP_Msk /*!< Back-to-back SETUP packets received mask */ -#define USB_OTG_DOEPMSK_OPEM_Pos (8U) +#define USB_OTG_DOEPMSK_OPEM_Pos (8U) #define USB_OTG_DOEPMSK_OPEM_Msk (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */ #define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OPEM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPMSK_BOIM_Pos (9U) +#define USB_OTG_DOEPMSK_BOIM_Pos (9U) #define USB_OTG_DOEPMSK_BOIM_Msk (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DOEPMSK_BOIM USB_OTG_DOEPMSK_BOIM_Msk /*!< BNA interrupt mask */ #define USB_OTG_DOEPMSK_BERRM_Pos (12U) @@ -566,235 +566,235 @@ typedef struct #define USB_OTG_DOEPMSK_NYETM_Msk (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */ #define USB_OTG_DOEPMSK_NYETM USB_OTG_DOEPMSK_NYETM_Msk /*!< NYET interrupt mask */ /******************** Bit definition for USB_OTG_GINTSTS register ********************/ -#define USB_OTG_GINTSTS_CMOD_Pos (0U) +#define USB_OTG_GINTSTS_CMOD_Pos (0U) #define USB_OTG_GINTSTS_CMOD_Msk (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */ #define USB_OTG_GINTSTS_CMOD USB_OTG_GINTSTS_CMOD_Msk /*!< Current mode of operation */ -#define USB_OTG_GINTSTS_MMIS_Pos (1U) +#define USB_OTG_GINTSTS_MMIS_Pos (1U) #define USB_OTG_GINTSTS_MMIS_Msk (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */ #define USB_OTG_GINTSTS_MMIS USB_OTG_GINTSTS_MMIS_Msk /*!< Mode mismatch interrupt */ -#define USB_OTG_GINTSTS_OTGINT_Pos (2U) +#define USB_OTG_GINTSTS_OTGINT_Pos (2U) #define USB_OTG_GINTSTS_OTGINT_Msk (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */ #define USB_OTG_GINTSTS_OTGINT USB_OTG_GINTSTS_OTGINT_Msk /*!< OTG interrupt */ -#define USB_OTG_GINTSTS_SOF_Pos (3U) +#define USB_OTG_GINTSTS_SOF_Pos (3U) #define USB_OTG_GINTSTS_SOF_Msk (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */ #define USB_OTG_GINTSTS_SOF USB_OTG_GINTSTS_SOF_Msk /*!< Start of frame */ -#define USB_OTG_GINTSTS_RXFLVL_Pos (4U) +#define USB_OTG_GINTSTS_RXFLVL_Pos (4U) #define USB_OTG_GINTSTS_RXFLVL_Msk (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */ #define USB_OTG_GINTSTS_RXFLVL USB_OTG_GINTSTS_RXFLVL_Msk /*!< RxFIFO nonempty */ -#define USB_OTG_GINTSTS_NPTXFE_Pos (5U) +#define USB_OTG_GINTSTS_NPTXFE_Pos (5U) #define USB_OTG_GINTSTS_NPTXFE_Msk (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */ #define USB_OTG_GINTSTS_NPTXFE USB_OTG_GINTSTS_NPTXFE_Msk /*!< Nonperiodic TxFIFO empty */ -#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U) +#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U) #define USB_OTG_GINTSTS_GINAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */ #define USB_OTG_GINTSTS_GINAKEFF USB_OTG_GINTSTS_GINAKEFF_Msk /*!< Global IN nonperiodic NAK effective */ -#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U) +#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U) #define USB_OTG_GINTSTS_BOUTNAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */ #define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */ -#define USB_OTG_GINTSTS_ESUSP_Pos (10U) +#define USB_OTG_GINTSTS_ESUSP_Pos (10U) #define USB_OTG_GINTSTS_ESUSP_Msk (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */ #define USB_OTG_GINTSTS_ESUSP USB_OTG_GINTSTS_ESUSP_Msk /*!< Early suspend */ -#define USB_OTG_GINTSTS_USBSUSP_Pos (11U) +#define USB_OTG_GINTSTS_USBSUSP_Pos (11U) #define USB_OTG_GINTSTS_USBSUSP_Msk (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */ #define USB_OTG_GINTSTS_USBSUSP USB_OTG_GINTSTS_USBSUSP_Msk /*!< USB suspend */ -#define USB_OTG_GINTSTS_USBRST_Pos (12U) +#define USB_OTG_GINTSTS_USBRST_Pos (12U) #define USB_OTG_GINTSTS_USBRST_Msk (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */ #define USB_OTG_GINTSTS_USBRST USB_OTG_GINTSTS_USBRST_Msk /*!< USB reset */ -#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U) +#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U) #define USB_OTG_GINTSTS_ENUMDNE_Msk (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */ #define USB_OTG_GINTSTS_ENUMDNE USB_OTG_GINTSTS_ENUMDNE_Msk /*!< Enumeration done */ -#define USB_OTG_GINTSTS_ISOODRP_Pos (14U) +#define USB_OTG_GINTSTS_ISOODRP_Pos (14U) #define USB_OTG_GINTSTS_ISOODRP_Msk (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */ #define USB_OTG_GINTSTS_ISOODRP USB_OTG_GINTSTS_ISOODRP_Msk /*!< Isochronous OUT packet dropped interrupt */ -#define USB_OTG_GINTSTS_EOPF_Pos (15U) +#define USB_OTG_GINTSTS_EOPF_Pos (15U) #define USB_OTG_GINTSTS_EOPF_Msk (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */ #define USB_OTG_GINTSTS_EOPF USB_OTG_GINTSTS_EOPF_Msk /*!< End of periodic frame interrupt */ -#define USB_OTG_GINTSTS_IEPINT_Pos (18U) +#define USB_OTG_GINTSTS_IEPINT_Pos (18U) #define USB_OTG_GINTSTS_IEPINT_Msk (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */ #define USB_OTG_GINTSTS_IEPINT USB_OTG_GINTSTS_IEPINT_Msk /*!< IN endpoint interrupt */ -#define USB_OTG_GINTSTS_OEPINT_Pos (19U) +#define USB_OTG_GINTSTS_OEPINT_Pos (19U) #define USB_OTG_GINTSTS_OEPINT_Msk (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */ #define USB_OTG_GINTSTS_OEPINT USB_OTG_GINTSTS_OEPINT_Msk /*!< OUT endpoint interrupt */ -#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U) +#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U) #define USB_OTG_GINTSTS_IISOIXFR_Msk (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */ #define USB_OTG_GINTSTS_IISOIXFR USB_OTG_GINTSTS_IISOIXFR_Msk /*!< Incomplete isochronous IN transfer */ -#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U) +#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U) #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */ #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */ -#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U) +#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U) #define USB_OTG_GINTSTS_DATAFSUSP_Msk (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */ #define USB_OTG_GINTSTS_DATAFSUSP USB_OTG_GINTSTS_DATAFSUSP_Msk /*!< Data fetch suspended */ -#define USB_OTG_GINTSTS_HPRTINT_Pos (24U) +#define USB_OTG_GINTSTS_HPRTINT_Pos (24U) #define USB_OTG_GINTSTS_HPRTINT_Msk (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */ #define USB_OTG_GINTSTS_HPRTINT USB_OTG_GINTSTS_HPRTINT_Msk /*!< Host port interrupt */ -#define USB_OTG_GINTSTS_HCINT_Pos (25U) +#define USB_OTG_GINTSTS_HCINT_Pos (25U) #define USB_OTG_GINTSTS_HCINT_Msk (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */ #define USB_OTG_GINTSTS_HCINT USB_OTG_GINTSTS_HCINT_Msk /*!< Host channels interrupt */ -#define USB_OTG_GINTSTS_PTXFE_Pos (26U) +#define USB_OTG_GINTSTS_PTXFE_Pos (26U) #define USB_OTG_GINTSTS_PTXFE_Msk (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */ #define USB_OTG_GINTSTS_PTXFE USB_OTG_GINTSTS_PTXFE_Msk /*!< Periodic TxFIFO empty */ -#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U) +#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U) #define USB_OTG_GINTSTS_CIDSCHG_Msk (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */ #define USB_OTG_GINTSTS_CIDSCHG USB_OTG_GINTSTS_CIDSCHG_Msk /*!< Connector ID status change */ -#define USB_OTG_GINTSTS_DISCINT_Pos (29U) +#define USB_OTG_GINTSTS_DISCINT_Pos (29U) #define USB_OTG_GINTSTS_DISCINT_Msk (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */ #define USB_OTG_GINTSTS_DISCINT USB_OTG_GINTSTS_DISCINT_Msk /*!< Disconnect detected interrupt */ -#define USB_OTG_GINTSTS_SRQINT_Pos (30U) +#define USB_OTG_GINTSTS_SRQINT_Pos (30U) #define USB_OTG_GINTSTS_SRQINT_Msk (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */ #define USB_OTG_GINTSTS_SRQINT USB_OTG_GINTSTS_SRQINT_Msk /*!< Session request/new session detected interrupt */ -#define USB_OTG_GINTSTS_WKUINT_Pos (31U) +#define USB_OTG_GINTSTS_WKUINT_Pos (31U) #define USB_OTG_GINTSTS_WKUINT_Msk (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */ #define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUINT_Msk /*!< Resume/remote wakeup detected interrupt */ /******************** Bit definition for USB_OTG_GINTMSK register ********************/ -#define USB_OTG_GINTMSK_MMISM_Pos (1U) +#define USB_OTG_GINTMSK_MMISM_Pos (1U) #define USB_OTG_GINTMSK_MMISM_Msk (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */ #define USB_OTG_GINTMSK_MMISM USB_OTG_GINTMSK_MMISM_Msk /*!< Mode mismatch interrupt mask */ -#define USB_OTG_GINTMSK_OTGINT_Pos (2U) +#define USB_OTG_GINTMSK_OTGINT_Pos (2U) #define USB_OTG_GINTMSK_OTGINT_Msk (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */ #define USB_OTG_GINTMSK_OTGINT USB_OTG_GINTMSK_OTGINT_Msk /*!< OTG interrupt mask */ -#define USB_OTG_GINTMSK_SOFM_Pos (3U) +#define USB_OTG_GINTMSK_SOFM_Pos (3U) #define USB_OTG_GINTMSK_SOFM_Msk (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */ #define USB_OTG_GINTMSK_SOFM USB_OTG_GINTMSK_SOFM_Msk /*!< Start of frame mask */ -#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U) +#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U) #define USB_OTG_GINTMSK_RXFLVLM_Msk (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */ #define USB_OTG_GINTMSK_RXFLVLM USB_OTG_GINTMSK_RXFLVLM_Msk /*!< Receive FIFO nonempty mask */ -#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U) +#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U) #define USB_OTG_GINTMSK_NPTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */ #define USB_OTG_GINTMSK_NPTXFEM USB_OTG_GINTMSK_NPTXFEM_Msk /*!< Nonperiodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U) +#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U) #define USB_OTG_GINTMSK_GINAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */ #define USB_OTG_GINTMSK_GINAKEFFM USB_OTG_GINTMSK_GINAKEFFM_Msk /*!< Global nonperiodic IN NAK effective mask */ -#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U) +#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U) #define USB_OTG_GINTMSK_GONAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */ #define USB_OTG_GINTMSK_GONAKEFFM USB_OTG_GINTMSK_GONAKEFFM_Msk /*!< Global OUT NAK effective mask */ -#define USB_OTG_GINTMSK_ESUSPM_Pos (10U) +#define USB_OTG_GINTMSK_ESUSPM_Pos (10U) #define USB_OTG_GINTMSK_ESUSPM_Msk (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */ #define USB_OTG_GINTMSK_ESUSPM USB_OTG_GINTMSK_ESUSPM_Msk /*!< Early suspend mask */ -#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U) +#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U) #define USB_OTG_GINTMSK_USBSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */ #define USB_OTG_GINTMSK_USBSUSPM USB_OTG_GINTMSK_USBSUSPM_Msk /*!< USB suspend mask */ -#define USB_OTG_GINTMSK_USBRST_Pos (12U) +#define USB_OTG_GINTMSK_USBRST_Pos (12U) #define USB_OTG_GINTMSK_USBRST_Msk (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */ #define USB_OTG_GINTMSK_USBRST USB_OTG_GINTMSK_USBRST_Msk /*!< USB reset mask */ -#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U) +#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U) #define USB_OTG_GINTMSK_ENUMDNEM_Msk (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */ #define USB_OTG_GINTMSK_ENUMDNEM USB_OTG_GINTMSK_ENUMDNEM_Msk /*!< Enumeration done mask */ -#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U) +#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U) #define USB_OTG_GINTMSK_ISOODRPM_Msk (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */ #define USB_OTG_GINTMSK_ISOODRPM USB_OTG_GINTMSK_ISOODRPM_Msk /*!< Isochronous OUT packet dropped interrupt mask */ -#define USB_OTG_GINTMSK_EOPFM_Pos (15U) +#define USB_OTG_GINTMSK_EOPFM_Pos (15U) #define USB_OTG_GINTMSK_EOPFM_Msk (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */ #define USB_OTG_GINTMSK_EOPFM USB_OTG_GINTMSK_EOPFM_Msk /*!< End of periodic frame interrupt mask */ -#define USB_OTG_GINTMSK_EPMISM_Pos (17U) +#define USB_OTG_GINTMSK_EPMISM_Pos (17U) #define USB_OTG_GINTMSK_EPMISM_Msk (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */ #define USB_OTG_GINTMSK_EPMISM USB_OTG_GINTMSK_EPMISM_Msk /*!< Endpoint mismatch interrupt mask */ -#define USB_OTG_GINTMSK_IEPINT_Pos (18U) +#define USB_OTG_GINTMSK_IEPINT_Pos (18U) #define USB_OTG_GINTMSK_IEPINT_Msk (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */ #define USB_OTG_GINTMSK_IEPINT USB_OTG_GINTMSK_IEPINT_Msk /*!< IN endpoints interrupt mask */ -#define USB_OTG_GINTMSK_OEPINT_Pos (19U) +#define USB_OTG_GINTMSK_OEPINT_Pos (19U) #define USB_OTG_GINTMSK_OEPINT_Msk (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */ #define USB_OTG_GINTMSK_OEPINT USB_OTG_GINTMSK_OEPINT_Msk /*!< OUT endpoints interrupt mask */ -#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U) +#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U) #define USB_OTG_GINTMSK_IISOIXFRM_Msk (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */ #define USB_OTG_GINTMSK_IISOIXFRM USB_OTG_GINTMSK_IISOIXFRM_Msk /*!< Incomplete isochronous IN transfer mask */ -#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U) +#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U) #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */ #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */ -#define USB_OTG_GINTMSK_FSUSPM_Pos (22U) +#define USB_OTG_GINTMSK_FSUSPM_Pos (22U) #define USB_OTG_GINTMSK_FSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */ #define USB_OTG_GINTMSK_FSUSPM USB_OTG_GINTMSK_FSUSPM_Msk /*!< Data fetch suspended mask */ -#define USB_OTG_GINTMSK_PRTIM_Pos (24U) +#define USB_OTG_GINTMSK_PRTIM_Pos (24U) #define USB_OTG_GINTMSK_PRTIM_Msk (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */ #define USB_OTG_GINTMSK_PRTIM USB_OTG_GINTMSK_PRTIM_Msk /*!< Host port interrupt mask */ -#define USB_OTG_GINTMSK_HCIM_Pos (25U) +#define USB_OTG_GINTMSK_HCIM_Pos (25U) #define USB_OTG_GINTMSK_HCIM_Msk (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */ #define USB_OTG_GINTMSK_HCIM USB_OTG_GINTMSK_HCIM_Msk /*!< Host channels interrupt mask */ -#define USB_OTG_GINTMSK_PTXFEM_Pos (26U) +#define USB_OTG_GINTMSK_PTXFEM_Pos (26U) #define USB_OTG_GINTMSK_PTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */ #define USB_OTG_GINTMSK_PTXFEM USB_OTG_GINTMSK_PTXFEM_Msk /*!< Periodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U) +#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U) #define USB_OTG_GINTMSK_CIDSCHGM_Msk (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */ #define USB_OTG_GINTMSK_CIDSCHGM USB_OTG_GINTMSK_CIDSCHGM_Msk /*!< Connector ID status change mask */ -#define USB_OTG_GINTMSK_DISCINT_Pos (29U) +#define USB_OTG_GINTMSK_DISCINT_Pos (29U) #define USB_OTG_GINTMSK_DISCINT_Msk (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */ #define USB_OTG_GINTMSK_DISCINT USB_OTG_GINTMSK_DISCINT_Msk /*!< Disconnect detected interrupt mask */ -#define USB_OTG_GINTMSK_SRQIM_Pos (30U) +#define USB_OTG_GINTMSK_SRQIM_Pos (30U) #define USB_OTG_GINTMSK_SRQIM_Msk (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */ #define USB_OTG_GINTMSK_SRQIM USB_OTG_GINTMSK_SRQIM_Msk /*!< Session request/new session detected interrupt mask */ -#define USB_OTG_GINTMSK_WUIM_Pos (31U) +#define USB_OTG_GINTMSK_WUIM_Pos (31U) #define USB_OTG_GINTMSK_WUIM_Msk (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */ #define USB_OTG_GINTMSK_WUIM USB_OTG_GINTMSK_WUIM_Msk /*!< Resume/remote wakeup detected interrupt mask */ /******************** Bit definition for USB_OTG_DAINT register ********************/ -#define USB_OTG_DAINT_IEPINT_Pos (0U) +#define USB_OTG_DAINT_IEPINT_Pos (0U) #define USB_OTG_DAINT_IEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DAINT_IEPINT USB_OTG_DAINT_IEPINT_Msk /*!< IN endpoint interrupt bits */ -#define USB_OTG_DAINT_OEPINT_Pos (16U) +#define USB_OTG_DAINT_OEPINT_Pos (16U) #define USB_OTG_DAINT_OEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DAINT_OEPINT USB_OTG_DAINT_OEPINT_Msk /*!< OUT endpoint interrupt bits */ /******************** Bit definition for USB_OTG_HAINTMSK register ********************/ -#define USB_OTG_HAINTMSK_HAINTM_Pos (0U) +#define USB_OTG_HAINTMSK_HAINTM_Pos (0U) #define USB_OTG_HAINTMSK_HAINTM_Msk (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HAINTMSK_HAINTM USB_OTG_HAINTMSK_HAINTM_Msk /*!< Channel interrupt mask */ /******************** Bit definition for USB_OTG_GRXSTSP register ********************/ -#define USB_OTG_GRXSTSP_EPNUM_Pos (0U) +#define USB_OTG_GRXSTSP_EPNUM_Pos (0U) #define USB_OTG_GRXSTSP_EPNUM_Msk (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */ #define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_BCNT_Pos (4U) +#define USB_OTG_GRXSTSP_BCNT_Pos (4U) #define USB_OTG_GRXSTSP_BCNT_Msk (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */ #define USB_OTG_GRXSTSP_BCNT USB_OTG_GRXSTSP_BCNT_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_DPID_Pos (15U) +#define USB_OTG_GRXSTSP_DPID_Pos (15U) #define USB_OTG_GRXSTSP_DPID_Msk (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */ #define USB_OTG_GRXSTSP_DPID USB_OTG_GRXSTSP_DPID_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U) +#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U) #define USB_OTG_GRXSTSP_PKTSTS_Msk (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */ #define USB_OTG_GRXSTSP_PKTSTS USB_OTG_GRXSTSP_PKTSTS_Msk /*!< OUT EP interrupt mask bits */ /******************** Bit definition for USB_OTG_DAINTMSK register ********************/ -#define USB_OTG_DAINTMSK_IEPM_Pos (0U) +#define USB_OTG_DAINTMSK_IEPM_Pos (0U) #define USB_OTG_DAINTMSK_IEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DAINTMSK_IEPM USB_OTG_DAINTMSK_IEPM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_DAINTMSK_OEPM_Pos (16U) +#define USB_OTG_DAINTMSK_OEPM_Pos (16U) #define USB_OTG_DAINTMSK_OEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DAINTMSK_OEPM USB_OTG_DAINTMSK_OEPM_Msk /*!< OUT EP interrupt mask bits */ /******************** Bit definition for USB_OTG_GRXFSIZ register ********************/ -#define USB_OTG_GRXFSIZ_RXFD_Pos (0U) +#define USB_OTG_GRXFSIZ_RXFD_Pos (0U) #define USB_OTG_GRXFSIZ_RXFD_Msk (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */ #define USB_OTG_GRXFSIZ_RXFD USB_OTG_GRXFSIZ_RXFD_Msk /*!< RxFIFO depth */ /******************** Bit definition for USB_OTG_DVBUSDIS register ********************/ -#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U) +#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U) #define USB_OTG_DVBUSDIS_VBUSDT_Msk (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DVBUSDIS_VBUSDT USB_OTG_DVBUSDIS_VBUSDT_Msk /*!< Device VBUS discharge time */ /******************** Bit definition for OTG register ********************/ -#define USB_OTG_NPTXFSA_Pos (0U) +#define USB_OTG_NPTXFSA_Pos (0U) #define USB_OTG_NPTXFSA_Msk (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_NPTXFSA USB_OTG_NPTXFSA_Msk /*!< Nonperiodic transmit RAM start address */ -#define USB_OTG_NPTXFD_Pos (16U) +#define USB_OTG_NPTXFD_Pos (16U) #define USB_OTG_NPTXFD_Msk (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_NPTXFD USB_OTG_NPTXFD_Msk /*!< Nonperiodic TxFIFO depth */ -#define USB_OTG_TX0FSA_Pos (0U) +#define USB_OTG_TX0FSA_Pos (0U) #define USB_OTG_TX0FSA_Msk (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_TX0FSA USB_OTG_TX0FSA_Msk /*!< Endpoint 0 transmit RAM start address */ -#define USB_OTG_TX0FD_Pos (16U) +#define USB_OTG_TX0FD_Pos (16U) #define USB_OTG_TX0FD_Msk (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_TX0FD USB_OTG_TX0FD_Msk /*!< Endpoint 0 TxFIFO depth */ /******************** Bit definition for USB_OTG_DVBUSPULSE register ********************/ -#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U) +#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U) #define USB_OTG_DVBUSPULSE_DVBUSP_Msk (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */ #define USB_OTG_DVBUSPULSE_DVBUSP USB_OTG_DVBUSPULSE_DVBUSP_Msk /*!< Device VBUS pulsing time */ /******************** Bit definition for USB_OTG_GNPTXSTS register ********************/ -#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U) +#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U) #define USB_OTG_GNPTXSTS_NPTXFSAV_Msk (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */ #define USB_OTG_GNPTXSTS_NPTXFSAV USB_OTG_GNPTXSTS_NPTXFSAV_Msk /*!< Nonperiodic TxFIFO space available */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U) +#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U) #define USB_OTG_GNPTXSTS_NPTQXSAV_Msk (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */ #define USB_OTG_GNPTXSTS_NPTQXSAV USB_OTG_GNPTXSTS_NPTQXSAV_Msk /*!< Nonperiodic transmit request queue space available */ #define USB_OTG_GNPTXSTS_NPTQXSAV_0 (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */ @@ -806,7 +806,7 @@ typedef struct #define USB_OTG_GNPTXSTS_NPTQXSAV_6 (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */ #define USB_OTG_GNPTXSTS_NPTQXSAV_7 (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U) +#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U) #define USB_OTG_GNPTXSTS_NPTXQTOP_Msk (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */ #define USB_OTG_GNPTXSTS_NPTXQTOP USB_OTG_GNPTXSTS_NPTXQTOP_Msk /*!< Top of the nonperiodic transmit request queue */ #define USB_OTG_GNPTXSTS_NPTXQTOP_0 (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */ @@ -818,14 +818,14 @@ typedef struct #define USB_OTG_GNPTXSTS_NPTXQTOP_6 (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */ /******************** Bit definition for USB_OTG_DTHRCTL register ********************/ -#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U) +#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U) #define USB_OTG_DTHRCTL_NONISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */ #define USB_OTG_DTHRCTL_NONISOTHREN USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */ -#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U) +#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U) #define USB_OTG_DTHRCTL_ISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */ #define USB_OTG_DTHRCTL_ISOTHREN USB_OTG_DTHRCTL_ISOTHREN_Msk /*!< ISO IN endpoint threshold enable */ -#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U) +#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U) #define USB_OTG_DTHRCTL_TXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */ #define USB_OTG_DTHRCTL_TXTHRLEN USB_OTG_DTHRCTL_TXTHRLEN_Msk /*!< Transmit threshold length */ #define USB_OTG_DTHRCTL_TXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */ @@ -837,11 +837,11 @@ typedef struct #define USB_OTG_DTHRCTL_TXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */ #define USB_OTG_DTHRCTL_TXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */ #define USB_OTG_DTHRCTL_TXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */ -#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U) +#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U) #define USB_OTG_DTHRCTL_RXTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */ #define USB_OTG_DTHRCTL_RXTHREN USB_OTG_DTHRCTL_RXTHREN_Msk /*!< Receive threshold enable */ -#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U) +#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U) #define USB_OTG_DTHRCTL_RXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */ #define USB_OTG_DTHRCTL_RXTHRLEN USB_OTG_DTHRCTL_RXTHRLEN_Msk /*!< Receive threshold length */ #define USB_OTG_DTHRCTL_RXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */ @@ -853,118 +853,118 @@ typedef struct #define USB_OTG_DTHRCTL_RXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */ #define USB_OTG_DTHRCTL_RXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */ #define USB_OTG_DTHRCTL_RXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */ -#define USB_OTG_DTHRCTL_ARPEN_Pos (27U) +#define USB_OTG_DTHRCTL_ARPEN_Pos (27U) #define USB_OTG_DTHRCTL_ARPEN_Msk (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */ #define USB_OTG_DTHRCTL_ARPEN USB_OTG_DTHRCTL_ARPEN_Msk /*!< Arbiter parking enable */ /******************** Bit definition for USB_OTG_DIEPEMPMSK register ********************/ -#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U) +#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U) #define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DIEPEMPMSK_INEPTXFEM USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */ /******************** Bit definition for USB_OTG_DEACHINT register ********************/ -#define USB_OTG_DEACHINT_IEP1INT_Pos (1U) +#define USB_OTG_DEACHINT_IEP1INT_Pos (1U) #define USB_OTG_DEACHINT_IEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */ #define USB_OTG_DEACHINT_IEP1INT USB_OTG_DEACHINT_IEP1INT_Msk /*!< IN endpoint 1interrupt bit */ -#define USB_OTG_DEACHINT_OEP1INT_Pos (17U) +#define USB_OTG_DEACHINT_OEP1INT_Pos (17U) #define USB_OTG_DEACHINT_OEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */ #define USB_OTG_DEACHINT_OEP1INT USB_OTG_DEACHINT_OEP1INT_Msk /*!< OUT endpoint 1 interrupt bit */ /******************** Bit definition for USB_OTG_GCCFG register ********************/ -#define USB_OTG_GCCFG_PWRDWN_Pos (16U) +#define USB_OTG_GCCFG_PWRDWN_Pos (16U) #define USB_OTG_GCCFG_PWRDWN_Msk (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */ #define USB_OTG_GCCFG_PWRDWN USB_OTG_GCCFG_PWRDWN_Msk /*!< Power down */ -#define USB_OTG_GCCFG_VBUSASEN_Pos (18U) +#define USB_OTG_GCCFG_VBUSASEN_Pos (18U) #define USB_OTG_GCCFG_VBUSASEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */ #define USB_OTG_GCCFG_VBUSASEN USB_OTG_GCCFG_VBUSASEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U) +#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U) #define USB_OTG_GCCFG_VBUSBSEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */ #define USB_OTG_GCCFG_VBUSBSEN USB_OTG_GCCFG_VBUSBSEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U) +#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U) #define USB_OTG_GCCFG_SOFOUTEN_Msk (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */ #define USB_OTG_GCCFG_SOFOUTEN USB_OTG_GCCFG_SOFOUTEN_Msk /*!< SOF output enable */ /******************** Bit definition for USB_OTG_DEACHINTMSK register ********************/ -#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U) +#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U) #define USB_OTG_DEACHINTMSK_IEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */ #define USB_OTG_DEACHINTMSK_IEP1INTM USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */ -#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U) +#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U) #define USB_OTG_DEACHINTMSK_OEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */ #define USB_OTG_DEACHINTMSK_OEP1INTM USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */ /******************** Bit definition for USB_OTG_CID register ********************/ -#define USB_OTG_CID_PRODUCT_ID_Pos (0U) +#define USB_OTG_CID_PRODUCT_ID_Pos (0U) #define USB_OTG_CID_PRODUCT_ID_Msk (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_CID_PRODUCT_ID USB_OTG_CID_PRODUCT_ID_Msk /*!< Product ID field */ /******************** Bit definition for USB_OTG_DIEPEACHMSK1 register ********************/ -#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U) +#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U) #define USB_OTG_DIEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPEACHMSK1_XFRCM USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U) +#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U) #define USB_OTG_DIEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPEACHMSK1_EPDM USB_OTG_DIEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U) +#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U) #define USB_OTG_DIEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPEACHMSK1_TOM USB_OTG_DIEPEACHMSK1_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U) +#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U) #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U) +#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U) #define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DIEPEACHMSK1_INEPNMM USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U) +#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U) #define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPEACHMSK1_INEPNEM USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U) +#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U) #define USB_OTG_DIEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPEACHMSK1_TXFURM USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U) +#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U) #define USB_OTG_DIEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPEACHMSK1_BIM USB_OTG_DIEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U) +#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U) #define USB_OTG_DIEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ #define USB_OTG_DIEPEACHMSK1_NAKM USB_OTG_DIEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ /******************** Bit definition for USB_OTG_HPRT register ********************/ -#define USB_OTG_HPRT_PCSTS_Pos (0U) +#define USB_OTG_HPRT_PCSTS_Pos (0U) #define USB_OTG_HPRT_PCSTS_Msk (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */ #define USB_OTG_HPRT_PCSTS USB_OTG_HPRT_PCSTS_Msk /*!< Port connect status */ -#define USB_OTG_HPRT_PCDET_Pos (1U) +#define USB_OTG_HPRT_PCDET_Pos (1U) #define USB_OTG_HPRT_PCDET_Msk (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */ #define USB_OTG_HPRT_PCDET USB_OTG_HPRT_PCDET_Msk /*!< Port connect detected */ -#define USB_OTG_HPRT_PENA_Pos (2U) +#define USB_OTG_HPRT_PENA_Pos (2U) #define USB_OTG_HPRT_PENA_Msk (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */ #define USB_OTG_HPRT_PENA USB_OTG_HPRT_PENA_Msk /*!< Port enable */ -#define USB_OTG_HPRT_PENCHNG_Pos (3U) +#define USB_OTG_HPRT_PENCHNG_Pos (3U) #define USB_OTG_HPRT_PENCHNG_Msk (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */ #define USB_OTG_HPRT_PENCHNG USB_OTG_HPRT_PENCHNG_Msk /*!< Port enable/disable change */ -#define USB_OTG_HPRT_POCA_Pos (4U) +#define USB_OTG_HPRT_POCA_Pos (4U) #define USB_OTG_HPRT_POCA_Msk (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */ #define USB_OTG_HPRT_POCA USB_OTG_HPRT_POCA_Msk /*!< Port overcurrent active */ -#define USB_OTG_HPRT_POCCHNG_Pos (5U) +#define USB_OTG_HPRT_POCCHNG_Pos (5U) #define USB_OTG_HPRT_POCCHNG_Msk (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */ #define USB_OTG_HPRT_POCCHNG USB_OTG_HPRT_POCCHNG_Msk /*!< Port overcurrent change */ -#define USB_OTG_HPRT_PRES_Pos (6U) +#define USB_OTG_HPRT_PRES_Pos (6U) #define USB_OTG_HPRT_PRES_Msk (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */ #define USB_OTG_HPRT_PRES USB_OTG_HPRT_PRES_Msk /*!< Port resume */ -#define USB_OTG_HPRT_PSUSP_Pos (7U) +#define USB_OTG_HPRT_PSUSP_Pos (7U) #define USB_OTG_HPRT_PSUSP_Msk (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */ #define USB_OTG_HPRT_PSUSP USB_OTG_HPRT_PSUSP_Msk /*!< Port suspend */ -#define USB_OTG_HPRT_PRST_Pos (8U) +#define USB_OTG_HPRT_PRST_Pos (8U) #define USB_OTG_HPRT_PRST_Msk (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */ #define USB_OTG_HPRT_PRST USB_OTG_HPRT_PRST_Msk /*!< Port reset */ -#define USB_OTG_HPRT_PLSTS_Pos (10U) +#define USB_OTG_HPRT_PLSTS_Pos (10U) #define USB_OTG_HPRT_PLSTS_Msk (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */ #define USB_OTG_HPRT_PLSTS USB_OTG_HPRT_PLSTS_Msk /*!< Port line status */ #define USB_OTG_HPRT_PLSTS_0 (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */ #define USB_OTG_HPRT_PLSTS_1 (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */ -#define USB_OTG_HPRT_PPWR_Pos (12U) +#define USB_OTG_HPRT_PPWR_Pos (12U) #define USB_OTG_HPRT_PPWR_Msk (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */ #define USB_OTG_HPRT_PPWR USB_OTG_HPRT_PPWR_Msk /*!< Port power */ -#define USB_OTG_HPRT_PTCTL_Pos (13U) +#define USB_OTG_HPRT_PTCTL_Pos (13U) #define USB_OTG_HPRT_PTCTL_Msk (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */ #define USB_OTG_HPRT_PTCTL USB_OTG_HPRT_PTCTL_Msk /*!< Port test control */ #define USB_OTG_HPRT_PTCTL_0 (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */ @@ -972,136 +972,136 @@ typedef struct #define USB_OTG_HPRT_PTCTL_2 (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */ #define USB_OTG_HPRT_PTCTL_3 (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */ -#define USB_OTG_HPRT_PSPD_Pos (17U) +#define USB_OTG_HPRT_PSPD_Pos (17U) #define USB_OTG_HPRT_PSPD_Msk (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */ #define USB_OTG_HPRT_PSPD USB_OTG_HPRT_PSPD_Msk /*!< Port speed */ #define USB_OTG_HPRT_PSPD_0 (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */ #define USB_OTG_HPRT_PSPD_1 (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */ /******************** Bit definition for USB_OTG_DOEPEACHMSK1 register ********************/ -#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U) +#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U) #define USB_OTG_DOEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DOEPEACHMSK1_XFRCM USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U) +#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U) #define USB_OTG_DOEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DOEPEACHMSK1_EPDM USB_OTG_DOEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U) +#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U) #define USB_OTG_DOEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DOEPEACHMSK1_TOM USB_OTG_DOEPEACHMSK1_TOM_Msk /*!< Timeout condition mask */ -#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U) +#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U) #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U) +#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U) #define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DOEPEACHMSK1_INEPNMM USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U) +#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U) #define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DOEPEACHMSK1_INEPNEM USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U) +#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U) #define USB_OTG_DOEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DOEPEACHMSK1_TXFURM USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U) +#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U) #define USB_OTG_DOEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DOEPEACHMSK1_BIM USB_OTG_DOEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U) +#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U) #define USB_OTG_DOEPEACHMSK1_BERRM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */ #define USB_OTG_DOEPEACHMSK1_BERRM USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U) +#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U) #define USB_OTG_DOEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ #define USB_OTG_DOEPEACHMSK1_NAKM USB_OTG_DOEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U) +#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U) #define USB_OTG_DOEPEACHMSK1_NYETM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */ #define USB_OTG_DOEPEACHMSK1_NYETM USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */ /******************** Bit definition for USB_OTG_HPTXFSIZ register ********************/ -#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U) +#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U) #define USB_OTG_HPTXFSIZ_PTXSA_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HPTXFSIZ_PTXSA USB_OTG_HPTXFSIZ_PTXSA_Msk /*!< Host periodic TxFIFO start address */ -#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U) +#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U) #define USB_OTG_HPTXFSIZ_PTXFD_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFD_Msk /*!< Host periodic TxFIFO depth */ /******************** Bit definition for USB_OTG_DIEPCTL register ********************/ -#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U) +#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U) #define USB_OTG_DIEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_DIEPCTL_MPSIZ USB_OTG_DIEPCTL_MPSIZ_Msk /*!< Maximum packet size */ -#define USB_OTG_DIEPCTL_USBAEP_Pos (15U) +#define USB_OTG_DIEPCTL_USBAEP_Pos (15U) #define USB_OTG_DIEPCTL_USBAEP_Msk (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */ #define USB_OTG_DIEPCTL_USBAEP USB_OTG_DIEPCTL_USBAEP_Msk /*!< USB active endpoint */ -#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U) +#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U) #define USB_OTG_DIEPCTL_EONUM_DPID_Msk (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */ #define USB_OTG_DIEPCTL_EONUM_DPID USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */ -#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U) +#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U) #define USB_OTG_DIEPCTL_NAKSTS_Msk (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */ #define USB_OTG_DIEPCTL_NAKSTS USB_OTG_DIEPCTL_NAKSTS_Msk /*!< NAK status */ -#define USB_OTG_DIEPCTL_EPTYP_Pos (18U) +#define USB_OTG_DIEPCTL_EPTYP_Pos (18U) #define USB_OTG_DIEPCTL_EPTYP_Msk (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */ #define USB_OTG_DIEPCTL_EPTYP USB_OTG_DIEPCTL_EPTYP_Msk /*!< Endpoint type */ #define USB_OTG_DIEPCTL_EPTYP_0 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */ #define USB_OTG_DIEPCTL_EPTYP_1 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */ -#define USB_OTG_DIEPCTL_STALL_Pos (21U) +#define USB_OTG_DIEPCTL_STALL_Pos (21U) #define USB_OTG_DIEPCTL_STALL_Msk (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */ #define USB_OTG_DIEPCTL_STALL USB_OTG_DIEPCTL_STALL_Msk /*!< STALL handshake */ -#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U) +#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U) #define USB_OTG_DIEPCTL_TXFNUM_Msk (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */ #define USB_OTG_DIEPCTL_TXFNUM USB_OTG_DIEPCTL_TXFNUM_Msk /*!< TxFIFO number */ #define USB_OTG_DIEPCTL_TXFNUM_0 (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */ #define USB_OTG_DIEPCTL_TXFNUM_1 (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */ #define USB_OTG_DIEPCTL_TXFNUM_2 (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */ #define USB_OTG_DIEPCTL_TXFNUM_3 (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */ -#define USB_OTG_DIEPCTL_CNAK_Pos (26U) +#define USB_OTG_DIEPCTL_CNAK_Pos (26U) #define USB_OTG_DIEPCTL_CNAK_Msk (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */ #define USB_OTG_DIEPCTL_CNAK USB_OTG_DIEPCTL_CNAK_Msk /*!< Clear NAK */ -#define USB_OTG_DIEPCTL_SNAK_Pos (27U) +#define USB_OTG_DIEPCTL_SNAK_Pos (27U) #define USB_OTG_DIEPCTL_SNAK_Msk (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */ #define USB_OTG_DIEPCTL_SNAK USB_OTG_DIEPCTL_SNAK_Msk /*!< Set NAK */ -#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U) +#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U) #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */ #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */ -#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U) +#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U) #define USB_OTG_DIEPCTL_SODDFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */ #define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SODDFRM_Msk /*!< Set odd frame */ -#define USB_OTG_DIEPCTL_EPDIS_Pos (30U) +#define USB_OTG_DIEPCTL_EPDIS_Pos (30U) #define USB_OTG_DIEPCTL_EPDIS_Msk (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */ #define USB_OTG_DIEPCTL_EPDIS USB_OTG_DIEPCTL_EPDIS_Msk /*!< Endpoint disable */ -#define USB_OTG_DIEPCTL_EPENA_Pos (31U) +#define USB_OTG_DIEPCTL_EPENA_Pos (31U) #define USB_OTG_DIEPCTL_EPENA_Msk (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */ #define USB_OTG_DIEPCTL_EPENA USB_OTG_DIEPCTL_EPENA_Msk /*!< Endpoint enable */ /******************** Bit definition for USB_OTG_HCCHAR register ********************/ -#define USB_OTG_HCCHAR_MPSIZ_Pos (0U) +#define USB_OTG_HCCHAR_MPSIZ_Pos (0U) #define USB_OTG_HCCHAR_MPSIZ_Msk (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_HCCHAR_MPSIZ USB_OTG_HCCHAR_MPSIZ_Msk /*!< Maximum packet size */ -#define USB_OTG_HCCHAR_EPNUM_Pos (11U) +#define USB_OTG_HCCHAR_EPNUM_Pos (11U) #define USB_OTG_HCCHAR_EPNUM_Msk (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */ #define USB_OTG_HCCHAR_EPNUM USB_OTG_HCCHAR_EPNUM_Msk /*!< Endpoint number */ #define USB_OTG_HCCHAR_EPNUM_0 (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */ #define USB_OTG_HCCHAR_EPNUM_1 (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */ #define USB_OTG_HCCHAR_EPNUM_2 (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */ #define USB_OTG_HCCHAR_EPNUM_3 (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */ -#define USB_OTG_HCCHAR_EPDIR_Pos (15U) +#define USB_OTG_HCCHAR_EPDIR_Pos (15U) #define USB_OTG_HCCHAR_EPDIR_Msk (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */ #define USB_OTG_HCCHAR_EPDIR USB_OTG_HCCHAR_EPDIR_Msk /*!< Endpoint direction */ -#define USB_OTG_HCCHAR_LSDEV_Pos (17U) +#define USB_OTG_HCCHAR_LSDEV_Pos (17U) #define USB_OTG_HCCHAR_LSDEV_Msk (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */ #define USB_OTG_HCCHAR_LSDEV USB_OTG_HCCHAR_LSDEV_Msk /*!< Low-speed device */ -#define USB_OTG_HCCHAR_EPTYP_Pos (18U) +#define USB_OTG_HCCHAR_EPTYP_Pos (18U) #define USB_OTG_HCCHAR_EPTYP_Msk (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */ #define USB_OTG_HCCHAR_EPTYP USB_OTG_HCCHAR_EPTYP_Msk /*!< Endpoint type */ #define USB_OTG_HCCHAR_EPTYP_0 (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */ #define USB_OTG_HCCHAR_EPTYP_1 (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */ - -#define USB_OTG_HCCHAR_MC_Pos (20U) + +#define USB_OTG_HCCHAR_MC_Pos (20U) #define USB_OTG_HCCHAR_MC_Msk (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */ #define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MC_Msk /*!< Multi Count (MC) / Error Count (EC) */ #define USB_OTG_HCCHAR_MC_0 (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */ #define USB_OTG_HCCHAR_MC_1 (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */ -#define USB_OTG_HCCHAR_DAD_Pos (22U) +#define USB_OTG_HCCHAR_DAD_Pos (22U) #define USB_OTG_HCCHAR_DAD_Msk (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */ #define USB_OTG_HCCHAR_DAD USB_OTG_HCCHAR_DAD_Msk /*!< Device address */ #define USB_OTG_HCCHAR_DAD_0 (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */ @@ -1111,19 +1111,19 @@ typedef struct #define USB_OTG_HCCHAR_DAD_4 (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */ #define USB_OTG_HCCHAR_DAD_5 (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */ #define USB_OTG_HCCHAR_DAD_6 (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */ -#define USB_OTG_HCCHAR_ODDFRM_Pos (29U) +#define USB_OTG_HCCHAR_ODDFRM_Pos (29U) #define USB_OTG_HCCHAR_ODDFRM_Msk (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */ #define USB_OTG_HCCHAR_ODDFRM USB_OTG_HCCHAR_ODDFRM_Msk /*!< Odd frame */ -#define USB_OTG_HCCHAR_CHDIS_Pos (30U) +#define USB_OTG_HCCHAR_CHDIS_Pos (30U) #define USB_OTG_HCCHAR_CHDIS_Msk (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */ #define USB_OTG_HCCHAR_CHDIS USB_OTG_HCCHAR_CHDIS_Msk /*!< Channel disable */ -#define USB_OTG_HCCHAR_CHENA_Pos (31U) +#define USB_OTG_HCCHAR_CHENA_Pos (31U) #define USB_OTG_HCCHAR_CHENA_Msk (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */ #define USB_OTG_HCCHAR_CHENA USB_OTG_HCCHAR_CHENA_Msk /*!< Channel enable */ /******************** Bit definition for USB_OTG_HCSPLT register ********************/ -#define USB_OTG_HCSPLT_PRTADDR_Pos (0U) +#define USB_OTG_HCSPLT_PRTADDR_Pos (0U) #define USB_OTG_HCSPLT_PRTADDR_Msk (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */ #define USB_OTG_HCSPLT_PRTADDR USB_OTG_HCSPLT_PRTADDR_Msk /*!< Port address */ #define USB_OTG_HCSPLT_PRTADDR_0 (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */ @@ -1134,7 +1134,7 @@ typedef struct #define USB_OTG_HCSPLT_PRTADDR_5 (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */ #define USB_OTG_HCSPLT_PRTADDR_6 (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */ -#define USB_OTG_HCSPLT_HUBADDR_Pos (7U) +#define USB_OTG_HCSPLT_HUBADDR_Pos (7U) #define USB_OTG_HCSPLT_HUBADDR_Msk (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */ #define USB_OTG_HCSPLT_HUBADDR USB_OTG_HCSPLT_HUBADDR_Msk /*!< Hub address */ #define USB_OTG_HCSPLT_HUBADDR_0 (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */ @@ -1145,240 +1145,240 @@ typedef struct #define USB_OTG_HCSPLT_HUBADDR_5 (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */ #define USB_OTG_HCSPLT_HUBADDR_6 (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */ -#define USB_OTG_HCSPLT_XACTPOS_Pos (14U) +#define USB_OTG_HCSPLT_XACTPOS_Pos (14U) #define USB_OTG_HCSPLT_XACTPOS_Msk (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */ #define USB_OTG_HCSPLT_XACTPOS USB_OTG_HCSPLT_XACTPOS_Msk /*!< XACTPOS */ #define USB_OTG_HCSPLT_XACTPOS_0 (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */ #define USB_OTG_HCSPLT_XACTPOS_1 (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */ -#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U) +#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U) #define USB_OTG_HCSPLT_COMPLSPLT_Msk (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */ #define USB_OTG_HCSPLT_COMPLSPLT USB_OTG_HCSPLT_COMPLSPLT_Msk /*!< Do complete split */ -#define USB_OTG_HCSPLT_SPLITEN_Pos (31U) +#define USB_OTG_HCSPLT_SPLITEN_Pos (31U) #define USB_OTG_HCSPLT_SPLITEN_Msk (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */ #define USB_OTG_HCSPLT_SPLITEN USB_OTG_HCSPLT_SPLITEN_Msk /*!< Split enable */ /******************** Bit definition for USB_OTG_HCINT register ********************/ -#define USB_OTG_HCINT_XFRC_Pos (0U) +#define USB_OTG_HCINT_XFRC_Pos (0U) #define USB_OTG_HCINT_XFRC_Msk (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */ #define USB_OTG_HCINT_XFRC USB_OTG_HCINT_XFRC_Msk /*!< Transfer completed */ -#define USB_OTG_HCINT_CHH_Pos (1U) +#define USB_OTG_HCINT_CHH_Pos (1U) #define USB_OTG_HCINT_CHH_Msk (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */ #define USB_OTG_HCINT_CHH USB_OTG_HCINT_CHH_Msk /*!< Channel halted */ -#define USB_OTG_HCINT_AHBERR_Pos (2U) +#define USB_OTG_HCINT_AHBERR_Pos (2U) #define USB_OTG_HCINT_AHBERR_Msk (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_HCINT_AHBERR USB_OTG_HCINT_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINT_STALL_Pos (3U) +#define USB_OTG_HCINT_STALL_Pos (3U) #define USB_OTG_HCINT_STALL_Msk (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */ #define USB_OTG_HCINT_STALL USB_OTG_HCINT_STALL_Msk /*!< STALL response received interrupt */ -#define USB_OTG_HCINT_NAK_Pos (4U) +#define USB_OTG_HCINT_NAK_Pos (4U) #define USB_OTG_HCINT_NAK_Msk (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */ #define USB_OTG_HCINT_NAK USB_OTG_HCINT_NAK_Msk /*!< NAK response received interrupt */ -#define USB_OTG_HCINT_ACK_Pos (5U) +#define USB_OTG_HCINT_ACK_Pos (5U) #define USB_OTG_HCINT_ACK_Msk (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */ #define USB_OTG_HCINT_ACK USB_OTG_HCINT_ACK_Msk /*!< ACK response received/transmitted interrupt */ -#define USB_OTG_HCINT_NYET_Pos (6U) +#define USB_OTG_HCINT_NYET_Pos (6U) #define USB_OTG_HCINT_NYET_Msk (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */ #define USB_OTG_HCINT_NYET USB_OTG_HCINT_NYET_Msk /*!< Response received interrupt */ -#define USB_OTG_HCINT_TXERR_Pos (7U) +#define USB_OTG_HCINT_TXERR_Pos (7U) #define USB_OTG_HCINT_TXERR_Msk (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */ #define USB_OTG_HCINT_TXERR USB_OTG_HCINT_TXERR_Msk /*!< Transaction error */ -#define USB_OTG_HCINT_BBERR_Pos (8U) +#define USB_OTG_HCINT_BBERR_Pos (8U) #define USB_OTG_HCINT_BBERR_Msk (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */ #define USB_OTG_HCINT_BBERR USB_OTG_HCINT_BBERR_Msk /*!< Babble error */ -#define USB_OTG_HCINT_FRMOR_Pos (9U) +#define USB_OTG_HCINT_FRMOR_Pos (9U) #define USB_OTG_HCINT_FRMOR_Msk (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */ #define USB_OTG_HCINT_FRMOR USB_OTG_HCINT_FRMOR_Msk /*!< Frame overrun */ -#define USB_OTG_HCINT_DTERR_Pos (10U) +#define USB_OTG_HCINT_DTERR_Pos (10U) #define USB_OTG_HCINT_DTERR_Msk (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */ #define USB_OTG_HCINT_DTERR USB_OTG_HCINT_DTERR_Msk /*!< Data toggle error */ /******************** Bit definition for USB_OTG_DIEPINT register ********************/ -#define USB_OTG_DIEPINT_XFRC_Pos (0U) +#define USB_OTG_DIEPINT_XFRC_Pos (0U) #define USB_OTG_DIEPINT_XFRC_Msk (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPINT_XFRC USB_OTG_DIEPINT_XFRC_Msk /*!< Transfer completed interrupt */ -#define USB_OTG_DIEPINT_EPDISD_Pos (1U) +#define USB_OTG_DIEPINT_EPDISD_Pos (1U) #define USB_OTG_DIEPINT_EPDISD_Msk (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPINT_EPDISD USB_OTG_DIEPINT_EPDISD_Msk /*!< Endpoint disabled interrupt */ #define USB_OTG_DIEPINT_AHBERR_Pos (2U) #define USB_OTG_DIEPINT_AHBERR_Msk (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_DIEPINT_AHBERR USB_OTG_DIEPINT_AHBERR_Msk /*!< AHB Error (AHBErr) during an IN transaction */ -#define USB_OTG_DIEPINT_TOC_Pos (3U) +#define USB_OTG_DIEPINT_TOC_Pos (3U) #define USB_OTG_DIEPINT_TOC_Msk (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPINT_TOC USB_OTG_DIEPINT_TOC_Msk /*!< Timeout condition */ -#define USB_OTG_DIEPINT_ITTXFE_Pos (4U) +#define USB_OTG_DIEPINT_ITTXFE_Pos (4U) #define USB_OTG_DIEPINT_ITTXFE_Msk (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPINT_ITTXFE USB_OTG_DIEPINT_ITTXFE_Msk /*!< IN token received when TxFIFO is empty */ #define USB_OTG_DIEPINT_INEPNM_Pos (5U) #define USB_OTG_DIEPINT_INEPNM_Msk (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */ #define USB_OTG_DIEPINT_INEPNM USB_OTG_DIEPINT_INEPNM_Msk /*!< IN token received with EP mismatch */ -#define USB_OTG_DIEPINT_INEPNE_Pos (6U) +#define USB_OTG_DIEPINT_INEPNE_Pos (6U) #define USB_OTG_DIEPINT_INEPNE_Msk (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPINT_INEPNE USB_OTG_DIEPINT_INEPNE_Msk /*!< IN endpoint NAK effective */ -#define USB_OTG_DIEPINT_TXFE_Pos (7U) +#define USB_OTG_DIEPINT_TXFE_Pos (7U) #define USB_OTG_DIEPINT_TXFE_Msk (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */ #define USB_OTG_DIEPINT_TXFE USB_OTG_DIEPINT_TXFE_Msk /*!< Transmit FIFO empty */ -#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U) +#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U) #define USB_OTG_DIEPINT_TXFIFOUDRN_Msk (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPINT_TXFIFOUDRN USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */ -#define USB_OTG_DIEPINT_BNA_Pos (9U) +#define USB_OTG_DIEPINT_BNA_Pos (9U) #define USB_OTG_DIEPINT_BNA_Msk (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPINT_BNA USB_OTG_DIEPINT_BNA_Msk /*!< Buffer not available interrupt */ -#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U) +#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U) #define USB_OTG_DIEPINT_PKTDRPSTS_Msk (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */ #define USB_OTG_DIEPINT_PKTDRPSTS USB_OTG_DIEPINT_PKTDRPSTS_Msk /*!< Packet dropped status */ -#define USB_OTG_DIEPINT_BERR_Pos (12U) +#define USB_OTG_DIEPINT_BERR_Pos (12U) #define USB_OTG_DIEPINT_BERR_Msk (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */ #define USB_OTG_DIEPINT_BERR USB_OTG_DIEPINT_BERR_Msk /*!< Babble error interrupt */ -#define USB_OTG_DIEPINT_NAK_Pos (13U) +#define USB_OTG_DIEPINT_NAK_Pos (13U) #define USB_OTG_DIEPINT_NAK_Msk (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */ #define USB_OTG_DIEPINT_NAK USB_OTG_DIEPINT_NAK_Msk /*!< NAK interrupt */ /******************** Bit definition for USB_OTG_HCINTMSK register ********************/ -#define USB_OTG_HCINTMSK_XFRCM_Pos (0U) +#define USB_OTG_HCINTMSK_XFRCM_Pos (0U) #define USB_OTG_HCINTMSK_XFRCM_Msk (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_HCINTMSK_XFRCM USB_OTG_HCINTMSK_XFRCM_Msk /*!< Transfer completed mask */ -#define USB_OTG_HCINTMSK_CHHM_Pos (1U) +#define USB_OTG_HCINTMSK_CHHM_Pos (1U) #define USB_OTG_HCINTMSK_CHHM_Msk (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */ #define USB_OTG_HCINTMSK_CHHM USB_OTG_HCINTMSK_CHHM_Msk /*!< Channel halted mask */ -#define USB_OTG_HCINTMSK_AHBERR_Pos (2U) +#define USB_OTG_HCINTMSK_AHBERR_Pos (2U) #define USB_OTG_HCINTMSK_AHBERR_Msk (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINTMSK_STALLM_Pos (3U) +#define USB_OTG_HCINTMSK_STALLM_Pos (3U) #define USB_OTG_HCINTMSK_STALLM_Msk (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */ #define USB_OTG_HCINTMSK_STALLM USB_OTG_HCINTMSK_STALLM_Msk /*!< STALL response received interrupt mask */ -#define USB_OTG_HCINTMSK_NAKM_Pos (4U) +#define USB_OTG_HCINTMSK_NAKM_Pos (4U) #define USB_OTG_HCINTMSK_NAKM_Msk (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */ #define USB_OTG_HCINTMSK_NAKM USB_OTG_HCINTMSK_NAKM_Msk /*!< NAK response received interrupt mask */ -#define USB_OTG_HCINTMSK_ACKM_Pos (5U) +#define USB_OTG_HCINTMSK_ACKM_Pos (5U) #define USB_OTG_HCINTMSK_ACKM_Msk (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */ #define USB_OTG_HCINTMSK_ACKM USB_OTG_HCINTMSK_ACKM_Msk /*!< ACK response received/transmitted interrupt mask */ -#define USB_OTG_HCINTMSK_NYET_Pos (6U) +#define USB_OTG_HCINTMSK_NYET_Pos (6U) #define USB_OTG_HCINTMSK_NYET_Msk (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */ #define USB_OTG_HCINTMSK_NYET USB_OTG_HCINTMSK_NYET_Msk /*!< response received interrupt mask */ -#define USB_OTG_HCINTMSK_TXERRM_Pos (7U) +#define USB_OTG_HCINTMSK_TXERRM_Pos (7U) #define USB_OTG_HCINTMSK_TXERRM_Msk (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */ #define USB_OTG_HCINTMSK_TXERRM USB_OTG_HCINTMSK_TXERRM_Msk /*!< Transaction error mask */ -#define USB_OTG_HCINTMSK_BBERRM_Pos (8U) +#define USB_OTG_HCINTMSK_BBERRM_Pos (8U) #define USB_OTG_HCINTMSK_BBERRM_Msk (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */ #define USB_OTG_HCINTMSK_BBERRM USB_OTG_HCINTMSK_BBERRM_Msk /*!< Babble error mask */ -#define USB_OTG_HCINTMSK_FRMORM_Pos (9U) +#define USB_OTG_HCINTMSK_FRMORM_Pos (9U) #define USB_OTG_HCINTMSK_FRMORM_Msk (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */ #define USB_OTG_HCINTMSK_FRMORM USB_OTG_HCINTMSK_FRMORM_Msk /*!< Frame overrun mask */ -#define USB_OTG_HCINTMSK_DTERRM_Pos (10U) +#define USB_OTG_HCINTMSK_DTERRM_Pos (10U) #define USB_OTG_HCINTMSK_DTERRM_Msk (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */ #define USB_OTG_HCINTMSK_DTERRM USB_OTG_HCINTMSK_DTERRM_Msk /*!< Data toggle error mask */ /******************** Bit definition for USB_OTG_DIEPTSIZ register ********************/ -#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U) +#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U) #define USB_OTG_DIEPTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ #define USB_OTG_DIEPTSIZ_XFRSIZ USB_OTG_DIEPTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U) +#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U) #define USB_OTG_DIEPTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ #define USB_OTG_DIEPTSIZ_PKTCNT USB_OTG_DIEPTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U) +#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U) #define USB_OTG_DIEPTSIZ_MULCNT_Msk (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */ #define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MULCNT_Msk /*!< Packet count */ /******************** Bit definition for USB_OTG_HCTSIZ register ********************/ -#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U) +#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U) #define USB_OTG_HCTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ #define USB_OTG_HCTSIZ_XFRSIZ USB_OTG_HCTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U) +#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U) #define USB_OTG_HCTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ #define USB_OTG_HCTSIZ_PKTCNT USB_OTG_HCTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_HCTSIZ_DOPING_Pos (31U) +#define USB_OTG_HCTSIZ_DOPING_Pos (31U) #define USB_OTG_HCTSIZ_DOPING_Msk (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */ #define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPING_Msk /*!< Do PING */ -#define USB_OTG_HCTSIZ_DPID_Pos (29U) +#define USB_OTG_HCTSIZ_DPID_Pos (29U) #define USB_OTG_HCTSIZ_DPID_Msk (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */ #define USB_OTG_HCTSIZ_DPID USB_OTG_HCTSIZ_DPID_Msk /*!< Data PID */ #define USB_OTG_HCTSIZ_DPID_0 (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */ #define USB_OTG_HCTSIZ_DPID_1 (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */ /******************** Bit definition for USB_OTG_DIEPDMA register ********************/ -#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U) +#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U) #define USB_OTG_DIEPDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_DIEPDMA_DMAADDR USB_OTG_DIEPDMA_DMAADDR_Msk /*!< DMA address */ /******************** Bit definition for USB_OTG_HCDMA register ********************/ -#define USB_OTG_HCDMA_DMAADDR_Pos (0U) +#define USB_OTG_HCDMA_DMAADDR_Pos (0U) #define USB_OTG_HCDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_HCDMA_DMAADDR USB_OTG_HCDMA_DMAADDR_Msk /*!< DMA address */ /******************** Bit definition for USB_OTG_DTXFSTS register ********************/ -#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U) +#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U) #define USB_OTG_DTXFSTS_INEPTFSAV_Msk (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DTXFSTS_INEPTFSAV USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */ /******************** Bit definition for USB_OTG_DIEPTXF register ********************/ -#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U) +#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U) #define USB_OTG_DIEPTXF_INEPTXSA_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DIEPTXF_INEPTXSA USB_OTG_DIEPTXF_INEPTXSA_Msk /*!< IN endpoint FIFOx transmit RAM start address */ -#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U) +#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U) #define USB_OTG_DIEPTXF_INEPTXFD_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DIEPTXF_INEPTXFD USB_OTG_DIEPTXF_INEPTXFD_Msk /*!< IN endpoint TxFIFO depth */ /******************** Bit definition for USB_OTG_DOEPCTL register ********************/ -#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U) +#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U) #define USB_OTG_DOEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_DOEPCTL_MPSIZ USB_OTG_DOEPCTL_MPSIZ_Msk /*!< Maximum packet size */ /*!queued_len += short_packet_size; - + EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer; USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum); EP_TX_LEN(epnum) = short_packet_size; @@ -366,7 +366,7 @@ void dcd_int_handler(uint8_t rhport) { } else if (intflag & USBHS_SETUP_FLAG) { USBHS_Dev_Endp0_Tog = 1; dcd_event_setup_received(0, EP0_DatabufHD, true); - + USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */ } else if (intflag & USBHS_DETECT_FLAG) { USBHS_Dev_Endp0_Tog = 1; diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc index 6403015dd..06ddddc4a 100644 --- a/test/fuzz/dcd_fuzz.cc +++ b/test/fuzz/dcd_fuzz.cc @@ -185,7 +185,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, /* TODO: implement a fuzzed version of this. bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, - uint16_t total_bytes) {} + uint16_t total_bytes) {} */ // Stall endpoint, any queuing transfer should be removed from endpoint @@ -205,4 +205,4 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { UNUSED(ep_addr); return; } -} \ No newline at end of file +} diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/cdc/CMakeLists.txt +++ b/test/fuzz/device/cdc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/cdc/src/fuzz.cc b/test/fuzz/device/cdc/src/fuzz.cc index d40483ca6..0560e8621 100644 --- a/test/fuzz/device/cdc/src/fuzz.cc +++ b/test/fuzz/device/cdc/src/fuzz.cc @@ -143,7 +143,7 @@ void cdc_task(FuzzedDataProvider *provider) { // TODO: Fuzz interface number (void)tud_cdc_n_write(0, buffer.data(), buffer.size()); } break; - + case kCdcNWriteChar: // TODO: Fuzz interface number (void)tud_cdc_n_write_char(0, provider->ConsumeIntegral()); @@ -171,4 +171,4 @@ case kMaxValue: break; } } -} \ No newline at end of file +} diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/msc/CMakeLists.txt +++ b/test/fuzz/device/msc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/msc/src/fuzz.cc b/test/fuzz/device/msc/src/fuzz.cc index 568900452..371d49882 100644 --- a/test/fuzz/device/msc/src/fuzz.cc +++ b/test/fuzz/device/msc/src/fuzz.cc @@ -59,4 +59,3 @@ extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) { return 0; } - diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/net/CMakeLists.txt +++ b/test/fuzz/device/net/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/net/src/arch/cc.h b/test/fuzz/device/net/src/arch/cc.h index 56a0cacf7..9f30b91cb 100644 --- a/test/fuzz/device/net/src/arch/cc.h +++ b/test/fuzz/device/net/src/arch/cc.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Adam Dunkels * */ @@ -42,7 +42,7 @@ typedef int sys_prot_t; #if defined (__ICCARM__) #define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x #define PACK_STRUCT_USE_INCLUDES @@ -50,7 +50,7 @@ typedef int sys_prot_t; #elif defined (__CC_ARM) #define PACK_STRUCT_BEGIN __packed -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x diff --git a/test/fuzz/device/net/src/fuzz.cc b/test/fuzz/device/net/src/fuzz.cc index ea4943665..a6935928a 100644 --- a/test/fuzz/device/net/src/fuzz.cc +++ b/test/fuzz/device/net/src/fuzz.cc @@ -81,7 +81,7 @@ void net_task(FuzzedDataProvider *provider) { assert(provider != NULL); switch (provider->ConsumeEnum()) { - + case kNetworkRecvRenew: tud_network_recv_renew(); break; diff --git a/test/fuzz/device/net/src/lwipopts.h b/test/fuzz/device/net/src/lwipopts.h index a215017c7..336c9243d 100644 --- a/test/fuzz/device/net/src/lwipopts.h +++ b/test/fuzz/device/net/src/lwipopts.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Simon Goldschmidt * */ diff --git a/test/fuzz/dicts/cdc.dict b/test/fuzz/dicts/cdc.dict index 138775cdc..421eb8ed9 100644 --- a/test/fuzz/dicts/cdc.dict +++ b/test/fuzz/dicts/cdc.dict @@ -71,4 +71,3 @@ RNDIS_PACKET_TYPE_FUNCTIONAL="\x00\x00\x40\x00" # NIC driver frames that a Token Ring NIC receives. RNDIS_PACKET_TYPE_MAC_FRAME="\x00\x00\x80\x00" RNDIS_PACKET_TYPE_NO_LOCAL="\x00\x01\x00\x00" - diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk index 934819665..b7b6d6a75 100644 --- a/test/fuzz/make.mk +++ b/test/fuzz/make.mk @@ -114,7 +114,7 @@ CXXFLAGS += \ # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion # -Wconversion - + # Debugging/Optimization ifeq ($(DEBUG), 1) CFLAGS += -Og @@ -132,4 +132,3 @@ endif ifneq ($(LOGGER),) CMAKE_DEFSYM += -DLOGGER=$(LOGGER) endif - diff --git a/test/fuzz/msc_fuzz.cc b/test/fuzz/msc_fuzz.cc index e906ca971..6e838a682 100644 --- a/test/fuzz/msc_fuzz.cc +++ b/test/fuzz/msc_fuzz.cc @@ -159,4 +159,4 @@ int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, } } -#endif \ No newline at end of file +#endif diff --git a/test/fuzz/net_fuzz.cc b/test/fuzz/net_fuzz.cc index 8467d6d8e..3158e74ef 100644 --- a/test/fuzz/net_fuzz.cc +++ b/test/fuzz/net_fuzz.cc @@ -79,4 +79,4 @@ void tud_network_link_state_cb(bool state) { } } -#endif \ No newline at end of file +#endif diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk index d9c2a1a77..825abddc5 100644 --- a/test/fuzz/rules.mk +++ b/test/fuzz/rules.mk @@ -89,7 +89,7 @@ endif # Rules # --------------------------------------- -all: $(BUILD)/$(PROJECT) +all: $(BUILD)/$(PROJECT) OBJ_DIRS = $(sort $(dir $(OBJ))) $(OBJ): | $(OBJ_DIRS) @@ -111,7 +111,7 @@ vpath %.c . $(TOP) $(BUILD)/obj/%.o: %.c @echo CC $(notdir $@) @$(CC) $(CFLAGS) -c -MD -o $@ $< - + # All cpp srcs vpath %.cc . $(TOP) $(BUILD)/obj/%_cxx.o: %.cc @@ -158,4 +158,4 @@ linkermap: $(BUILD)/$(PROJECT) # Print out the value of a make variable. # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile print-%: - @echo $* = $($*) \ No newline at end of file + @echo $* = $($*) diff --git a/test/unit-test/test/device/msc/test_msc_device.c b/test/unit-test/test/device/msc/test_msc_device.c index 63684e76a..c757cdcfa 100644 --- a/test/unit-test/test/device/msc/test_msc_device.c +++ b/test/unit-test/test/device/msc/test_msc_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, hathach (tinyusb.org) diff --git a/test/unit-test/test/device/usbd/test_usbd.c b/test/unit-test/test/device/usbd/test_usbd.c index ad95eb47a..dcded605a 100644 --- a/test/unit-test/test/device/usbd/test_usbd.c +++ b/test/unit-test/test/device/usbd/test_usbd.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/test/unit-test/test/test_fifo.c b/test/unit-test/test/test_fifo.c index 28be6d8fc..3b4deb33e 100644 --- a/test/unit-test/test/test_fifo.c +++ b/test/unit-test/test/test_fifo.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling.rb b/test/unit-test/vendor/ceedling/lib/ceedling.rb index 7f3400236..6c57fb48d 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling.rb @@ -96,4 +96,3 @@ module Ceedling DEFAULT_CEEDLING_CONFIG[:plugins][:load_paths] << gem_dir end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb index 5727bcabc..31abe6d99 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb @@ -5,7 +5,7 @@ require 'ceedling/constants' class BuildInvokerUtils constructor :configurator, :streaminator - + ## # Processes exceptions and tries to display a useful message for the user. # @@ -13,27 +13,27 @@ class BuildInvokerUtils # # * _exception_: The exception given by a rescue statement. # * _context_: A symbol representing where in the build the exception - # occurs. + # occurs. # * _test_build_: A bool to signify if the exception occurred while building # from test or source. # def process_exception(exception, context, test_build=true) if (exception.message =~ /Don't know how to build task '(.+)'/i) error_header = "ERROR: Rake could not find file referenced in source" - error_header += " or test" if (test_build) + error_header += " or test" if (test_build) error_header += ": '#{$1}'. Possible stale dependency." - + @streaminator.stderr_puts( error_header ) if (@configurator.project_use_deep_dependencies) - help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again." + help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again." @streaminator.stderr_puts( help_message ) end - + raise '' else raise exception end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb index 519a4aab4..fd7451fa7 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb @@ -2,7 +2,7 @@ class Cacheinator constructor :cacheinator_helper, :file_path_utils, :file_wrapper, :yaml_wrapper - + def cache_test_config(hash) @yaml_wrapper.dump( @file_path_utils.form_test_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE), hash ) end @@ -11,15 +11,15 @@ class Cacheinator @yaml_wrapper.dump( @file_path_utils.form_release_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE ), hash ) end - + def diff_cached_test_file( filepath ) cached_filepath = @file_path_utils.form_test_build_cache_path( filepath ) - + if (@file_wrapper.exist?( cached_filepath ) and (!@file_wrapper.compare( filepath, cached_filepath ))) @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) return filepath elsif (!@file_wrapper.exist?( cached_filepath )) - @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) + @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) return filepath end @@ -43,5 +43,5 @@ class Cacheinator return @cacheinator_helper.diff_cached_config?( cached_filepath, hash ) end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb index 14e8a6ef0..b7fa5863f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb @@ -2,7 +2,7 @@ class CacheinatorHelper constructor :file_wrapper, :yaml_wrapper - + def diff_cached_config?(cached_filepath, hash) return false if ( not @file_wrapper.exist?(cached_filepath) ) return true if (@yaml_wrapper.load(cached_filepath) != hash) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb index 4a74aa842..82ef96135 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb @@ -1,13 +1,13 @@ require 'cmock' class CmockBuilder - + attr_accessor :cmock - - def setup + + def setup @cmock = nil end - + def manufacture(cmock_config) @cmock = CMock.new(cmock_config) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb index 0ae4d04a8..8dc11aa5a 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb @@ -379,4 +379,3 @@ class Configurator end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb index 75bcd982d..c2e198597 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb @@ -109,7 +109,7 @@ class ConfiguratorPlugins return defaults_with_path end - # gather up and return + # gather up and return def find_plugin_hash_defaults(config, plugin_paths) defaults_hash= [] diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb index c43bb5c12..cba88df3c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb @@ -79,7 +79,7 @@ class ConfiguratorSetup if config[:cmock][:unity_helper] config[:cmock][:unity_helper].each do |path| - validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper ) + validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper ) end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb index fc0210124..fc2950e0b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb @@ -6,7 +6,7 @@ require 'ceedling/file_path_utils' # for glob handling class methods class ConfiguratorValidator - + constructor :file_wrapper, :stream_wrapper, :system_wrapper # walk into config hash verify existence of data at key depth @@ -16,9 +16,9 @@ class ConfiguratorValidator if (not exist) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.") + @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.") end - + return exist end @@ -33,39 +33,39 @@ class ConfiguratorValidator path_list = [] exist = true - + case list when String then path_list << list when Array then path_list = list end - + path_list.each do |path| base_path = FilePathUtils::extract_path(path) # lop off add/subtract notation & glob specifiers - + if (not @file_wrapper.exist?(base_path)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.") exist = false - end + end end - + return exist end - + # simple path verification def validate_filepath_simple(path, *keys) validate_path = path - + if (not @file_wrapper.exist?(validate_path)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.") return false - end - + end + return true end - + # walk into config hash. verify specified file exists. def validate_filepath(config, *keys) hash = retrieve_value(config, keys) @@ -76,21 +76,21 @@ class ConfiguratorValidator # skip everything if we've got an argument replacement pattern return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN) - + if (not @file_wrapper.exist?(filepath)) # See if we can deal with it internally. - if GENERATED_DIR_PATH.include?(filepath) + if GENERATED_DIR_PATH.include?(filepath) # we already made this directory before let's make it again. FileUtils.mkdir_p File.join(File.dirname(__FILE__), filepath) - @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating") - + @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating") + else # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") return false end - end + end return true end @@ -106,17 +106,17 @@ class ConfiguratorValidator # skip everything if we've got an argument replacement pattern return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN) - + # if there's no path included, verify file exists somewhere in system search paths if (not filepath.include?('/')) exists = false - + @system_wrapper.search_paths.each do |path| if (@file_wrapper.exist?( File.join(path, filepath)) ) exists = true break end - + if (@file_wrapper.exist?( (File.join(path, filepath)).ext( exe_extension ) )) exists = true break @@ -125,25 +125,25 @@ class ConfiguratorValidator break end end - + if (not exists) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.") - return false + @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.") + return false end - + # if there is a path included, check that explicit filepath exists else if (not @file_wrapper.exist?(filepath)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") return false - end + end end return true end - + def validate_tool_stderr_redirect(config, tools, tool) redirect = config[tools][tool][:stderr_redirect] if (redirect.class == Symbol) @@ -151,17 +151,17 @@ class ConfiguratorValidator if (not StdErrRedirect.constants.map{|constant| constant.to_s}.include?(redirect.to_s.upcase)) error = "ERROR: [:#{tools}][:#{tool}][:stderr_redirect][:#{redirect}] is not a recognized option " + "{#{StdErrRedirect.constants.map{|constant| ':' + constant.to_s.downcase}.join(', ')}}." - @stream_wrapper.stderr_puts(error) - return false + @stream_wrapper.stderr_puts(error) + return false end end - + return true end - + private ######################################### - - + + def retrieve_value(config, keys) value = nil hash = config @@ -178,7 +178,7 @@ class ConfiguratorValidator break end end - + return {:value => value, :depth => depth} end @@ -186,8 +186,8 @@ class ConfiguratorValidator def format_key_sequence(keys, depth) walked_keys = keys.slice(0, depth) formatted_keys = walked_keys.map{|key| "[:#{key.to_s}]"} - + return formatted_keys.join end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb index 8d70b6d28..dab8d736b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb @@ -6,4 +6,4 @@ class ErbWrapper f << ERB.new(template, 0, "<>").result(binding) end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb index 53775b7bb..4a1064c52 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb @@ -146,4 +146,3 @@ class FileFinder return @file_finder_helper.find_file_in_collection(file_path, file_list, complain) end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb index a168e5cb5..f2d6a5e91 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb @@ -4,11 +4,11 @@ require 'ceedling/constants' # for Verbosity enumeration class FileFinderHelper constructor :streaminator - - + + def find_file_in_collection(file_name, file_list, complain, extra_message="") file_to_find = nil - + file_list.each do |item| base_file = File.basename(item) @@ -22,29 +22,29 @@ class FileFinderHelper blow_up(file_name, "However, a filename having different capitalization was found: '#{item}'.") end end - + end - + if file_to_find.nil? case (complain) - when :error then blow_up(file_name, extra_message) + when :error then blow_up(file_name, extra_message) when :warn then gripe(file_name, extra_message) - #when :ignore then + #when :ignore then end end - + return file_to_find end private - + def blow_up(file_name, extra_message="") error = "ERROR: Found no file '#{file_name}' in search paths." error += ' ' if (extra_message.length > 0) @streaminator.stderr_puts(error + extra_message, Verbosity::ERRORS) raise end - + def gripe(file_name, extra_message="") warning = "WARNING: Found no file '#{file_name}' in search paths." warning += ' ' if (extra_message.length > 0) @@ -52,5 +52,3 @@ class FileFinderHelper end end - - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb index 97e5856fb..245d8f826 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb @@ -6,7 +6,7 @@ require 'ceedling/file_path_utils' class FileSystemUtils - + constructor :file_wrapper # build up path list from input of one or more strings or arrays of (+/-) paths & globs @@ -14,7 +14,7 @@ class FileSystemUtils raw = [] # all paths and globs plus = Set.new # all paths to expand and add minus = Set.new # all paths to remove from plus set - + # assemble all globs and simple paths, reforming our glob notation to ruby globs paths.each do |paths_container| case (paths_container) @@ -26,29 +26,29 @@ class FileSystemUtils # iterate through each path and glob raw.each do |path| - + dirs = [] # container for only (expanded) paths - + # if a glob, expand it and slurp up all non-file paths if path.include?('*') # grab base directory only if globs are snug up to final path separator if (path =~ /\/\*+$/) dirs << FilePathUtils.extract_path(path) end - + # grab expanded sub-directory globs expanded = @file_wrapper.directory_listing( FilePathUtils.extract_path_no_aggregation_operators(path) ) expanded.each do |entry| dirs << entry if @file_wrapper.directory?(entry) end - + # else just grab simple path # note: we could just run this through glob expansion but such an # approach doesn't handle a path not yet on disk) else dirs << FilePathUtils.extract_path_no_aggregation_operators(path) end - + # add dirs to the appropriate set based on path aggregation modifier if present FilePathUtils.add_path?(path) ? plus.merge(dirs) : minus.merge(dirs) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb index 807cbd23f..1bb2883ee 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb @@ -7,4 +7,4 @@ class FileSystemWrapper end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb index 31d62c46a..175b3c5ac 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb @@ -29,25 +29,25 @@ class Flaginator def get_flag(hash, file_name) file_key = file_name.to_sym - + # 1. try literals - literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ } + literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ } return literals[file_key] if literals.include?(file_key) - + any, regex = partition(magic) { |k, v| (k == :'*') || (k == :'.*') } # glob or regex wild card - + # 2. try regexes find_res = regex.find { |k, v| file_name =~ /^#{k.to_s}$/ } return find_res[1] if find_res - + # 3. try anything find_res = any.find { |k, v| file_name =~ /.*/ } return find_res[1] if find_res - + # 4. well, we've tried return [] end - + def flag_down( operation, context, file ) # create configurator accessor method accessor = ('flags_' + context.to_s).to_sym diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb index 343156092..a6682c275 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb @@ -9,7 +9,7 @@ class GeneratorHelper def test_results_error_handler(executable, shell_result) notice = '' error = false - + if (shell_result[:output].nil? or shell_result[:output].strip.empty?) error = true # mirror style of generic tool_executor failure output @@ -24,7 +24,7 @@ class GeneratorHelper "> Produced no final test result counts in $stdout:\n" + "#{shell_result[:output].strip}\n" end - + if (error) # since we told the tool executor to ignore the exit code, handle it explicitly here notice += "> And exited with status: [#{shell_result[:exit_code]}] (count of failed tests).\n" if (shell_result[:exit_code] != nil) @@ -33,8 +33,8 @@ class GeneratorHelper notice += "> This is often a symptom of a bad memory access in source or test code.\n\n" @streaminator.stderr_puts(notice, Verbosity::COMPLAIN) - raise + raise end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb index 3af2d720a..2cd96478c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb @@ -77,7 +77,7 @@ class GeneratorTestResults # handle anything preceding filename in line as extra output to be collected stdout = nil stdout_regex = /(.+)#{Regexp.escape(filename)}.+/i - unity_test_time = 0 + unity_test_time = 0 if (line =~ stdout_regex) stdout = $1.clone diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb index 0b518325b..1d193c844 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb @@ -6,34 +6,34 @@ require 'ceedling/constants' class GeneratorTestResultsSanityChecker constructor :configurator, :streaminator - + def verify(results, unity_exit_code) - + # do no sanity checking if it's disabled return if (@configurator.sanity_checks == TestResultsSanityChecks::NONE) raise "results nil or empty" if results.nil? || results.empty? - ceedling_ignores_count = results[:ignores].size + ceedling_ignores_count = results[:ignores].size ceedling_failures_count = results[:failures].size ceedling_tests_summation = (ceedling_ignores_count + ceedling_failures_count + results[:successes].size) - # Exit code handling is not a sanity check that can always be performed because + # Exit code handling is not a sanity check that can always be performed because # command line simulators may or may not pass through Unity's exit code if (@configurator.sanity_checks >= TestResultsSanityChecks::THOROUGH) # many platforms limit exit codes to a maximum of 255 if ((ceedling_failures_count != unity_exit_code) and (unity_exit_code < 255)) sanity_check_warning(results[:source][:file], "Unity's exit code (#{unity_exit_code}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).") end - + if ((ceedling_failures_count < 255) and (unity_exit_code == 255)) sanity_check_warning(results[:source][:file], "Ceedling's summation of failed test cases (#{ceedling_failures_count}) is less than Unity's exit code (255 or more).") end end - + if (ceedling_ignores_count != results[:counts][:ignored]) sanity_check_warning(results[:source][:file], "Unity's final ignore count (#{results[:counts][:ignored]}) does not match Ceedling's summation of ignored test cases (#{ceedling_ignores_count}).") end - + if (ceedling_failures_count != results[:counts][:failed]) sanity_check_warning(results[:source][:file], "Unity's final fail count (#{results[:counts][:failed]}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).") end @@ -41,14 +41,14 @@ class GeneratorTestResultsSanityChecker if (ceedling_tests_summation != results[:counts][:total]) sanity_check_warning(results[:source][:file], "Unity's final test count (#{results[:counts][:total]}) does not match Ceedling's summation of all test cases (#{ceedling_tests_summation}).") end - + end private - + def sanity_check_warning(file, message) unless defined?(CEEDLING_IGNORE_SANITY_CHECK) - notice = "\n" + + notice = "\n" + "ERROR: Internal sanity check for test fixture '#{file.ext(@configurator.extension_executable)}' finds that #{message}\n" + " Possible causes:\n" + " 1. Your test + source dereferenced a null pointer.\n" + @@ -56,7 +56,7 @@ class GeneratorTestResultsSanityChecker " 3. Your test + source committed a memory access violation.\n" + " 4. Your test fixture produced an exit code of 0 despite execution ending prematurely.\n" + " Sanity check failures of test results are usually a symptom of interrupted test execution.\n\n" - + @streaminator.stderr_puts( notice ) raise end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb index 92276e1df..38147b322 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb @@ -11,7 +11,7 @@ class Loginator config_files.concat( @project_config_manager.options_files ) config_files.compact! config_files.map! { |file| file.ext('') } - + log_name = config_files.join( '_' ) @project_log_filepath = File.join( @configurator.project_log_path, log_name.ext('.log') ) @@ -20,12 +20,12 @@ class Loginator def log(string, heading=nil) return if (not @configurator.project_logging) - + output = "\n[#{@system_wrapper.time_now}]" output += " :: #{heading}" if (not heading.nil?) output += "\n#{string.strip}\n" @file_wrapper.write(@project_log_filepath, output, 'a') end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb index c3d7496d2..9ad894ea0 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb @@ -1,6 +1,6 @@ # modified version of Rake's provided make-style dependency loader -# customizations: +# customizations: # (1) handles windows drives in paths -- colons don't confuse task demarcation # (2) handles spaces in directory paths @@ -29,7 +29,7 @@ module Rake file_tasks, args = line.split(/:\s/) return if args.nil? - + # split at non-escaped space boundary between files (i.e. escaped spaces in paths are left alone) dependents = args.split(/\b\s+/) # replace escaped spaces and clean up any extra whitespace diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml index 43bbc066c..d73987f7c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml +++ b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml @@ -223,7 +223,7 @@ dependinator: - configurator - project_config_manager - test_includes_extractor - - file_path_utils + - file_path_utils - rake_wrapper - file_wrapper diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb index 98198a2ce..250b5ad30 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb @@ -16,4 +16,3 @@ def par_map(n, things, &block) end threads.each { |t| t.join } end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb index f20b3a3b2..835c08c52 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb @@ -5,7 +5,7 @@ class String def left_margin(margin=0) non_whitespace_column = 0 new_lines = [] - + # find first line with non-whitespace and count left columns of whitespace self.each_line do |line| if (line =~ /^\s*\S/) @@ -13,7 +13,7 @@ class String break end end - + # iterate through each line, chopping off leftmost whitespace columns and add back the desired whitespace margin self.each_line do |line| columns = [] @@ -25,7 +25,7 @@ class String new_lines << "\n" end end - + return new_lines.join end end @@ -74,7 +74,7 @@ class Plugin # whole shebang (any use of Ceedling) def pre_build; end def post_build; end - + def summary; end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb index 1269141f1..a010e1d0f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb @@ -23,7 +23,7 @@ class PluginBuilder end private - + def camelize(underscored_name) return underscored_name.gsub(/(_|^)([a-z0-9])/) {$2.upcase} end @@ -50,4 +50,4 @@ class PluginBuilder end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb index 8d83727ba..afc54494b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb @@ -2,46 +2,46 @@ require 'ceedling/constants' require 'ceedling/defaults' class PluginReportinator - + constructor :plugin_reportinator_helper, :plugin_manager, :reportinator def setup @test_results_template = nil end - - + + def set_system_objects(system_objects) @plugin_reportinator_helper.ceedling = system_objects end - - + + def fetch_results(results_path, test, options={:boom => false}) return @plugin_reportinator_helper.fetch_results( File.join(results_path, test), options ) end - + def generate_banner(message) return @reportinator.generate_banner(message) end - + def assemble_test_results(results_list, options={:boom => false}) aggregated_results = get_results_structure - - results_list.each do |result_path| + + results_list.each do |result_path| results = @plugin_reportinator_helper.fetch_results( result_path, options ) @plugin_reportinator_helper.process_results(aggregated_results, results) end return aggregated_results end - - + + def register_test_results_template(template) @test_results_template = template if (@test_results_template.nil?) end - - + + def run_test_results_report(hash, verbosity=Verbosity::NORMAL, &block) run_report( $stdout, ((@test_results_template.nil?) ? DEFAULT_TESTS_RESULTS_REPORT_TEMPLATE : @test_results_template), @@ -49,19 +49,19 @@ class PluginReportinator verbosity, &block ) end - - + + def run_report(stream, template, hash=nil, verbosity=Verbosity::NORMAL) failure = nil failure = yield() if block_given? - + @plugin_manager.register_build_failure( failure ) - + @plugin_reportinator_helper.run_report( stream, template, hash, verbosity ) end - + private ############################### - + def get_results_structure return { :successes => [], @@ -72,5 +72,5 @@ class PluginReportinator :time => 0.0 } end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb index 322a530b5..783158797 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb @@ -4,11 +4,11 @@ require 'rake' # for ext() require 'ceedling/constants' class PluginReportinatorHelper - + attr_writer :ceedling - + constructor :configurator, :streaminator, :yaml_wrapper, :file_wrapper - + def fetch_results(results_path, options) pass_path = File.join(results_path.ext( @configurator.extension_testpass )) fail_path = File.join(results_path.ext( @configurator.extension_testfail )) @@ -23,7 +23,7 @@ class PluginReportinatorHelper raise end end - + return {} end @@ -47,5 +47,5 @@ class PluginReportinatorHelper output = ERB.new(template, 0, "%<>") @streaminator.stream_puts(stream, output.result(binding()), verbosity) end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb index 8b89c0b3a..916d31332 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb @@ -94,7 +94,7 @@ class PreprocessinatorIncludesHandler target_file = make_rule.split[0].gsub(':', '').gsub('\\','/') base = File.basename(target_file, File.extname(target_file)) make_rule_dependencies = make_rule.gsub(/.*\b#{Regexp.escape(base)}\S*/, '').gsub(/\\$/, '') - + # Extract the headers dependencies from the make rule hdr_ext = @configurator.extension_header headers_dependencies = make_rule_dependencies.split.find_all {|path| path.end_with?(hdr_ext) }.uniq diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb index ed7a73b8c..b1d455127 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb @@ -20,7 +20,7 @@ class ProjectConfigManager def merge_options(config_hash, option_filepath) @options_files << File.basename( option_filepath ) config_hash.deep_merge!( @yaml_wrapper.load( option_filepath ) ) - end + end def filter_internal_sources(sources) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb index 3f667c852..b13749738 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb @@ -1,6 +1,6 @@ class RakeUtils - + constructor :rake_wrapper def task_invoked?(task_regex) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb index 0f583d06d..fcb5286b9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb @@ -14,8 +14,8 @@ class Reportinator # ==== Examples # # rp = Reportinator.new - # rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n" - # rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n" + # rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n" + # rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n" # # def generate_banner(message, width=nil) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake index 70ddcbc2e..51485d3a8 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake @@ -3,7 +3,7 @@ rule(/#{CMOCK_MOCK_PREFIX}[^\/\\]+#{'\\'+EXTENSION_SOURCE}$/ => [ proc do |task_name| @ceedling[:file_finder].find_header_input_for_mock_file(task_name) - end + end ]) do |mock| @ceedling[:generator].generate_mock(TEST_SYM, mock.source) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake index c29111272..936961ce8 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake @@ -6,7 +6,7 @@ rule(/#{PROJECT_TEST_PREPROCESS_FILES_PATH}\/.+/ => [ proc do |task_name| @ceedling[:file_finder].find_test_or_source_or_header_file(task_name) - end + end ]) do |file| if (not @ceedling[:configurator].project_use_deep_dependencies) raise 'ERROR: Ceedling preprocessing rule invoked though neccessary auxiliary dependency support not enabled.' @@ -19,8 +19,7 @@ end rule(/#{PROJECT_TEST_PREPROCESS_INCLUDES_PATH}\/.+/ => [ proc do |task_name| @ceedling[:file_finder].find_test_or_source_or_header_file(task_name) - end + end ]) do |file| @ceedling[:generator].generate_shallow_includes_list(TEST_SYM, file.source) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake index 4a583bd6c..47eec858f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake @@ -96,4 +96,3 @@ namespace RELEASE_SYM do end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake index 9550783cc..bf944de25 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake @@ -3,7 +3,7 @@ rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [ proc do |task_name| @ceedling[:file_finder].find_compilation_input_file(task_name, :error, true) - end + end ]) do |dep| @ceedling[:generator].generate_dependencies_file( TOOLS_RELEASE_DEPENDENCIES_GENERATOR, @@ -12,4 +12,3 @@ rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ = @ceedling[:file_path_utils].form_release_build_c_object_filepath(dep.source), dep.name) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake index 61e15e2cc..3ab80f3a9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake @@ -70,4 +70,3 @@ namespace TEST_SYM do @ceedling[:test_invoker].setup_and_invoke([test.source]) end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake index 7175ee3f2..a8dfd296e 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake @@ -12,4 +12,3 @@ rule(/#{PROJECT_TEST_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [ @ceedling[:file_path_utils].form_test_build_c_object_filepath(dep.source), dep.name) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb index ea78fd97e..cf9922f07 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb @@ -18,7 +18,7 @@ class Setupinator @config_hash = config_hash # load up all the constants and accessors our rake files, objects, & external scripts will need; - # note: configurator modifies the cmock section of the hash with a couple defaults to tie + # note: configurator modifies the cmock section of the hash with a couple defaults to tie # project together - the modified hash is used to build cmock object @ceedling[:configurator].populate_defaults( config_hash ) @ceedling[:configurator].populate_unity_defaults( config_hash ) @@ -31,16 +31,16 @@ class Setupinator @ceedling[:configurator].standardize_paths( config_hash ) @ceedling[:configurator].validate( config_hash ) @ceedling[:configurator].build( config_hash, :environment ) - + @ceedling[:configurator].insert_rake_plugins( @ceedling[:configurator].rake_plugins ) @ceedling[:configurator].tools_supplement_arguments( config_hash ) - + # merge in any environment variables plugins specify, after the main build @ceedling[:plugin_manager].load_plugin_scripts( @ceedling[:configurator].script_plugins, @ceedling ) do |env| @ceedling[:configurator].eval_environment_variables( env ) @ceedling[:configurator].build_supplement( config_hash, env ) end - + @ceedling[:plugin_reportinator].set_system_objects( @ceedling ) @ceedling[:file_finder].prepare_search_sources @ceedling[:loginator].setup_log_filepath diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb index 7e160527f..2cee58d3e 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb @@ -16,7 +16,7 @@ class StreamWrapper def stdout_flush $stdout.flush end - + def stderr_puts(string) $stderr.puts(string) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb index b8dcd070f..e30440c7d 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb @@ -12,7 +12,7 @@ class Streaminator @stream_wrapper.stdout_puts(string) @stream_wrapper.stdout_flush end - + # write to log as though Verbosity::OBNOXIOUS @loginator.log( string, @streaminator_helper.extract_name($stdout) ) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb index 9fb5cc0b7..cbaef7c92 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb @@ -8,7 +8,7 @@ class StreaminatorHelper when 2 then '#' else stream.inspect end - + return name end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb index 477aba4f1..81bb7bc54 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb @@ -13,7 +13,7 @@ class SystemUtils constructor :system_wrapper ## - # Sets up the class. + # Sets up the class. def setup @tcsh_shell = nil end @@ -23,7 +23,7 @@ class SystemUtils def tcsh_shell? # once run a single time, return state determined at that execution return @tcsh_shell if not @tcsh_shell.nil? - + result = @system_wrapper.shell_backticks('echo $version') if ((result[:exit_code] == 0) and (result[:output].strip =~ /^tcsh/)) @@ -31,7 +31,7 @@ class SystemUtils else @tcsh_shell = false end - + return @tcsh_shell end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb index 7bfabbb12..35f92ae03 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb @@ -11,7 +11,7 @@ class TaskInvoker @release_regexs = [/^#{RELEASE_ROOT_NAME}(:|$)/] @first_run = true end - + def add_test_task_regex(regex) @test_regexs << regex end @@ -19,26 +19,26 @@ class TaskInvoker def add_release_task_regex(regex) @release_regexs << regex end - + def test_invoked? invoked = false - + @test_regexs.each do |regex| invoked = true if (@rake_utils.task_invoked?(regex)) break if invoked end - + return invoked end - + def release_invoked? invoked = false - + @release_regexs.each do |regex| invoked = true if (@rake_utils.task_invoked?(regex)) break if invoked end - + return invoked end @@ -60,7 +60,7 @@ class TaskInvoker @rake_wrapper[mock].invoke } end - + def invoke_test_runner(runner) @dependinator.enhance_runner_dependencies( runner ) reset_rake_task_for_changed_defines( runner ) @@ -112,11 +112,11 @@ class TaskInvoker @rake_wrapper[file].invoke end end - + def invoke_release_objects(objects) par_map(PROJECT_COMPILE_THREADS, objects) do |object| @rake_wrapper[object].invoke end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake index a35cde75e..67a3b503a 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake @@ -113,4 +113,3 @@ task :summary do puts "\nNOTE: Summaries may be out of date with project sources.\n\n" end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake index 7b950ca0b..8263955fa 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake @@ -109,5 +109,3 @@ namespace :files do end end - - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake index b313b2f53..9d3a59c53 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake @@ -5,8 +5,8 @@ require 'ceedling/file_path_utils' desc "Build release target." task RELEASE_SYM => [:directories] do header = "Release build '#{File.basename(PROJECT_RELEASE_BUILD_TARGET)}'" - @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}") - + @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}") + begin @ceedling[:plugin_manager].pre_release @@ -15,16 +15,15 @@ task RELEASE_SYM => [:directories] do @ceedling[:project_config_manager].process_release_config_change core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_c_objects( COLLECTION_ALL_SOURCE ) ) - + # if assembler use isn't enabled, COLLECTION_ALL_ASSEMBLY is empty array & nothing happens core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_asm_objects( COLLECTION_ALL_ASSEMBLY ) ) - + # if we're using libraries, we need to add those to our collection as well library_objects = (defined? LIBRARIES_RELEASE && !LIBRARIES_RELEASE.empty?) ? LIBRARIES_RELEASE.flatten.compact : [] file( PROJECT_RELEASE_BUILD_TARGET => (core_objects + extra_objects + library_objects) ) Rake::Task[PROJECT_RELEASE_BUILD_TARGET].invoke ensure - @ceedling[:plugin_manager].post_release + @ceedling[:plugin_manager].post_release end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake index 6c51ebcc9..5c1006b36 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake @@ -59,4 +59,3 @@ namespace TEST_SYM do end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb index 403d93e3e..a48edf9f9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb @@ -19,14 +19,14 @@ class TestInvokerHelper yield( dependencies_list ) if block_given? end - + def extract_sources(test) sources = [] includes = @test_includes_extractor.lookup_includes_list(test) - + includes.each { |include| sources << @file_finder.find_compilation_input_file(include, :ignore) } - + return sources.compact end - + end diff --git a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb index 6a6d01ab2..cbc5e3e38 100644 --- a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb +++ b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb @@ -37,4 +37,3 @@ class Beep < Plugin end end end - diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md index ab0b53b45..aad449204 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md @@ -5,7 +5,7 @@ ceedling-bullseye Plugin for integrating Bullseye code coverage tool into Ceedling projects. This plugin requires a working license to Bullseye code coverage tools. The tools -must be within the path or the path should be added to the environment in the +must be within the path or the path should be added to the environment in the `project.yml file`. ## Configuration diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb index 504f85583..e1ef9874b 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb @@ -12,4 +12,3 @@ BRANCHES: <%=sprintf(format_string, hash[:coverage][:branches])%>% % else BRANCHES: none % end - diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb index ffa444ac7..3e7622006 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb @@ -38,7 +38,7 @@ class Bullseye < Plugin @ceedling[:plugin_manager].pre_compile_execute(arg_hash) @ceedling[:streaminator].stdout_puts("Compiling #{File.basename(source)} with coverage...") - compile_command = + compile_command = @ceedling[:tool_executor].build_command_line( TOOLS_BULLSEYE_COMPILER, @ceedling[:flaginator].flag_down( OPERATION_COMPILE_SYM, BULLSEYE_SYM, source ), @@ -48,14 +48,14 @@ class Bullseye < Plugin coverage_command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_INSTRUMENTATION, [], compile_command[:line] ) shell_result = @ceedling[:tool_executor].exec( coverage_command[:line], coverage_command[:options] ) - + arg_hash[:shell_result] = shell_result @ceedling[:plugin_manager].post_compile_execute(arg_hash) end def post_test_fixture_execute(arg_hash) result_file = arg_hash[:result_file] - + if ((result_file =~ /#{BULLSEYE_RESULTS_PATH}/) and (not @result_list.include?(result_file))) @result_list << arg_hash[:result_file] end @@ -70,13 +70,13 @@ class Bullseye < Plugin :header => BULLSEYE_ROOT_NAME.upcase, :results => results } - + @ceedling[:plugin_reportinator].run_test_results_report(hash) do message = '' message = 'Unit test failures.' if (results[:counts][:failed] > 0) message end - + # coverage results return if (verify_coverage_file() == false) if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}(all|delta)/)) @@ -100,13 +100,13 @@ class Bullseye < Plugin } @ceedling[:plugin_reportinator].run_test_results_report(hash) - + # coverage results command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_REPORT_COVSRC) shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options]) report_coverage_results_all(shell_result[:output]) end - + def enableBullseye(enable) if BULLSEYE_AUTO_LICENSE if (enable) @@ -117,14 +117,14 @@ class Bullseye < Plugin @ceedling[:streaminator].stdout_puts("Reverting Bullseye to previous state") end - args.each do |arg| + args.each do |arg| command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_BUILD_ENABLE_DISABLE, [], arg) shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options]) end end end - + private ################################### def report_coverage_results_all(coverage) @@ -139,7 +139,7 @@ class Bullseye < Plugin if (coverage =~ /^Total.*?=\s+([0-9]+)\%/) results[:coverage][:functions] = $1.to_i end - + if (coverage =~ /^Total.*=\s+([0-9]+)\%\s*$/) results[:coverage][:branches] = $1.to_i end @@ -177,10 +177,10 @@ class Bullseye < Plugin banner = @ceedling[:plugin_reportinator].generate_banner( "#{BULLSEYE_ROOT_NAME.upcase}: CODE COVERAGE SUMMARY" ) @ceedling[:streaminator].stdout_puts "\n" + banner + "\nNo coverage file.\n\n" end - + return exist end - + end @@ -188,7 +188,7 @@ end END { # cache our input configurations to use in comparison upon next execution if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}/)) - @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash ) + @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash ) @ceedling[BULLSEYE_SYM].enableBullseye(false) end } diff --git a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md index 4e0fcd45e..5f4ff77b1 100644 --- a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md @@ -3,7 +3,7 @@ ceedling-colour-report ## Overview -The colour_report replaces the normal ceedling "pretty" output with +The colour_report replaces the normal ceedling "pretty" output with a colorized variant, in order to make the results easier to read from a standard command line. This is very useful on developer machines, but can occasionally cause problems with parsing on CI servers. diff --git a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb index 4bf8b5312..67e94f935 100644 --- a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb +++ b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb @@ -89,4 +89,3 @@ class CommandHooks < Plugin end end end - diff --git a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md index ea80b7397..7e3846e56 100644 --- a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md +++ b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md @@ -9,7 +9,7 @@ In June of 2016, Microsoft with Red Hat and Codenvy got together to create a sta For C and C++ projects, many people use the `clangd` backend. So that it can do things like "go to definition", `clangd` needs to know how to build the project so that it can figure out all the pieces to the puzzle. There are manual tools such as `bear` which can be run with `gcc` or `clang` to extract this information it has a big limitation in that if run with `ceedling release` you won't get any auto completion for Unity and you'll also get error messages reported by your IDE because of what it perceives as missing headers. If you do the same with `ceedling test` now you get Unity but you might miss things that are only seen in the release build. -This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`. +This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`. For more information on LSP and to find out if your editor supports it, check out https://langserver.org/ diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile index bc5594110..2fd9f859f 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile @@ -16,4 +16,4 @@ task :integration_test do end end -task :default => [:spec, :integration_test] \ No newline at end of file +task :default => [:spec, :integration_test] diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml index 6bda22291..00e395d0c 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml @@ -28,7 +28,7 @@ :source: - src/** :support: - + :defines: # in order to add common defines: # 1) remove the trailing [] from the :common: section diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c index 2f03449b0..797d46878 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c @@ -4,4 +4,4 @@ void display_turnOffStatusLed(void) { printf("Display: Status LED off"); -} \ No newline at end of file +} diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb index 9dc03a653..d439a8d7f 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb @@ -90,7 +90,7 @@ class FffMockGenerator # In the init function, reset the FFF globals. These are used for things # like the call history. output.puts " FFF_RESET_HISTORY();" - + # Also, reset all of the fakes. if parsed_header[:functions] parsed_header[:functions].each do |function| diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb index e6ac11dd0..09d317551 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb @@ -254,7 +254,7 @@ describe "FffMockGenerator.create_mock_header" do ) end end - + context "when there is a function that returns a const int" do let(:mock_header){ parsed_header = {} diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb index 364f8521e..7b7f04f58 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb @@ -146,4 +146,4 @@ describe "FffMockGenerator.create_mock_source" do ) end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb index cda278440..3b6fa7120 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb @@ -48,4 +48,4 @@ def create_cmock_style_parsed_header(functions, typedefs = nil) end end parsed_header -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h index de3db44aa..970ecbb35 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h @@ -30,4 +30,4 @@ fff.call_history[order_], \ "Function " #function_ " not called in order " #order_ ) -#endif \ No newline at end of file +#endif diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb index 5e5a1742b..266750497 100644 --- a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb @@ -12,4 +12,3 @@ BRANCHES: <%=sprintf(format_string, hash[:coverage][:branches])%>% % else BRANCHES: none % end - diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb index 92617fba5..10a0a6c5c 100644 --- a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb +++ b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb @@ -5,7 +5,7 @@ class ReportinatorHelper def print_shell_result(shell_result) if !(shell_result.nil?) puts "Done in %.3f seconds." % shell_result[:time] - + if !(shell_result[:output].nil?) && (shell_result[:output].length > 0) puts shell_result[:output] end diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md index 8e5a1e571..b383492e2 100644 --- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md @@ -3,8 +3,8 @@ json_tests_report ## Overview -The json_tests_report plugin creates a JSON file of test results, which is -handy for Continuous Integration build servers or as input into other +The json_tests_report plugin creates a JSON file of test results, which is +handy for Continuous Integration build servers or as input into other reporting tools. The JSON file is output to the appropriate `/artifacts/` directory (e.g. `artifacts/test/` for test tasks, `artifacts/gcov/` for gcov, or `artifacts/bullseye/` for bullseye runs). diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb index e7023db7b..f09339ee2 100644 --- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb +++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb @@ -33,7 +33,7 @@ class JsonTestsReport < Plugin "IgnoredTests" => write_tests(results[:ignores]), "Summary" => write_statistics(results[:counts]) } - + f << JSON.pretty_generate(json) end end @@ -62,7 +62,7 @@ class JsonTestsReport < Plugin results.each do |result| result[:collection].each do |item| @test_counter += 1 - retval << { + retval << { "file" => File.join(result[:source][:path], result[:source][:file]), "test" => item[:test] } diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md index a3c2c7ad9..61cf45bd6 100644 --- a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md +++ b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md @@ -96,7 +96,7 @@ put that corporate copyright notice (or maybe a copyleft notice, if that's your ### Test Defines You can specify the "#ifdef TEST" at the top of the test files with a custom define. -This example will put a "#ifdef CEEDLING_TEST" at the top of the test files. +This example will put a "#ifdef CEEDLING_TEST" at the top of the test files. ``` :module_generator: @@ -115,5 +115,3 @@ Your options are as follows: - `:camel` - camelFilesAreSimilarButStartLow - `:snake` - snake_case_is_all_lower_and_uses_underscores - `:caps` - CAPS_FEELS_LIKE_YOU_ARE_SCREAMING - - diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml index cdb2da2eb..b90afd0ff 100644 --- a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml +++ b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml @@ -1,4 +1,4 @@ :module_generator: :project_root: ./ :source_root: src/ - :test_root: test/ \ No newline at end of file + :test_root: test/ diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md index 9ab60847e..e95106ed1 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md @@ -3,8 +3,8 @@ ceedling-stdout-gtestlike-tests-report ## Overview -The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with -a variant that resembles the output of gtest. This is most helpful when trying to +The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with +a variant that resembles the output of gtest. This is most helpful when trying to integrate into an IDE or CI that is meant to work with google test. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md index ed6c65582..da04d1c14 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md @@ -3,7 +3,7 @@ ceedling-stdout-ide-tests-report ## Overview -The stdout_ide_tests_report replaces the normal ceedling "pretty" output with +The stdout_ide_tests_report replaces the normal ceedling "pretty" output with a simplified variant intended to be easily parseable. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md index 7e1be2382..358aa93ab 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md @@ -5,7 +5,7 @@ ceedling-pretty-tests-report The stdout_pretty_tests_report is the default output of ceedling. Instead of showing most of the raw output of CMock, Ceedling, etc., it shows a simplified -view. It also creates a nice summary at the end of execution which groups the +view. It also creates a nice summary at the end of execution which groups the results into ignored and failed tests. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb index 52b29f7f0..1c025bf1b 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb @@ -56,4 +56,3 @@ IGNORED: <%=sprintf(format_string, ignored)%> No tests executed. % end - diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb index 018388fc1..fd9589183 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb @@ -2,20 +2,20 @@ require 'ceedling/plugin' require 'ceedling/defaults' class StdoutPrettyTestsReport < Plugin - + def setup @result_list = [] @plugin_root = File.expand_path(File.join(File.dirname(__FILE__), '..')) template = @ceedling[:file_wrapper].read(File.join(@plugin_root, 'assets/template.erb')) @ceedling[:plugin_reportinator].register_test_results_template( template ) end - + def post_test_fixture_execute(arg_hash) return if not (arg_hash[:context] == TEST_SYM) - + @result_list << arg_hash[:result_file] end - + def post_build return if not (@ceedling[:task_invoker].test_invoked?) diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md index e51a4e60e..ef4caa57b 100644 --- a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md +++ b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md @@ -1,9 +1,9 @@ ceedling-subprojects ==================== -Plugin for supporting subprojects that are built as static libraries. It continues to support -dependency tracking, without getting confused between your main project files and your -subproject files. It accepts different compiler flags and linker flags, allowing you to +Plugin for supporting subprojects that are built as static libraries. It continues to support +dependency tracking, without getting confused between your main project files and your +subproject files. It accepts different compiler flags and linker flags, allowing you to optimize for your situation. First, you're going to want to add the extension to your list of known extensions: @@ -13,12 +13,12 @@ First, you're going to want to add the extension to your list of known extension :subprojects: '.a' ``` -Define a new section called :subprojects. There, you can list as many subprojects -as you may need under the :paths key. For each, you specify a unique place to build +Define a new section called :subprojects. There, you can list as many subprojects +as you may need under the :paths key. For each, you specify a unique place to build and a unique name. ``` -:subprojects: +:subprojects: :paths: - :name: libprojectA :source: @@ -27,7 +27,7 @@ and a unique name. :include: - ./subprojectA/include/dir :build_root: ./subprojectA/build/dir - :defines: + :defines: - DEFINE_JUST_FOR_THIS_FILE - AND_ANOTHER - :name: libprojectB diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake index 0025c3ecd..f80c812f3 100644 --- a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake +++ b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake @@ -73,6 +73,5 @@ SUBPROJECTS_PATHS.each do |subproj| task :directories => subproj_directories.clone # Finally, add the static library to our RELEASE build dependency list - task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"] + task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"] end - diff --git a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md index 9fcda7d5b..2467ebe99 100644 --- a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md @@ -3,7 +3,7 @@ ceedling-teamcity-tests-report ## Overview -The teamcity_tests_report replaces the normal ceedling "pretty" output with +The teamcity_tests_report replaces the normal ceedling "pretty" output with a version that has results tagged to be consumed with the teamcity CI server. ## Setup diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c index fdff8f475..24b3b09e8 100644 --- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c +++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c @@ -43,4 +43,3 @@ void Throw(CEXCEPTION_T ExceptionID) } <- finish off that local scope we created to have our own variables if (CExceptionFrames[CEXCEPTION_GET_ID].Exception != CEXCEPTION_NONE) <- start the actual 'catch' processing if we have an exception id saved away */ - diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build index 2770122af..9694e51c7 100644 --- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build @@ -6,6 +6,6 @@ # cexception_dir = include_directories('.') -cexception_lib = static_library(meson.project_name(), +cexception_lib = static_library(meson.project_name(), files('CException.c'), include_directories : cexception_dir) diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c index 88f2c2b25..d8bdb1369 100644 --- a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c +++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c @@ -213,4 +213,3 @@ void CMock_Guts_MemFreeFinal(void) } #endif } - diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build index c03c4e5bb..b3145c02e 100644 --- a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build @@ -6,7 +6,7 @@ # cmock_dir = include_directories('.') -cmock_lib = static_library(meson.project_name(), +cmock_lib = static_library(meson.project_name(), files('cmock.c'), dependencies: [unity_dep], include_directories: cmock_dir) diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb index 581afc7e6..cbeb8267a 100644 --- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb +++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb @@ -18,8 +18,8 @@ module DIY #:nodoc:# raise "Nil context hash" unless context_hash raise "Need a hash" unless context_hash.kind_of?(Hash) [ "[]", "keys" ].each do |mname| - unless extra_inputs.respond_to?(mname) - raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each" + unless extra_inputs.respond_to?(mname) + raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each" end end @@ -37,7 +37,7 @@ module DIY #:nodoc:# @cache = {} @cache['this_context'] = self end - + # Convenience: create a new DIY::Context by loading from a String (or open file handle.) def self.from_yaml(io_or_string, extra_inputs={}) @@ -51,7 +51,7 @@ module DIY #:nodoc:# self.from_yaml(File.read(fname), extra_inputs) end - # Return a reference to the object named. If necessary, the object will + # Return a reference to the object named. If necessary, the object will # be instantiated on first use. If the object is non-singleton, a new # object will be produced each time. def get_object(obj_name) @@ -77,7 +77,7 @@ module DIY #:nodoc:# end alias :[] :get_object - # Inject a named object into the Context. This must be done before the Context has instantiated the + # Inject a named object into the Context. This must be done before the Context has instantiated the # object in question. def set_object(obj_name,obj) key = obj_name.to_s @@ -108,9 +108,9 @@ module DIY #:nodoc:# @defs.keys.member?(key) or extra_inputs_has(key) end - # Every top level object in the Context is instantiated. This is especially useful for + # Every top level object in the Context is instantiated. This is especially useful for # systems that have "floating observers"... objects that are never directly accessed, who - # would thus never be instantiated by coincedence. This does not build any subcontexts + # would thus never be instantiated by coincedence. This does not build any subcontexts # that may exist. def build_everything @defs.keys.each { |k| self[k] } @@ -131,7 +131,7 @@ module DIY #:nodoc:# # we modify the info hash below so it's important to have a new # instance to play with info = info.dup if info - + # see if we are building a factory if info and info.has_key?('builds') unless info.has_key?('auto_require') @@ -150,21 +150,21 @@ module DIY #:nodoc:# name = name.to_s case name - when /^\+/ + when /^\+/ # subcontext @sub_context_defs[name.gsub(/^\+/,'')] = info - + when /^using_namespace/ # namespace: use a module(s) prefix for the classname of contained object defs # NOTE: namespacing is NOT scope... it's just a convenient way to setup class names for a group of objects. get_defs_from info, parse_namespace(name) when /^method\s/ key_name = name.gsub(/^method\s/, "") - @defs[key_name] = MethodDef.new(:name => key_name, - :object => info['object'], + @defs[key_name] = MethodDef.new(:name => key_name, + :object => info['object'], :method => info['method'], :attach => info['attach']) - else + else # Normal object def info ||= {} if extra_inputs_has(name) @@ -173,14 +173,14 @@ module DIY #:nodoc:# unless info.has_key?('auto_require') info['auto_require'] = self.class.auto_require end - if namespace + if namespace if info['class'] info['class'] = namespace.build_classname(info['class']) else info['class'] = namespace.build_classname(name) end end - + @defs[name] = ObjectDef.new(:name => name, :info => info) end @@ -191,10 +191,10 @@ module DIY #:nodoc:# method_definition = @defs[key] object = get_object(method_definition.object) method = object.method(method_definition.method) - + unless method_definition.attach.nil? instance_var_name = "@__diy_#{method_definition.object}" - + method_definition.attach.each do |object_key| get_object(object_key).instance_eval do instance_variable_set(instance_var_name, object) @@ -202,14 +202,14 @@ module DIY #:nodoc:# #{instance_var_name}.#{method_definition.method}(*args) end| end - end + end end - + return method rescue Exception => oops build_and_raise_construction_error(key, oops) end - + def construct_object(key) # Find the object definition obj_def = @defs[key] @@ -242,13 +242,13 @@ module DIY #:nodoc:# rescue Exception => oops build_and_raise_construction_error(key, oops) end - + def build_and_raise_construction_error(key, oops) cerr = ConstructionError.new(key,oops) cerr.set_backtrace(oops.backtrace) raise cerr end - + def get_class_for_name_with_module_delimeters(class_name) class_name.split(/::/).inject(Object) do |mod,const_name| mod.const_get(const_name) end end @@ -264,7 +264,7 @@ module DIY #:nodoc:# Namespace.new(str) end end - + class Namespace #:nodoc:# def initialize(str) # 'using_namespace Animal Reptile' @@ -292,15 +292,15 @@ module DIY #:nodoc:# @name = obj_name end end - + class MethodDef #:nodoc: attr_accessor :name, :object, :method, :attach - + def initialize(opts) @name, @object, @method, @attach = opts[:name], opts[:object], opts[:method], opts[:attach] end end - + class ObjectDef #:nodoc: attr_accessor :name, :class_name, :library, :components def initialize(opts) @@ -330,7 +330,7 @@ module DIY #:nodoc:# # Use Class Directly @use_class_directly = info.delete 'use_class_directly' - + # Auto-compose compose = info.delete 'compose' if compose @@ -380,7 +380,7 @@ module DIY #:nodoc:# object_name = object_name cause = cause m = "Failed to construct '#{object_name}'" - if cause + if cause m << "\n ...caused by:\n >>> #{cause}" end super m @@ -388,11 +388,11 @@ module DIY #:nodoc:# end class NamespaceError < RuntimeError #:nodoc:# - end + end module Infl #:nodoc:# # Ganked this from Inflector: - def self.camelize(lower_case_and_underscored_word) + def self.camelize(lower_case_and_underscored_word) lower_case_and_underscored_word.to_s.gsub(/\/(.?)/) { "::" + $1.upcase }.gsub(/(^|_)(.)/) { $2.upcase } end # Ganked this from Inflector: diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb index d2566c5d1..8f00e5e45 100644 --- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb +++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb @@ -1,7 +1,7 @@ module DIY #:nodoc:# class FactoryDef #:nodoc: attr_accessor :name, :target, :class_name, :library - + def initialize(opts) @name, @target, @library, @auto_require = opts[:name], opts[:target], opts[:library], opts[:auto_require] @@ -10,7 +10,7 @@ module DIY #:nodoc:# @library ||= Infl.underscore(@class_name) if @auto_require end end - + class Context def construct_factory(key) factory_def = @defs[key] @@ -33,4 +33,3 @@ module DIY #:nodoc:# end end end - diff --git a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml index 4a5e47424..c7679aefc 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml +++ b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml @@ -18,7 +18,7 @@ - Defs.h - Board.h - Exception.h - :boilerplates: + :boilerplates: #these are inserted at the top of generated files. #just comment out or remove if not desired. #use %1$s where you would like the file name to appear (path/extension not included) diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build index 1c7b426ff..5acd51a9b 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build @@ -6,6 +6,6 @@ # unity_dir = include_directories('.') -unity_lib = static_library(meson.project_name(), +unity_lib = static_library(meson.project_name(), files('unity.c'), include_directories: unity_dir) diff --git a/tools/build_board.py b/tools/build_board.py index 4593dafa5..13376d126 100644 --- a/tools/build_board.py +++ b/tools/build_board.py @@ -56,7 +56,7 @@ if __name__ == '__main__': result = pool.starmap(build_utils.build_example, pool_args) # sum all element of same index (column sum) result = list(map(sum, list(zip(*result)))) - + # add to total result total_result = list(map(lambda x, y: x + y, total_result, result)) diff --git a/tools/build_utils.py b/tools/build_utils.py index de9052d2d..d0ef52717 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -124,4 +124,4 @@ def build_size(make_cmd): sram_size = int(size_list[1]) + int(size_list[2]) return (flash_size, sram_size) - return (0, 0) \ No newline at end of file + return (0, 0) diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf index ba54fe057..d243aab0a 100644 --- a/tools/iar_template.ipcf +++ b/tools/iar_template.ipcf @@ -141,5 +141,5 @@ $TUSB_DIR$/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c - + diff --git a/tools/mksunxi.py b/tools/mksunxi.py index 04786f429..fd8557cfc 100644 --- a/tools/mksunxi.py +++ b/tools/mksunxi.py @@ -45,4 +45,4 @@ if __name__ == "__main__": if len(sys.argv) != 3: print("Usage: mksunxi.py input.bin output.bin") exit(1) - exit(process_file(sys.argv[1], sys.argv[2])) \ No newline at end of file + exit(process_file(sys.argv[1], sys.argv[2])) diff --git a/tools/pcapng_to_corpus.py b/tools/pcapng_to_corpus.py index 78b1f77a2..9c31365eb 100755 --- a/tools/pcapng_to_corpus.py +++ b/tools/pcapng_to_corpus.py @@ -16,7 +16,7 @@ def extract_packets(pcap_file): def build_corpus_zip(zip_file_output, packets): """Builds a zip file with a file per packet - + The structure of this zip corpus is a simple content addressable storage i.e. seed_file_name == sha256_digest(packet). """ @@ -25,7 +25,7 @@ def build_corpus_zip(zip_file_output, packets): hash = hashlib.sha256(packet).hexdigest() if hash not in out.namelist(): out.writestr(hash, packet) - + def main(pcap_file, output_zip_file): packets = extract_packets(pcap_file) @@ -35,12 +35,10 @@ if __name__ == "__main__": parser = argparse.ArgumentParser( prog = "pcapng_to_corpus.py", description="""Converts a wireshark capture to a zip of binary packet - files suitable for an oss-fuzz corpus. In the case the - zip corpus already exists, this script will modify + files suitable for an oss-fuzz corpus. In the case the + zip corpus already exists, this script will modify the zip file in place adding seed entries.""") parser.add_argument('pcapng_capture_file') parser.add_argument('oss_fuzz_corpus_zip') args = parser.parse_args() main(args.pcapng_capture_file, args.oss_fuzz_corpus_zip) - - diff --git a/tools/usb_drivers/tinyusb_win_usbser.inf b/tools/usb_drivers/tinyusb_win_usbser.inf index e7f7a9b22..659f048ae 100644 --- a/tools/usb_drivers/tinyusb_win_usbser.inf +++ b/tools/usb_drivers/tinyusb_win_usbser.inf @@ -105,4 +105,4 @@ DRIVERFILENAME ="usbser" MFGNAME="tinyusb.org" INSTDISK="tinyusb CDC Driver" DESCRIPTION="tinyusb Serial" -SERVICE="USB RS-232 Emulation Driver" \ No newline at end of file +SERVICE="USB RS-232 Emulation Driver" From 2e5f649fd3ba3e0a17bb6007f773461bdc0e82fb Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 16:57:30 +0700 Subject: [PATCH 069/142] fix run unit test with pre-commit --- .github/workflows/pre-commit.yml | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index 6deee872f..86c106151 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -26,19 +26,18 @@ jobs: - name: Checkout TinyUSB uses: actions/checkout@v3 + - name: Get Dependencies + run: | + gem install ceedling + #cd test/unit-test + #ceedling test:all + - name: Run pre-commit uses: pre-commit/action@v3.0.0 - name: Run codespell uses: codespell-project/actions-codespell@master - - name: Run Unit Tests - run: | - # Install Ceedling - gem install ceedling - cd test/unit-test - ceedling test:all - - name: Build Fuzzer run: | export CC=clang From a4b17483b9e7cb5f73ec1b64cdd41987743ef4da Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 17:01:56 +0700 Subject: [PATCH 070/142] fix ci build with fomu --- examples/rules.mk | 2 -- tools/get_deps.py | 3 --- 2 files changed, 5 deletions(-) diff --git a/examples/rules.mk b/examples/rules.mk index 56ad89fd0..59cf4fd1f 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -192,9 +192,7 @@ endif # get depenecies .PHONY: get-deps get-deps: - ifdef DEPS_SUBMODULES $(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES) - endif .PHONY: size size: $(BUILD)/$(PROJECT).elf diff --git a/tools/get_deps.py b/tools/get_deps.py index 24e5f383a..574e5d089 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -104,9 +104,6 @@ def get_a_dep(d): if __name__ == "__main__": - if len(sys.argv) <= 1: - sys.exit(1) - status = 0 deps = list(deps_mandatory.keys()) + sys.argv[1:] with Pool() as pool: From 0c174c17ad98249f5862440b9f4ff25e10fc0824 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 17:04:11 +0700 Subject: [PATCH 071/142] fix ci with building fuzz --- test/fuzz/rules.mk | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk index 825abddc5..ee91c706d 100644 --- a/test/fuzz/rules.mk +++ b/test/fuzz/rules.mk @@ -142,9 +142,7 @@ endif # get depenecies .PHONY: get-deps get-deps: - ifdef DEPS_SUBMODULES - git -C $(TOP) submodule update --init $(DEPS_SUBMODULES) - endif + $(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES) size: $(BUILD)/$(PROJECT) -@echo '' From f14b4ba30a1800a1ed3ffa4977d182b5c1e1f5a5 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 17:20:01 +0700 Subject: [PATCH 072/142] use codespell as pre-commit --- .pre-commit-config.yaml | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 976f04e63..7d7c1a3ce 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -3,26 +3,25 @@ # SPDX-License-Identifier: Unlicense repos: -- repo: https://github.com/pre-commit/pre-commit-hooks - rev: v4.4.0 - hooks: - - id: check-yaml - - id: trailing-whitespace - - id: end-of-file-fixer - - id: forbid-submodules +- repo: https://github.com/pre-commit/pre-commit-hooks + rev: v4.4.0 + hooks: + - id: check-yaml + - id: trailing-whitespace + - id: end-of-file-fixer + - id: forbid-submodules -- repo: local - hooks: - #- id: codespell - # name: codespell - # entry: codespell - # types_or: [c, header] - # language: system +- repo: https://github.com/codespell-project/codespell + rev: v2.2.4 + hooks: + - id: codespell - - id: unit-test - name: unit-test - files: ^(src/|test/unit-test/) - entry: sh -c "cd test/unit-test && ceedling test:all" - pass_filenames: false - types_or: [c, header] - language: system +- repo: local + hooks: + - id: unit-test + name: unit-test + files: ^(src/|test/unit-test/) + entry: sh -c "cd test/unit-test && ceedling test:all" + pass_filenames: false + types_or: [c, header] + language: system From 25d802532c27f11a6445f71ef44af98a2a780864 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 17:27:34 +0700 Subject: [PATCH 073/142] fix spelling --- .codespell/ignore-words.txt | 2 ++ .codespellrc | 2 +- .pre-commit-config.yaml | 2 ++ .../da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h | 10 +++++----- hw/mcu/dialog/da1469x/src/system_da1469x.c | 2 +- .../nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h | 2 +- hw/mcu/sony/cxd56/tools/flash_writer.py | 6 +++--- hw/mcu/sony/cxd56/tools/xmodem.py | 4 ++-- test/unit-test/vendor/ceedling/bin/ceedling | 2 +- test/unit-test/vendor/ceedling/lib/ceedling.rb | 2 +- .../lib/ceedling/preprocessinator_includes_handler.rb | 2 +- .../vendor/ceedling/lib/ceedling/rules_preprocess.rake | 2 +- .../vendor/ceedling/lib/ceedling/system_utils.rb | 2 +- .../ceedling/plugins/dependencies/dependencies.rake | 2 +- .../ceedling/plugins/fake_function_framework/README.md | 2 +- .../examples/fff_example/project.yml | 2 +- .../examples/fff_example/test/test_event_processor.c | 2 +- .../lib/fake_function_framework.rb | 2 +- .../plugins/gcov/lib/reportgenerator_reportinator.rb | 2 +- .../vendor/ceedling/plugins/module_generator/README.md | 2 +- .../ceedling/vendor/cmock/lib/cmock_header_parser.rb | 4 ++-- .../ceedling/vendor/unity/auto/generate_test_runner.rb | 2 +- .../unit-test/vendor/ceedling/vendor/unity/src/unity.c | 2 +- 23 files changed, 33 insertions(+), 29 deletions(-) diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt index e1ad88a07..fc14fe417 100644 --- a/.codespell/ignore-words.txt +++ b/.codespell/ignore-words.txt @@ -7,3 +7,5 @@ dout mot te attch +endianess +pris diff --git a/.codespellrc b/.codespellrc index 8c32ed706..dc089903c 100644 --- a/.codespellrc +++ b/.codespellrc @@ -7,4 +7,4 @@ exclude-file = .codespell/exclude-file.txt check-filenames = check-hidden = count = -skip = .cproject,./.git,./hw/mcu,./lib,./examples/*/*/_build,./examples/*/*/ses,./examples/*/*/ozone,./hw/mcu,./test/unit-test/vendor,./tests_obsolete,./tools/uf2 +skip = *.rb,.cproject,.git,./lib,./examples/*/*/_build,./examples/*/*/ses,./examples/*/*/ozone,./hw/mcu,./tests_obsolete diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 7d7c1a3ce..d37c27d40 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -15,6 +15,8 @@ repos: rev: v2.2.4 hooks: - id: codespell + args: [-w] + exclude: ^lib/ - repo: local hooks: diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h index fa2ca5d94..faf8b852a 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h @@ -954,11 +954,11 @@ typedef struct { /*!< (@ 0x50030A00) LRA Structur __IOM uint32_t LRA_FLT_COEF3_REG; /*!< (@ 0x00000034) LRA Filter Coefficient Register */ __IOM uint32_t LRA_BRD_LS_REG; /*!< (@ 0x00000038) LRA Bridge Register */ __IOM uint32_t LRA_BRD_HS_REG; /*!< (@ 0x0000003C) LRA Bridge Register */ - __IOM uint32_t LRA_BRD_STAT_REG; /*!< (@ 0x00000040) LRA Bridge Staus Register */ + __IOM uint32_t LRA_BRD_STAT_REG; /*!< (@ 0x00000040) LRA Bridge Status Register */ __IOM uint32_t LRA_ADC_CTRL1_REG; /*!< (@ 0x00000044) General Purpose ADC Control Register */ __IM uint32_t RESERVED[2]; __IOM uint32_t LRA_ADC_RESULT_REG; /*!< (@ 0x00000050) General Purpose ADC Result Register */ - __IOM uint32_t LRA_LDO_REG; /*!< (@ 0x00000054) LRA LDO Regsiter */ + __IOM uint32_t LRA_LDO_REG; /*!< (@ 0x00000054) LRA LDO Register */ __IOM uint32_t LRA_DFT_REG; /*!< (@ 0x00000058) LRA test Register */ } LRA_Type; /*!< Size = 92 (0x5c) */ @@ -1043,7 +1043,7 @@ typedef struct { /*!< (@ 0x50000200) PDC Structur __IOM uint32_t PDC_CTRL15_REG; /*!< (@ 0x0000003C) PDC control register */ __IM uint32_t RESERVED[16]; __IOM uint32_t PDC_ACKNOWLEDGE_REG; /*!< (@ 0x00000080) Clear a pending PDC bit */ - __IOM uint32_t PDC_PENDING_REG; /*!< (@ 0x00000084) Shows any pending wakup event */ + __IOM uint32_t PDC_PENDING_REG; /*!< (@ 0x00000084) Shows any pending wakeup event */ __IOM uint32_t PDC_PENDING_SNC_REG; /*!< (@ 0x00000088) Shows any pending IRQ to SNC */ __IOM uint32_t PDC_PENDING_CM33_REG; /*!< (@ 0x0000008C) Shows any pending IRQ to CM33 */ __IOM uint32_t PDC_PENDING_CMAC_REG; /*!< (@ 0x00000090) Shows any pending IRQ to CM33 */ @@ -1752,8 +1752,8 @@ typedef struct { /*!< (@ 0x50000100) WAKEUP Struc __IOM uint32_t WKUP_SELECT_P1_REG; /*!< (@ 0x00000018) select which inputs from P1 port can trigger wkup counter */ __IM uint32_t RESERVED2[3]; - __IOM uint32_t WKUP_POL_P0_REG; /*!< (@ 0x00000028) select the sesitivity polarity for each P0 input */ - __IOM uint32_t WKUP_POL_P1_REG; /*!< (@ 0x0000002C) select the sesitivity polarity for each P1 input */ + __IOM uint32_t WKUP_POL_P0_REG; /*!< (@ 0x00000028) select the sensitivity polarity for each P0 input */ + __IOM uint32_t WKUP_POL_P1_REG; /*!< (@ 0x0000002C) select the sensitivity polarity for each P1 input */ __IM uint32_t RESERVED3[3]; __IOM uint32_t WKUP_STATUS_P0_REG; /*!< (@ 0x0000003C) Event status register for P0 */ __IOM uint32_t WKUP_STATUS_P1_REG; /*!< (@ 0x00000040) Event status register for P1 */ diff --git a/hw/mcu/dialog/da1469x/src/system_da1469x.c b/hw/mcu/dialog/da1469x/src/system_da1469x.c index 538bac79f..91477b553 100644 --- a/hw/mcu/dialog/da1469x/src/system_da1469x.c +++ b/hw/mcu/dialog/da1469x/src/system_da1469x.c @@ -34,7 +34,7 @@ SystemInit(void) __ISB(); #endif - /* Freez watchdog */ + /* Freeze watchdog */ GPREG->SET_FREEZE_REG |= GPREG_SET_FREEZE_REG_FRZ_SYS_WDOG_Msk; /* Initialize power domains (disable radio only) */ CRG_TOP->PMU_CTRL_REG = CRG_TOP_PMU_CTRL_REG_RADIO_SLEEP_Msk; diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h index edaf6641f..8cbed0fac 100644 --- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h +++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h @@ -286,7 +286,7 @@ typedef struct /**@brief L2CAP event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or @ref BLE_L2CAP_CID_INVALID if not present. */ union diff --git a/hw/mcu/sony/cxd56/tools/flash_writer.py b/hw/mcu/sony/cxd56/tools/flash_writer.py index 840f10c32..bf630547a 100755 --- a/hw/mcu/sony/cxd56/tools/flash_writer.py +++ b/hw/mcu/sony/cxd56/tools/flash_writer.py @@ -46,7 +46,7 @@ import xmodem import_serial_module = True -# When SDK release, plase set SDK_RELEASE as True. +# When SDK release, please set SDK_RELEASE as True. SDK_RELEASE = False if SDK_RELEASE : @@ -508,7 +508,7 @@ def main(): do_wait_reset = True if ConfigArgs.AUTO_RESET: if subprocess.call("cd " + sys.path[0] + "; ./reset_board.sh", shell=True) == 0: - print("auto reset board sucess!!") + print("auto reset board success!!") do_wait_reset = False bootrom_msg = writer.cancel_autoboot() @@ -536,7 +536,7 @@ def main(): # Remove files if ConfigArgs.ERASE_NAME : - print(">>> Remove exisiting files ...") + print(">>> Remove existing files ...") writer.delete_files(ConfigArgs.ERASE_NAME) # Install files diff --git a/hw/mcu/sony/cxd56/tools/xmodem.py b/hw/mcu/sony/cxd56/tools/xmodem.py index c93430056..60fcc952c 100644 --- a/hw/mcu/sony/cxd56/tools/xmodem.py +++ b/hw/mcu/sony/cxd56/tools/xmodem.py @@ -147,7 +147,7 @@ class XMODEM(object): >>> modem = XMODEM(getc, putc) - :param getc: Function to retreive bytes from a stream + :param getc: Function to retrieve bytes from a stream :type getc: callable :param putc: Function to transmit bytes to a stream :type putc: callable @@ -215,7 +215,7 @@ class XMODEM(object): >>> print modem.send(stream) True - Returns ``True`` upon succesful transmission or ``False`` in case of + Returns ``True`` upon successful transmission or ``False`` in case of failure. :param stream: The stream object to send data from. diff --git a/test/unit-test/vendor/ceedling/bin/ceedling b/test/unit-test/vendor/ceedling/bin/ceedling index d110f3d4c..b317db2f1 100644 --- a/test/unit-test/vendor/ceedling/bin/ceedling +++ b/test/unit-test/vendor/ceedling/bin/ceedling @@ -86,7 +86,7 @@ unless (project_found) end end - # Genarate gitkeep in test support path + # Generate gitkeep in test support path FileUtils.touch(File.join(test_support_path, '.gitkeep')) # If documentation requested, create a place to dump them and do so diff --git a/test/unit-test/vendor/ceedling/lib/ceedling.rb b/test/unit-test/vendor/ceedling/lib/ceedling.rb index 6c57fb48d..063cfddd5 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling.rb @@ -77,7 +77,7 @@ module Ceedling # * The gem name must be prefixed with 'ceedling-' followed by the plugin # name (ex. 'ceedling-bullseye') # - # * The contents of the plugin must be isntalled into a subdirectory of + # * The contents of the plugin must be installed into a subdirectory of # the gem with the same name as the plugin (ex. 'bullseye/') # # === Arguments diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb index 916d31332..9e5ae1fbf 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb @@ -181,7 +181,7 @@ class PreprocessinatorIncludesHandler end # If we found a real file, delete it from the array and return it, # otherwise return nil. Since nil is falsy this has the effect of making - # find_all return only the annotated filess for which a real file was + # find_all return only the annotated files for which a real file was # found/deleted idx ? real_files.delete_at(idx) : nil end.compact diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake index 936961ce8..d599421c0 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake @@ -9,7 +9,7 @@ rule(/#{PROJECT_TEST_PREPROCESS_FILES_PATH}\/.+/ => [ end ]) do |file| if (not @ceedling[:configurator].project_use_deep_dependencies) - raise 'ERROR: Ceedling preprocessing rule invoked though neccessary auxiliary dependency support not enabled.' + raise 'ERROR: Ceedling preprocessing rule invoked though necessary auxiliary dependency support not enabled.' end @ceedling[:generator].generate_preprocessed_file(TEST_SYM, file.source) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb index 81bb7bc54..7d232a7fb 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb @@ -7,7 +7,7 @@ end ## -# Class containing system utility funcions. +# Class containing system utility functions. class SystemUtils constructor :system_wrapper diff --git a/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake b/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake index 08a1a48eb..4b9409bed 100644 --- a/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake +++ b/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake @@ -113,7 +113,7 @@ end # Add any artifact:include or :source folders to our release & test includes paths so linking and mocking work. @ceedling[DEPENDENCIES_SYM].add_headers_and_sources() -# Add tasks for building or cleaning ALL depencies +# Add tasks for building or cleaning ALL dependencies namespace DEPENDENCIES_SYM do desc "Deploy missing dependencies." task :deploy => DEPENDENCIES_LIBRARIES.map{|deplib| "#{DEPENDENCIES_SYM}:deploy:#{@ceedling[DEPENDENCIES_SYM].get_name(deplib)}"} diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md index 8042775e5..c99a95196 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md @@ -34,7 +34,7 @@ In the `:plugins` configuration, add `fake_function_framework` to the list of en - module_generator - fake_function_framework ``` -*Note that you could put the plugin source in some other loaction. +*Note that you could put the plugin source in some other location. In that case you'd need to add a new path the `:load_paths`.* ## How to use it diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml index 00e395d0c..3253acf69 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml @@ -33,7 +33,7 @@ # in order to add common defines: # 1) remove the trailing [] from the :common: section # 2) add entries to the :common: section (e.g. :test: has TEST defined) - :commmon: &common_defines [] + :common: &common_defines [] :test: - *common_defines - TEST diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c index 9f999443d..ea59cd3e6 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c @@ -41,7 +41,7 @@ test_whenThePowerReadingIsLessThan5_thenTheStatusLedIsNotTurnedOn(void) } /* - Test that a single function was called with the correct arugment. + Test that a single function was called with the correct argument. */ void test_whenTheVolumeKnobIsMaxed_thenVolumeDisplayIsSetTo11(void) diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb index 51a90b3a5..8fbb1e9b5 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb @@ -23,7 +23,7 @@ class FakeFunctionFramework < Plugin # all mocks linked into the test. File.open(arg_hash[:runner_file], 'a') do |f| f.puts - f.puts "//=======Defintions of FFF variables=====" + f.puts "//=======Definitions of FFF variables=====" f.puts %{#include "fff.h"} f.puts "DEFINE_FFF_GLOBALS;" end diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb index d4a885c97..96cf89163 100644 --- a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb +++ b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb @@ -138,7 +138,7 @@ class ReportGeneratorReportinator # Removing trailing ';' after the last report type. args = args.chomp(";") - # Append a space seperator after the report type. + # Append a space separator after the report type. args += "\" " end diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md index 61cf45bd6..c7e982352 100644 --- a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md +++ b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md @@ -82,7 +82,7 @@ by adding to the `:includes` array. For example: ### Boilerplates You can specify the actual boilerplate used for each of your files. This is the handy place to -put that corporate copyright notice (or maybe a copyleft notice, if that's your perference?) +put that corporate copyright notice (or maybe a copyleft notice, if that's your preference?) ``` :module_generator: diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb b/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb index 9730bf40b..b008dc149 100644 --- a/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb +++ b/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb @@ -119,7 +119,7 @@ class CMockHeaderParser square_bracket_pair_regex_format = /\{[^\{\}]*\}/ # Regex to match one whole block enclosed by two square brackets # Convert user provided string patterns to regex - # Use word bounderies before and after the user regex to limit matching to actual word iso part of a word + # Use word boundaries before and after the user regex to limit matching to actual word iso part of a word @inline_function_patterns.each do |user_format_string| user_regex = Regexp.new(user_format_string) word_boundary_before_user_regex = /\b/ @@ -258,7 +258,7 @@ class CMockHeaderParser source.gsub!(/\s*=\s*['"a-zA-Z0-9_\.]+\s*/, '') # remove default value statements from argument lists source.gsub!(/^(?:[\w\s]*\W)?typedef\W[^;]*/m, '') # remove typedef statements - source.gsub!(/\)(\w)/, ') \1') # add space between parenthese and alphanumeric + source.gsub!(/\)(\w)/, ') \1') # add space between parentheses and alphanumeric source.gsub!(/(^|\W+)(?:#{@c_strippables.join('|')})(?=$|\W+)/, '\1') unless @c_strippables.empty? # remove known attributes slated to be stripped # scan standalone function pointers and remove them, because they can just be ignored diff --git a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb index d1d8f91af..6821bdc60 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb +++ b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb @@ -114,7 +114,7 @@ class UnityTestRunnerGenerator # @ is not a valid C character, so there should be no clashes with files genuinely containing these markers substring_subs = { '{' => '@co@', '}' => '@cc@', ';' => '@ss@', '/' => '@fs@' } substring_re = Regexp.union(substring_subs.keys) - substring_unsubs = substring_subs.invert # the inverse map will be used to fix the strings afterwords + substring_unsubs = substring_subs.invert # the inverse map will be used to fix the strings afterwards substring_unsubs['@quote@'] = '\\"' substring_unsubs['@apos@'] = '\\\'' substring_unre = Regexp.union(substring_unsubs.keys) diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c b/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c index 764a42b18..ae5afa856 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c +++ b/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c @@ -13,7 +13,7 @@ #define PROGMEM #endif -/* If omitted from header, declare overrideable prototypes here so they're ready for use */ +/* If omitted from header, declare overridable prototypes here so they're ready for use */ #ifdef UNITY_OMIT_OUTPUT_CHAR_HEADER_DECLARATION void UNITY_OUTPUT_CHAR(int); #endif From 57d23c7a68b37555cfe1c8a8dc4c0983fb07f0e9 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 18:34:56 +0700 Subject: [PATCH 074/142] update example description --- examples/host/msc_file_explorer/src/main.c | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c index 40c88a7d3..7b1c2ef27 100644 --- a/examples/host/msc_file_explorer/src/main.c +++ b/examples/host/msc_file_explorer/src/main.c @@ -23,6 +23,38 @@ * */ +/* Example to show how to navigate mass storage device with built-in command line. + * Type help for list of supported commands and syntax (mostly linux commands) + + > help + * help + Print list of commands + * cat + Usage: cat [FILE]... + Concatenate FILE(s) to standard output.. + * cd + Usage: cd [DIR]... + Change the current directory to DIR. + * cp + Usage: cp SOURCE DEST + Copy SOURCE to DEST. + * ls + Usage: ls [DIR]... + List information about the FILEs (the current directory by default). + * pwd + Usage: pwd + Print the name of the current working directory. + * mkdir + Usage: mkdir DIR... + Create the DIRECTORY(ies), if they do not already exist.. + * mv + Usage: mv SOURCE DEST... + Rename SOURCE to DEST. + * rm + Usage: rm [FILE]... + Remove (unlink) the FILE(s). + */ + #include #include #include From 6683053f4827b682f51c56ed664e440c0286de80 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 18:44:30 +0700 Subject: [PATCH 075/142] finalize --- .github/workflows/pre-commit.yml | 3 --- .pre-commit-config.yaml | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index 86c106151..ab416bc52 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -35,9 +35,6 @@ jobs: - name: Run pre-commit uses: pre-commit/action@v3.0.0 - - name: Run codespell - uses: codespell-project/actions-codespell@master - - name: Build Fuzzer run: | export CC=clang diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index d37c27d40..7fa6f52ee 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -15,7 +15,7 @@ repos: rev: v2.2.4 hooks: - id: codespell - args: [-w] + #args: [-w] exclude: ^lib/ - repo: local From bc57358eb0b9a72325a10b0324ae4a8a024cc692 Mon Sep 17 00:00:00 2001 From: Ha Thach Date: Fri, 17 Mar 2023 19:29:25 +0700 Subject: [PATCH 076/142] Update README.rst --- README.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.rst b/README.rst index 566af8584..adca22433 100644 --- a/README.rst +++ b/README.rst @@ -50,8 +50,8 @@ The stack supports the following MCUs: - **Raspberry Pi:** RP2040 - **Renesas:** - - RX Series: 63N, 65N, 72N - - RA Series: RA4M1, RA4M3 + - RX Series: 63N, 65N, 72N + - RA Series: RA4M1, RA4M3 - **Silabs:** EFM32GG - **Sony:** CXD56 From 899e7cc4f908b721c619818b6c0c5f9d71974edb Mon Sep 17 00:00:00 2001 From: Koen De Vleeschauwer Date: Thu, 2 Feb 2023 10:16:57 +0100 Subject: [PATCH 077/142] add board: DshanMCU Pitaya Lite --- .../boards/mm32f327x_bluepillplus/board.mk | 8 + .../boards/mm32f327x_bluepillplus/flash.ld | 163 ++++++++++++++++ .../mm32f327x_bluepillplus.c | 182 ++++++++++++++++++ .../boards/mm32f327x_pitaya_lite/board.mk | 8 + .../boards/mm32f327x_pitaya_lite/flash.ld | 163 ++++++++++++++++ .../mm32f327x_pitaya_lite.c | 182 ++++++++++++++++++ 6 files changed, 706 insertions(+) create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk new file mode 100644 index 000000000..b7663926f --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk @@ -0,0 +1,8 @@ +LD_FILE = $(BOARD_PATH)/flash.ld +SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S + +# For flash-jlink target +#JLINK_DEVICE = stm32f411ve + +# flash target using on-board stlink +#flash: flash-jlink diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld new file mode 100644 index 000000000..0b45ee7bd --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld @@ -0,0 +1,163 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2001FFFF; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c new file mode 100644 index 000000000..08abc83c6 --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c @@ -0,0 +1,182 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* WeAct BluePillPlus with MM32F3273G6P */ + +#include "mm32_device.h" +#include "hal_conf.h" +#include "tusb.h" +#include "../board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void OTG_FS_IRQHandler (void) +{ + tud_int_handler(0); + +} +void USB_DeviceClockInit (void) +{ + /* Select USBCLK source */ + // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); + RCC->CFGR &= ~(0x3 << 22); + RCC->CFGR |= (0x1 << 22); + + /* Enable USB clock */ + RCC->AHB2ENR |= 0x1 << 7; +} +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED + +extern u32 SystemCoreClock; +const int baudrate = 115200; + +void board_init (void) +{ +// usb clock + USB_DeviceClockInit(); + + if ( SysTick_Config(SystemCoreClock / 1000) ) + { + while ( 1 ) + ; + } + NVIC_SetPriority(SysTick_IRQn, 0x0); + + // LED on PB2 + GPIO_InitTypeDef GPIO_InitStruct; + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOB, ENABLE); + GPIO_StructInit(&GPIO_InitStruct); + + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOB, &GPIO_InitStruct); + + board_led_write(true); + + // KEY on PA0 + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + // UART + UART_InitTypeDef UART_InitStruct; + + RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); // + //UART initialset + + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7); + + UART_StructInit(&UART_InitStruct); + UART_InitStruct.UART_BaudRate = baudrate; + UART_InitStruct.UART_WordLength = UART_WordLength_8b; + UART_InitStruct.UART_StopBits = UART_StopBits_1; //one stopbit + UART_InitStruct.UART_Parity = UART_Parity_No; //none odd-even verify bit + UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None; //No hardware flow control + UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode + + UART_Init(UART1, &UART_InitStruct); //initial uart 1 + UART_Cmd(UART1, ENABLE); //enable uart 1 + + //UART1_TX GPIOA.9 + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + //UART1_RX GPIOA.10 + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(GPIOA, &GPIO_InitStruct); + +} + + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write (bool state) +{ + state ? (GPIO_ResetBits(GPIOB, GPIO_Pin_2)) : (GPIO_SetBits(GPIOB, GPIO_Pin_2)); +} + +uint32_t board_button_read (void) +{ + uint32_t key = GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_0) == Bit_SET; + return key; +} + +int board_uart_read (uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write (void const *buf, int len) +{ + const char *buff = buf; + while ( len ) + { + while ( (UART1->CSR & UART_IT_TXIEN) == 0 ) + ; //The loop is sent until it is finished + UART1->TDR = (*buff & 0xFF); + buff++; + len--; + } + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis (void) +{ + return system_ticks; +} +#endif + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk new file mode 100644 index 000000000..fbf0322c1 --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk @@ -0,0 +1,8 @@ +LD_FILE = $(BOARD_PATH)/flash.ld +SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S + +# For flash-jlink target +#JLINK_DEVICE = MM32F3273G8P + +# flash target using on-board stlink +#flash: flash-jlink diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld new file mode 100644 index 000000000..0b45ee7bd --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld @@ -0,0 +1,163 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2001FFFF; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c new file mode 100644 index 000000000..819b440e5 --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c @@ -0,0 +1,182 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* DshanMCU Pitaya Lite with MM32F3273 */ + +#include "mm32_device.h" +#include "hal_conf.h" +#include "tusb.h" +#include "../board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void OTG_FS_IRQHandler (void) +{ + tud_int_handler(0); + +} +void USB_DeviceClockInit (void) +{ + /* Select USBCLK source */ + // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); + RCC->CFGR &= ~(0x3 << 22); + RCC->CFGR |= (0x1 << 22); + + /* Enable USB clock */ + RCC->AHB2ENR |= 0x1 << 7; +} +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED + +extern u32 SystemCoreClock; +const int baudrate = 115200; + +void board_init (void) +{ +// usb clock +// requires SYSCLK_FREQ_XXMHz (HSE_VALUE*8) in system_mm32f327x.c + USB_DeviceClockInit(); + + if ( SysTick_Config(SystemCoreClock / 1000) ) + { + while ( 1 ) + ; + } + NVIC_SetPriority(SysTick_IRQn, 0x0); + + // LED on PA1 + GPIO_InitTypeDef GPIO_InitStruct; + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); + GPIO_StructInit(&GPIO_InitStruct); + + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_1; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + board_led_write(true); + + // KEY on PA0 + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + // UART + UART_InitTypeDef UART_InitStruct; + + RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); // + //UART initialset + + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7); + + UART_StructInit(&UART_InitStruct); + UART_InitStruct.UART_BaudRate = baudrate; + UART_InitStruct.UART_WordLength = UART_WordLength_8b; + UART_InitStruct.UART_StopBits = UART_StopBits_1; //one stopbit + UART_InitStruct.UART_Parity = UART_Parity_No; //none odd-even verify bit + UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None; //No hardware flow control + UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode + + UART_Init(UART1, &UART_InitStruct); //initial uart 1 + UART_Cmd(UART1, ENABLE); //enable uart 1 + + //UART1_TX GPIOA.9 + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + //UART1_RX GPIOA.10 + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(GPIOA, &GPIO_InitStruct); + +} + + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write (bool state) +{ + state ? (GPIO_ResetBits(GPIOA, GPIO_Pin_1)) : (GPIO_SetBits(GPIOA, GPIO_Pin_1)); +} + +uint32_t board_button_read (void) +{ + uint32_t key = GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_0) == Bit_RESET; + return key; +} + +int board_uart_read (uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write (void const *buf, int len) +{ + const char *buff = buf; + while ( len ) + { + while ( (UART1->CSR & UART_IT_TXIEN) == 0 ) + ; //The loop is sent until it is finished + UART1->TDR = (*buff & 0xFF); + buff++; + len--; + } + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis (void) +{ + return system_ticks; +} +#endif + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} From b3ecf82196f09ca26161d63dc15c4c3aec6ae57d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 19:31:45 +0700 Subject: [PATCH 078/142] whitespace --- hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld | 8 ++++---- .../mm32f327x_bluepillplus/mm32f327x_bluepillplus.c | 4 ++-- hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld | 8 ++++---- .../boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c | 2 +- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld index 0b45ee7bd..796ed04f6 100644 --- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -110,7 +110,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -121,7 +121,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -149,7 +149,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c index 08abc83c6..0a07dc749 100644 --- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -59,7 +59,7 @@ const int baudrate = 115200; void board_init (void) { -// usb clock +// usb clock USB_DeviceClockInit(); if ( SysTick_Config(SystemCoreClock / 1000) ) diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld index 0b45ee7bd..796ed04f6 100644 --- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -110,7 +110,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -121,7 +121,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -149,7 +149,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c index 819b440e5..381e93e11 100644 --- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM From 1ed04ad05d1c44ea2821173cadd7c3ea871f4610 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 19:46:22 +0700 Subject: [PATCH 079/142] update mm32sdk with idndef for SYSCLK_FREQ_XXMHz and SYSCLK_HSI_XXMHz add HSE_VALUE define for each board with 8mhz, 12mhz accordingly --- hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk | 3 +++ hw/bsp/mm32/boards/mm32f327x_mb39/board.mk | 4 ++++ hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk | 3 +++ tools/get_deps.py | 2 +- 4 files changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk index b7663926f..bda3daf91 100644 --- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk +++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk @@ -1,3 +1,6 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 + LD_FILE = $(BOARD_PATH)/flash.ld SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk index b7663926f..a0d92d1c7 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk @@ -1,6 +1,10 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 + LD_FILE = $(BOARD_PATH)/flash.ld SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S + # For flash-jlink target #JLINK_DEVICE = stm32f411ve diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk index fbf0322c1..a778e749f 100644 --- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk +++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk @@ -1,3 +1,6 @@ +CFLAGS += \ + -DHSE_VALUE=12000000 + LD_FILE = $(BOARD_PATH)/flash.ld SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S diff --git a/tools/get_deps.py b/tools/get_deps.py index 574e5d089..92bad1408 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -20,7 +20,7 @@ deps_optional = { 'hw/mcu/gd/nuclei-sdk' : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git' ], 'hw/mcu/infineon/mtb-xmclib-cat3' : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git' ], 'hw/mcu/microchip' : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git' ], - 'hw/mcu/mindmotion/mm32sdk' : ['708a7152952ac595d24837069dcc0f7f59a4c30b', 'https://github.com/hathach/mm32sdk.git' ], + 'hw/mcu/mindmotion/mm32sdk' : ['f6e458fea77074990ce011e3716c08cfeddbd6d5', 'https://github.com/hathach/mm32sdk.git' ], 'hw/mcu/nordic/nrfx' : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git' ], 'hw/mcu/nuvoton' : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git' ], 'hw/mcu/nxp/lpcopen' : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git' ], From b2568eb02b5a9ff3af266a2bb1326969830e038a Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 20:22:08 +0700 Subject: [PATCH 080/142] bump up mm32sdk to fix HSE_VALUE not 8Mhz warnings --- tools/get_deps.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/get_deps.py b/tools/get_deps.py index 92bad1408..8bf56cd8d 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -20,7 +20,7 @@ deps_optional = { 'hw/mcu/gd/nuclei-sdk' : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git' ], 'hw/mcu/infineon/mtb-xmclib-cat3' : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git' ], 'hw/mcu/microchip' : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git' ], - 'hw/mcu/mindmotion/mm32sdk' : ['f6e458fea77074990ce011e3716c08cfeddbd6d5', 'https://github.com/hathach/mm32sdk.git' ], + 'hw/mcu/mindmotion/mm32sdk' : ['0b79559eb411149d36e073c1635c620e576308d4', 'https://github.com/hathach/mm32sdk.git' ], 'hw/mcu/nordic/nrfx' : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git' ], 'hw/mcu/nuvoton' : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git' ], 'hw/mcu/nxp/lpcopen' : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git' ], From d919f107c71021b2dfa20cd9bfe252c4f544422f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 11:22:44 +0700 Subject: [PATCH 081/142] minor clean up --- examples/device/uac2_headset/src/usb_descriptors.h | 8 ++++---- examples/device/usbtmc/src/usbtmc_app.c | 1 - src/class/video/video.h | 2 +- src/common/tusb_compiler.h | 2 +- src/device/usbd.h | 8 ++++---- 5 files changed, 10 insertions(+), 11 deletions(-) diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 2069cc975..457e69882 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -114,7 +114,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Interface 1, Alternate 2 - alternate interface for data streaming */\ @@ -124,7 +124,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Standard AS Interface Descriptor(4.9.1) */\ @@ -138,7 +138,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Interface 2, Alternate 2 - alternate interface for data streaming */\ @@ -148,7 +148,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c index f1596f6d0..72989b4fe 100644 --- a/examples/device/usbtmc/src/usbtmc_app.c +++ b/examples/device/usbtmc/src/usbtmc_app.c @@ -242,7 +242,6 @@ void usbtmc_app_task_iter(void) { break; default: TU_ASSERT(false,); - return; } } diff --git a/src/class/video/video.h b/src/class/video/video.h index 40dae4c1a..c0088c4f6 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -549,7 +549,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c /* 3.10.1.1 */ #define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \ - 7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\ + 7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS),\ U16_TO_U8S_LE(_epsize), _ep_interval /* 3.10.1.2 */ diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index cea876413..713bbb8d4 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -196,7 +196,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used - #define TU_ATTR_FALLTHROUGH + #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END diff --git a/src/device/usbd.h b/src/device/usbd.h index 7bb9f916b..255e5a844 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -420,7 +420,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */ #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \ - TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval // AUDIO simple descriptor (UAC2) for 1 microphone input // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source @@ -467,7 +467,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -516,7 +516,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -564,7 +564,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\ From 9f54cc1eb725e7d77a5b275b209d8257b180d7ed Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 11:43:47 +0700 Subject: [PATCH 082/142] more clean up --- src/class/usbtmc/usbtmc_device.c | 7 +++++++ src/portable/raspberrypi/rp2040/rp2040_usb.h | 4 ++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index 8dbda14c5..4e320a778 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -154,7 +154,10 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small"); static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len); static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen); +#ifndef NDEBUG tu_static uint8_t termChar; +#endif + tu_static uint8_t termCharRequested = false; #if OSAL_MUTEX_REQUIRED @@ -442,7 +445,10 @@ static bool handle_devMsgIn(void *data, size_t len) usbtmc_state.transfer_size_sent = 0u; termCharRequested = msg->bmTransferAttributes.TermCharEnabled; + +#ifndef NDEBUG termChar = msg->TermChar; +#endif if(termCharRequested) TU_VERIFY(usbtmc_state.capabilities->bmDevCapabilities.canEndBulkInOnTermChar); @@ -511,6 +517,7 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint return true; case STATE_ABORTING_BULK_OUT: + // Should be stalled by now, shouldn't have received a packet. return false; case STATE_TX_REQUESTED: diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index 79af0204b..5d3d792cb 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -36,8 +36,8 @@ #define __tusb_irq_path_func(x) x #endif -#define usb_hw_set hw_set_alias(usb_hw) -#define usb_hw_clear hw_clear_alias(usb_hw) +#define usb_hw_set ((usb_hw_t *) hw_set_alias(usb_hw)) +#define usb_hw_clear ((usb_hw_t *) hw_clear_alias(usb_hw)) #define pico_info(...) TU_LOG(2, __VA_ARGS__) #define pico_trace(...) TU_LOG(3, __VA_ARGS__) From f9b8a0667a2cc42a6c6521c51bba695ca8e9e28f Mon Sep 17 00:00:00 2001 From: Bob Paddock Date: Mon, 16 Jan 2023 15:05:31 -0500 Subject: [PATCH 083/142] Add support for NXP FRDM_K32L2A4S eval board. --- hw/bsp/board_mcu.h | 2 +- hw/bsp/frdm_k32l2a4s/README.rst | 51 ++++++++ hw/bsp/frdm_k32l2a4s/board.h | 58 +++++++++ hw/bsp/frdm_k32l2a4s/board.mk | 80 +++++++++++++ hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 +++++++++++++++++++++++++++ src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/dcd_khci.c | 9 +- src/portable/nxp/khci/hcd_khci.c | 9 +- src/tusb_option.h | 1 + 9 files changed, 375 insertions(+), 8 deletions(-) create mode 100644 hw/bsp/frdm_k32l2a4s/README.rst create mode 100644 hw/bsp/frdm_k32l2a4s/board.h create mode 100644 hw/bsp/frdm_k32l2a4s/board.mk create mode 100644 hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index b34197e6c..920e7d0d9 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \ - CFG_TUSB_MCU == OPT_MCU_K32L2BXX + CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst new file mode 100644 index 000000000..68ab409c3 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/README.rst @@ -0,0 +1,51 @@ +Jan/13/2023 13:04 + +The FRDM-K32L2B3 Freedom development board provides a platform for +evaluation and development of the K32 L2B MCU Family. - +https://www.nxp.com/part/FRDM-K32L2B3#/ + +TinyUSB does not include the board specific drivers. Those drivers +need to be extracted from the MCUXpresso IDE and SDK. + +Install MCUXPresso version 11.6 or later and SDK 2.12 or later. Then +build the example project "frdmk32l2b_hellow_worldvirual_com". + +From the frdmk32l2b_hellow_worldvirual_com project copy these files to +this directory structure, in this directory: + +hw/mcu/nxp/mcux-sdk/devices/K32L2B31A + +CMSIS/ +config/ +drivers/ +gcc/ +fsl_device_registers.h +K32L2B31A_features.h +K32L2B31A.h + +./CMSIS: +cmsis_armcc.h cmsis_armclang_ltm.h cmsis_gcc.h cmsis_version.h mpu_armv7.h +cmsis_armclang.h cmsis_compiler.h cmsis_iccarm.h core_cm0plus.h + +./config: +clock_config.c clock_config.h system_K32L2B31A.c system_K32L2B31A.h + +./drivers: +fsl_clock.c fsl_common_arm.h fsl_gpio.c fsl_lpuart.h fsl_smc.h +fsl_clock.h fsl_common.c fsl_gpio.h fsl_port.h fsl_uart.c +fsl_common_arm.c fsl_common.h fsl_lpuart.c fsl_smc.c fsl_uart.h + +./gcc: +frdmk32l2b.ld startup_k32l2b31a.c +frdmk32l2b_library.ld frdmk32l2b_memory.ld + +The linker files have been renamed and the #include directive edited +to match. + +Then to build a test project change to the directory +examples/devices/cdc_msc and do: + +make BOARD=frdm_k32l2b + +The resulting .hex file will be found in the _build directory, copy +that will to the FRDM board to run the demo. diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/frdm_k32l2a4s/board.h new file mode 100644 index 000000000..14eefda17 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/board.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +// The Red LED is on PTE29. +// The Green LED is on PTC4. +// The Blue LED is on PTE31. +#define LED_PIN_CLOCK kCLOCK_PortC +#define LED_GPIO GPIOC +#define LED_PORT PORTC +#define LED_PIN 4 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortE +#define BUTTON_GPIO GPIOE +#define BUTTON_PORT PORTE +#define BUTTON_PIN 4 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortB +#define UART_PIN_GPIO GPIOB +#define UART_PIN_PORT PORTB +#define UART_PIN_RX 16u +#define UART_PIN_TX 17u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..e9e606fe6 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/board.mk @@ -0,0 +1,80 @@ + +# Default to a less-verbose build. If you want all the gory compiler output, +# "VERBOSE=1" to the make command line. +ifndef VERBOSE +.SILENT: +$(info Non-Verbose Output) +else +$(info Verbose Output) +endif + +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU_DIR = $(SDK_DIR)/devices/K32L2A4S + +ifdef VERBOSE +$(info TOP='$(TOP)') +$(info ) + +$(info BSP='$(TOP)/hw/bsp/$(BOARD)') +$(info ) + +$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)') +$(info ) + +$(info MCU_DIR='$(MCU_DIR)') +$(info ) +endif + +DEPS_SUBMODULES += $(SDK_DIR) + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2A41VLH1A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. + +LD_FILE = $(MCU_DIR)/gcc/frdmk32l2a4s.ld +LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc + +# Define Recursive Depth wildcard: +rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)) + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + $(MCU_DIR)/gcc/startup_k32l2a41a.c + +SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c) +SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c) + +INC += \ + $(TOP)/hw/bsp/$(BOARD) \ + $(TOP)/$(MCU_DIR)/CMSIS/ \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/config \ + $(TOP)/$(MCU_DIR)/drivers + +ifdef VERBOSE +$(info INC = '$(strip $(INC))') +$(info ) + +$(info SRC_C = '$(sort $(strip $(SRC_C)))') +$(info ) +endif + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +#JLINK_DEVICE = ? + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c new file mode 100644 index 000000000..47dd0c8ec --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -0,0 +1,171 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* + Enable LPUART0 clock and configure port pins. + FIR clock is being used so the USB examples work. + */ + PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ + PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ + PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ + + /* PORTB16 (pin 62) is configured as LPUART0_RX */ + gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); + const port_pin_config_t UART_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); + + /* PORTB17 (pin 63) is configured as LPUART0_TX */ + gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ +#if 0 /* + Use this version if want the LED to blink during BOARD=board_test, + without having to hit a key. + */ + if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) + { + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + } + + return( 0 ); +#else /* Wait for 'len' characters to come in */ + + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + +#endif +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 1d27f47af..18e40e1b1 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -85,7 +85,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index b6daec3de..2678cdca1 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -26,9 +26,12 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUD_ENABLED && \ + ( \ + ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ + ) #include "fsl_device_registers.h" #define KHCI USB0 diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 35763f121..8ff1feff7 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,9 +26,12 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUD_ENABLED && \ + ( \ + ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ + ) #include "fsl_device_registers.h" #define KHCI USB0 diff --git a/src/tusb_option.h b/src/tusb_option.h index c019b0ba4..5a234e357 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -119,6 +119,7 @@ // NXP Kinetis #define OPT_MCU_MKL25ZXX 1200 ///< NXP MKL25Zxx #define OPT_MCU_K32L2BXX 1201 ///< NXP K32L2Bxx +#define OPT_MCU_K32L2AXX 1202 ///< NXP K32L2Axx // Silabs #define OPT_MCU_EFM32GG 1300 ///< Silabs EFM32GG From b13b95a6705348947aa2117423788b5dc2289047 Mon Sep 17 00:00:00 2001 From: Bob Paddock Date: Mon, 16 Jan 2023 15:17:11 -0500 Subject: [PATCH 084/142] Document that support for the FRDM-K32L2A4S has been added. --- docs/reference/supported.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index b3f3f41d3..b1e0c0a68 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -253,6 +253,7 @@ Kinetis ^^^^^^^ - `Freedom FRDM-KL25Z `__ +- `Freedom FRDM-K32L2A `__ - `Freedom FRDM-K32L2B3 `__ - `KUIIC `__ From 2d187777c0eb625ad7c63c21dd881ca7362363fc Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 18:30:51 +0700 Subject: [PATCH 085/142] merge kinetis into its own family in bsp --- hw/bsp/frdm_k32l2a4s/README.rst | 51 ------------ hw/bsp/frdm_k32l2a4s/board.mk | 80 ------------------- hw/bsp/frdm_k32l2b/board.mk | 51 ------------ .../boards}/frdm_k32l2a4s/board.h | 2 +- hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk | 26 ++++++ .../boards}/frdm_k32l2a4s/frdm_k32l2a4s.c | 2 +- .../{ => kinetis/boards}/frdm_k32l2b/board.h | 0 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk | 26 ++++++ .../boards}/frdm_k32l2b/frdm_k32l2b.c | 2 +- .../{ => kinetis/boards}/frdm_kl25z/board.mk | 27 +------ .../boards}/frdm_kl25z/frdm_kl25z.c | 0 hw/bsp/kinetis/family.mk | 46 +++++++++++ src/common/tusb_mcu.h | 2 + src/portable/nxp/khci/dcd_khci.c | 15 ++-- src/portable/nxp/khci/hcd_khci.c | 2 +- 15 files changed, 114 insertions(+), 218 deletions(-) delete mode 100644 hw/bsp/frdm_k32l2a4s/README.rst delete mode 100644 hw/bsp/frdm_k32l2a4s/board.mk delete mode 100644 hw/bsp/frdm_k32l2b/board.mk rename hw/bsp/{ => kinetis/boards}/frdm_k32l2a4s/board.h (99%) create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk rename hw/bsp/{ => kinetis/boards}/frdm_k32l2a4s/frdm_k32l2a4s.c (99%) rename hw/bsp/{ => kinetis/boards}/frdm_k32l2b/board.h (100%) create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk rename hw/bsp/{ => kinetis/boards}/frdm_k32l2b/frdm_k32l2b.c (99%) rename hw/bsp/{ => kinetis/boards}/frdm_kl25z/board.mk (54%) rename hw/bsp/{ => kinetis/boards}/frdm_kl25z/frdm_kl25z.c (100%) create mode 100644 hw/bsp/kinetis/family.mk diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst deleted file mode 100644 index 68ab409c3..000000000 --- a/hw/bsp/frdm_k32l2a4s/README.rst +++ /dev/null @@ -1,51 +0,0 @@ -Jan/13/2023 13:04 - -The FRDM-K32L2B3 Freedom development board provides a platform for -evaluation and development of the K32 L2B MCU Family. - -https://www.nxp.com/part/FRDM-K32L2B3#/ - -TinyUSB does not include the board specific drivers. Those drivers -need to be extracted from the MCUXpresso IDE and SDK. - -Install MCUXPresso version 11.6 or later and SDK 2.12 or later. Then -build the example project "frdmk32l2b_hellow_worldvirual_com". - -From the frdmk32l2b_hellow_worldvirual_com project copy these files to -this directory structure, in this directory: - -hw/mcu/nxp/mcux-sdk/devices/K32L2B31A - -CMSIS/ -config/ -drivers/ -gcc/ -fsl_device_registers.h -K32L2B31A_features.h -K32L2B31A.h - -./CMSIS: -cmsis_armcc.h cmsis_armclang_ltm.h cmsis_gcc.h cmsis_version.h mpu_armv7.h -cmsis_armclang.h cmsis_compiler.h cmsis_iccarm.h core_cm0plus.h - -./config: -clock_config.c clock_config.h system_K32L2B31A.c system_K32L2B31A.h - -./drivers: -fsl_clock.c fsl_common_arm.h fsl_gpio.c fsl_lpuart.h fsl_smc.h -fsl_clock.h fsl_common.c fsl_gpio.h fsl_port.h fsl_uart.c -fsl_common_arm.c fsl_common.h fsl_lpuart.c fsl_smc.c fsl_uart.h - -./gcc: -frdmk32l2b.ld startup_k32l2b31a.c -frdmk32l2b_library.ld frdmk32l2b_memory.ld - -The linker files have been renamed and the #include directive edited -to match. - -Then to build a test project change to the directory -examples/devices/cdc_msc and do: - -make BOARD=frdm_k32l2b - -The resulting .hex file will be found in the _build directory, copy -that will to the FRDM board to run the demo. diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk deleted file mode 100644 index e9e606fe6..000000000 --- a/hw/bsp/frdm_k32l2a4s/board.mk +++ /dev/null @@ -1,80 +0,0 @@ - -# Default to a less-verbose build. If you want all the gory compiler output, -# "VERBOSE=1" to the make command line. -ifndef VERBOSE -.SILENT: -$(info Non-Verbose Output) -else -$(info Verbose Output) -endif - -SDK_DIR = hw/mcu/nxp/mcux-sdk -MCU_DIR = $(SDK_DIR)/devices/K32L2A4S - -ifdef VERBOSE -$(info TOP='$(TOP)') -$(info ) - -$(info BSP='$(TOP)/hw/bsp/$(BOARD)') -$(info ) - -$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)') -$(info ) - -$(info MCU_DIR='$(MCU_DIR)') -$(info ) -endif - -DEPS_SUBMODULES += $(SDK_DIR) - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2A41VLH1A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual - -# All source paths should be relative to the top level. - -LD_FILE = $(MCU_DIR)/gcc/frdmk32l2a4s.ld -LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc - -# Define Recursive Depth wildcard: -rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)) - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/gcc/startup_k32l2a41a.c - -SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c) -SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c) - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(MCU_DIR)/CMSIS/ \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/config \ - $(TOP)/$(MCU_DIR)/drivers - -ifdef VERBOSE -$(info INC = '$(strip $(INC))') -$(info ) - -$(info SRC_C = '$(sort $(strip $(SRC_C)))') -$(info ) -endif - -# For freeRTOS port source -FREERTOS_PORT = ARM_CM0 - -# For flash-jlink target -#JLINK_DEVICE = ? - -# For flash-pyocd target -PYOCD_TARGET = K32L2A - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk deleted file mode 100644 index feb0a25f4..000000000 --- a/hw/bsp/frdm_k32l2b/board.mk +++ /dev/null @@ -1,51 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -DEPS_SUBMODULES += $(SDK_DIR) - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls - -MCU_DIR = $(SDK_DIR)/devices/K32L2B31A - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/system_K32L2B31A.c \ - $(MCU_DIR)/project_template/clock_config.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(MCU_DIR)/project_template \ - -SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h similarity index 99% rename from hw/bsp/frdm_k32l2a4s/board.h rename to hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h index 14eefda17..b1f38c997 100644 --- a/hw/bsp/frdm_k32l2a4s/board.h +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..723fb3893 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk @@ -0,0 +1,26 @@ +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU = K32L2A41A +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2A41VLH1A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2A41xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c similarity index 99% rename from hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c rename to hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c index 47dd0c8ec..80830163b 100644 --- a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -25,7 +25,7 @@ * This file is part of the TinyUSB stack. */ -#include "../board.h" +#include "bsp/board.h" #include "board.h" #include "fsl_gpio.h" #include "fsl_port.h" diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/kinetis/boards/frdm_k32l2b/board.h similarity index 100% rename from hw/bsp/frdm_k32l2b/board.h rename to hw/bsp/kinetis/boards/frdm_k32l2b/board.h diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk new file mode 100644 index 000000000..66d408c67 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk @@ -0,0 +1,26 @@ +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU = K32L2B31A +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2B31VLH0A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c similarity index 99% rename from hw/bsp/frdm_k32l2b/frdm_k32l2b.c rename to hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c index 8d2b39500..1566b4e2e 100644 --- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c +++ b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c @@ -25,7 +25,7 @@ * This file is part of the TinyUSB stack. */ -#include "../board.h" +#include "bsp/board.h" #include "board.h" #include "fsl_gpio.h" #include "fsl_port.h" diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk similarity index 54% rename from hw/bsp/frdm_kl25z/board.mk rename to hw/bsp/kinetis/boards/frdm_kl25z/board.mk index fd616f7ed..5ce6cd51e 100644 --- a/hw/bsp/frdm_kl25z/board.mk +++ b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk @@ -1,9 +1,8 @@ SDK_DIR = hw/mcu/nxp/nxp_sdk -DEPS_SUBMODULES += $(SDK_DIR) +MCU = MKL25Z4 +MCU_DIR = $(SDK_DIR)/devices/$(MCU) CFLAGS += \ - -mthumb \ - -mabi=aapcs \ -mcpu=cortex-m0plus \ -DCPU_MKL25Z128VLK4 \ -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \ @@ -16,29 +15,9 @@ LDFLAGS += \ # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls -MCU_DIR = $(SDK_DIR)/devices/MKL25Z4 - # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - src/portable/nxp/khci/hcd_khci.c \ - $(MCU_DIR)/system_MKL25Z4.c \ - $(MCU_DIR)/project_template/clock_config.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(MCU_DIR)/drivers/fsl_gpio.c \ - $(MCU_DIR)/drivers/fsl_lpsci.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(MCU_DIR)/project_template \ - -SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S - # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 @@ -49,4 +28,4 @@ JLINK_DEVICE = MKL25Z128xxx4 PYOCD_TARGET = mkl25zl128 # flash using pyocd -flash: flash-pyocd +flash: flash-jlink diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c similarity index 100% rename from hw/bsp/frdm_kl25z/frdm_kl25z.c rename to hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis/family.mk new file mode 100644 index 000000000..65767988a --- /dev/null +++ b/hw/bsp/kinetis/family.mk @@ -0,0 +1,46 @@ +DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers + +# mcu-sdk has different driver layout than previous old sdk +ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk) + +SRC_C += \ + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c + +INC += \ + $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/gpio \ + $(TOP)/$(SDK_DIR)/drivers/port \ + $(TOP)/$(SDK_DIR)/drivers/lpuart \ + +else + +SRC_C += \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_lpsci.c \ + $(MCU_DIR)/drivers/fsl_uart.c + +endif + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 18e40e1b1..a94e1877f 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -86,6 +86,8 @@ #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) + #define TUP_USBIP_CHIPIDEA_FS + #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 2678cdca1..52f4145f2 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -26,15 +26,14 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ - ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) -#include "fsl_device_registers.h" -#define KHCI USB0 +#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS + #include "fsl_device_registers.h" + #define KHCI USB0 +#else + #error "MCU is not supported" +#endif #include "device/dcd.h" diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 8ff1feff7..27073dce7 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ +#if CFG_TUH_ENABLED && \ ( \ ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ From 1fc203b085ba6ce2edef90e9dcc75ec72eaeb314 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 19:50:24 +0700 Subject: [PATCH 086/142] more update to kinetis bsp --- docs/reference/supported.rst | 2 +- hw/bsp/board_mcu.h | 14 ++--- .../boards/frdm_k32l2a4s/board.h | 0 .../boards/frdm_k32l2a4s/board.mk | 6 +-- .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 0 .../boards/frdm_k32l2b/board.h | 0 .../boards/frdm_k32l2b/board.mk | 6 +-- .../boards/frdm_k32l2b/frdm_k32l2b.c | 0 .../boards}/kuiic/K32L2B31xxxxA_flash.ld | 0 hw/bsp/{ => kinetis_k32/boards}/kuiic/board.h | 0 hw/bsp/kinetis_k32/boards/kuiic/board.mk | 26 ++++++++++ hw/bsp/{ => kinetis_k32/boards}/kuiic/kuiic.c | 2 +- hw/bsp/{kinetis => kinetis_k32}/family.mk | 28 +++------- .../boards/frdm_kl25z/board.mk | 11 ---- .../boards/frdm_kl25z/frdm_kl25z.c | 0 hw/bsp/kinetis_kl/family.mk | 37 +++++++++++++ hw/bsp/kuiic/board.mk | 52 ------------------- src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/hcd_khci.c | 15 +++--- src/tusb_option.h | 8 +-- 20 files changed, 98 insertions(+), 111 deletions(-) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/board.h (100%) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/board.mk (84%) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/frdm_k32l2a4s.c (100%) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/board.h (100%) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/board.mk (83%) rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/frdm_k32l2b.c (100%) rename hw/bsp/{ => kinetis_k32/boards}/kuiic/K32L2B31xxxxA_flash.ld (100%) rename hw/bsp/{ => kinetis_k32/boards}/kuiic/board.h (100%) create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/board.mk rename hw/bsp/{ => kinetis_k32/boards}/kuiic/kuiic.c (99%) rename hw/bsp/{kinetis => kinetis_k32}/family.mk (63%) rename hw/bsp/{kinetis => kinetis_kl}/boards/frdm_kl25z/board.mk (60%) rename hw/bsp/{kinetis => kinetis_kl}/boards/frdm_kl25z/frdm_kl25z.c (100%) create mode 100644 hw/bsp/kinetis_kl/family.mk delete mode 100644 hw/bsp/kuiic/board.mk diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index b1e0c0a68..a5d055893 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -253,7 +253,7 @@ Kinetis ^^^^^^^ - `Freedom FRDM-KL25Z `__ -- `Freedom FRDM-K32L2A `__ +- `Freedom FRDM-K32L2A4S `__ - `Freedom FRDM-K32L2B3 `__ - `KUIIC `__ diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 920e7d0d9..cd195a19b 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -39,15 +39,15 @@ //--------------------------------------------------------------------+ // Include order follows OPT_MCU_ number -#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC15XX || CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || \ - CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC40XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) || \ + TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC18XX) || \ + TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX) #include "chip.h" -#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \ - CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX) + #include "fsl_device_registers.h" + +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h similarity index 100% rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk similarity index 84% rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk index 723fb3893..d96ab58b8 100644 --- a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk @@ -1,11 +1,8 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk MCU = K32L2A41A -MCU_DIR = $(SDK_DIR)/devices/$(MCU) CFLAGS += \ -mcpu=cortex-m0plus \ -DCPU_K32L2A41VLH1A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual @@ -13,6 +10,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c similarity index 100% rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h similarity index 100% rename from hw/bsp/kinetis/boards/frdm_k32l2b/board.h rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk similarity index 83% rename from hw/bsp/kinetis/boards/frdm_k32l2b/board.mk rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk index 66d408c67..5f8ecbfe4 100644 --- a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk @@ -1,11 +1,8 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk MCU = K32L2B31A -MCU_DIR = $(SDK_DIR)/devices/$(MCU) CFLAGS += \ -mcpu=cortex-m0plus \ -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls @@ -13,6 +10,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c similarity index 100% rename from hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld similarity index 100% rename from hw/bsp/kuiic/K32L2B31xxxxA_flash.ld rename to hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kinetis_k32/boards/kuiic/board.h similarity index 100% rename from hw/bsp/kuiic/board.h rename to hw/bsp/kinetis_k32/boards/kuiic/board.h diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.mk b/hw/bsp/kinetis_k32/boards/kuiic/board.mk new file mode 100644 index 000000000..29a12e982 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/kuiic/board.mk @@ -0,0 +1,26 @@ +MCU = K32L2B31A + +# This board uses TinyUF2 for updates +UF2_FAMILY_ID = 0x7f83e793 + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2B31VLH0A \ + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c similarity index 99% rename from hw/bsp/kuiic/kuiic.c rename to hw/bsp/kinetis_k32/boards/kuiic/kuiic.c index 97677d47a..f9002a6d3 100644 --- a/hw/bsp/kuiic/kuiic.c +++ b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c @@ -25,7 +25,7 @@ * This file is part of the TinyUSB stack. */ -#include "../board.h" +#include "bsp/board.h" #include "board.h" #include "fsl_smc.h" #include "fsl_gpio.h" diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis_k32/family.mk similarity index 63% rename from hw/bsp/kinetis/family.mk rename to hw/bsp/kinetis_k32/family.mk index 65767988a..f89138b72 100644 --- a/hw/bsp/kinetis/family.mk +++ b/hw/bsp/kinetis_k32/family.mk @@ -1,46 +1,32 @@ -DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk +SDK_DIR = hw/mcu/nxp/mcux-sdk +DEPS_SUBMODULES += $(SDK_DIR) +MCU_DIR = $(SDK_DIR)/devices/$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk CFLAGS += \ -mthumb \ -mabi=aapcs \ + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32 SRC_C += \ src/portable/nxp/khci/dcd_khci.c \ src/portable/nxp/khci/hcd_khci.c \ $(MCU_DIR)/system_$(MCU).c \ - $(MCU_DIR)/project_template/clock_config.c \ $(MCU_DIR)/drivers/fsl_clock.c \ + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(SDK_DIR)/CMSIS/Include \ $(TOP)/$(MCU_DIR) \ $(TOP)/$(MCU_DIR)/project_template \ - $(TOP)/$(MCU_DIR)/drivers - -# mcu-sdk has different driver layout than previous old sdk -ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk) - -SRC_C += \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ + $(TOP)/$(MCU_DIR)/drivers \ $(TOP)/$(SDK_DIR)/drivers/smc \ $(TOP)/$(SDK_DIR)/drivers/common \ $(TOP)/$(SDK_DIR)/drivers/gpio \ $(TOP)/$(SDK_DIR)/drivers/port \ $(TOP)/$(SDK_DIR)/drivers/lpuart \ -else - -SRC_C += \ - $(MCU_DIR)/drivers/fsl_gpio.c \ - $(MCU_DIR)/drivers/fsl_lpsci.c \ - $(MCU_DIR)/drivers/fsl_uart.c - -endif - SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk similarity index 60% rename from hw/bsp/kinetis/boards/frdm_kl25z/board.mk rename to hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk index 5ce6cd51e..affe864fb 100644 --- a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk @@ -1,26 +1,15 @@ -SDK_DIR = hw/mcu/nxp/nxp_sdk MCU = MKL25Z4 -MCU_DIR = $(SDK_DIR)/devices/$(MCU) CFLAGS += \ - -mcpu=cortex-m0plus \ -DCPU_MKL25Z128VLK4 \ - -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \ -DCFG_EXAMPLE_VIDEO_READONLY -LDFLAGS += \ - -Wl,--defsym,__stack_size__=0x400 \ - -Wl,--defsym,__heap_size__=0 - # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # For flash-jlink target JLINK_DEVICE = MKL25Z128xxx4 diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c similarity index 100% rename from hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c rename to hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk new file mode 100644 index 000000000..e805d6dae --- /dev/null +++ b/hw/bsp/kinetis_kl/family.mk @@ -0,0 +1,37 @@ +SDK_DIR = hw/mcu/nxp/nxp_sdk +DEPS_SUBMODULES += $(SDK_DIR) + +MCU_DIR = $(SDK_DIR)/devices/$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \ + +LDFLAGS += \ + -Wl,--defsym,__stack_size__=0x400 \ + -Wl,--defsym,__heap_size__=0 + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_lpsci.c \ + $(MCU_DIR)/drivers/fsl_uart.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk deleted file mode 100644 index cb3459586..000000000 --- a/hw/bsp/kuiic/board.mk +++ /dev/null @@ -1,52 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -DEPS_SUBMODULES += $(SDK_DIR) tools/uf2 - -# This board uses TinyUF2 for updates -UF2_FAMILY_ID = 0x7f83e793 - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter - -MCU_DIR = $(SDK_DIR)/devices/K32L2B31A - -# All source paths should be relative to the top level. -LD_FILE = /hw/bsp/$(BOARD)/K32L2B31xxxxA_flash.ld - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/system_K32L2B31A.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers - -SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index a94e1877f..b903abeca 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -85,7 +85,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 27073dce7..6d25cd862 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,15 +26,14 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && \ - ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) -#include "fsl_device_registers.h" -#define KHCI USB0 +#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS + #include "fsl_device_registers.h" + #define KHCI USB0 +#else + #error "MCU is not supported" +#endif #include "host/hcd.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 5a234e357..c679f2f12 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -117,9 +117,11 @@ #define OPT_MCU_RP2040 1100 ///< Raspberry Pi RP2040 // NXP Kinetis -#define OPT_MCU_MKL25ZXX 1200 ///< NXP MKL25Zxx -#define OPT_MCU_K32L2BXX 1201 ///< NXP K32L2Bxx -#define OPT_MCU_K32L2AXX 1202 ///< NXP K32L2Axx +#define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series +#define OPT_MCU_KINETIS_K32 1201 ///< NXP K32 series + +#define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) +#define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) // Silabs #define OPT_MCU_EFM32GG 1300 ///< Silabs EFM32GG From bbe550efa0d99c18721c230b3a0a45e8ac6cd28e Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 20:19:37 +0700 Subject: [PATCH 087/142] add kinetis family to ci --- .github/workflows/build_arm.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 7aecb8386..f63f637b1 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -34,6 +34,7 @@ jobs: # Alphabetical order - 'broadcom_32bit' - 'imxrt' + - 'kinetis_k32 kinetis_kl' - 'lpc15 lpc18' - 'lpc54 lpc55' - 'mm32 msp432e4' From ec0f25d095a670d24578e39145729b2eb3028c28 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 20:30:49 +0700 Subject: [PATCH 088/142] fix ci with kl25z --- examples/device/net_lwip_webserver/skip.txt | 1 + hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt index b0e5235ac..77c7ec63a 100644 --- a/examples/device/net_lwip_webserver/skip.txt +++ b/examples/device/net_lwip_webserver/skip.txt @@ -8,3 +8,4 @@ mcu:MKL25ZXX family:broadcom_64bit family:broadcom_32bit board:curiosity_nano +board:frdm_kl25z diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk index affe864fb..0d0bceaa4 100644 --- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk @@ -2,7 +2,8 @@ MCU = MKL25Z4 CFLAGS += \ -DCPU_MKL25Z128VLK4 \ - -DCFG_EXAMPLE_VIDEO_READONLY + -DCFG_EXAMPLE_VIDEO_READONLY \ + -DCFG_EXAMPLE_MSC_READONLY # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls From 3944f1c4dab07569cb6fa781facd6afc20bbf35d Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 11:28:06 +0700 Subject: [PATCH 089/142] group same5x --- .codespell/ignore-words.txt | 1 + .github/workflows/build_arm.yml | 2 +- hw/bsp/d5035_01/board.mk | 61 ------------------- hw/bsp/same54xplainedpro/board.mk | 48 --------------- hw/bsp/same5x/boards/d5035_01/board.mk | 21 +++++++ .../{ => same5x/boards}/d5035_01/d5035_01.c | 0 .../boards}/d5035_01/same51j19a_flash.ld | 0 hw/bsp/same5x/boards/same54_xplained/board.mk | 12 ++++ .../boards/same54_xplained/same54_xplained.c} | 0 .../same54_xplained}/same54p20a_flash.ld | 0 .../same54_xplained}/same54p20a_sram.ld | 0 hw/bsp/same5x/family.mk | 42 +++++++++++++ 12 files changed, 77 insertions(+), 110 deletions(-) delete mode 100644 hw/bsp/d5035_01/board.mk delete mode 100644 hw/bsp/same54xplainedpro/board.mk create mode 100644 hw/bsp/same5x/boards/d5035_01/board.mk rename hw/bsp/{ => same5x/boards}/d5035_01/d5035_01.c (100%) rename hw/bsp/{ => same5x/boards}/d5035_01/same51j19a_flash.ld (100%) create mode 100644 hw/bsp/same5x/boards/same54_xplained/board.mk rename hw/bsp/{same54xplainedpro/same54xplainedpro.c => same5x/boards/same54_xplained/same54_xplained.c} (100%) rename hw/bsp/{same54xplainedpro => same5x/boards/same54_xplained}/same54p20a_flash.ld (100%) rename hw/bsp/{same54xplainedpro => same5x/boards/same54_xplained}/same54p20a_sram.ld (100%) create mode 100644 hw/bsp/same5x/family.mk diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt index fc14fe417..5c89bae1c 100644 --- a/.codespell/ignore-words.txt +++ b/.codespell/ignore-words.txt @@ -9,3 +9,4 @@ te attch endianess pris +busses diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index f63f637b1..905cc4f9a 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -41,7 +41,7 @@ jobs: - 'nrf' - 'ra' - 'rp2040' - - 'samd11' + - 'samd11 same5x' - 'samd21' - 'samd51' - 'saml2x' diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk deleted file mode 100644 index fc196b339..000000000 --- a/hw/bsp/d5035_01/board.mk +++ /dev/null @@ -1,61 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/microchip -HWREV ?= 1 - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mlong-calls \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -nostdlib -nostartfiles \ - -D__SAME51J19A__ \ - -DCONF_CPU_FREQUENCY=80000000 \ - -DCONF_GCLK_USB_FREQUENCY=48000000 \ - -DCFG_TUSB_MCU=OPT_MCU_SAME5X \ - -DD5035_01=1 \ - -DBOARD_NAME="\"D5035-01\"" \ - -DSVC_Handler=SVCall_Handler \ - -DHWREV=$(HWREV) - -# suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/same51j19a_flash.ld - -SRC_C += \ - src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/same51/gcc/gcc/startup_same51.c \ - hw/mcu/microchip/same51/gcc/system_same51.c - -ifdef SYSCALLS -ifneq ($(SYSCALLS),0) - SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c -endif -endif - -ifdef LOG -ifneq ($(LOG),0) - SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c -endif -endif - -INC += \ - $(TOP)/hw/mcu/microchip/same51/ \ - $(TOP)/hw/mcu/microchip/same51/config \ - $(TOP)/hw/mcu/microchip/same51/include \ - $(TOP)/hw/mcu/microchip/same51/hal/include \ - $(TOP)/hw/mcu/microchip/same51/hal/utils/include \ - $(TOP)/hw/mcu/microchip/same51/hpl/port \ - $(TOP)/hw/mcu/microchip/same51/hri \ - $(TOP)/hw/mcu/microchip/same51/CMSIS/Include - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - -# For flash-jlink target -JLINK_DEVICE = ATSAME51J19 - -# flash using jlink -flash: flash-jlink diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk deleted file mode 100644 index 1c6732231..000000000 --- a/hw/bsp/same54xplainedpro/board.mk +++ /dev/null @@ -1,48 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/microchip - -CONF_CPU_FREQUENCY ?= 48000000 - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mlong-calls \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -nostdlib -nostartfiles \ - -D__SAME54P20A__ \ - -DCONF_CPU_FREQUENCY=$(CONF_CPU_FREQUENCY) \ - -DCFG_TUSB_MCU=OPT_MCU_SAME5X \ - -DBOARD_NAME="\"Microchip SAM E54 Xplained Pro\"" - -# suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/same54p20a_flash.ld - -SRC_C += \ - src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/same54/gcc/gcc/startup_same54.c \ - hw/mcu/microchip/same54/gcc/system_same54.c \ - hw/mcu/microchip/same54/hal/utils/src/utils_syscalls.c - -INC += \ - $(TOP)/hw/mcu/microchip/same54/ \ - $(TOP)/hw/mcu/microchip/same54/config \ - $(TOP)/hw/mcu/microchip/same54/include \ - $(TOP)/hw/mcu/microchip/same54/hal/include \ - $(TOP)/hw/mcu/microchip/same54/hal/utils/include \ - $(TOP)/hw/mcu/microchip/same54/hpl/port \ - $(TOP)/hw/mcu/microchip/same54/hri \ - $(TOP)/hw/mcu/microchip/same54/CMSIS/Include - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - -# For flash-jlink target -JLINK_DEVICE = ATSAME54P20 - -# flash using edbg from https://github.com/ataradov/edbg -flash: $(BUILD)/$(PROJECT).bin - edbg --verbose -t same54 -pv -f $< diff --git a/hw/bsp/same5x/boards/d5035_01/board.mk b/hw/bsp/same5x/boards/d5035_01/board.mk new file mode 100644 index 000000000..c53411bb8 --- /dev/null +++ b/hw/bsp/same5x/boards/d5035_01/board.mk @@ -0,0 +1,21 @@ +MCU = same51 + +HWREV ?= 1 + +CFLAGS += \ + -D__SAME51J19A__ \ + -DCONF_CPU_FREQUENCY=80000000 \ + -DCONF_GCLK_USB_FREQUENCY=48000000 \ + -DD5035_01=1 \ + -DBOARD_NAME="\"D5035-01\"" \ + -DSVC_Handler=SVCall_Handler \ + -DHWREV=$(HWREV) + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/same51j19a_flash.ld + +# For flash-jlink target +JLINK_DEVICE = ATSAME51J19 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/d5035_01/d5035_01.c b/hw/bsp/same5x/boards/d5035_01/d5035_01.c similarity index 100% rename from hw/bsp/d5035_01/d5035_01.c rename to hw/bsp/same5x/boards/d5035_01/d5035_01.c diff --git a/hw/bsp/d5035_01/same51j19a_flash.ld b/hw/bsp/same5x/boards/d5035_01/same51j19a_flash.ld similarity index 100% rename from hw/bsp/d5035_01/same51j19a_flash.ld rename to hw/bsp/same5x/boards/d5035_01/same51j19a_flash.ld diff --git a/hw/bsp/same5x/boards/same54_xplained/board.mk b/hw/bsp/same5x/boards/same54_xplained/board.mk new file mode 100644 index 000000000..41cf95bfc --- /dev/null +++ b/hw/bsp/same5x/boards/same54_xplained/board.mk @@ -0,0 +1,12 @@ +MCU = same54 + +CFLAGS += \ + -DCONF_CPU_FREQUENCY=48000000 \ + -D__SAME54P20A__ \ + -DBOARD_NAME="\"Microchip SAM E54 Xplained Pro\"" + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/same54p20a_flash.ld + +# For flash-jlink target +JLINK_DEVICE = ATSAME54P20 diff --git a/hw/bsp/same54xplainedpro/same54xplainedpro.c b/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c similarity index 100% rename from hw/bsp/same54xplainedpro/same54xplainedpro.c rename to hw/bsp/same5x/boards/same54_xplained/same54_xplained.c diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same5x/boards/same54_xplained/same54p20a_flash.ld similarity index 100% rename from hw/bsp/same54xplainedpro/same54p20a_flash.ld rename to hw/bsp/same5x/boards/same54_xplained/same54p20a_flash.ld diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same5x/boards/same54_xplained/same54p20a_sram.ld similarity index 100% rename from hw/bsp/same54xplainedpro/same54p20a_sram.ld rename to hw/bsp/same5x/boards/same54_xplained/same54p20a_sram.ld diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk new file mode 100644 index 000000000..7f8692c97 --- /dev/null +++ b/hw/bsp/same5x/family.mk @@ -0,0 +1,42 @@ +DEPS_SUBMODULES += hw/mcu/microchip + +SDK_DIR = hw/mcu/microchip/$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mlong-calls \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_SAME5X + +# suppress warning caused by vendor mcu driver +#CFLAGS += -Wno-error=cast-qual + +SRC_C += \ + src/portable/microchip/samd/dcd_samd.c \ + $(SDK_DIR)/gcc/gcc/startup_$(MCU).c \ + $(SDK_DIR)/gcc/system_$(MCU).c \ + $(SDK_DIR)/hal/utils/src/utils_syscalls.c + +INC += \ + $(TOP)/$(SDK_DIR) \ + $(TOP)/$(SDK_DIR)/config \ + $(TOP)/$(SDK_DIR)/include \ + $(TOP)/$(SDK_DIR)/hal/include \ + $(TOP)/$(SDK_DIR)/hal/utils/include \ + $(TOP)/$(SDK_DIR)/hpl/port \ + $(TOP)/$(SDK_DIR)/hri \ + $(TOP)/$(SDK_DIR)/CMSIS/Include + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F + +# flash using edbg from https://github.com/ataradov/edbg +flash-edbg: $(BUILD)/$(PROJECT).bin + edbg --verbose -t $(MCU) -pv -f $< + +flash: flash-edbg From ab0da3c30baab6eb63e55217f2b4d5a719fb86e4 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 12:01:33 +0700 Subject: [PATCH 090/142] group stm32l0 --- .github/workflows/build_arm.yml | 2 +- hw/bsp/stm32l0/boards/stm32l052dap52/board.mk | 3 +- .../stm32l0538disco/STM32L053C8Tx_FLASH.ld | 0 .../boards/stm32l0538disco/board.h} | 147 ++------ .../stm32l0/boards/stm32l0538disco/board.mk | 14 + hw/bsp/stm32l0/family.c | 32 +- hw/bsp/stm32l0/family.mk | 13 +- hw/bsp/stm32l0/stm32l0xx_hal_conf.h | 90 +++-- hw/bsp/stm32l0538disco/board.mk | 54 --- hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h | 331 ------------------ 10 files changed, 130 insertions(+), 556 deletions(-) rename hw/bsp/{ => stm32l0/boards}/stm32l0538disco/STM32L053C8Tx_FLASH.ld (100%) rename hw/bsp/{stm32l0538disco/stm32l0538disco.c => stm32l0/boards/stm32l0538disco/board.h} (51%) create mode 100644 hw/bsp/stm32l0/boards/stm32l0538disco/board.mk delete mode 100644 hw/bsp/stm32l0538disco/board.mk delete mode 100644 hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 905cc4f9a..3abfd50a8 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -50,7 +50,7 @@ jobs: - 'stm32f7' - 'stm32g4 stm32wb' - 'stm32h7' - - 'stm32l4' + - 'stm32l0 stm32l4' - 'tm4c123 xmc4000' steps: - name: Setup Python diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk b/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk index 84662344d..0b1348474 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk @@ -1,4 +1,5 @@ -CFLAGS += -DSTM32L052xx -DCFG_EXAMPLE_VIDEO_READONLY +CFLAGS += \ + -DSTM32L052xx LD_FILE = $(BOARD_PATH)/STM32L052K8Ux_FLASH.ld diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l0538disco/STM32L053C8Tx_FLASH.ld similarity index 100% rename from hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld rename to hw/bsp/stm32l0/boards/stm32l0538disco/STM32L053C8Tx_FLASH.ld diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h similarity index 51% rename from hw/bsp/stm32l0538disco/stm32l0538disco.c rename to hw/bsp/stm32l0/boards/stm32l0538disco/board.h index 46f6f0ff6..0722e3102 100644 --- a/hw/bsp/stm32l0538disco/stm32l0538disco.c +++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h @@ -1,7 +1,7 @@ /* * The MIT License (MIT) * - * Copyright (c) 2019 Ha Thach (tinyusb.org) + * Copyright (c) 2020, Ha Thach (tinyusb.org) * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,45 +24,35 @@ * This file is part of the TinyUSB stack. */ -#include "../board.h" -#include "stm32l0xx_hal.h" +#ifndef BOARD_H_ +#define BOARD_H_ -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_IRQHandler(void) -{ - tud_int_handler(0); -} +#ifdef __cplusplus + extern "C" { +#endif -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ +// LED #define LED_PORT GPIOA #define LED_PIN GPIO_PIN_5 #define LED_STATE_ON 1 +// Button #define BUTTON_PORT GPIOA #define BUTTON_PIN GPIO_PIN_0 #define BUTTON_STATE_ACTIVE 1 -/** - * @brief System Clock Configuration - * The system Clock is configured as follow: - * HSI48 used as USB clock source - * - System Clock source = HSI - * - HSI Frequency(Hz) = 16000000 - * - SYSCLK(Hz) = 16000000 - * - HCLK(Hz) = 16000000 - * - AHB Prescaler = 1 - * - APB1 Prescaler = 1 - * - APB2 Prescaler = 1 - * - Flash Latency(WS) = 0 - * - Main regulator output voltage = Scale1 mode - * @param None - * @retval None - */ -static void SystemClock_Config(void) +// UART +//#define UART_DEV USART2 +//#define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE +//#define UART_GPIO_PORT GPIOA +//#define UART_GPIO_AF GPIO_AF4_USART2 +//#define UART_TX_PIN GPIO_PIN_2 +//#define UART_RX_PIN GPIO_PIN_3 + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ +static inline void board_stm32l0_clock_init(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; @@ -108,99 +98,12 @@ static void SystemClock_Config(void) HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct); } -void board_init(void) +static inline void board_vbus_sense_init(void) { - SystemClock_Config(); +} -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#ifdef __cplusplus + } #endif - GPIO_InitTypeDef GPIO_InitStruct; - - // LED - __HAL_RCC_GPIOA_CLK_ENABLE(); - GPIO_InitStruct.Pin = LED_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); - - board_led_write(false); - - // Button - //__HAL_RCC_GPIOA_CLK_ENABLE(); - GPIO_InitStruct.Pin = BUTTON_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLDOWN; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); - - // USB - /* Configure DM DP Pins */ - __HAL_RCC_GPIOA_CLK_ENABLE(); - GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* Enable USB FS Clock */ - __HAL_RCC_USB_CLK_ENABLE(); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler (void) -{ - HAL_IncTick(); - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif - -void HardFault_Handler (void) -{ - asm("bkpt"); -} - -// Required by __libc_init_array in startup code if we are compiling using -// -nostdlib/-nostartfiles. -void _init(void) -{ - -} +#endif /* BOARD_H_ */ diff --git a/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk b/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk new file mode 100644 index 000000000..deed519ba --- /dev/null +++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32L053xx + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/STM32L053C8Tx_FLASH.ld + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s + +# For flash-jlink target +JLINK_DEVICE = STM32L053R8 + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c index 6bce88b39..89749fb50 100644 --- a/hw/bsp/stm32l0/family.c +++ b/hw/bsp/stm32l0/family.c @@ -39,21 +39,14 @@ void USB_IRQHandler(void) //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ +#ifdef UART_DEV UART_HandleTypeDef UartHandle; +#endif void board_init(void) { board_stm32l0_clock_init(); - // Enable All GPIOs clocks - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - - // Enable UART Clock - UART_CLK_EN(); - #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); @@ -66,6 +59,12 @@ void board_init(void) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif + // Enable All GPIOs clocks + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + // LED GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitStruct.Pin = LED_PIN; @@ -74,6 +73,8 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + board_led_write(false); + // Button GPIO_InitStruct.Pin = BUTTON_PIN; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; @@ -81,7 +82,10 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); - // Uart +#ifdef UART_DEV + // Enable UART Clock + UART_CLK_EN(); + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -98,13 +102,14 @@ void board_init(void) UartHandle.Init.Mode = UART_MODE_TX_RX; UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; HAL_UART_Init(&UartHandle); +#endif // USB Pins // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); // USB Clock enable @@ -133,8 +138,13 @@ int board_uart_read(uint8_t* buf, int len) int board_uart_write(void const * buf, int len) { +#ifdef UART_DEV HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff); return len; +#else + (void) buf; (void) len; + return 0; +#endif } #if CFG_TUSB_OS == OPT_OS_NONE diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk index 67a5c69b8..f069ae8f0 100644 --- a/hw/bsp/stm32l0/family.mk +++ b/hw/bsp/stm32l0/family.mk @@ -1,5 +1,8 @@ ST_FAMILY = l0 -DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver +DEPS_SUBMODULES += \ + lib/CMSIS_5 \ + hw/mcu/st/cmsis_device_$(ST_FAMILY) \ + hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver @@ -17,8 +20,12 @@ CFLAGS += \ -DCFG_EXAMPLE_VIDEO_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_STM32L0 -# suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-align -Wno-error=maybe-uninitialized +# mcu driver cause following warnings +CFLAGS += \ + -Wno-error=unused-parameter \ + -Wno-error=redundant-decls \ + -Wno-error=cast-align \ + -Wno-error=maybe-uninitialized SRC_C += \ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ diff --git a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h index e3a131043..fd109bc8c 100644 --- a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h +++ b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h @@ -2,19 +2,41 @@ ****************************************************************************** * @file stm32l0xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l0xx_hal_conf.h. + * @brief HAL configuration file. ****************************************************************************** - * @attention * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Redistribution and use in source and binary forms, with or without + * modification, are permitted, provided that the following conditions are met: + * + * 1. Redistribution of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of other + * contributors to this software may be used to endorse or promote products + * derived from this software without specific written permission. + * 4. This software, including modifications and/or derivative works of this + * software, must execute solely and exclusively on microcontroller or + * microprocessor devices manufactured by or for STMicroelectronics. + * 5. Redistribution and use of this software other than as permitted under + * this license is void and will automatically terminate your rights under + * this license. + * + * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY + * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ @@ -35,35 +57,37 @@ * @brief This is the list of modules to be used in the HAL driver */ #define HAL_MODULE_ENABLED -/*#define HAL_ADC_MODULE_ENABLED */ -/*#define HAL_COMP_MODULE_ENABLED */ -/*#define HAL_CRC_MODULE_ENABLED */ -/*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_DAC_MODULE_ENABLED */ +// #define HAL_ADC_MODULE_ENABLED +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ #define HAL_DMA_MODULE_ENABLED -/*#define HAL_FIREWALL_MODULE_ENABLED */ +/* #define HAL_FIREWALL_MODULE_ENABLED */ #define HAL_FLASH_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED -/*#define HAL_I2C_MODULE_ENABLED */ -/*#define HAL_I2S_MODULE_ENABLED */ -/*#define HAL_IWDG_MODULE_ENABLED */ -/*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_I2C_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LCD_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED #define HAL_RCC_MODULE_ENABLED -/*#define HAL_RNG_MODULE_ENABLED */ -/*#define HAL_RTC_MODULE_ENABLED */ -/*#define HAL_SPI_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ -/*#define HAL_TSC_MODULE_ENABLED */ +//#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +//#define HAL_SPI_MODULE_ENABLED +/* #define HAL_TIM_MODULE_ENABLED */ +/* #define HAL_TSC_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/*#define HAL_USART_MODULE_ENABLED */ -/*#define HAL_IRDA_MODULE_ENABLED */ -/*#define HAL_SMARTCARD_MODULE_ENABLED */ -/*#define HAL_SMBUS_MODULE_ENABLED */ -/*#define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +//#define HAL_PCD_MODULE_ENABLED #define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED +/* #define HAL_PCD_MODULE_ENABLED */ + /* ########################## Oscillator Values adaptation ####################*/ /** @@ -322,7 +346,7 @@ */ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); + void assert_failed(uint8_t *file, uint32_t line); #else #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */ diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk deleted file mode 100644 index 72e887adf..000000000 --- a/hw/bsp/stm32l0538disco/board.mk +++ /dev/null @@ -1,54 +0,0 @@ -ST_FAMILY = l0 -DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver - -ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) -ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DSTM32L053xx \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_EXAMPLE_VIDEO_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_STM32L0 - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=redundant-decls - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/STM32L053C8Tx_FLASH.ld - -SRC_C += \ - src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ - $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c - -SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s - -INC += \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = STM32L053R8 - -# Path to STM32 Cube Programmer CLI, should be added into system path -STM32Prog = STM32_Programmer_CLI - -# flash target using on-board stlink -flash: $(BUILD)/$(PROJECT).elf - $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h deleted file mode 100644 index a917214c3..000000000 --- a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h +++ /dev/null @@ -1,331 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l0xx_hal_conf.h - * @author MCD Application Team - * @brief HAL configuration file. - ****************************************************************************** - * - * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L0xx_HAL_CONF_H -#define __STM32L0xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -// #define HAL_ADC_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -//#define HAL_RNG_MODULE_ENABLED -/* #define HAL_RTC_MODULE_ENABLED */ -//#define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ -/* #define HAL_TSC_MODULE_ENABLED */ -/* #define HAL_UART_MODULE_ENABLED */ -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -//#define HAL_PCD_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal High Speed oscillator for USB (HSI48) value. - */ -#if !defined (HSI48_VALUE) -#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. - The real value may vary depending on the variations - in voltage and temperature. */ -#endif /* HSI48_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature.*/ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -/** - * @brief Time out for LSE start up value in ms. - */ -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define PREREAD_ENABLE 1U -#define BUFFER_CACHE_DISABLE 0U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver - * Activated: CRC code is present inside driver - * Deactivated: CRC code cleaned from driver - */ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l0xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l0xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l0xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l0xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l0xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l0xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l0xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l0xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l0xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l0xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l0xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l0xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32l0xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l0xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l0xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l0xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l0xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l0xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l0xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l0xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l0xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l0xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l0xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l0xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l0xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l0xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l0xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l0xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l0xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t *file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L0xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ From 322f58ea8530e2b43d00a087b6d501776be25a00 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 12:47:05 +0700 Subject: [PATCH 091/142] add CFLAGS_SKIP to improve sam compile time --- .github/workflows/build_arm.yml | 5 ++--- examples/rules.mk | 4 ++++ hw/bsp/samd11/family.mk | 7 ++++++- hw/bsp/samd21/family.mk | 5 ++++- hw/bsp/samd51/family.mk | 4 ++-- hw/bsp/same5x/family.mk | 4 ++-- hw/bsp/same70_qmtech/board.mk | 5 ++++- hw/bsp/same70_xplained/board.mk | 5 ++++- hw/bsp/samg55xplained/board.mk | 5 ++++- hw/bsp/saml2x/family.mk | 5 ++++- 10 files changed, 36 insertions(+), 13 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 3abfd50a8..8a3181440 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -48,9 +48,8 @@ jobs: - 'stm32f0 stm32f1' - 'stm32f4' - 'stm32f7' - - 'stm32g4 stm32wb' - - 'stm32h7' - - 'stm32l0 stm32l4' + - 'stm32g4 stm32h7' + - 'stm32l0 stm32l4 stm32u5 stm32wb' - 'tm4c123 xmc4000' steps: - name: Setup Python diff --git a/examples/rules.mk b/examples/rules.mk index 59cf4fd1f..b85837c16 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -66,6 +66,10 @@ ifeq ($(NO_LTO),1) CFLAGS := $(filter-out -flto,$(CFLAGS)) endif +ifneq ($(CFLAGS_SKIP),) +CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS)) +endif + LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections ifdef LD_FILE diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk index dc6678b30..a2a5268aa 100644 --- a/hw/bsp/samd11/family.mk +++ b/hw/bsp/samd11/family.mk @@ -9,10 +9,15 @@ CFLAGS += \ -nostdlib -nostartfiles \ -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ -DOSC32K_OVERWRITE_CALIBRATION=0 \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_EXAMPLE_VIDEO_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_SAMD11 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls +CFLAGS += -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 6d02d7fa6..30eccacb2 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -13,7 +13,10 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls +CFLAGS += -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk index 3ecc5aa66..657e33438 100644 --- a/hw/bsp/samd51/family.mk +++ b/hw/bsp/samd51/family.mk @@ -13,8 +13,8 @@ CFLAGS += \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -# suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk index 7f8692c97..df1af4a9d 100644 --- a/hw/bsp/same5x/family.mk +++ b/hw/bsp/same5x/family.mk @@ -13,8 +13,8 @@ CFLAGS += \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_SAME5X -# suppress warning caused by vendor mcu driver -#CFLAGS += -Wno-error=cast-qual +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk index 1dcb8bfcd..ad5af2020 100644 --- a/hw/bsp/same70_qmtech/board.mk +++ b/hw/bsp/same70_qmtech/board.mk @@ -11,7 +11,10 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMX7X # suppress following warnings from mcu driver -CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls +CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual ASF_DIR = hw/mcu/microchip/same70 diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk index 95c4aaaa2..769d03e21 100644 --- a/hw/bsp/same70_xplained/board.mk +++ b/hw/bsp/same70_xplained/board.mk @@ -11,7 +11,10 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMX7X # suppress following warnings from mcu driver -CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls +CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual ASF_DIR = hw/mcu/microchip/same70 diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk index 7cc9487fd..ed0d59772 100644 --- a/hw/bsp/samg55xplained/board.mk +++ b/hw/bsp/samg55xplained/board.mk @@ -12,7 +12,10 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMG # suppress following warnings from mcu driver -CFLAGS += -Wno-error=undef -Wno-error=cast-qual -Wno-error=null-dereference -Wno-error=redundant-decls +CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual ASF_DIR = hw/mcu/microchip/samg55 diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index 6022158de..91c2cfa61 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -14,7 +14,10 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAML22 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls +CFLAGS += -Wno-error=redundant-decls + +# SAM driver is flooded with -Wcast-qual which slow down complication significantly +CFLAGS_SKIP += -Wcast-qual SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ From b46632ba07d5e3827029413f69618f41f987f452 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 13:11:41 +0700 Subject: [PATCH 092/142] bsp for f2 f3 --- .github/workflows/build_arm.yml | 7 ++- .../stm32f207nucleo/STM32F207ZGTx_FLASH.ld | 0 .../stm32f2/boards/stm32f207nucleo/board.mk | 14 ++++++ .../boards}/stm32f207nucleo/stm32f207nucleo.c | 2 +- .../board.mk => stm32f2/family.mk} | 23 +++------ .../stm32f2xx_hal_conf.h | 0 .../stm32f303disco/STM32F303VCTx_FLASH.ld | 0 hw/bsp/stm32f3/boards/stm32f303disco/board.mk | 14 ++++++ .../boards}/stm32f303disco/stm32f303disco.c | 0 .../stm32f303disco/stm32f3xx_hal_conf.h | 0 hw/bsp/stm32f303disco/board.mk | 49 ------------------- 11 files changed, 40 insertions(+), 69 deletions(-) rename hw/bsp/{ => stm32f2/boards}/stm32f207nucleo/STM32F207ZGTx_FLASH.ld (100%) create mode 100644 hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk rename hw/bsp/{ => stm32f2/boards}/stm32f207nucleo/stm32f207nucleo.c (99%) rename hw/bsp/{stm32f207nucleo/board.mk => stm32f2/family.mk} (68%) rename hw/bsp/{stm32f207nucleo => stm32f2}/stm32f2xx_hal_conf.h (100%) rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/STM32F303VCTx_FLASH.ld (100%) create mode 100644 hw/bsp/stm32f3/boards/stm32f303disco/board.mk rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/stm32f303disco.c (100%) rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/stm32f3xx_hal_conf.h (100%) delete mode 100644 hw/bsp/stm32f303disco/board.mk diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 8a3181440..2f72e758a 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -41,11 +41,10 @@ jobs: - 'nrf' - 'ra' - 'rp2040' - - 'samd11 same5x' - - 'samd21' - - 'samd51' + - 'samd11 samd21' + - 'samd51 same5x' - 'saml2x' - - 'stm32f0 stm32f1' + - 'stm32f0 stm32f1 stm32f2 stm32f3' - 'stm32f4' - 'stm32f7' - 'stm32g4 stm32h7' diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f2/boards/stm32f207nucleo/STM32F207ZGTx_FLASH.ld similarity index 100% rename from hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld rename to hw/bsp/stm32f2/boards/stm32f207nucleo/STM32F207ZGTx_FLASH.ld diff --git a/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk b/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk new file mode 100644 index 000000000..ba185d199 --- /dev/null +++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32F207xx \ + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/STM32F207ZGTx_FLASH.ld + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s + +# For flash-jlink target +JLINK_DEVICE = stm32f207zg + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c similarity index 99% rename from hw/bsp/stm32f207nucleo/stm32f207nucleo.c rename to hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c index 80f762c93..48203b787 100644 --- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c +++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c @@ -24,7 +24,7 @@ * This file is part of the TinyUSB stack. */ -#include "../board.h" +#include "bsp/board.h" #include "stm32f2xx_hal.h" diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f2/family.mk similarity index 68% rename from hw/bsp/stm32f207nucleo/board.mk rename to hw/bsp/stm32f2/family.mk index 55581e1ec..7ca378548 100644 --- a/hw/bsp/stm32f207nucleo/board.mk +++ b/hw/bsp/stm32f2/family.mk @@ -1,9 +1,15 @@ ST_FAMILY = f2 -DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver +DEPS_SUBMODULES += \ + lib/CMSIS_5 \ + $(ST_CMSIS) \ + $(ST_HAL_DRIVER) + +include $(TOP)/$(BOARD_PATH)/board.mk + CFLAGS += \ -flto \ -mthumb \ @@ -11,15 +17,11 @@ CFLAGS += \ -mcpu=cortex-m3 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DSTM32F207xx \ -DCFG_TUSB_MCU=OPT_MCU_STM32F2 # mcu driver cause following warnings CFLAGS += -Wno-error=sign-compare -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/STM32F207ZGTx_FLASH.ld - SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ @@ -29,20 +31,11 @@ SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c -SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s - INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/$(BOARD_PATH) # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - -# For flash-jlink target -JLINK_DEVICE = stm32f207zg - -# flash target using on-board stlink -flash: flash-stlink diff --git a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h b/hw/bsp/stm32f2/stm32f2xx_hal_conf.h similarity index 100% rename from hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h rename to hw/bsp/stm32f2/stm32f2xx_hal_conf.h diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f3/boards/stm32f303disco/STM32F303VCTx_FLASH.ld similarity index 100% rename from hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld rename to hw/bsp/stm32f3/boards/stm32f303disco/STM32F303VCTx_FLASH.ld diff --git a/hw/bsp/stm32f3/boards/stm32f303disco/board.mk b/hw/bsp/stm32f3/boards/stm32f303disco/board.mk new file mode 100644 index 000000000..e387f2d54 --- /dev/null +++ b/hw/bsp/stm32f3/boards/stm32f303disco/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32F303xC \ + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/STM32F303VCTx_FLASH.ld + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s + +# For flash-jlink target +JLINK_DEVICE = stm32f303vc + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c similarity index 100% rename from hw/bsp/stm32f303disco/stm32f303disco.c rename to hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c diff --git a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f3xx_hal_conf.h similarity index 100% rename from hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h rename to hw/bsp/stm32f3/boards/stm32f303disco/stm32f3xx_hal_conf.h diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk deleted file mode 100644 index b81de4ee4..000000000 --- a/hw/bsp/stm32f303disco/board.mk +++ /dev/null @@ -1,49 +0,0 @@ -ST_FAMILY = f3 -DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver - -ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) -ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -nostdlib -nostartfiles \ - -DSTM32F303xC \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F3 - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/STM32F303VCTx_FLASH.ld - -SRC_C += \ - src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ - $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c - -SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s - -INC += \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - -# For flash-jlink target -JLINK_DEVICE = stm32f303vc - -# flash target using on-board stlink -flash: flash-stlink From aa11e213584526e69e4e7e16553b24fc08481bc5 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 13:15:05 +0700 Subject: [PATCH 093/142] add mising file --- hw/bsp/stm32f3/family.mk | 42 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 hw/bsp/stm32f3/family.mk diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk new file mode 100644 index 000000000..f3b21d530 --- /dev/null +++ b/hw/bsp/stm32f3/family.mk @@ -0,0 +1,42 @@ +ST_FAMILY = f3 + +ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) +ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +DEPS_SUBMODULES += \ + lib/CMSIS_5 \ + $(ST_CMSIS) \ + $(ST_HAL_DRIVER) + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F3 + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter + +SRC_C += \ + src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ + $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c + +INC += \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/$(BOARD_PATH) + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F From 1867ba0bc10c89977a8370a8a55e5d68f6231e13 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 16:43:59 +0700 Subject: [PATCH 094/142] fix l4 hw testing ci --- .github/workflows/build_arm.yml | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 2f72e758a..ee3d9f533 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -94,21 +94,30 @@ jobs: # Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted - name: Prepare rp2040 Artifacts - if: matrix.family == 'rp2040' && github.repository_owner == 'hathach' + if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach' run: find examples/ -name "*.elf" -exec mv {} . \; - name: Prepare stm32l412nucleo Artifacts - if: matrix.family == 'stm32l4' + if: contains(matrix.family, 'stm32l4') run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \; - - name: Upload Artifacts for hardware testing - if: matrix.family == 'stm32l4' || (matrix.family == 'rp2040' && github.repository_owner == 'hathach') + - name: Upload Artifacts for rp2040 + if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach') uses: actions/upload-artifact@v3 with: - name: ${{ matrix.family }} + name: rp2040 path: | *.elf + - name: Upload Artifacts for stm32l412nucleo + if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach') + uses: actions/upload-artifact@v3 + with: + name: stm32l4 + path: | + *.elf + + # --------------------------------------- # Build all no-family (orphaned) boards # disable this workflow since it is often failed randomly From 80be1aa13dcdd0b86c01212b6266a099669c98b2 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 17:19:33 +0700 Subject: [PATCH 095/142] bsp lpc11 --- .github/workflows/build_arm.yml | 2 +- hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk | 24 ++++++++++ .../boards}/lpcxpresso11u37/lpc11u37.ld | 0 .../boards}/lpcxpresso11u37/lpcxpresso11u37.c | 2 +- hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk | 18 ++++++++ .../boards}/lpcxpresso11u68/lpc11u68.ld | 0 .../boards}/lpcxpresso11u68/lpcxpresso11u68.c | 2 +- hw/bsp/lpc11/family.mk | 43 +++++++++++++++++ hw/bsp/lpcxpresso11u37/board.mk | 46 ------------------- hw/bsp/lpcxpresso11u68/board.mk | 42 ----------------- 10 files changed, 88 insertions(+), 91 deletions(-) create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u37/lpc11u37.ld (100%) rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u37/lpcxpresso11u37.c (99%) create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u68/lpc11u68.ld (100%) rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u68/lpcxpresso11u68.c (99%) create mode 100644 hw/bsp/lpc11/family.mk delete mode 100644 hw/bsp/lpcxpresso11u37/board.mk delete mode 100644 hw/bsp/lpcxpresso11u68/board.mk diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index ee3d9f533..1a0e556e9 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -35,7 +35,7 @@ jobs: - 'broadcom_32bit' - 'imxrt' - 'kinetis_k32 kinetis_kl' - - 'lpc15 lpc18' + - 'lpc11 lpc15 lpc18' - 'lpc54 lpc55' - 'mm32 msp432e4' - 'nrf' diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk new file mode 100644 index 000000000..fdc17374b --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk @@ -0,0 +1,24 @@ +MCU = 11uxx +MCU_DRV = 11xx + +CFLAGS += \ + -DCORE_M0 \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_EXAMPLE_VIDEO_READONLY \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' + +# mcu driver cause following warnings +CFLAGS += \ + -Wno-error=strict-prototypes \ + -Wno-error=unused-parameter \ + -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc11u37.ld + +# For flash-jlink target +JLINK_DEVICE = LPC11U37/401 +PYOCD_TARGET = lpc11u37 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld similarity index 100% rename from hw/bsp/lpcxpresso11u37/lpc11u37.ld rename to hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c similarity index 99% rename from hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c rename to hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c index 79cd685c3..02dc2cbf9 100644 --- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c @@ -25,7 +25,7 @@ */ #include "chip.h" -#include "../board.h" +#include "bsp/board.h" //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk new file mode 100644 index 000000000..fbe97b853 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk @@ -0,0 +1,18 @@ +MCU = 11u6x +MCU_DRV = 11u6x + +CFLAGS += \ + -DCORE_M0PLUS \ + -D__VTOR_PRESENT=0 \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc11u68.ld + +# For flash-jlink target +JLINK_DEVICE = LPC11U68 +PYOCD_TARGET = lpc11u68 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld similarity index 100% rename from hw/bsp/lpcxpresso11u68/lpc11u68.ld rename to hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c similarity index 99% rename from hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c rename to hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c index a04e43867..44d091511 100644 --- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c @@ -25,7 +25,7 @@ */ #include "chip.h" -#include "../board.h" +#include "bsp/board.h" //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk new file mode 100644 index 000000000..eb427c09d --- /dev/null +++ b/hw/bsp/lpc11/family.mk @@ -0,0 +1,43 @@ +DEPS_SUBMODULES += hw/mcu/nxp/lpcopen + +MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -nostdlib \ + -D__USE_LPCOPEN \ + -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \ + $(MCU_DIR)/src/chip_$(MCU_DRV).c \ + $(MCU_DIR)/src/clock_$(MCU_DRV).c \ + $(MCU_DIR)/src/iocon_$(MCU_DRV).c \ + $(MCU_DIR)/src/sysinit_$(MCU_DRV).c + +ifeq ($(MCU),11u6x) +SRC_C += \ + $(MCU_DIR)/src/gpio_$(MCU_DRV).c \ + $(MCU_DIR)/src/syscon_$(MCU_DRV).c \ + +else + +SRC_C += \ + $(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \ + $(MCU_DIR)/src/sysctl_$(MCU_DRV).c +endif + +INC += \ + $(TOP)/$(MCU_DIR)/inc + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = LPC11U68 diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk deleted file mode 100644 index 61e5eda7e..000000000 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ /dev/null @@ -1,46 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0 \ - -nostdlib \ - -DCORE_M0 \ - -D__USE_LPCOPEN \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_EXAMPLE_VIDEO_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' - -# mcu driver cause following warnings -CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc11u37.ld - -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \ - $(MCU_DIR)/src/chip_11xx.c \ - $(MCU_DIR)/src/clock_11xx.c \ - $(MCU_DIR)/src/gpio_11xx_1.c \ - $(MCU_DIR)/src/iocon_11xx.c \ - $(MCU_DIR)/src/sysctl_11xx.c \ - $(MCU_DIR)/src/sysinit_11xx.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = LPC11U37/401 - -# flash using pyocd -flash: $(BUILD)/$(PROJECT).hex - pyocd flash -t lpc11u37 $< diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk deleted file mode 100644 index cd6ad3617..000000000 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ /dev/null @@ -1,42 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -nostdlib \ - -DCORE_M0PLUS \ - -D__VTOR_PRESENT=0 \ - -D__USE_LPCOPEN \ - -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc11u68.ld - -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \ - $(MCU_DIR)/src/chip_11u6x.c \ - $(MCU_DIR)/src/clock_11u6x.c \ - $(MCU_DIR)/src/gpio_11u6x.c \ - $(MCU_DIR)/src/iocon_11u6x.c \ - $(MCU_DIR)/src/syscon_11u6x.c \ - $(MCU_DIR)/src/sysinit_11u6x.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = LPC11U68 - -# flash using pyocd -flash: $(BUILD)/$(PROJECT).hex - pyocd flash -t lpc11u68 $< From 64c6b715cecb80788b23a5f8f07e256e1c96ed38 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 17:26:49 +0700 Subject: [PATCH 096/142] bsp lpc13 --- .github/workflows/build_arm.yml | 6 +-- hw/bsp/lpc13/boards/lpcxpresso1347/board.mk | 13 ++++++ .../boards}/lpcxpresso1347/lpc1347.ld | 0 .../boards}/lpcxpresso1347/lpcxpresso1347.c | 0 hw/bsp/lpcxpresso1347/board.mk | 45 ------------------- 5 files changed, 16 insertions(+), 48 deletions(-) create mode 100644 hw/bsp/lpc13/boards/lpcxpresso1347/board.mk rename hw/bsp/{ => lpc13/boards}/lpcxpresso1347/lpc1347.ld (100%) rename hw/bsp/{ => lpc13/boards}/lpcxpresso1347/lpcxpresso1347.c (100%) delete mode 100644 hw/bsp/lpcxpresso1347/board.mk diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 1a0e556e9..01b390ac8 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -35,7 +35,7 @@ jobs: - 'broadcom_32bit' - 'imxrt' - 'kinetis_k32 kinetis_kl' - - 'lpc11 lpc15 lpc18' + - 'lpc11 lpc13 lpc15 lpc18' - 'lpc54 lpc55' - 'mm32 msp432e4' - 'nrf' @@ -102,7 +102,7 @@ jobs: run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \; - name: Upload Artifacts for rp2040 - if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach') + if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach' uses: actions/upload-artifact@v3 with: name: rp2040 @@ -110,7 +110,7 @@ jobs: *.elf - name: Upload Artifacts for stm32l412nucleo - if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach') + if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach' uses: actions/upload-artifact@v3 with: name: stm32l4 diff --git a/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk b/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk new file mode 100644 index 000000000..31eb2f28f --- /dev/null +++ b/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk @@ -0,0 +1,13 @@ +DEPS_SUBMODULES += hw/mcu/nxp/lpcopen + +CFLAGS += \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc1347.ld + +# For flash-jlink target +JLINK_DEVICE = LPC1347 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/lpcxpresso1347/lpc1347.ld b/hw/bsp/lpc13/boards/lpcxpresso1347/lpc1347.ld similarity index 100% rename from hw/bsp/lpcxpresso1347/lpc1347.ld rename to hw/bsp/lpc13/boards/lpcxpresso1347/lpc1347.ld diff --git a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c similarity index 100% rename from hw/bsp/lpcxpresso1347/lpcxpresso1347.c rename to hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk deleted file mode 100644 index 25d6fa7a3..000000000 --- a/hw/bsp/lpcxpresso1347/board.mk +++ /dev/null @@ -1,45 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -nostdlib \ - -DCORE_M3 \ - -D__USE_LPCOPEN \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_EXAMPLE_VIDEO_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' - -# startup.c and lpc_types.h cause following errors -CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc1347.ld - -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \ - $(MCU_DIR)/src/chip_13xx.c \ - $(MCU_DIR)/src/clock_13xx.c \ - $(MCU_DIR)/src/gpio_13xx_1.c \ - $(MCU_DIR)/src/iocon_13xx.c \ - $(MCU_DIR)/src/sysctl_13xx.c \ - $(MCU_DIR)/src/sysinit_13xx.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - -# For flash-jlink target -JLINK_DEVICE = LPC1347 - -# flash using jlink -flash: flash-jlink From 1154b7a9e733fd6571c2a47e52d6d49da0b3b096 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 17:40:44 +0700 Subject: [PATCH 097/142] add mising lpc13 file --- hw/bsp/lpc13/family.mk | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 hw/bsp/lpc13/family.mk diff --git a/hw/bsp/lpc13/family.mk b/hw/bsp/lpc13/family.mk new file mode 100644 index 000000000..28f98e4ca --- /dev/null +++ b/hw/bsp/lpc13/family.mk @@ -0,0 +1,39 @@ +DEPS_SUBMODULES += hw/mcu/nxp/lpcopen + +MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -nostdlib \ + -DCORE_M3 \ + -D__USE_LPCOPEN \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_EXAMPLE_VIDEO_READONLY \ + -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# startup.c and lpc_types.h cause following errors +CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls + +# caused by freeRTOS port !! +CFLAGS += -Wno-error=maybe-uninitialized + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \ + $(MCU_DIR)/src/chip_13xx.c \ + $(MCU_DIR)/src/clock_13xx.c \ + $(MCU_DIR)/src/gpio_13xx_1.c \ + $(MCU_DIR)/src/iocon_13xx.c \ + $(MCU_DIR)/src/sysctl_13xx.c \ + $(MCU_DIR)/src/sysinit_13xx.c + +INC += \ + $(TOP)/$(MCU_DIR)/inc + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 From 934baae9b8dd58dd17881ef8ad8bd3428b208b1f Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 17:58:20 +0700 Subject: [PATCH 098/142] bsp lpc51 --- .github/workflows/build_arm.yml | 2 +- hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk | 37 +++++++++++++++++++ .../boards}/lpcxpresso51u68/lpcxpresso51u68.c | 0 .../board.mk => lpc51/family.mk} | 19 +++------- 4 files changed, 44 insertions(+), 14 deletions(-) create mode 100644 hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk rename hw/bsp/{ => lpc51/boards}/lpcxpresso51u68/lpcxpresso51u68.c (100%) rename hw/bsp/{lpcxpresso51u68/board.mk => lpc51/family.mk} (74%) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 01b390ac8..2b64e5410 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -36,7 +36,7 @@ jobs: - 'imxrt' - 'kinetis_k32 kinetis_kl' - 'lpc11 lpc13 lpc15 lpc18' - - 'lpc54 lpc55' + - 'lpc51 lpc54 lpc55' - 'mm32 msp432e4' - 'nrf' - 'ra' diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk new file mode 100644 index 000000000..27b9b371f --- /dev/null +++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk @@ -0,0 +1,37 @@ +MCU = LPC51U68 + +CFLAGS += \ + -DCPU_LPC51U68JBD64 \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/system_LPC51U68.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_power.c \ + $(MCU_DIR)/drivers/fsl_reset.c \ + $(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \ + $(SDK_DIR)/drivers/flexcomm/fsl_usart.c + +INC += \ + $(TOP)/$(MCU_DIR)/../../CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/flexcomm \ + $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ + $(TOP)/$(SDK_DIR)/drivers/lpc_gpio + +SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S + +LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +JLINK_DEVICE = LPC51U68 +PYOCD_TARGET = LPC51U68 + +# flash using pyocd (51u68 is not supported yet) +flash: flash-pyocd diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c similarity index 100% rename from hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c rename to hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/family.mk similarity index 74% rename from hw/bsp/lpcxpresso51u68/board.mk rename to hw/bsp/lpc51/family.mk index b1a126c51..8a64f0945 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpc51/family.mk @@ -1,27 +1,26 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk DEPS_SUBMODULES += $(SDK_DIR) +MCU_DIR = $(SDK_DIR)/devices/$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + CFLAGS += \ -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m0plus \ - -DCPU_LPC51U68JBD64 \ -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -MCU_DIR = $(SDK_DIR)/devices/LPC51U68 - # All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/LPC51U68_flash.ld +LD_FILE = $(MCU_DIR)/gcc/$(MCU)_flash.ld SRC_C += \ src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/system_LPC51U68.c \ + $(MCU_DIR)/system_$(MCU).c \ $(MCU_DIR)/drivers/fsl_clock.c \ $(MCU_DIR)/drivers/fsl_power.c \ $(MCU_DIR)/drivers/fsl_reset.c \ @@ -38,15 +37,9 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ $(TOP)/$(SDK_DIR)/drivers/lpc_gpio -SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -JLINK_DEVICE = LPC51U68 -PYOCD_TARGET = LPC51U68 - -# flash using pyocd (51u68 is not supported yet) -flash: flash-pyocd From f75a019732c266a5c1eede1c763389210e8bc79d Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 18:03:18 +0700 Subject: [PATCH 099/142] bsp lpc17 --- .github/workflows/build_arm.yml | 2 +- hw/bsp/lpc17/boards/lpcxpresso1769/board.mk | 8 ++++ .../boards}/lpcxpresso1769/lpc1769.ld | 0 .../boards}/lpcxpresso1769/lpcxpresso1769.c | 0 hw/bsp/lpc17/boards/mbed1768/board.mk | 9 ++++ hw/bsp/{ => lpc17/boards}/mbed1768/lpc1768.ld | 0 hw/bsp/{ => lpc17/boards}/mbed1768/mbed1768.c | 0 .../board.mk => lpc17/family.mk} | 15 +++---- hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk | 26 ----------- hw/bsp/mbed1768/board.mk | 44 ------------------- 10 files changed, 24 insertions(+), 80 deletions(-) create mode 100644 hw/bsp/lpc17/boards/lpcxpresso1769/board.mk rename hw/bsp/{ => lpc17/boards}/lpcxpresso1769/lpc1769.ld (100%) rename hw/bsp/{ => lpc17/boards}/lpcxpresso1769/lpcxpresso1769.c (100%) create mode 100644 hw/bsp/lpc17/boards/mbed1768/board.mk rename hw/bsp/{ => lpc17/boards}/mbed1768/lpc1768.ld (100%) rename hw/bsp/{ => lpc17/boards}/mbed1768/mbed1768.c (100%) rename hw/bsp/{lpcxpresso1769/board.mk => lpc17/family.mk} (82%) delete mode 100644 hw/bsp/mbed1768/board.mk diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 2b64e5410..a62d587ce 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -35,7 +35,7 @@ jobs: - 'broadcom_32bit' - 'imxrt' - 'kinetis_k32 kinetis_kl' - - 'lpc11 lpc13 lpc15 lpc18' + - 'lpc11 lpc13 lpc15 lpc17 lpc18' - 'lpc51 lpc54 lpc55' - 'mm32 msp432e4' - 'nrf' diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk b/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk new file mode 100644 index 000000000..e22c4f64b --- /dev/null +++ b/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk @@ -0,0 +1,8 @@ +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc1769.ld + +# For flash-jlink target +JLINK_DEVICE = LPC1769 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld similarity index 100% rename from hw/bsp/lpcxpresso1769/lpc1769.ld rename to hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c similarity index 100% rename from hw/bsp/lpcxpresso1769/lpcxpresso1769.c rename to hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c diff --git a/hw/bsp/lpc17/boards/mbed1768/board.mk b/hw/bsp/lpc17/boards/mbed1768/board.mk new file mode 100644 index 000000000..a982a970b --- /dev/null +++ b/hw/bsp/lpc17/boards/mbed1768/board.mk @@ -0,0 +1,9 @@ +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc1768.ld + +# For flash-jlink target +JLINK_DEVICE = LPC1768 +PYOCD_TARGET = lpc1768 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/mbed1768/lpc1768.ld b/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld similarity index 100% rename from hw/bsp/mbed1768/lpc1768.ld rename to hw/bsp/lpc17/boards/mbed1768/lpc1768.ld diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c similarity index 100% rename from hw/bsp/mbed1768/mbed1768.c rename to hw/bsp/lpc17/boards/mbed1768/mbed1768.c diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpc17/family.mk similarity index 82% rename from hw/bsp/lpcxpresso1769/board.mk rename to hw/bsp/lpc17/family.mk index d459c8b7b..af01b55a8 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpc17/family.mk @@ -1,5 +1,8 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen +MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x +include $(TOP)/$(BOARD_PATH)/board.mk + CFLAGS += \ -flto \ -mthumb \ @@ -14,10 +17,10 @@ CFLAGS += \ # lpc_types.h cause following errors CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual -MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x +# caused by freeRTOS port !! +CFLAGS += -Wno-error=maybe-uninitialized -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc1769.ld +MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x SRC_C += \ src/portable/nxp/lpc17_40/dcd_lpc17_40.c \ @@ -35,9 +38,3 @@ INC += \ # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - -# For flash-jlink target -JLINK_DEVICE = LPC1769 - -# flash using jlink -flash: flash-jlink diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk index 27b9b371f..5627cb024 100644 --- a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk @@ -4,32 +4,6 @@ CFLAGS += \ -DCPU_LPC51U68JBD64 \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/system_LPC51U68.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(MCU_DIR)/drivers/fsl_power.c \ - $(MCU_DIR)/drivers/fsl_reset.c \ - $(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \ - $(SDK_DIR)/drivers/flexcomm/fsl_usart.c - -INC += \ - $(TOP)/$(MCU_DIR)/../../CMSIS/Include \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/flexcomm \ - $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ - $(TOP)/$(SDK_DIR)/drivers/lpc_gpio - -SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S - -LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - JLINK_DEVICE = LPC51U68 PYOCD_TARGET = LPC51U68 diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk deleted file mode 100644 index 6940bbb55..000000000 --- a/hw/bsp/mbed1768/board.mk +++ /dev/null @@ -1,44 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -nostdlib \ - -DCORE_M3 \ - -D__USE_LPCOPEN \ - -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \ - -DRTC_EV_SUPPORT=0 - -# startup.c and lpc_types.h cause following errors -CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc1768.ld - -SRC_C += \ - src/portable/nxp/lpc17_40/dcd_lpc17_40.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \ - $(MCU_DIR)/src/chip_17xx_40xx.c \ - $(MCU_DIR)/src/clock_17xx_40xx.c \ - $(MCU_DIR)/src/gpio_17xx_40xx.c \ - $(MCU_DIR)/src/iocon_17xx_40xx.c \ - $(MCU_DIR)/src/sysctl_17xx_40xx.c \ - $(MCU_DIR)/src/sysinit_17xx_40xx.c \ - $(MCU_DIR)/src/uart_17xx_40xx.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - -# For flash-jlink target -JLINK_DEVICE = LPC1768 - -# flash using pyocd -flash: $(BUILD)/$(PROJECT).hex - pyocd flash -t lpc1768 $< From f58da311453b13808db775f27337345bcbdf9aba Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 18:12:03 +0700 Subject: [PATCH 100/142] clean up --- .github/workflows/build_arm.yml | 36 --------------------------------- 1 file changed, 36 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index a62d587ce..b60d12a98 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -117,42 +117,6 @@ jobs: path: | *.elf - - # --------------------------------------- - # Build all no-family (orphaned) boards - # disable this workflow since it is often failed randomly - # --------------------------------------- - build-board: - runs-on: ubuntu-latest - if: false - strategy: - fail-fast: false - matrix: - example: - # Alphabetical order, a group of 4 - - 'device/audio_test device/board_test device/cdc_dual_ports device/cdc_msc' - - 'device/cdc_msc_freertos device/dfu_runtime device/hid_composite device/hid_composite_freertos' - - 'device/hid_generic_inout device/hid_multiple_interface device/midi_test device/msc_dual_lun' - - 'device/net_lwip_webserver' - - 'device/uac2_headset device/usbtmc device/webusb_serial host/cdc_msc_hid' - - steps: - - name: Setup Python - uses: actions/setup-python@v4 - with: - python-version: '3.x' - - - name: Install ARM GCC - uses: carlosperate/arm-none-eabi-gcc-action@v1 - with: - release: '11.2-2022.02' - - - name: Checkout TinyUSB - uses: actions/checkout@v3 - - - name: Build - run: python3 tools/build_board.py ${{ matrix.example }} - # --------------------------------------- # Hardware in the loop (HIL) # Current self-hosted instance is running on an RPI4 with From 45202187864d6dce8c4bc1a3d698e90ae98b7855 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 20 Mar 2023 11:33:39 +0700 Subject: [PATCH 101/142] more compatible with IAR --- src/portable/raspberrypi/rp2040/rp2040_usb.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index 5d3d792cb..d4d29a816 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -36,8 +36,8 @@ #define __tusb_irq_path_func(x) x #endif -#define usb_hw_set ((usb_hw_t *) hw_set_alias(usb_hw)) -#define usb_hw_clear ((usb_hw_t *) hw_clear_alias(usb_hw)) +#define usb_hw_set ((usb_hw_t *) hw_set_alias_untyped(usb_hw)) +#define usb_hw_clear ((usb_hw_t *) hw_clear_alias_untyped(usb_hw)) #define pico_info(...) TU_LOG(2, __VA_ARGS__) #define pico_trace(...) TU_LOG(3, __VA_ARGS__) From e44e461ce3295f5680ea211048ade473963ba016 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 12:54:43 +0700 Subject: [PATCH 102/142] add tuh_set_interface --- src/class/cdc/cdc_host.c | 6 ++--- src/class/cdc/cdc_host.h | 2 +- src/common/tusb_common.h | 6 ----- src/common/tusb_types.h | 5 ++++ src/host/usbh.c | 50 ++++++++++++++++++++++++++++++++-------- src/host/usbh.h | 5 ++++ 6 files changed, 55 insertions(+), 19 deletions(-) diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 011ee49dc..d34662cb7 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) } } - return TU_INDEX_INVALID_8; + return TUSB_INDEX_INVALID_8; } @@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i; } - return TU_INDEX_INVALID_8; + return TUSB_INDEX_INVALID_8; } bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info) @@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer) uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - TU_ASSERT(idx != TU_INDEX_INVALID_8, ); + TU_ASSERT(idx != TUSB_INDEX_INVALID_8, ); switch(state) { diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 4090d0e9f..03f32e542 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -80,7 +80,7 @@ typedef struct } tuh_cdc_itf_info_t; // Get Interface index from device address + interface number -// return TUSB_INDEX_INVALID (0xFF) if not found +// return TUSB_INDEX_INVALID_8 (0xFF) if not found uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num); // Get Interface information diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index faccf8726..957491aa9 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,12 +75,6 @@ #include "tusb_timeout.h" // TODO remove -enum -{ - TU_INDEX_INVALID_8 = 0xFFu -}; - - //--------------------------------------------------------------------+ // Optional API implemented by application if needed // TODO move to a more ovious place/file diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d567bd482..39a2d4564 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -273,6 +273,11 @@ enum CONTROL_STAGE_ACK }; +enum +{ + TUSB_INDEX_INVALID_8 = 0xFFu +}; + //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 9ccbe7557..5a14aea5f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -195,7 +195,7 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1 // sum of end device + hub #define TOTAL_DEVICES (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB) -static uint8_t _usbh_controller = TU_INDEX_INVALID_8; +static uint8_t _usbh_controller = TUSB_INDEX_INVALID_8; // Device with address = 0 for enumeration static usbh_dev0_t _dev0; @@ -303,13 +303,13 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr) static void clear_device(usbh_device_t* dev) { tu_memclr(dev, sizeof(usbh_device_t)); - memset(dev->itf2drv, TU_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , TU_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping } bool tuh_inited(void) { - return _usbh_controller != TU_INDEX_INVALID_8; + return _usbh_controller != TUSB_INDEX_INVALID_8; } bool tuh_init(uint8_t controller_id) @@ -1033,6 +1033,38 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, return tuh_control_xfer(&xfer); } +bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) +{ + TU_LOG_USBH("Set Interface %u Alternate %u\r\n", itf_num, itf_alt); + + tusb_control_request_t const request = + { + .bmRequestType_bit = + { + .recipient = TUSB_REQ_RCPT_DEVICE, + .type = TUSB_REQ_TYPE_STANDARD, + .direction = TUSB_DIR_OUT + }, + .bRequest = TUSB_REQ_SET_INTERFACE, + .wValue = tu_htole16(itf_alt), + .wIndex = tu_htole16(itf_num), + .wLength = 0 + }; + + tuh_xfer_t xfer = + { + .daddr = daddr, + .ep_addr = 0, + .setup = &request, + .buffer = NULL, + .complete_cb = complete_cb, + .user_data = user_data + }; + + return tuh_control_xfer(&xfer); +} + //--------------------------------------------------------------------+ // Descriptor Sync //--------------------------------------------------------------------+ @@ -1358,11 +1390,11 @@ static void process_enumeration(tuh_xfer_t* xfer) dev->configured = 1; - // Start the Set Configuration process for interfaces (itf = TU_INDEX_INVALID_8) + // Start the Set Configuration process for interfaces (itf = TUSB_INDEX_INVALID_8) // Since driver can perform control transfer within its set_config, this is done asynchronously. // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete() - // TODO use separated API instead of using TU_INDEX_INVALID_8 - usbh_driver_set_config_complete(daddr, TU_INDEX_INVALID_8); + // TODO use separated API instead of using TUSB_INDEX_INVALID_8 + usbh_driver_set_config_complete(daddr, TUSB_INDEX_INVALID_8); } break; @@ -1562,7 +1594,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur uint8_t const itf_num = desc_itf->bInterfaceNumber+i; // Interface number must not be used already - TU_ASSERT( TU_INDEX_INVALID_8 == dev->itf2drv[itf_num] ); + TU_ASSERT( TUSB_INDEX_INVALID_8 == dev->itf2drv[itf_num] ); dev->itf2drv[itf_num] = drv_id; } @@ -1596,7 +1628,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) // IAD binding interface such as CDCs should return itf_num + 1 when complete // with usbh_driver_set_config_complete() uint8_t const drv_id = dev->itf2drv[itf_num]; - if (drv_id != TU_INDEX_INVALID_8) + if (drv_id != TUSB_INDEX_INVALID_8) { usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num); diff --git a/src/host/usbh.h b/src/host/usbh.h index 7942de5c2..45e6356bc 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -171,6 +171,11 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep); bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +// Set Interface (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters +bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, + tuh_xfer_cb_t complete_cb, uintptr_t user_data); + //--------------------------------------------------------------------+ // Descriptors Asynchronous (non-blocking) //--------------------------------------------------------------------+ From ccf17e3cde4c3ca42731829107ca18217aab541e Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 13:21:59 +0700 Subject: [PATCH 103/142] add -Wreturn-type --- examples/make.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/examples/make.mk b/examples/make.mk index 0a07da21c..2ce6fb398 100644 --- a/examples/make.mk +++ b/examples/make.mk @@ -150,6 +150,7 @@ GCC_CFLAGS += \ -Wnull-dereference \ -Wuninitialized \ -Wunused \ + -Wreturn-type \ -Wredundant-decls # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion From 42decd94e5de3a25fd7e7702da2f756b53a6c9f9 Mon Sep 17 00:00:00 2001 From: Mengsk Date: Tue, 21 Mar 2023 07:58:39 +0100 Subject: [PATCH 104/142] UAC2: fix feedback EP buffer alignment. --- src/class/audio/audio_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 32ba5761e..f487fe60e 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -312,7 +312,7 @@ typedef struct #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP struct { - uint32_t value; // Feedback value for asynchronous mode (in 16.16 format). + CFG_TUSB_MEM_ALIGN uint32_t value; // Feedback value for asynchronous mode (in 16.16 format). uint32_t min_value; // min value according to UAC2 FMT-2.0 section 2.3.1.1. uint32_t max_value; // max value according to UAC2 FMT-2.0 section 2.3.1.1. From 878f2b54fe208f717677cabda57180ef8a4bc3cd Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 18:12:55 +0700 Subject: [PATCH 105/142] relax hid host enumeration, allow set protocol to be stalled --- src/class/hid/hid_host.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index e5fc86267..df220d7c3 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -465,8 +465,10 @@ bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num) static void process_set_config(tuh_xfer_t* xfer) { - // Stall is a valid response for SET_IDLE, therefore we could ignore its result - if ( xfer->setup->bRequest != HID_REQ_CONTROL_SET_IDLE ) + // Stall is a valid response for SET_IDLE, sometime SET_PROTOCOL as well + // therefore we could ignore its result + if ( !(xfer->setup->bRequest == HID_REQ_CONTROL_SET_IDLE || + xfer->setup->bRequest == HID_REQ_CONTROL_SET_PROTOCOL) ) { TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS, ); } From d34508a316a2b97db749651452b8e1650e854f37 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 18:13:25 +0700 Subject: [PATCH 106/142] add note for blocking tuh_configuration_set(), tuh_interface_set() --- src/host/usbh.c | 20 ++++++++++++++++++-- src/host/usbh.h | 2 ++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/src/host/usbh.c b/src/host/usbh.c index 5a14aea5f..a3335102f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1030,7 +1030,15 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, .user_data = user_data }; - return tuh_control_xfer(&xfer); + bool ret = tuh_control_xfer(&xfer); + + // if blocking, user_data could be pointed to xfer_result + if ( !complete_cb && user_data ) + { + *((xfer_result_t*) user_data) = xfer.result; + } + + return ret; } bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, @@ -1062,7 +1070,15 @@ bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, .user_data = user_data }; - return tuh_control_xfer(&xfer); + bool ret = tuh_control_xfer(&xfer); + + // if blocking, user_data could be pointed to xfer_result + if ( !complete_cb && user_data ) + { + *((xfer_result_t*) user_data) = xfer.result; + } + + return ret; } //--------------------------------------------------------------------+ diff --git a/src/host/usbh.h b/src/host/usbh.h index 45e6356bc..125d8f4c9 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -168,11 +168,13 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep); // Set Configuration (control transfer) // config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1 // true on success, false if there is on-going control transfer or incorrect parameters +// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t* bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, tuh_xfer_cb_t complete_cb, uintptr_t user_data); // Set Interface (control transfer) // true on success, false if there is on-going control transfer or incorrect parameters +// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t* bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, tuh_xfer_cb_t complete_cb, uintptr_t user_data); From 8a0b17598c14497805addbb7c670e41c9eb5c0b7 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 18:15:45 +0700 Subject: [PATCH 107/142] add osal_task_delay() for control blocking --- src/host/usbh.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/host/usbh.c b/src/host/usbh.c index a3335102f..dc347c458 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -568,6 +568,8 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) // only need to call task if not preempted RTOS #if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO tuh_task(); + #else + osal_task_delay(1); // TODO maybe yield() #endif // TODO probably some timeout to prevent hanged From d22fc550c76f0d2c5d980a253161e95f1a853309 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 21:04:06 +0700 Subject: [PATCH 108/142] change meaning of CFG_TUH_HID to total number of HID interfaces supported. - previously CFG_TUH_HID is max number of interfaces per device which is rather limited and consume more resources than needed. - change hid host instance in API to index --- .../host_hid_to_device_cdc/src/tusb_config.h | 2 +- examples/host/cdc_msc_hid/src/tusb_config.h | 4 +- .../host/hid_controller/src/tusb_config.h | 2 +- src/class/hid/hid_host.c | 355 +++++++++--------- src/class/hid/hid_host.h | 44 ++- 5 files changed, 218 insertions(+), 189 deletions(-) diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h index f749bd712..72ec8d654 100644 --- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h +++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h @@ -132,7 +132,7 @@ // max device support (excluding hub device) #define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports -#define CFG_TUH_HID 4 +#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) #define CFG_TUH_HID_EPIN_BUFSIZE 64 #define CFG_TUH_HID_EPOUT_BUFSIZE 64 diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 4b50f2096..a0a740c6e 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -36,7 +36,7 @@ #if CFG_TUSB_MCU == OPT_MCU_RP2040 // change to 1 if using pico-pio-usb as host controller for raspberry rp2040 -#define CFG_TUH_RPI_PIO_USB 0 +#define CFG_TUH_RPI_PIO_USB 1 #define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_USB #endif @@ -97,7 +97,7 @@ #define CFG_TUH_HUB 1 // number of supported hubs #define CFG_TUH_CDC 1 -#define CFG_TUH_HID 4 // typical keyboard + mouse device can have 3-4 HID interfaces +#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h index 2e0dd0dbe..f4ddc1b81 100644 --- a/examples/host/hid_controller/src/tusb_config.h +++ b/examples/host/hid_controller/src/tusb_config.h @@ -97,7 +97,7 @@ #define CFG_TUH_HUB 0 #define CFG_TUH_CDC 0 -#define CFG_TUH_HID 4 // typical keyboard + mouse device can have 3-4 HID interfaces +#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 0 #define CFG_TUH_VENDOR 0 diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index df220d7c3..f65b2dc20 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -39,6 +39,8 @@ typedef struct { + uint8_t daddr; + uint8_t itf_num; uint8_t ep_in; uint8_t ep_out; @@ -56,74 +58,131 @@ typedef struct uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE]; } hidh_interface_t; -typedef struct -{ - uint8_t inst_count; - hidh_interface_t instances[CFG_TUH_HID]; -} hidh_device_t; - CFG_TUSB_MEM_SECTION -static hidh_device_t _hidh_dev[CFG_TUH_DEVICE_MAX]; +tu_static hidh_interface_t _hidh_itf[CFG_TUH_HID]; -//------------- Internal prototypes -------------// +//--------------------------------------------------------------------+ +// Helper +//--------------------------------------------------------------------+ -// Get HID device & interface -TU_ATTR_ALWAYS_INLINE static inline hidh_device_t* get_dev(uint8_t dev_addr); -TU_ATTR_ALWAYS_INLINE static inline hidh_interface_t* get_instance(uint8_t dev_addr, uint8_t instance); -static uint8_t get_instance_id_by_itfnum(uint8_t dev_addr, uint8_t itf); -static uint8_t get_instance_id_by_epaddr(uint8_t dev_addr, uint8_t ep_addr); +TU_ATTR_ALWAYS_INLINE static inline +hidh_interface_t* get_hid_itf(uint8_t daddr, uint8_t idx) +{ + TU_ASSERT(daddr && idx < CFG_TUH_HID, NULL); + hidh_interface_t* p_hid = &_hidh_itf[idx]; + return (p_hid->daddr == daddr) ? p_hid : NULL; +} + +// Get instance ID by endpoint address +static uint8_t get_idx_by_epaddr(uint8_t daddr, uint8_t ep_addr) +{ + for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ ) + { + hidh_interface_t const * p_hid = &_hidh_itf[idx]; + + if ( p_hid->daddr == daddr && + (p_hid->ep_in == ep_addr || p_hid->ep_out == ep_addr) ) + { + return idx; + } + } + + return TUSB_INDEX_INVALID_8; +} + +static hidh_interface_t* find_new_itf(void) +{ + for(uint8_t i=0; iinst_count; + uint8_t count = 0; + + for(uint8_t i=0; iep_in != 0) || (hid_itf->ep_out != 0); + uint8_t count = 0; + + for(uint8_t i=0; iitf_protocol; + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + return p_hid != NULL; +} + +uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num) +{ + for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ ) + { + hidh_interface_t const * p_hid = &_hidh_itf[idx]; + + if ( p_hid->daddr == daddr && p_hid->itf_num == itf_num) return idx; + } + + return TUSB_INDEX_INVALID_8; +} + +uint8_t tuh_hid_interface_protocol(uint8_t daddr, uint8_t idx) +{ + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + return p_hid ? p_hid->itf_protocol : 0; } //--------------------------------------------------------------------+ // Control Endpoint API //--------------------------------------------------------------------+ -uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance) +uint8_t tuh_hid_get_protocol(uint8_t daddr, uint8_t idx) { - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); - return hid_itf->protocol_mode; + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + return p_hid ? p_hid->protocol_mode : 0; } static void set_protocol_complete(tuh_xfer_t* xfer) { - uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); - uint8_t const daddr = xfer->daddr; - uint8_t const instance = get_instance_id_by_itfnum(daddr, itf_num); - hidh_interface_t* hid_itf = get_instance(daddr, instance); + uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); + uint8_t const daddr = xfer->daddr; + uint8_t const idx = tuh_hid_itf_get_index(daddr, itf_num); + + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid, ); if (XFER_RESULT_SUCCESS == xfer->result) { - hid_itf->protocol_mode = (uint8_t) tu_le16toh(xfer->setup->wValue); + p_hid->protocol_mode = (uint8_t) tu_le16toh(xfer->setup->wValue); } if (tuh_hid_set_protocol_complete_cb) { - tuh_hid_set_protocol_complete_cb(daddr, instance, hid_itf->protocol_mode); + tuh_hid_set_protocol_complete_cb(daddr, idx, p_hid->protocol_mode); } } - -static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data) +static bool _hidh_set_protocol(uint8_t daddr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_LOG2("HID Set Protocol = %d\r\n", protocol); @@ -143,7 +202,7 @@ static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protoc tuh_xfer_t xfer = { - .daddr = dev_addr, + .daddr = daddr, .ep_addr = 0, .setup = &request, .buffer = NULL, @@ -151,16 +210,15 @@ static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protoc .user_data = user_data }; - TU_ASSERT( tuh_control_xfer(&xfer) ); - return true; + return tuh_control_xfer(&xfer); } -bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol) +bool tuh_hid_set_protocol(uint8_t daddr, uint8_t idx, uint8_t protocol) { - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); - TU_VERIFY(hid_itf->itf_protocol != HID_ITF_PROTOCOL_NONE); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid && p_hid->itf_protocol != HID_ITF_PROTOCOL_NONE); - return _hidh_set_protocol(dev_addr, hid_itf->itf_num, protocol, set_protocol_complete, 0); + return _hidh_set_protocol(daddr, p_hid->itf_num, protocol, set_protocol_complete, 0); } static void set_report_complete(tuh_xfer_t* xfer) @@ -169,20 +227,22 @@ static void set_report_complete(tuh_xfer_t* xfer) if (tuh_hid_set_report_complete_cb) { - uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); - uint8_t const instance = get_instance_id_by_itfnum(xfer->daddr, itf_num); + uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); + uint8_t const idx = tuh_hid_itf_get_index(xfer->daddr, itf_num); uint8_t const report_type = tu_u16_high(xfer->setup->wValue); uint8_t const report_id = tu_u16_low(xfer->setup->wValue); - tuh_hid_set_report_complete_cb(xfer->daddr, instance, report_id, report_type, + tuh_hid_set_report_complete_cb(xfer->daddr, idx, report_id, report_type, (xfer->result == XFER_RESULT_SUCCESS) ? xfer->setup->wLength : 0); } } -bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len) +bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t report_type, void* report, uint16_t len) { - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid); + TU_LOG2("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len); tusb_control_request_t const request = @@ -194,14 +254,14 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, u .direction = TUSB_DIR_OUT }, .bRequest = HID_REQ_CONTROL_SET_REPORT, - .wValue = tu_u16(report_type, report_id), - .wIndex = hid_itf->itf_num, + .wValue = tu_htole16(tu_u16(report_type, report_id)), + .wIndex = tu_htole16((uint16_t)p_hid->itf_num), .wLength = len }; tuh_xfer_t xfer = { - .daddr = dev_addr, + .daddr = daddr, .ep_addr = 0, .setup = &request, .buffer = report, @@ -209,14 +269,14 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, u .user_data = 0 }; - TU_ASSERT( tuh_control_xfer(&xfer) ); - return true; + return tuh_control_xfer(&xfer); } -static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) +static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { // SET IDLE request, device can stall if not support this request TU_LOG2("HID Set Idle \r\n"); + tusb_control_request_t const request = { .bmRequestType_bit = @@ -226,14 +286,14 @@ static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate .direction = TUSB_DIR_OUT }, .bRequest = HID_REQ_CONTROL_SET_IDLE, - .wValue = idle_rate, - .wIndex = itf_num, + .wValue = tu_htole16(idle_rate), + .wIndex = tu_htole16((uint16_t)itf_num), .wLength = 0 }; tuh_xfer_t xfer = { - .daddr = dev_addr, + .daddr = daddr, .ep_addr = 0, .setup = &request, .buffer = NULL, @@ -241,25 +301,24 @@ static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate .user_data = user_data }; - TU_ASSERT( tuh_control_xfer(&xfer) ); - - return true; + return tuh_control_xfer(&xfer); } //--------------------------------------------------------------------+ // Interrupt Endpoint API //--------------------------------------------------------------------+ -bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance) +bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx) { - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid); // claim endpoint - TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_in) ); + TU_VERIFY( usbh_edpt_claim(daddr, p_hid->ep_in) ); - if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_in, hid_itf->epin_buf, hid_itf->epin_size) ) + if ( !usbh_edpt_xfer(daddr, p_hid->ep_in, p_hid->epin_buf, p_hid->epin_size) ) { - usbh_edpt_release(dev_addr, hid_itf->ep_in); + usbh_edpt_release(daddr, p_hid->ep_in); return false; } @@ -274,44 +333,45 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance) // return !usbh_edpt_busy(dev_addr, hid_itf->ep_in); //} -bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len) +bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len) { TU_LOG2("HID Send Report %d\r\n", report_id); - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid); - if (hid_itf->ep_out == 0) + if (p_hid->ep_out == 0) { // This HID does not have an out endpoint (other than control) return false; } - else if (len > CFG_TUH_HID_EPOUT_BUFSIZE - || (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1))) + else if (len > CFG_TUH_HID_EPOUT_BUFSIZE || + (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1))) { // ep_out buffer is not large enough to hold contents return false; } // claim endpoint - TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_out) ); + TU_VERIFY( usbh_edpt_claim(daddr, p_hid->ep_out) ); if (report_id == 0) { // No report ID in transmission - memcpy(&hid_itf->epout_buf[0], report, len); + memcpy(&p_hid->epout_buf[0], report, len); } else { - hid_itf->epout_buf[0] = report_id; - memcpy(&hid_itf->epout_buf[1], report, len); + p_hid->epout_buf[0] = report_id; + memcpy(&p_hid->epout_buf[1], report, len); ++len; // 1 more byte for report_id } - TU_LOG3_MEM(hid_itf->epout_buf, len, 2); + TU_LOG3_MEM(p_hid->epout_buf, len, 2); - if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_out, hid_itf->epout_buf, len) ) + if ( !usbh_edpt_xfer(daddr, p_hid->ep_out, p_hid->epout_buf, len) ) { - usbh_edpt_release(dev_addr, hid_itf->ep_out); + usbh_edpt_release(daddr, p_hid->ep_out); return false; } @@ -323,56 +383,57 @@ bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, //--------------------------------------------------------------------+ void hidh_init(void) { - tu_memclr(_hidh_dev, sizeof(_hidh_dev)); + tu_memclr(_hidh_itf, sizeof(_hidh_itf)); } -bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) +bool hidh_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) { (void) result; uint8_t const dir = tu_edpt_dir(ep_addr); - uint8_t const instance = get_instance_id_by_epaddr(dev_addr, ep_addr); - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + uint8_t const idx = get_idx_by_epaddr(daddr, ep_addr); + + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid); if ( dir == TUSB_DIR_IN ) { - TU_LOG2(" Get Report callback (%u, %u)\r\n", dev_addr, instance); - TU_LOG3_MEM(hid_itf->epin_buf, xferred_bytes, 2); - tuh_hid_report_received_cb(dev_addr, instance, hid_itf->epin_buf, (uint16_t) xferred_bytes); + TU_LOG2(" Get Report callback (%u, %u)\r\n", daddr, idx); + TU_LOG3_MEM(p_hid->epin_buf, xferred_bytes, 2); + tuh_hid_report_received_cb(daddr, idx, p_hid->epin_buf, (uint16_t) xferred_bytes); }else { - if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(dev_addr, instance, hid_itf->epout_buf, (uint16_t) xferred_bytes); + if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(daddr, idx, p_hid->epout_buf, (uint16_t) xferred_bytes); } return true; } -void hidh_close(uint8_t dev_addr) +void hidh_close(uint8_t daddr) { - TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, ); - - hidh_device_t* hid_dev = get_dev(dev_addr); - - if (tuh_hid_umount_cb) + for(uint8_t i=0; iinst_count; inst++ ) tuh_hid_umount_cb(dev_addr, inst); + hidh_interface_t* p_hid = &_hidh_itf[i]; + if (p_hid->daddr == daddr) + { + if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i); + p_hid->daddr = 0; + } } - - tu_memclr(hid_dev, sizeof(hidh_device_t)); } //--------------------------------------------------------------------+ // Enumeration //--------------------------------------------------------------------+ -bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len) +bool hidh_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *desc_itf, uint16_t max_len) { (void) rhport; (void) max_len; TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass); - TU_LOG2("[%u] HID opening Interface %u\r\n", dev_addr, desc_itf->bInterfaceNumber); + TU_LOG2("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber); // len = interface + hid + n*endpoints uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + @@ -386,12 +447,9 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de tusb_hid_descriptor_hid_t const *desc_hid = (tusb_hid_descriptor_hid_t const *) p_desc; TU_ASSERT(HID_DESC_TYPE_HID == desc_hid->bDescriptorType); - // not enough interface, try to increase CFG_TUH_HID - // TODO multiple devices - hidh_device_t* hid_dev = get_dev(dev_addr); - TU_ASSERT(hid_dev->inst_count < CFG_TUH_HID, 0); - - hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count); + hidh_interface_t* p_hid = find_new_itf(); + TU_ASSERT(p_hid); // not enough interface, try to increase CFG_TUH_HID + p_hid->daddr = daddr; //------------- Endpoint Descriptors -------------// p_desc = tu_desc_next(p_desc); @@ -400,34 +458,35 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de for(int i = 0; i < desc_itf->bNumEndpoints; i++) { TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType); - TU_ASSERT( tuh_edpt_open(dev_addr, desc_ep) ); + TU_ASSERT( tuh_edpt_open(daddr, desc_ep) ); if(tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) { - hid_itf->ep_in = desc_ep->bEndpointAddress; - hid_itf->epin_size = tu_edpt_packet_size(desc_ep); + p_hid->ep_in = desc_ep->bEndpointAddress; + p_hid->epin_size = tu_edpt_packet_size(desc_ep); } else { - hid_itf->ep_out = desc_ep->bEndpointAddress; - hid_itf->epout_size = tu_edpt_packet_size(desc_ep); + p_hid->ep_out = desc_ep->bEndpointAddress; + p_hid->epout_size = tu_edpt_packet_size(desc_ep); } p_desc = tu_desc_next(p_desc); desc_ep = (tusb_desc_endpoint_t const *) p_desc; } - hid_dev->inst_count++; - - hid_itf->itf_num = desc_itf->bInterfaceNumber; + p_hid->itf_num = desc_itf->bInterfaceNumber; // Assume bNumDescriptors = 1 - hid_itf->report_desc_type = desc_hid->bReportType; - hid_itf->report_desc_len = tu_unaligned_read16(&desc_hid->wReportLength); + p_hid->report_desc_type = desc_hid->bReportType; + p_hid->report_desc_len = tu_unaligned_read16(&desc_hid->wReportLength); // Per HID Specs: default is Report protocol, though we will force Boot protocol when set_config - hid_itf->protocol_mode = HID_PROTOCOL_BOOT; - if ( HID_SUBCLASS_BOOT == desc_itf->bInterfaceSubClass ) hid_itf->itf_protocol = desc_itf->bInterfaceProtocol; + p_hid->protocol_mode = HID_PROTOCOL_BOOT; + if ( HID_SUBCLASS_BOOT == desc_itf->bInterfaceSubClass ) + { + p_hid->itf_protocol = desc_itf->bInterfaceProtocol; + } return true; } @@ -443,16 +502,16 @@ enum { CONFIG_COMPLETE }; -static void config_driver_mount_complete(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_report, uint16_t desc_len); +static void config_driver_mount_complete(uint8_t daddr, uint8_t idx, uint8_t const* desc_report, uint16_t desc_len); static void process_set_config(tuh_xfer_t* xfer); -bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num) +bool hidh_set_config(uint8_t daddr, uint8_t itf_num) { tusb_control_request_t request; request.wIndex = tu_htole16((uint16_t) itf_num); tuh_xfer_t xfer; - xfer.daddr = dev_addr; + xfer.daddr = daddr; xfer.result = XFER_RESULT_SUCCESS; xfer.setup = &request; xfer.user_data = CONFG_SET_IDLE; @@ -477,8 +536,9 @@ static void process_set_config(tuh_xfer_t* xfer) uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const daddr = xfer->daddr; - uint8_t const instance = get_instance_id_by_itfnum(daddr, itf_num); - hidh_interface_t* hid_itf = get_instance(daddr, instance); + uint8_t const idx = tuh_hid_itf_get_index(daddr, itf_num); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid, ); switch(state) { @@ -486,27 +546,27 @@ static void process_set_config(tuh_xfer_t* xfer) { // Idle rate = 0 mean only report when there is changes const uint16_t idle_rate = 0; - const uintptr_t next_state = (hid_itf->itf_protocol != HID_ITF_PROTOCOL_NONE) ? CONFIG_SET_PROTOCOL : CONFIG_GET_REPORT_DESC; + const uintptr_t next_state = (p_hid->itf_protocol != HID_ITF_PROTOCOL_NONE) ? CONFIG_SET_PROTOCOL : CONFIG_GET_REPORT_DESC; _hidh_set_idle(daddr, itf_num, idle_rate, process_set_config, next_state); } break; case CONFIG_SET_PROTOCOL: - _hidh_set_protocol(daddr, hid_itf->itf_num, HID_PROTOCOL_BOOT, process_set_config, CONFIG_GET_REPORT_DESC); + _hidh_set_protocol(daddr, p_hid->itf_num, HID_PROTOCOL_BOOT, process_set_config, CONFIG_GET_REPORT_DESC); break; case CONFIG_GET_REPORT_DESC: // Get Report Descriptor if possible // using usbh enumeration buffer since report descriptor can be very long - if( hid_itf->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE ) + if( p_hid->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE ) { - TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", hid_itf->report_desc_len); + TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len); // Driver is mounted without report descriptor - config_driver_mount_complete(daddr, instance, NULL, 0); + config_driver_mount_complete(daddr, idx, NULL, 0); }else { - tuh_descriptor_get_hid_report(daddr, itf_num, hid_itf->report_desc_type, 0, usbh_get_enum_buf(), hid_itf->report_desc_len, process_set_config, CONFIG_COMPLETE); + tuh_descriptor_get_hid_report(daddr, itf_num, p_hid->report_desc_type, 0, usbh_get_enum_buf(), p_hid->report_desc_len, process_set_config, CONFIG_COMPLETE); } break; @@ -515,7 +575,7 @@ static void process_set_config(tuh_xfer_t* xfer) uint8_t const* desc_report = usbh_get_enum_buf(); uint16_t const desc_len = tu_le16toh(xfer->setup->wLength); - config_driver_mount_complete(daddr, instance, desc_report, desc_len); + config_driver_mount_complete(daddr, idx, desc_report, desc_len); } break; @@ -523,15 +583,16 @@ static void process_set_config(tuh_xfer_t* xfer) } } -static void config_driver_mount_complete(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_report, uint16_t desc_len) +static void config_driver_mount_complete(uint8_t daddr, uint8_t idx, uint8_t const* desc_report, uint16_t desc_len) { - hidh_interface_t* hid_itf = get_instance(dev_addr, instance); + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid, ); // enumeration is complete - tuh_hid_mount_cb(dev_addr, instance, desc_report, desc_len); + if (tuh_hid_mount_cb) tuh_hid_mount_cb(daddr, idx, desc_report, desc_len); // notify usbh that driver enumeration is complete - usbh_driver_set_config_complete(dev_addr, hid_itf->itf_num); + usbh_driver_set_config_complete(daddr, p_hid->itf_num); } //--------------------------------------------------------------------+ @@ -676,46 +737,4 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr, return report_num; } -//--------------------------------------------------------------------+ -// Helper -//--------------------------------------------------------------------+ - -// Get Device by address -TU_ATTR_ALWAYS_INLINE static inline hidh_device_t* get_dev(uint8_t dev_addr) -{ - return &_hidh_dev[dev_addr-1]; -} - -// Get Interface by instance number -TU_ATTR_ALWAYS_INLINE static inline hidh_interface_t* get_instance(uint8_t dev_addr, uint8_t instance) -{ - return &_hidh_dev[dev_addr-1].instances[instance]; -} - -// Get instance ID by interface number -static uint8_t get_instance_id_by_itfnum(uint8_t dev_addr, uint8_t itf) -{ - for ( uint8_t inst = 0; inst < CFG_TUH_HID; inst++ ) - { - hidh_interface_t *hid = get_instance(dev_addr, inst); - - if ( (hid->itf_num == itf) && (hid->ep_in || hid->ep_out) ) return inst; - } - - return 0xff; -} - -// Get instance ID by endpoint address -static uint8_t get_instance_id_by_epaddr(uint8_t dev_addr, uint8_t ep_addr) -{ - for ( uint8_t inst = 0; inst < CFG_TUH_HID; inst++ ) - { - hidh_interface_t *hid = get_instance(dev_addr, inst); - - if ( (ep_addr == hid->ep_in) || ( ep_addr == hid->ep_out) ) return inst; - } - - return 0xff; -} - #endif diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index c152e527a..f808f36d4 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -62,14 +62,24 @@ typedef struct // Interface API //--------------------------------------------------------------------+ -// Get the number of HID instances -uint8_t tuh_hid_instance_count(uint8_t dev_addr); +// Get the number of mounted HID interfaces of a device +uint8_t tuh_hid_itf_get_count(uint8_t dev_addr); -// Check if HID instance is mounted -bool tuh_hid_mounted(uint8_t dev_addr, uint8_t instance); +// Get all mounted interfaces across devices +uint8_t tuh_hid_itf_get_total_count(void); + +// backward compatible rename +#define tuh_hid_instance_count tuh_hid_itf_get_count + +// Check if HID interface is mounted +bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx); + +// Get Interface index from device address + interface number +// return TUSB_INDEX_INVALID_8 (0xFF) if not found +uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num); // Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values -uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t instance); +uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t idx); // Parse report descriptor into array of report_info struct and return number of reports. // For complicated report, application should write its own parser. @@ -82,31 +92,31 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr, // Get current protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1) // Note: Device will be initialized in Boot protocol for simplicity. // Application can use set_protocol() to switch back to Report protocol. -uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance); +uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t idx); // Set protocol to HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1) // This function is only supported by Boot interface (tuh_n_hid_interface_protocol() != NONE) -bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol); +bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t idx, uint8_t protocol); // Set Report using control endpoint // report_type is either Input, Output or Feature, (value from hid_report_type_t) -bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len); +bool tuh_hid_set_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, void* report, uint16_t len); //--------------------------------------------------------------------+ // Interrupt Endpoint API //--------------------------------------------------------------------+ // Check if the interface is ready to use -//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance); +//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t idx); // Try to receive next report on Interrupt Endpoint. Immediately return // - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available // - false if failed to queue the transfer e.g endpoint is busy -bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance); +bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t idx); // Send report using interrupt endpoint // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent. -bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len); +bool tuh_hid_send_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len); //--------------------------------------------------------------------+ // Callbacks (Weak is optional) @@ -117,24 +127,24 @@ bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, // can be used to parse common/simple enough descriptor. // Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped // therefore report_desc = NULL, desc_len = 0 -void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report_desc, uint16_t desc_len); +TU_ATTR_WEAK void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report_desc, uint16_t desc_len); // Invoked when device with hid interface is un-mounted -TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance); +TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t idx); // Invoked when received report from device via interrupt endpoint // Note: if there is report ID (composite), it is 1st byte of report -void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len); +void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report, uint16_t len); // Invoked when sent report to device successfully via interrupt endpoint -TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len); +TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report, uint16_t len); // Invoked when Sent Report to device via either control endpoint // len = 0 indicate there is error in the transfer e.g stalled response -TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, uint16_t len); +TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, uint16_t len); // Invoked when Set Protocol request is complete -TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t protocol); +TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t protocol); //--------------------------------------------------------------------+ // Internal Class Driver API From a97f39151ebdf5569ff4831902648c518821a25c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 08:33:30 +0700 Subject: [PATCH 109/142] fine tune CFG_TUH_HID value --- examples/dual/host_hid_to_device_cdc/src/tusb_config.h | 2 +- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- examples/host/hid_controller/src/tusb_config.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h index 72ec8d654..604cc6681 100644 --- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h +++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h @@ -132,7 +132,7 @@ // max device support (excluding hub device) #define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports -#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) +#define CFG_TUH_HID (3*CFG_TUH_DEVICE_MAX) #define CFG_TUH_HID_EPIN_BUFSIZE 64 #define CFG_TUH_HID_EPOUT_BUFSIZE 64 diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index a0a740c6e..6d5933bca 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -97,7 +97,7 @@ #define CFG_TUH_HUB 1 // number of supported hubs #define CFG_TUH_CDC 1 -#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces +#define CFG_TUH_HID (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h index f4ddc1b81..f5ae2fd6f 100644 --- a/examples/host/hid_controller/src/tusb_config.h +++ b/examples/host/hid_controller/src/tusb_config.h @@ -97,7 +97,7 @@ #define CFG_TUH_HUB 0 #define CFG_TUH_CDC 0 -#define CFG_TUH_HID (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces +#define CFG_TUH_HID (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 0 #define CFG_TUH_VENDOR 0 From 0921edaf5924d498e8115815dc23acfb1decb7a0 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 09:23:11 +0700 Subject: [PATCH 110/142] use tud_inited() instead of tusb_inited() --- src/device/usbd.c | 4 ++-- test/unit-test/test/device/msc/test_msc_device.c | 2 +- test/unit-test/test/device/usbd/test_usbd.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/device/usbd.c b/src/device/usbd.c index 0fb236a88..cee56af60 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -450,7 +450,7 @@ static void usbd_reset(uint8_t rhport) bool tud_task_event_ready(void) { // Skip if stack is not initialized - if ( !tusb_inited() ) return false; + if ( !tud_inited() ) return false; return !osal_queue_empty(_usbd_q); } @@ -478,7 +478,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) (void) in_isr; // not implemented yet // Skip if stack is not initialized - if ( !tusb_inited() ) return; + if ( !tud_inited() ) return; // Loop until there is no more events in the queue while (1) diff --git a/test/unit-test/test/device/msc/test_msc_device.c b/test/unit-test/test/device/msc/test_msc_device.c index c757cdcfa..a62418524 100644 --- a/test/unit-test/test/device/msc/test_msc_device.c +++ b/test/unit-test/test/device/msc/test_msc_device.c @@ -197,7 +197,7 @@ void setUp(void) dcd_int_disable_Ignore(); dcd_int_enable_Ignore(); - if ( !tusb_inited() ) + if ( !tud_inited() ) { dcd_init_Expect(rhport); tusb_init(); diff --git a/test/unit-test/test/device/usbd/test_usbd.c b/test/unit-test/test/device/usbd/test_usbd.c index dcded605a..00950c5a9 100644 --- a/test/unit-test/test/device/usbd/test_usbd.c +++ b/test/unit-test/test/device/usbd/test_usbd.c @@ -124,7 +124,7 @@ void setUp(void) dcd_int_disable_Ignore(); dcd_int_enable_Ignore(); - if ( !tusb_inited() ) + if ( !tud_inited() ) { mscd_init_Expect(); dcd_init_Expect(rhport); From f8a5cde3c7fde62c3d6bd379fea6eaa9a629ded6 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 09:23:44 +0700 Subject: [PATCH 111/142] add tuh_task_event_ready(), better implement blocking control transfer for rtos --- src/host/usbh.c | 22 +++++++++++++++------- src/host/usbh.h | 10 ++++++++++ 2 files changed, 25 insertions(+), 7 deletions(-) diff --git a/src/host/usbh.c b/src/host/usbh.c index dc347c458..3eff0830a 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -360,6 +360,14 @@ bool tuh_init(uint8_t controller_id) return true; } +bool tuh_task_event_ready(void) +{ + // Skip if stack is not initialized + if ( !tuh_inited() ) return false; + + return !osal_queue_empty(_usbh_q); +} + /* USB Host Driver task * This top level thread manages all host controller event and delegates events to class-specific drivers. * This should be called periodically within the mainloop or rtos thread. @@ -383,7 +391,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) (void) in_isr; // not implemented yet // Skip if stack is not initialized - if ( !tusb_inited() ) return; + if ( !tuh_inited() ) return; // Loop until there is no more events in the queue while (1) @@ -565,12 +573,12 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) while (result == XFER_RESULT_INVALID) { - // only need to call task if not preempted RTOS - #if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO - tuh_task(); - #else - osal_task_delay(1); // TODO maybe yield() - #endif + // Note: this can be called within an callback ie. part of tuh_task() + // therefore event with RTOS tuh_task() still need to be invoked + if (tuh_task_event_ready()) + { + tuh_task(); + } // TODO probably some timeout to prevent hanged } diff --git a/src/host/usbh.h b/src/host/usbh.h index 125d8f4c9..0f969a46a 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -69,6 +69,13 @@ struct tuh_xfer_s // uint32_t timeout_ms; // place holder, not supported yet }; +// Subject to change +typedef struct +{ + uint8_t daddr; + tusb_desc_interface_t desc; +} tuh_itf_info_t; + // ConfigID for tuh_config() enum { @@ -118,6 +125,9 @@ void tuh_task(void) tuh_task_ext(UINT32_MAX, false); } +// Check if there is pending events need processing by tuh_task() +bool tuh_task_event_ready(void); + #ifndef _TUSB_HCD_H_ extern void hcd_int_handler(uint8_t rhport); #endif From f27486e19abcc020c93c0c938c71e3692c21b9f5 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 10:00:42 +0700 Subject: [PATCH 112/142] add tuh_hid_itf_get_info() and change tuh_cdc_itf_get_info() to use new tuh_itf_info_t --- .pre-commit-config.yaml | 2 +- examples/host/cdc_msc_hid/src/cdc_app.c | 8 ++++---- src/class/cdc/cdc_host.c | 20 +++++++++++++++----- src/class/cdc/cdc_host.h | 10 +--------- src/class/hid/hid_host.c | 23 +++++++++++++++++++++++ src/class/hid/hid_host.h | 7 +++++-- tools/build_family.py | 4 ++-- tools/get_deps.py | 8 +++++++- 8 files changed, 58 insertions(+), 24 deletions(-) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 7fa6f52ee..d37c27d40 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -15,7 +15,7 @@ repos: rev: v2.2.4 hooks: - id: codespell - #args: [-w] + args: [-w] exclude: ^lib/ - repo: local diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c index b1b137e0e..7769d109e 100644 --- a/examples/host/cdc_msc_hid/src/cdc_app.c +++ b/examples/host/cdc_msc_hid/src/cdc_app.c @@ -87,10 +87,10 @@ void tuh_cdc_rx_cb(uint8_t idx) void tuh_cdc_mount_cb(uint8_t idx) { - tuh_cdc_itf_info_t itf_info = { 0 }; + tuh_itf_info_t itf_info = { 0 }; tuh_cdc_itf_get_info(idx, &itf_info); - printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.bInterfaceNumber); + printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber); #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM // CFG_TUH_CDC_LINE_CODING_ON_ENUM must be defined for line coding is set by tinyusb in enumeration @@ -106,8 +106,8 @@ void tuh_cdc_mount_cb(uint8_t idx) void tuh_cdc_umount_cb(uint8_t idx) { - tuh_cdc_itf_info_t itf_info = { 0 }; + tuh_itf_info_t itf_info = { 0 }; tuh_cdc_itf_get_info(idx, &itf_info); - printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.bInterfaceNumber); + printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber); } diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index d34662cb7..fee314823 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -127,15 +127,25 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) return TUSB_INDEX_INVALID_8; } -bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info) +bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc && info); - info->daddr = p_cdc->daddr; - info->bInterfaceNumber = p_cdc->bInterfaceNumber; - info->bInterfaceSubClass = p_cdc->bInterfaceSubClass; - info->bInterfaceProtocol = p_cdc->bInterfaceProtocol; + info->daddr = p_cdc->daddr; + + // re-construct descriptor + tusb_desc_interface_t* desc = &info->desc; + desc->bLength = sizeof(tusb_desc_interface_t); + desc->bDescriptorType = TUSB_DESC_INTERFACE; + + desc->bInterfaceNumber = p_cdc->bInterfaceNumber; + desc->bAlternateSetting = 0; + desc->bNumEndpoints = 2u + (p_cdc->ep_notif ? 1u : 0u); + desc->bInterfaceClass = TUSB_CLASS_CDC; + desc->bInterfaceSubClass = p_cdc->bInterfaceSubClass; + desc->bInterfaceProtocol = p_cdc->bInterfaceProtocol; + desc->iInterface = 0; // not used yet return true; } diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 03f32e542..a1e78f158 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -71,21 +71,13 @@ // Application API //--------------------------------------------------------------------+ -typedef struct -{ - uint8_t daddr; - uint8_t bInterfaceNumber; - uint8_t bInterfaceSubClass; - uint8_t bInterfaceProtocol; -} tuh_cdc_itf_info_t; - // Get Interface index from device address + interface number // return TUSB_INDEX_INVALID_8 (0xFF) if not found uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num); // Get Interface information // return true if index is correct and interface is currently mounted -bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info); +bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info); // Check if a interface is mounted bool tuh_cdc_mounted(uint8_t idx); diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index f65b2dc20..20373f541 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -134,6 +134,29 @@ bool tuh_hid_mounted(uint8_t daddr, uint8_t idx) return p_hid != NULL; } +bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t* info) +{ + hidh_interface_t* p_hid = get_hid_itf(daddr, idx); + TU_VERIFY(p_hid && info); + + info->daddr = daddr; + + // re-construct descriptor + tusb_desc_interface_t* desc = &info->desc; + desc->bLength = sizeof(tusb_desc_interface_t); + desc->bDescriptorType = TUSB_DESC_INTERFACE; + + desc->bInterfaceNumber = p_hid->itf_num; + desc->bAlternateSetting = 0; + desc->bNumEndpoints = (uint8_t) ((p_hid->ep_in ? 1u : 0u) + (p_hid->ep_out ? 1u : 0u)); + desc->bInterfaceClass = TUSB_CLASS_HID; + desc->bInterfaceSubClass = (p_hid->itf_protocol ? HID_SUBCLASS_BOOT : HID_SUBCLASS_NONE); + desc->bInterfaceProtocol = p_hid->itf_protocol; + desc->iInterface = 0; // not used yet + + return true; +} + uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num) { for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ ) diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index f808f36d4..c0c727e6a 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -71,8 +71,8 @@ uint8_t tuh_hid_itf_get_total_count(void); // backward compatible rename #define tuh_hid_instance_count tuh_hid_itf_get_count -// Check if HID interface is mounted -bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx); +// Get Interface information +bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t* itf_info); // Get Interface index from device address + interface number // return TUSB_INDEX_INVALID_8 (0xFF) if not found @@ -81,6 +81,9 @@ uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num); // Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t idx); +// Check if HID interface is mounted +bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx); + // Parse report descriptor into array of report_info struct and return number of reports. // For complicated report, application should write its own parser. uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr, uint8_t arr_count, uint8_t const* desc_report, uint16_t desc_len) TU_ATTR_UNUSED; diff --git a/tools/build_family.py b/tools/build_family.py index cdc099691..532938d42 100644 --- a/tools/build_family.py +++ b/tools/build_family.py @@ -34,7 +34,6 @@ def build_family(example, family, make_option): # sum all element of same index (column sum) return list(map(sum, list(zip(*result)))) - if __name__ == '__main__': # IAR CC if make_iar_option not in sys.argv: @@ -68,7 +67,8 @@ if __name__ == '__main__': print(build_separator) for family in all_families: fret = build_family(example, family, make_iar_option) - total_result = list(map(lambda x, y: x + y, total_result, fret)) + if len(fret) == len(total_result): + total_result = [total_result[i] + fret[i] for i in range(len(fret))] total_time = time.monotonic() - total_time print(build_separator) diff --git a/tools/get_deps.py b/tools/get_deps.py index 8bf56cd8d..4b81d1468 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -105,7 +105,13 @@ def get_a_dep(d): if __name__ == "__main__": status = 0 - deps = list(deps_mandatory.keys()) + sys.argv[1:] + deps = list(deps_mandatory.keys()) + # get all if executed with all as argument + if len(sys.argv) == 2 and sys.argv[1] == 'all': + deps += deps_optional + else: + deps += sys.argv[1:] + with Pool() as pool: status = sum(pool.map(get_a_dep, deps)) sys.exit(status) From c85f46c4ab8c680eb02e6a964cf3afadf2301328 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 16:59:57 +0700 Subject: [PATCH 113/142] fix bitorder in usbtmc_response_capabilities_488_t --- src/class/usbtmc/usbtmc.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h index 3c5e86d4c..1b3c3ab6d 100644 --- a/src/class/usbtmc/usbtmc.h +++ b/src/class/usbtmc/usbtmc.h @@ -277,17 +277,17 @@ typedef struct TU_ATTR_PACKED struct TU_ATTR_PACKED { - unsigned int is488_2 :1; - unsigned int supportsREN_GTL_LLO :1; - unsigned int supportsTrigger :1; + uint8_t supportsTrigger :1; + uint8_t supportsREN_GTL_LLO :1; + uint8_t is488_2 :1; } bmIntfcCapabilities488; struct TU_ATTR_PACKED { - unsigned int SCPI :1; - unsigned int SR1 :1; - unsigned int RL1 :1; - unsigned int DT1 :1; + uint8_t DT1 :1; + uint8_t RL1 :1; + uint8_t SR1 :1; + uint8_t SCPI :1; } bmDevCapabilities488; uint8_t _reserved3[8]; } usbtmc_response_capabilities_488_t; From 096da11e88cd9d4714db9590955fb7db62edb75e Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Mar 2023 17:01:04 +0700 Subject: [PATCH 114/142] more update --- src/class/usbtmc/usbtmc.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h index 1b3c3ab6d..090ab3c4a 100644 --- a/src/class/usbtmc/usbtmc.h +++ b/src/class/usbtmc/usbtmc.h @@ -262,14 +262,14 @@ typedef struct TU_ATTR_PACKED struct TU_ATTR_PACKED { - unsigned int listenOnly :1; - unsigned int talkOnly :1; - unsigned int supportsIndicatorPulse :1; + uint8_t listenOnly :1; + uint8_t talkOnly :1; + uint8_t supportsIndicatorPulse :1; } bmIntfcCapabilities; struct TU_ATTR_PACKED { - unsigned int canEndBulkInOnTermChar :1; + uint8_t canEndBulkInOnTermChar :1; } bmDevCapabilities; uint8_t _reserved2[6]; From 4274cab3950cfa30b387bab7d388b6a4b8480edb Mon Sep 17 00:00:00 2001 From: Matt Mills Date: Wed, 22 Mar 2023 07:18:27 -0600 Subject: [PATCH 115/142] Update net_device.h --- src/class/net/net_device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h index 133689deb..399916355 100644 --- a/src/class/net/net_device.h +++ b/src/class/net/net_device.h @@ -94,7 +94,7 @@ void tud_network_init_cb(void); // client must provide this: 48-bit MAC address // TODO removed later since it is not part of tinyusb stack -extern const uint8_t tud_network_mac_address[6]; +extern uint8_t tud_network_mac_address[6]; //------------- NCM -------------// From 033627ee4118b5015f1d31b88b8c4fcbad14292d Mon Sep 17 00:00:00 2001 From: Matt Mills Date: Wed, 22 Mar 2023 07:30:46 -0600 Subject: [PATCH 116/142] Remove const from tud_network_mac_address in example and test files --- examples/device/net_lwip_webserver/src/main.c | 2 +- test/fuzz/net_fuzz.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c index 88081ffe2..19a0eae9d 100644 --- a/examples/device/net_lwip_webserver/src/main.c +++ b/examples/device/net_lwip_webserver/src/main.c @@ -64,7 +64,7 @@ static struct pbuf *received_frame; /* this is used by this code, ./class/net/net_driver.c, and usb_descriptors.c */ /* ideally speaking, this should be generated from the hardware's unique ID (if available) */ /* it is suggested that the first byte is 0x02 to indicate a link-local address */ -const uint8_t tud_network_mac_address[6] = {0x02,0x02,0x84,0x6A,0x96,0x00}; +uint8_t tud_network_mac_address[6] = {0x02,0x02,0x84,0x6A,0x96,0x00}; /* network parameters of this MCU */ static const ip4_addr_t ipaddr = INIT_IP4(192, 168, 7, 1); diff --git a/test/fuzz/net_fuzz.cc b/test/fuzz/net_fuzz.cc index 3158e74ef..63cd1ac98 100644 --- a/test/fuzz/net_fuzz.cc +++ b/test/fuzz/net_fuzz.cc @@ -67,7 +67,7 @@ void tud_network_init_cb(void) { // client must provide this: 48-bit MAC address // TODO removed later since it is not part of tinyusb stack -const uint8_t tud_network_mac_address[6] = {0}; +uint8_t tud_network_mac_address[6] = {0}; //------------- NCM -------------// From 4cee79af274c999b885b05c79ab1082c01dcc25a Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 23 Mar 2023 13:08:09 +0700 Subject: [PATCH 117/142] rename and change default pio usb pin to adafruit feather usb host --- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- hw/bsp/rp2040/board.h | 25 ++++++++++++++++----- hw/bsp/rp2040/family.c | 8 +++---- 3 files changed, 24 insertions(+), 11 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 6d5933bca..6c5e68a87 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -36,7 +36,7 @@ #if CFG_TUSB_MCU == OPT_MCU_RP2040 // change to 1 if using pico-pio-usb as host controller for raspberry rp2040 -#define CFG_TUH_RPI_PIO_USB 1 +#define CFG_TUH_RPI_PIO_USB 0 #define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_USB #endif diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h index 1eeeaf9af..ccad00c4a 100644 --- a/hw/bsp/rp2040/board.h +++ b/hw/bsp/rp2040/board.h @@ -31,6 +31,7 @@ extern "C" { #endif +// LED #ifdef PICO_DEFAULT_LED_PIN #define LED_PIN PICO_DEFAULT_LED_PIN #define LED_STATE_ON (!(PICO_DEFAULT_LED_PIN_INVERTED)) @@ -40,6 +41,7 @@ #define BUTTON_BOOTSEL #define BUTTON_STATE_ACTIVE 0 +// UART #if defined(PICO_DEFAULT_UART_TX_PIN) && defined(PICO_DEFAULT_UART_RX_PIN) && \ defined(PICO_DEFAULT_UART) && defined(LIB_PICO_STDIO_UART) #define UART_DEV PICO_DEFAULT_UART @@ -47,16 +49,27 @@ #define UART_RX_PIN PICO_DEFAULT_UART_RX_PIN #endif -// PIO_USB_DP_PIN_DEFAULT is 0, which conflict with UART, change to other pin -#ifndef PIO_USB_DP_PIN -#define PIO_USB_DP_PIN 20 +// PIO_USB + +// #define USE_ADAFRUIT_RP2040_TESTER +#ifdef USE_ADAFRUIT_RP2040_TESTER +#define PICO_DEFAULT_PIO_USB_DP_PIN 20 +#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN 22 +#endif + +// following default to pin on Adafruit Feather rp2040 USB Host +#ifndef PICO_DEFAULT_PIO_USB_DP_PIN +#define PICO_DEFAULT_PIO_USB_DP_PIN 16 #endif // VBUS enable pin and its active state -#define PIO_USB_VBUSEN_PIN 22 +#ifndef PICO_DEFAULT_PIO_USB_VBUSEN_PIN +#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN 18 +#endif -#ifndef PIO_USB_VBUSEN_STATE -#define PIO_USB_VBUSEN_STATE 1 +// VBUS enable state +#ifndef PICO_DEFAULT_PIO_USB_VBUSEN_STATE +#define PICO_DEFAULT_PIO_USB_VBUSEN_STATE 1 #endif #ifdef __cplusplus diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index f9fa88ac4..920869585 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -126,15 +126,15 @@ void board_init(void) set_sys_clock_khz(120000, true); #ifdef PIO_USB_VBUSEN_PIN - gpio_init(PIO_USB_VBUSEN_PIN); - gpio_set_dir(PIO_USB_VBUSEN_PIN, GPIO_OUT); - gpio_put(PIO_USB_VBUSEN_PIN, PIO_USB_VBUSEN_STATE); + gpio_init(PICO_DEFAULT_PIO_USB_VBUSEN_PIN); + gpio_set_dir(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, GPIO_OUT); + gpio_put(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, PIO_USB_VBUSEN_STATE); #endif // rp2040 use pico-pio-usb for host tuh_configure() can be used to passed pio configuration to the host stack // Note: tuh_configure() must be called before tuh_init() pio_usb_configuration_t pio_cfg = PIO_USB_DEFAULT_CONFIG; - pio_cfg.pin_dp = PIO_USB_DP_PIN; + pio_cfg.pin_dp = PICO_DEFAULT_PIO_USB_DP_PIN; tuh_configure(BOARD_TUH_RHPORT, TUH_CFGID_RPI_PIO_USB_CONFIGURATION, &pio_cfg); #endif From f80d11301ea03746d86dd64c651b31bd600772f7 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 23 Mar 2023 16:33:35 +0700 Subject: [PATCH 118/142] update doc and generate deps list --- README.rst | 2 + docs/reference/dependencies.rst | 64 ++++++++++++++++++++++++++++++ docs/reference/getting_started.rst | 22 +++++----- docs/reference/index.rst | 1 + tools/gen_doc.py | 33 +++++++++++++++ 5 files changed, 109 insertions(+), 13 deletions(-) create mode 100644 docs/reference/dependencies.rst create mode 100644 tools/gen_doc.py diff --git a/README.rst b/README.rst index adca22433..ef441a596 100644 --- a/README.rst +++ b/README.rst @@ -112,6 +112,7 @@ Docs - `Supported Devices`_ - `Getting Started`_ + - `Dependencies`_ - `Concurrency`_ - `Contributing`_ @@ -146,6 +147,7 @@ in your project. .. _Reference: docs/reference/index.rst .. _Supported Devices: docs/reference/supported.rst .. _Getting Started: docs/reference/getting_started.rst +.. _Dependencies: docs/reference/dependencies.rst .. _Concurrency: docs/reference/concurrency.rst .. _Contributing: docs/contributing/index.rst .. _Code of Conduct: CODE_OF_CONDUCT.rst diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst new file mode 100644 index 000000000..130527e2c --- /dev/null +++ b/docs/reference/dependencies.rst @@ -0,0 +1,64 @@ +************ +Dependencies +************ + +MCU low-level peripheral driver and external libraries for building TinyUSB examples + +======================================== ============================================================== ======================================== +Path Project Commit +======================================== ============================================================== ======================================== +hw/mcu/allwinner https://github.com/hathach/allwinner_driver.git 8e5e89e8e132c0fd90e72d5422e5d3d68232b756 +hw/mcu/bridgetek/ft9xx/ft90x-sdk https://github.com/BRTSG-FOSS/ft90x-sdk.git 91060164afe239fcb394122e8bf9eb24d3194eb1 +hw/mcu/broadcom https://github.com/adafruit/broadcom-peripherals.git 08370086080759ed54ac1136d62d2ad24c6fa267 +hw/mcu/gd/nuclei-sdk https://github.com/Nuclei-Software/nuclei-sdk.git 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7 +hw/mcu/infineon/mtb-xmclib-cat3 https://github.com/Infineon/mtb-xmclib-cat3.git daf5500d03cba23e68c2f241c30af79cd9d63880 +hw/mcu/microchip https://github.com/hathach/microchip_driver.git 9e8b37e307d8404033bb881623a113931e1edf27 +hw/mcu/mindmotion/mm32sdk https://github.com/hathach/mm32sdk.git 0b79559eb411149d36e073c1635c620e576308d4 +hw/mcu/nordic/nrfx https://github.com/NordicSemiconductor/nrfx.git 281cc2e178fd9a470d844b3afdea9eb322a0b0e8 +hw/mcu/nuvoton https://github.com/majbthrd/nuc_driver.git 2204191ec76283371419fbcec207da02e1bc22fa +hw/mcu/nxp/lpcopen https://github.com/hathach/nxp_lpcopen.git 43c45c85405a5dd114fff0ea95cca62837740c13 +hw/mcu/nxp/mcux-sdk https://github.com/NXPmicro/mcux-sdk.git ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294 +hw/mcu/nxp/nxp_sdk https://github.com/hathach/nxp_sdk.git 845c8fc49b6fb660f06a5c45225494eacb06f00c +hw/mcu/raspberry_pi/Pico-PIO-USB https://github.com/sekigon-gonnoc/Pico-PIO-USB.git c3715ce94b6f6391856de56081d4d9b3e98fa93d +hw/mcu/renesas/fsp https://github.com/renesas/fsp.git 8dc14709f2a6518b43f71efad70d900b7718d9f1 +hw/mcu/renesas/rx https://github.com/kkitayam/rx_device.git 706b4e0cf485605c32351e2f90f5698267996023 +hw/mcu/silabs/cmsis-dfp-efm32gg12b https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git f1c31b7887669cb230b3ea63f9b56769078960bc +hw/mcu/sony/cxd56/spresense-exported-sdk https://github.com/sonydevworld/spresense-exported-sdk.git 2ec2a1538362696118dc3fdf56f33dacaf8f4067 +hw/mcu/st/cmsis_device_f0 https://github.com/STMicroelectronics/cmsis_device_f0.git 2fc25ee22264bc27034358be0bd400b893ef837e +hw/mcu/st/cmsis_device_f1 https://github.com/STMicroelectronics/cmsis_device_f1.git 6601104a6397299b7304fd5bcd9a491f56cb23a6 +hw/mcu/st/cmsis_device_f2 https://github.com/STMicroelectronics/cmsis_device_f2.git 182fcb3681ce116816feb41b7764f1b019ce796f +hw/mcu/st/cmsis_device_f3 https://github.com/STMicroelectronics/cmsis_device_f3.git 5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b +hw/mcu/st/cmsis_device_f4 https://github.com/STMicroelectronics/cmsis_device_f4.git 2615e866fa48fe1ff1af9e31c348813f2b19e7ec +hw/mcu/st/cmsis_device_f7 https://github.com/STMicroelectronics/cmsis_device_f7.git fc676ef1ad177eb874eaa06444d3d75395fc51f4 +hw/mcu/st/cmsis_device_g0 https://github.com/STMicroelectronics/cmsis_device_g0.git 08258b28ee95f50cb9624d152a1cbf084be1f9a5 +hw/mcu/st/cmsis_device_g4 https://github.com/STMicroelectronics/cmsis_device_g4.git ce822adb1dc552b3aedd13621edbc7fdae124878 +hw/mcu/st/cmsis_device_h7 https://github.com/STMicroelectronics/cmsis_device_h7.git 60dc2c913203dc8629dc233d4384dcc41c91e77f +hw/mcu/st/cmsis_device_l0 https://github.com/STMicroelectronics/cmsis_device_l0.git 06748ca1f93827befdb8b794402320d94d02004f +hw/mcu/st/cmsis_device_l1 https://github.com/STMicroelectronics/cmsis_device_l1.git 7f16ec0a1c4c063f84160b4cc6bf88ad554a823e +hw/mcu/st/cmsis_device_l4 https://github.com/STMicroelectronics/cmsis_device_l4.git 6ca7312fa6a5a460b5a5a63d66da527fdd8359a6 +hw/mcu/st/cmsis_device_l5 https://github.com/STMicroelectronics/cmsis_device_l5.git d922865fc0326a102c26211c44b8e42f52c1e53d +hw/mcu/st/cmsis_device_u5 https://github.com/STMicroelectronics/cmsis_device_u5.git bc00f3c9d8a4e25220f84c26d414902cc6bdf566 +hw/mcu/st/cmsis_device_wb https://github.com/STMicroelectronics/cmsis_device_wb.git 9c5d1920dd9fabbe2548e10561d63db829bb744f +hw/mcu/st/stm32f0xx_hal_driver https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git 0e95cd88657030f640a11e690a8a5186c7712ea5 +hw/mcu/st/stm32f1xx_hal_driver https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git 1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29 +hw/mcu/st/stm32f2xx_hal_driver https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git c75ace9b908a9aca631193ebf2466963b8ea33d0 +hw/mcu/st/stm32f3xx_hal_driver https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git 1761b6207318ede021706e75aae78f452d72b6fa +hw/mcu/st/stm32f4xx_hal_driver https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git 04e99fbdabd00ab8f370f377c66b0a4570365b58 +hw/mcu/st/stm32f7xx_hal_driver https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git f7ffdf6bf72110e58b42c632b0a051df5997e4ee +hw/mcu/st/stm32g0xx_hal_driver https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git 5b53e6cee664a82b16c86491aa0060e2110c00cb +hw/mcu/st/stm32g4xx_hal_driver https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git 8b4518417706d42eef5c14e56a650005abf478a8 +hw/mcu/st/stm32h7xx_hal_driver https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04 +hw/mcu/st/stm32l0xx_hal_driver https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b +hw/mcu/st/stm32l1xx_hal_driver https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git 44efc446fa69ed8344e7fd966e68ed11043b35d9 +hw/mcu/st/stm32l4xx_hal_driver https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git aee3d5bf283ae5df87532b781bdd01b7caf256fc +hw/mcu/st/stm32l5xx_hal_driver https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git 675c32a75df37f39d50d61f51cb0dcf53f07e1cb +hw/mcu/st/stm32u5xx_hal_driver https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git 2e1d4cdb386e33391cb261dfff4fefa92e4aa35a +hw/mcu/st/stm32wbxx_hal_driver https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git 2c5f06638be516c1b772f768456ba637f077bac8 +hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 +hw/mcu/wch/ch32v307 https://github.com/openwch/ch32v307.git 17761f5cf9dbbf2dcf665b7c04934188add20082 +lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f +lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git def7d2df2b0506d3d249334974f51e427c17a41c +lib/lwip https://github.com/lwip-tcpip/lwip.git 159e31b689577dbf69cf0683bbaffbd71fa5ee10 +lib/sct_neopixel https://github.com/gsteiert/sct_neopixel.git e73e04ca63495672d955f9268e003cffe168fcd8 +tools/uf2 https://github.com/microsoft/uf2.git 19615407727073e36d81bf239c52108ba92e7660 +======================================== ============================================================== ======================================== diff --git a/docs/reference/getting_started.rst b/docs/reference/getting_started.rst index ef4a6ba61..1f41cb888 100644 --- a/docs/reference/getting_started.rst +++ b/docs/reference/getting_started.rst @@ -44,12 +44,6 @@ For your convenience, TinyUSB contains a handful of examples for both host and d $ git clone https://github.com/hathach/tinyusb tinyusb $ cd tinyusb -Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them - -.. code-block:: - - $ git submodule update --init lib - Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. Build @@ -61,23 +55,25 @@ To build example, first change directory to an example folder. $ cd examples/device/cdc_msc -Before building, we need to download MCU driver submodule to provide low-level MCU peripheral's driver first. Run the ``get-deps`` target in one of the example folder as follow. You only need to do this once per mcu +Before building, we firstly need to download dependencies such as: MCU low-level peripheral driver and external libraries e.g FreeRTOS (required by some examples). Run the ``get-deps`` target in one of the example folder as follow. You only need to do this once per mcu. Check out `complete list of dependencies and their designated path here `_ .. code-block:: - $ make BOARD=feather_nrf52840_express get-deps - - -Some modules (e.g. RP2040 and ESP32s2) require the project makefiles to be customized using CMake. If necessary apply any setup steps for the platform's SDK. + $ make BOARD=raspberry_pi_pico get-deps Then compile with ``make BOARD=[board_name] all``\ , for example .. code-block:: - $ make BOARD=feather_nrf52840_express all + $ make BOARD=raspberry_pi_pico all Note: ``BOARD`` can be found as directory name in ``hw/bsp``\ , either in its family/boards or directly under bsp (no family). -Note: some examples especially those that uses Vendor class (e.g webUSB) may requires udev permission on Linux (and/or macOS) to access usb device. It depends on your OS distro, typically copy ``/examples/device/99-tinyusb.rules`` file to /etc/udev/rules.d/ then run ``sudo udevadm control --reload-rules && sudo udevadm trigger`` is good enough. +Note: some examples especially those that uses Vendor class (e.g webUSB) may requires udev permission on Linux (and/or macOS) to access usb device. It depends on your OS distro, typically copy ``99-tinyusb.rules`` and reload your udev is good to go + +.. code-block:: + + $ cp examples/device/99-tinyusb.rules /etc/udev/rules.d/ + $ sudo udevadm control --reload-rules && sudo udevadm trigger Port Selection ~~~~~~~~~~~~~~ diff --git a/docs/reference/index.rst b/docs/reference/index.rst index 292fb1a93..a9663ee7d 100644 --- a/docs/reference/index.rst +++ b/docs/reference/index.rst @@ -56,4 +56,5 @@ Index supported getting_started + dependencies concurrency diff --git a/tools/gen_doc.py b/tools/gen_doc.py new file mode 100644 index 000000000..db11e2cfb --- /dev/null +++ b/tools/gen_doc.py @@ -0,0 +1,33 @@ +import pandas as pd +from tabulate import tabulate +from pathlib import Path +from get_deps import deps_all + +# TOP is tinyusb root dir +TOP = Path(__file__).parent.parent.resolve() + +########################################### +# Dependencies +########################################### +def gen_deps_doc(): + deps_rst = Path(TOP) / "docs/reference/dependencies.rst" + df = pd.DataFrame.from_dict(deps_all, orient='index', columns=['Commit', 'Project']) + df = df[['Project', 'Commit']].sort_index() + df = df.rename_axis("Path") + + outstr = f"""\ +************ +Dependencies +************ + +MCU low-level peripheral driver and external libraries for building TinyUSB examples + +{tabulate(df, headers="keys", tablefmt='rst')} +""" + + with deps_rst.open('w') as f: + f.write(outstr) + + +if __name__ == "__main__": + gen_deps_doc() From 71fb6469d4997347f2014daa41839391cc070a74 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Mar 2023 14:02:09 +0700 Subject: [PATCH 119/142] separate CFG_TUSB_MEM_SECTION and CFG_TUSB_MEM_ALIGN to - CFG_TUD_MEM_SECTION and CFG_TUD_MEM_ALIGN - CFG_TUH_MEM_SECTION and CFG_TUH_MEM_ALIGN - fix missing mem section and align for host --- hw/bsp/ea4088qs/board.mk | 3 ++- src/class/cdc/cdc_host.c | 6 ++--- src/class/cdc/cdc_rndis_host.c | 4 ++-- src/class/hid/hid_host.c | 6 ++--- src/class/msc/msc_host.c | 8 +++---- src/host/hub.c | 8 +++---- src/host/usbh.c | 8 +++---- src/portable/ehci/ehci.c | 2 +- src/portable/nxp/khci/hcd_khci.c | 4 ++-- src/portable/ohci/ohci.c | 2 +- src/tusb_option.h | 40 +++++++++++++++++++++++++++++++- tools/build_utils.py | 2 +- tools/gen_doc.py | 2 ++ 13 files changed, 68 insertions(+), 27 deletions(-) diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk index 376840fb1..e1e14b717 100644 --- a/hw/bsp/ea4088qs/board.mk +++ b/hw/bsp/ea4088qs/board.mk @@ -10,7 +10,8 @@ CFLAGS += \ -nostdlib \ -DCORE_M4 \ -D__USE_LPCOPEN \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ + -DCFG_TUD_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ + -DCFG_TUH_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ -DCFG_TUSB_MCU=OPT_MCU_LPC40XX # mcu driver cause following warnings diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index fee314823..734ddd1b8 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -62,10 +62,10 @@ typedef struct { tu_edpt_stream_t rx; uint8_t tx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE]; - CFG_TUSB_MEM_ALIGN uint8_t tx_ep_buf[CFG_TUH_CDC_TX_EPSIZE]; + CFG_TUH_MEM_ALIGN uint8_t tx_ep_buf[CFG_TUH_CDC_TX_EPSIZE]; uint8_t rx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE]; - CFG_TUSB_MEM_ALIGN uint8_t rx_ep_buf[CFG_TUH_CDC_TX_EPSIZE]; + CFG_TUH_MEM_ALIGN uint8_t rx_ep_buf[CFG_TUH_CDC_TX_EPSIZE]; } stream; } cdch_interface_t; @@ -74,7 +74,7 @@ typedef struct { // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION +CFG_TUH_MEM_SECTION static cdch_interface_t cdch_data[CFG_TUH_CDC]; static inline cdch_interface_t* get_itf(uint8_t idx) diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index 41d21bbad..11a5355aa 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -50,8 +50,8 @@ //--------------------------------------------------------------------+ #define RNDIS_MSG_PAYLOAD_MAX (1024*4) -CFG_TUSB_MEM_SECTION static uint8_t msg_notification[CFG_TUH_DEVICE_MAX][8]; -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX]; +CFG_TUH_MEM_SECTION static uint8_t msg_notification[CFG_TUH_DEVICE_MAX][8]; +CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX]; static rndish_data_t rndish_data[CFG_TUH_DEVICE_MAX]; diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 20373f541..a0032aeba 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -54,11 +54,11 @@ typedef struct uint16_t epin_size; uint16_t epout_size; - uint8_t epin_buf[CFG_TUH_HID_EPIN_BUFSIZE]; - uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE]; + CFG_TUH_MEM_ALIGN uint8_t epin_buf[CFG_TUH_HID_EPIN_BUFSIZE]; + CFG_TUH_MEM_ALIGN uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE]; } hidh_interface_t; -CFG_TUSB_MEM_SECTION +CFG_TUH_MEM_SECTION tu_static hidh_interface_t _hidh_itf[CFG_TUH_HID]; //--------------------------------------------------------------------+ diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 2fddeb818..1b48813ec 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -71,15 +71,15 @@ typedef struct tuh_msc_complete_cb_t complete_cb; uintptr_t complete_arg; - msc_cbw_t cbw; - msc_csw_t csw; + CFG_TUH_MEM_ALIGN msc_cbw_t cbw; + CFG_TUH_MEM_ALIGN msc_csw_t csw; }msch_interface_t; -CFG_TUSB_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX]; +CFG_TUH_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX]; // buffer used to read scsi information when mounted // largest response data currently is inquiry TODO Inquiry is not part of enum anymore -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) +CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)]; TU_ATTR_ALWAYS_INLINE diff --git a/src/host/hub.c b/src/host/hub.c index b84042fb6..386ad6aae 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -43,12 +43,12 @@ typedef struct uint8_t port_count; uint8_t status_change; // data from status change interrupt endpoint - hub_port_status_response_t port_status; - hub_status_response_t hub_status; + CFG_TUH_MEM_ALIGN hub_port_status_response_t port_status; + CFG_TUH_MEM_ALIGN hub_status_response_t hub_status; } hub_interface_t; -CFG_TUSB_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_HUB]; -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)]; +CFG_TUH_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_HUB]; +CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)]; TU_ATTR_ALWAYS_INLINE static inline hub_interface_t* get_itf(uint8_t dev_addr) diff --git a/src/host/usbh.c b/src/host/usbh.c index 3eff0830a..3be662c63 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -203,7 +203,7 @@ static usbh_dev0_t _dev0; // all devices excluding zero-address // hub address start from CFG_TUH_DEVICE_MAX+1 // TODO: hub can has its own simpler struct to save memory -CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[TOTAL_DEVICES]; +static usbh_device_t _usbh_devices[TOTAL_DEVICES]; // Mutex for claiming endpoint #if OSAL_MUTEX_REQUIRED @@ -218,15 +218,15 @@ CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[TOTAL_DEVICES]; OSAL_QUEUE_DEF(usbh_int_set, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t); static osal_queue_t _usbh_q; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN +CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t _usbh_ctrl_buf[CFG_TUH_ENUMERATION_BUFSIZE]; // Control transfers: since most controllers do not support multiple control transfers // on multiple devices concurrently and control transfers are not used much except for // enumeration, we will only execute control transfers one at a time. -CFG_TUSB_MEM_SECTION struct +CFG_TUH_MEM_SECTION struct { - tusb_control_request_t request TU_ATTR_ALIGNED(4); + CFG_TUH_MEM_ALIGN tusb_control_request_t request; uint8_t* buffer; tuh_xfer_cb_t complete_cb; uintptr_t user_data; diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index ee9dfb11f..9951aa5da 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -85,7 +85,7 @@ typedef struct }ehci_data_t; // Periodic frame list must be 4K alignment -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; +CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; //--------------------------------------------------------------------+ // PROTOTYPE diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 6d25cd862..f6029ee0d 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -137,8 +137,8 @@ typedef struct // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ // BDT(Buffer Descriptor Table) must be 256-byte aligned -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static hcd_data_t _hcd; -//CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[1024]; +CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(512) static hcd_data_t _hcd; +//CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[1024]; int find_pipe(uint8_t dev_addr, uint8_t ep_addr) { diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 260804d3d..3f702d22c 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -145,7 +145,7 @@ enum { //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data; +CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data; static ohci_ed_t * const p_ed_head[] = { diff --git a/src/tusb_option.h b/src/tusb_option.h index c679f2f12..f8ac722f4 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -289,12 +289,15 @@ #define CFG_TUSB_DEBUG 0 #endif -// place data in accessible RAM for usb controller +// TODO MEM_SECTION can be different for host and device controller +// should use CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION #ifndef CFG_TUSB_MEM_SECTION #define CFG_TUSB_MEM_SECTION #endif // alignment requirement of buffer used for endpoint transferring +// TODO MEM_ALIGN can be different for host and device controller +// should use CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN #define CFG_TUSB_MEM_ALIGN TU_ATTR_ALIGNED(4) #endif @@ -312,6 +315,26 @@ // Device Options (Default) //-------------------------------------------------------------------- +// Attribute to place data in accessible RAM for device controller +// default to CFG_TUSB_MEM_SECTION for backward-compatible +#ifndef CFG_TUD_MEM_SECTION + #ifdef CFG_TUSB_MEM_SECTION + #define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION + #else + #define CFG_TUD_MEM_SECTION + #endif +#endif + +// Attribute to align memory for device controller +// default to CFG_TUSB_MEM_ALIGN for backward-compatible +#ifndef CFG_TUD_MEM_ALIGN + #ifdef CFG_TUSB_MEM_ALIGN + #define CFG_TUD_MEM_ALIGN CFG_TUSB_MEM_ALIGN + #else + #define CFG_TUD_MEM_ALIGN TU_ATTR_ALIGNED(4) + #endif +#endif + #ifndef CFG_TUD_ENDPOINT0_SIZE #define CFG_TUD_ENDPOINT0_SIZE 64 #endif @@ -390,6 +413,21 @@ #endif #endif // CFG_TUH_ENABLED +// Attribute to place data in accessible RAM for host controller +// default to CFG_TUSB_MEM_SECTION for backward-compatible +#ifndef CFG_TUH_MEM_SECTION + #ifdef CFG_TUSB_MEM_SECTION + #define CFG_TUH_MEM_SECTION CFG_TUSB_MEM_SECTION + #else + #define CFG_TUH_MEM_SECTION + #endif +#endif + +// Attribute to align memory for host controller +#ifndef CFG_TUH_MEM_ALIGN + #define CFG_TUH_MEM_ALIGN TU_ATTR_ALIGNED(4) +#endif + //------------- CLASS -------------// #ifndef CFG_TUH_HUB diff --git a/tools/build_utils.py b/tools/build_utils.py index d0ef52717..905d06a86 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -93,7 +93,7 @@ def build_example(example, board, make_option): ret[2] = 1 print(build_format.format(example, board, status, '-', flash_size, sram_size)) else: - subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + #subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) build_result = subprocess.run(make_cmd + " all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) if build_result.returncode == 0: diff --git a/tools/gen_doc.py b/tools/gen_doc.py index db11e2cfb..9078299cc 100644 --- a/tools/gen_doc.py +++ b/tools/gen_doc.py @@ -6,9 +6,11 @@ from get_deps import deps_all # TOP is tinyusb root dir TOP = Path(__file__).parent.parent.resolve() + ########################################### # Dependencies ########################################### + def gen_deps_doc(): deps_rst = Path(TOP) / "docs/reference/dependencies.rst" df = pd.DataFrame.from_dict(deps_all, orient='index', columns=['Commit', 'Project']) From 76dae8d8c1764e94c99effe5d3f4f9b0ec0d4c99 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Mar 2023 14:08:57 +0700 Subject: [PATCH 120/142] update host example to use new tuh mem macros --- .../host_hid_to_device_cdc/src/tusb_config.h | 16 ++++++++++++---- examples/host/bare_api/src/tusb_config.h | 8 ++++---- examples/host/cdc_msc_hid/src/tusb_config.h | 8 ++++---- examples/host/hid_controller/src/tusb_config.h | 8 ++++---- .../host/msc_file_explorer/src/tusb_config.h | 8 ++++---- 5 files changed, 28 insertions(+), 20 deletions(-) diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h index 604cc6681..2185cd1f1 100644 --- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h +++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h @@ -95,12 +95,12 @@ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION +#ifndef CFG_TUD_MEM_SECTION +#define CFG_TUD_MEM_SECTION #endif -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#ifndef CFG_TUD_MEM_ALIGN +#define CFG_TUD_MEM_ALIGN __attribute__ ((aligned(4))) #endif //-------------------------------------------------------------------- @@ -128,6 +128,14 @@ // Size of buffer to hold descriptors and other data used for enumeration #define CFG_TUH_ENUMERATION_BUFSIZE 256 +#ifndef CFG_TUH_MEM_SECTION +#define CFG_TUH_MEM_SECTION +#endif + +#ifndef CFG_TUH_MEM_ALIGN +#define CFG_TUH_MEM_ALIGN __attribute__ ((aligned(4))) +#endif + #define CFG_TUH_HUB 1 // max device support (excluding hub device) #define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h index 64be41a4e..ede9618d3 100644 --- a/examples/host/bare_api/src/tusb_config.h +++ b/examples/host/bare_api/src/tusb_config.h @@ -80,12 +80,12 @@ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION +#ifndef CFG_TUH_MEM_SECTION +#define CFG_TUH_MEM_SECTION #endif -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#ifndef CFG_TUH_MEM_ALIGN +#define CFG_TUH_MEM_ALIGN __attribute__ ((aligned(4))) #endif //-------------------------------------------------------------------- diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 6c5e68a87..1152e4910 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -80,12 +80,12 @@ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION +#ifndef CFG_TUH_MEM_SECTION +#define CFG_TUH_MEM_SECTION #endif -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#ifndef CFG_TUH_MEM_ALIGN +#define CFG_TUH_MEM_ALIGN __attribute__ ((aligned(4))) #endif //-------------------------------------------------------------------- diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h index f5ae2fd6f..d37fc02d2 100644 --- a/examples/host/hid_controller/src/tusb_config.h +++ b/examples/host/hid_controller/src/tusb_config.h @@ -80,12 +80,12 @@ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION +#ifndef CFG_TUH_MEM_SECTION +#define CFG_TUH_MEM_SECTION #endif -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#ifndef CFG_TUH_MEM_ALIGN +#define CFG_TUH_MEM_ALIGN __attribute__ ((aligned(4))) #endif //-------------------------------------------------------------------- diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h index eaf3ea6d4..1e0d067bf 100644 --- a/examples/host/msc_file_explorer/src/tusb_config.h +++ b/examples/host/msc_file_explorer/src/tusb_config.h @@ -80,12 +80,12 @@ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION +#ifndef CFG_TUH_MEM_SECTION +#define CFG_TUH_MEM_SECTION #endif -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#ifndef CFG_TUH_MEM_ALIGN +#define CFG_TUH_MEM_ALIGN __attribute__ ((aligned(4))) #endif //-------------------------------------------------------------------- From b05422978004f076de665f5101e5cc1bac34175c Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Mar 2023 17:26:30 +0700 Subject: [PATCH 121/142] fix cdc host enumeration issue when device does not support line request --- src/class/cdc/cdc_host.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 734ddd1b8..08b82416d 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -323,7 +323,8 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c .user_data = user_data }; - return tuh_control_xfer(&xfer); + TU_ASSERT(tuh_control_xfer(&xfer)); + return true; } bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) @@ -363,7 +364,8 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, .user_data = user_data }; - return tuh_control_xfer(&xfer); + TU_ASSERT(tuh_control_xfer(&xfer)); + return true; } //--------------------------------------------------------------------+ @@ -543,26 +545,31 @@ static void process_cdc_config(tuh_xfer_t* xfer) uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - TU_ASSERT(idx != TUSB_INDEX_INVALID_8, ); + cdch_interface_t * p_cdc = get_itf(idx); + TU_ASSERT(p_cdc, ); switch(state) { case CONFIG_SET_CONTROL_LINE_STATE: - #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM - TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), ); - break; - #endif - TU_ATTR_FALLTHROUGH; + #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM + if (p_cdc->acm_capability.support_line_request) + { + TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), ); + break; + } + #endif + TU_ATTR_FALLTHROUGH; case CONFIG_SET_LINE_CODING: - #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM - { - cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM; - TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), ); - break; - } - #endif - TU_ATTR_FALLTHROUGH; + #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM + if (p_cdc->acm_capability.support_line_request) + { + cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM; + TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), ); + break; + } + #endif + TU_ATTR_FALLTHROUGH; case CONFIG_COMPLETE: if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx); From df5f60b6d67400891c5887afe29fcac5644cc668 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Mar 2023 17:36:29 +0700 Subject: [PATCH 122/142] fix shadow warning --- src/class/cdc/cdc_host.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 08b82416d..c0cc41adf 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -575,7 +575,6 @@ static void process_cdc_config(tuh_xfer_t* xfer) if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx); // Prepare for incoming data - cdch_interface_t* p_cdc = get_itf(idx); tu_edpt_stream_read_xfer(&p_cdc->stream.rx); // notify usbh that driver enumeration is complete From faaed198b48b3af7482503bacf3188040c245a1e Mon Sep 17 00:00:00 2001 From: epatstarkey <58745560+epatstarkey@users.noreply.github.com> Date: Tue, 28 Mar 2023 13:59:59 -0500 Subject: [PATCH 123/142] Update vendor_device.h --- src/class/vendor/vendor_device.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 9abafda50..ca4837d7b 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -48,6 +48,7 @@ bool tud_vendor_n_peek (uint8_t itf, uint8_t* ui8); void tud_vendor_n_read_flush (uint8_t itf); uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); +uint32_t tud_vendor_n_write_flush (uint8_t itf); uint32_t tud_vendor_n_write_available (uint8_t itf); static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); @@ -64,7 +65,7 @@ static inline void tud_vendor_read_flush (void); static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize); static inline uint32_t tud_vendor_write_str (char const* str); static inline uint32_t tud_vendor_write_available (void); -static inline uint32_t tud_vendor_flush (void); +static inline uint32_t tud_vendor_write_flush (void); //--------------------------------------------------------------------+ // Application Callback API (weak is optional) @@ -114,6 +115,11 @@ static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize) return tud_vendor_n_write(0, buffer, bufsize); } +static inline uint32_t tud_vendor_write_flush (void) +{ + return tud_vendor_n_write_flush(0); +} + static inline uint32_t tud_vendor_write_str (char const* str) { return tud_vendor_n_write_str(0, str); @@ -124,11 +130,6 @@ static inline uint32_t tud_vendor_write_available (void) return tud_vendor_n_write_available(0); } -static inline uint32_t tud_vendor_flush (void) -{ - return tud_vendor_n_flush(0); -} - //--------------------------------------------------------------------+ // Internal Class Driver API //--------------------------------------------------------------------+ From 876f49f6ad10ef2bca000602fe862889c3e0268f Mon Sep 17 00:00:00 2001 From: epatstarkey <58745560+epatstarkey@users.noreply.github.com> Date: Tue, 28 Mar 2023 14:00:23 -0500 Subject: [PATCH 124/142] Update vendor_device.c --- src/class/vendor/vendor_device.c | 65 ++++++++++++++++++++------------ 1 file changed, 40 insertions(+), 25 deletions(-) diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index d07bd75ec..260da0125 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -59,7 +59,7 @@ typedef struct CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE]; } vendord_interface_t; -CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; #define ITF_MEM_RESET_SIZE offsetof(vendord_interface_t, rx_ff) @@ -86,8 +86,8 @@ static void _prep_out_transaction (vendord_interface_t* p_itf) { uint8_t const rhport = 0; - // skip if previous transfer not complete - if ( usbd_edpt_busy(rhport, p_itf->ep_out) ) return; + // claim endpoint + TU_VERIFY(usbd_edpt_claim(rhport, p_itf->ep_out), ); // Prepare for incoming data but only allow what we can store in the ring buffer. uint16_t max_read = tu_fifo_remaining(&p_itf->rx_ff); @@ -95,6 +95,11 @@ static void _prep_out_transaction (vendord_interface_t* p_itf) { usbd_edpt_xfer(rhport, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE); } + else + { + // Release endpoint since we don't make any transfer + usbd_edpt_release(rhport, p_itf->ep_out); + } } uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize) @@ -115,37 +120,47 @@ void tud_vendor_n_read_flush (uint8_t itf) //--------------------------------------------------------------------+ // Write API //--------------------------------------------------------------------+ -static uint16_t maybe_transmit(vendord_interface_t* p_itf) -{ - uint8_t const rhport = 0; - - // skip if previous transfer not complete - TU_VERIFY( !usbd_edpt_busy(rhport, p_itf->ep_in) ); - - uint16_t count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, CFG_TUD_VENDOR_EPSIZE); - if (count > 0) - { - TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count) ); - } - return count; -} - uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize) { vendord_interface_t* p_itf = &_vendord_itf[itf]; uint16_t ret = tu_fifo_write_n(&p_itf->tx_ff, buffer, (uint16_t) bufsize); + + // flush if queue more than packet size if (tu_fifo_count(&p_itf->tx_ff) >= CFG_TUD_VENDOR_EPSIZE) { - maybe_transmit(p_itf); + tud_vendor_n_write_flush(itf); } return ret; } -uint32_t tud_vendor_n_flush (uint8_t itf) +uint32_t tud_vendor_n_write_flush (uint8_t itf) { vendord_interface_t* p_itf = &_vendord_itf[itf]; - uint32_t ret = maybe_transmit(p_itf); - return ret; + // Skip if usb is not ready yet + TU_VERIFY( tud_ready(), 0 ); + + // No data to send + if ( !tu_fifo_count(&p_itf->tx_ff) ) return 0; + + uint8_t const rhport = 0; + + // Claim the endpoint + TU_VERIFY( usbd_edpt_claim(rhport, p_itf->ep_in), 0 ); + + // Pull data from FIFO + uint16_t const count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, sizeof(p_itf->epin_buf)); + + if ( count ) + { + TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count), 0 ); + return count; + }else + { + // Release endpoint since we don't make any transfer + // Note: data is dropped if terminal is not connected + usbd_edpt_release(rhport, p_itf->ep_in); + return 0; + } } uint32_t tud_vendor_n_write_available (uint8_t itf) @@ -225,10 +240,10 @@ uint16_t vendord_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, ui // Prepare for incoming data if ( p_vendor->ep_out ) { - TU_ASSERT(usbd_edpt_xfer(rhport, p_vendor->ep_out, p_vendor->epout_buf, sizeof(p_vendor->epout_buf)), 0); + _prep_out_transaction(p_vendor); } - if ( p_vendor->ep_in ) maybe_transmit(p_vendor); + if ( p_vendor->ep_in ) tud_vendor_n_write_flush((uint8_t)(p_vendor - _vendord_itf)); } return (uint16_t) ((uintptr_t) p_desc - (uintptr_t) desc_itf); @@ -263,7 +278,7 @@ bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint { if (tud_vendor_tx_cb) tud_vendor_tx_cb(itf, (uint16_t) xferred_bytes); // Send complete, try to send more if possible - maybe_transmit(p_itf); + tud_vendor_n_write_flush(itf); } return true; From 1fb2a2f1bd61f06dc9384df1b9df3b39aeec42cf Mon Sep 17 00:00:00 2001 From: epatstarkey <58745560+epatstarkey@users.noreply.github.com> Date: Tue, 28 Mar 2023 14:01:33 -0500 Subject: [PATCH 125/142] Update vendor_device.c --- src/class/vendor/vendor_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 260da0125..93596ee33 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -59,7 +59,7 @@ typedef struct CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE]; } vendord_interface_t; -CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; #define ITF_MEM_RESET_SIZE offsetof(vendord_interface_t, rx_ff) From 99315bcca35e1ffb9d14705a0cd533f962bc79eb Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 29 Mar 2023 14:23:11 +0700 Subject: [PATCH 126/142] adding more cmake support --- .gitignore | 2 ++ examples/CMakeLists.txt | 9 +++++++++ hw/bsp/rp2040/rp2040-openocd.cfg | 3 +++ 3 files changed, 14 insertions(+) create mode 100644 examples/CMakeLists.txt create mode 100644 hw/bsp/rp2040/rp2040-openocd.cfg diff --git a/.gitignore b/.gitignore index bd4271925..268decfc6 100644 --- a/.gitignore +++ b/.gitignore @@ -28,6 +28,8 @@ cov-int *-build-dir /_bin/ __pycache__ +cmake-build-* +sdkconfig # submodules hw/mcu/allwinner diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt new file mode 100644 index 000000000..8f5626fa9 --- /dev/null +++ b/examples/CMakeLists.txt @@ -0,0 +1,9 @@ +cmake_minimum_required(VERSION 3.5) + +include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake) + +project(tinyusb_examples) + +add_subdirectory(device) +add_subdirectory(dual) +add_subdirectory(host) diff --git a/hw/bsp/rp2040/rp2040-openocd.cfg b/hw/bsp/rp2040/rp2040-openocd.cfg new file mode 100644 index 000000000..3364c595e --- /dev/null +++ b/hw/bsp/rp2040/rp2040-openocd.cfg @@ -0,0 +1,3 @@ +source [find interface/cmsis-dap.cfg] +adapter speed 5000 +source [find target/rp2040.cfg] From 96718b7ca08d1d74cf1ecfb3816b57df50bf1616 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 30 Mar 2023 00:31:26 +0700 Subject: [PATCH 127/142] merge s2 and s3, update cmake for espressif, add tinyusb_src as component --- .../device/cdc_msc_freertos/CMakeLists.txt | 3 +- .../cdc_msc_freertos/src/CMakeLists.txt | 26 +-- examples/rules.mk | 2 +- hw/bsp/esp32s2/boards/CMakeLists.txt | 12 -- .../adafruit_feather_esp32s2/board.cmake | 17 -- .../boards/adafruit_magtag_29gray/board.cmake | 17 -- .../boards/adafruit_metro_esp32s2/board.cmake | 17 -- .../boards/espressif_kaluga_1/board.cmake | 17 -- .../boards/espressif_saola_1/board.cmake | 17 -- hw/bsp/esp32s2/family.cmake | 7 - hw/bsp/esp32s3/boards/esp32s3.c | 152 ---------------- .../boards/espressif_addax_1/board.cmake | 7 - .../boards/espressif_s3_devkitc/board.cmake | 7 - .../boards/espressif_s3_devkitm/board.cmake | 7 - .../components/led_strip/CMakeLists.txt | 7 - .../components/led_strip/include/led_strip.h | 126 ------------- .../led_strip/src/led_strip_rmt_ws2812.c | 171 ------------------ hw/bsp/esp32s3/family.cmake | 7 - hw/bsp/esp32s3/family.mk | 25 --- .../boards/CMakeLists.txt | 4 +- .../adafruit_feather_esp32s2/board.cmake | 3 + .../boards/adafruit_feather_esp32s2/board.h | 0 .../boards/adafruit_magtag_29gray/board.cmake | 3 + .../boards/adafruit_magtag_29gray/board.h | 0 .../boards/adafruit_metro_esp32s2/board.cmake | 3 + .../boards/adafruit_metro_esp32s2/board.h | 0 .../boards/espressif_addax_1/board.cmake | 3 + .../boards/espressif_addax_1/board.h | 0 .../boards/espressif_kaluga_1/board.cmake | 3 + .../boards/espressif_kaluga_1/board.h | 0 .../boards/espressif_s3_devkitc/board.cmake | 3 + .../boards/espressif_s3_devkitc/board.h | 0 .../boards/espressif_s3_devkitm/board.cmake | 3 + .../boards/espressif_s3_devkitm/board.h | 0 .../boards/espressif_saola_1/board.cmake | 3 + .../boards/espressif_saola_1/board.h | 0 .../esp32s2.c => espressif/boards/family.c} | 0 .../components/led_strip/CMakeLists.txt | 0 .../components/led_strip/include/led_strip.h | 0 .../led_strip/src/led_strip_rmt_ws2812.c | 0 .../components/tinyusb_src/CMakeLists.txt | 60 ++++++ hw/bsp/espressif/family.cmake | 9 + hw/bsp/{esp32s2 => espressif}/family.mk | 17 +- tools/build_esp32sx.py | 5 +- tools/build_family.py | 2 +- 45 files changed, 114 insertions(+), 651 deletions(-) delete mode 100644 hw/bsp/esp32s2/boards/CMakeLists.txt delete mode 100644 hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake delete mode 100644 hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake delete mode 100644 hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake delete mode 100644 hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake delete mode 100644 hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake delete mode 100644 hw/bsp/esp32s2/family.cmake delete mode 100644 hw/bsp/esp32s3/boards/esp32s3.c delete mode 100644 hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake delete mode 100644 hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake delete mode 100644 hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake delete mode 100644 hw/bsp/esp32s3/components/led_strip/CMakeLists.txt delete mode 100644 hw/bsp/esp32s3/components/led_strip/include/led_strip.h delete mode 100644 hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c delete mode 100644 hw/bsp/esp32s3/family.cmake delete mode 100644 hw/bsp/esp32s3/family.mk rename hw/bsp/{esp32s3 => espressif}/boards/CMakeLists.txt (73%) create mode 100644 hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_feather_esp32s2/board.h (100%) create mode 100644 hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_magtag_29gray/board.h (100%) create mode 100644 hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_metro_esp32s2/board.h (100%) create mode 100644 hw/bsp/espressif/boards/espressif_addax_1/board.cmake rename hw/bsp/{esp32s3 => espressif}/boards/espressif_addax_1/board.h (100%) create mode 100644 hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake rename hw/bsp/{esp32s2 => espressif}/boards/espressif_kaluga_1/board.h (100%) create mode 100644 hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake rename hw/bsp/{esp32s3 => espressif}/boards/espressif_s3_devkitc/board.h (100%) create mode 100644 hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake rename hw/bsp/{esp32s3 => espressif}/boards/espressif_s3_devkitm/board.h (100%) create mode 100644 hw/bsp/espressif/boards/espressif_saola_1/board.cmake rename hw/bsp/{esp32s2 => espressif}/boards/espressif_saola_1/board.h (100%) rename hw/bsp/{esp32s2/boards/esp32s2.c => espressif/boards/family.c} (100%) rename hw/bsp/{esp32s2 => espressif}/components/led_strip/CMakeLists.txt (100%) rename hw/bsp/{esp32s2 => espressif}/components/led_strip/include/led_strip.h (100%) rename hw/bsp/{esp32s2 => espressif}/components/led_strip/src/led_strip_rmt_ws2812.c (100%) create mode 100644 hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt create mode 100644 hw/bsp/espressif/family.cmake rename hw/bsp/{esp32s2 => espressif}/family.mk (62%) diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt index cbd75efd6..82bf79f19 100644 --- a/examples/device/cdc_msc_freertos/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/CMakeLists.txt @@ -16,7 +16,6 @@ project(${PROJECT}) family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) # Check for -DFAMILY= -if(FAMILY MATCHES "^esp32s[2-3]") -else() +if(NOT FAMILY STREQUAL "espressif") message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}") endif() diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt index 9216e2b49..e433e5074 100644 --- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt @@ -1,35 +1,11 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c" INCLUDE_DIRS "." - REQUIRES freertos soc) - -file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake) - -if(EXISTS ${board_cmake}) - include(${board_cmake}) -endif() + REQUIRES freertos soc tinyusb_src) target_include_directories(${COMPONENT_TARGET} PUBLIC "${TOP}/hw" - "${TOP}/src" ) target_compile_definitions(${COMPONENT_TARGET} PUBLIC ESP_PLATFORM ) - -target_sources(${COMPONENT_TARGET} PUBLIC - "${TOP}/src/tusb.c" - "${TOP}/src/common/tusb_fifo.c" - "${TOP}/src/device/usbd.c" - "${TOP}/src/device/usbd_control.c" - "${TOP}/src/class/cdc/cdc_device.c" - "${TOP}/src/class/dfu/dfu_rt_device.c" - "${TOP}/src/class/hid/hid_device.c" - "${TOP}/src/class/midi/midi_device.c" - "${TOP}/src/class/msc/msc_device.c" - "${TOP}/src/class/net/ecm_rndis_device.c" - "${TOP}/src/class/net/ncm_device.c" - "${TOP}/src/class/usbtmc/usbtmc_device.c" - "${TOP}/src/class/vendor/vendor_device.c" - "${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c" -) diff --git a/examples/rules.mk b/examples/rules.mk index b85837c16..c125408df 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -7,7 +7,7 @@ # ---------------- GNU Make Start ----------------------- # ESP32-Sx and RP2040 has its own CMake build system -ifeq (,$(findstring $(FAMILY),esp32s2 esp32s3 rp2040)) +ifeq (,$(findstring $(FAMILY),espressif rp2040)) # --------------------------------------- # Compiler Flags diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt deleted file mode 100644 index ff90acbde..000000000 --- a/hw/bsp/esp32s2/boards/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -idf_component_register(SRCS esp32s2.c - INCLUDE_DIRS "." "${BOARD}" - PRIV_REQUIRES "driver" - REQUIRES freertos src led_strip) - -# Apply board specific content -include("${BOARD}/board.cmake") - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" - "${TOP}/src" -) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake deleted file mode 100644 index e39ceb887..000000000 --- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake +++ /dev/null @@ -1,17 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -idf_build_get_property(idf_target IDF_TARGET) - -message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}") - -if(NOT ${idf_target} STREQUAL "esp32s2") - message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." ) -endif() - -set(IDF_TARGET "esp32s2" FORCE) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake deleted file mode 100644 index e39ceb887..000000000 --- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake +++ /dev/null @@ -1,17 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -idf_build_get_property(idf_target IDF_TARGET) - -message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}") - -if(NOT ${idf_target} STREQUAL "esp32s2") - message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." ) -endif() - -set(IDF_TARGET "esp32s2" FORCE) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake deleted file mode 100644 index 16b0e9cdd..000000000 --- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake +++ /dev/null @@ -1,17 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -idf_build_get_property(idf_target IDF_TARGET) - -message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}") - -if(NOT ${idf_target} STREQUAL "esp32s2") - message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." ) -endif() - -set(IDF_TARGET "esp32s2" FORCE) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake deleted file mode 100644 index 16b0e9cdd..000000000 --- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake +++ /dev/null @@ -1,17 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -idf_build_get_property(idf_target IDF_TARGET) - -message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}") - -if(NOT ${idf_target} STREQUAL "esp32s2") - message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." ) -endif() - -set(IDF_TARGET "esp32s2" FORCE) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake deleted file mode 100644 index 16b0e9cdd..000000000 --- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake +++ /dev/null @@ -1,17 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -idf_build_get_property(idf_target IDF_TARGET) - -message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}") - -if(NOT ${idf_target} STREQUAL "esp32s2") - message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." ) -endif() - -set(IDF_TARGET "esp32s2" FORCE) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake deleted file mode 100644 index 0973adcac..000000000 --- a/hw/bsp/esp32s2/family.cmake +++ /dev/null @@ -1,7 +0,0 @@ -cmake_minimum_required(VERSION 3.5) - -# Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") -include($ENV{IDF_PATH}/tools/cmake/project.cmake) -set(SUPPORTED_TARGETS esp32s2) -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s3/boards/esp32s3.c b/hw/bsp/esp32s3/boards/esp32s3.c deleted file mode 100644 index 015d8305b..000000000 --- a/hw/bsp/esp32s3/boards/esp32s3.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../../board.h" -#include "board.h" - -#include "esp_rom_gpio.h" -#include "hal/gpio_ll.h" -#include "hal/usb_hal.h" -#include "soc/usb_periph.h" - -#include "driver/rmt.h" - -#if ESP_IDF_VERSION_MAJOR > 4 - #include "esp_private/periph_ctrl.h" -#else - #include "driver/periph_ctrl.h" -#endif - -#ifdef NEOPIXEL_PIN -#include "led_strip.h" -static led_strip_t *strip; -#endif - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - -static void configure_pins(usb_hal_context_t *usb); - -// Initialize on-board peripherals : led, button, uart and USB -void board_init(void) -{ - -#ifdef NEOPIXEL_PIN - #ifdef NEOPIXEL_POWER_PIN - gpio_reset_pin(NEOPIXEL_POWER_PIN); - gpio_set_direction(NEOPIXEL_POWER_PIN, GPIO_MODE_OUTPUT); - gpio_set_level(NEOPIXEL_POWER_PIN, NEOPIXEL_POWER_STATE); - #endif - - // WS2812 Neopixel driver with RMT peripheral - rmt_config_t config = RMT_DEFAULT_CONFIG_TX(NEOPIXEL_PIN, RMT_CHANNEL_0); - config.clk_div = 2; // set counter clock to 40MHz - - rmt_config(&config); - rmt_driver_install(config.channel, 0, 0); - - led_strip_config_t strip_config = LED_STRIP_DEFAULT_CONFIG(1, (led_strip_dev_t) config.channel); - strip = led_strip_new_rmt_ws2812(&strip_config); - strip->clear(strip, 100); // off led -#endif - - // Button - esp_rom_gpio_pad_select_gpio(BUTTON_PIN); - gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT); - gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY); - - // USB Controller Hal init - periph_module_reset(PERIPH_USB_MODULE); - periph_module_enable(PERIPH_USB_MODULE); - - usb_hal_context_t hal = { - .use_external_phy = false // use built-in PHY - }; - usb_hal_init(&hal); - configure_pins(&hal); -} - -static void configure_pins(usb_hal_context_t *usb) -{ - /* usb_periph_iopins currently configures USB_OTG as USB Device. - * Introduce additional parameters in usb_hal_context_t when adding support - * for USB Host. - */ - for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) { - if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) { - esp_rom_gpio_pad_select_gpio(iopin->pin); - if (iopin->is_output) { - esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false); - } else { - esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false); -#if ESP_IDF_VERSION_MAJOR > 4 - if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT)) -#else - if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH)) -#endif - { - gpio_ll_input_enable(&GPIO, iopin->pin); - } - } - esp_rom_gpio_pad_unhold(iopin->pin); - } - } - if (!usb->use_external_phy) { - gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3); - gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); - } -} - -// Turn LED on or off -void board_led_write(bool state) -{ -#ifdef NEOPIXEL_PIN - strip->set_pixel(strip, 0, (state ? 0x88 : 0x00), 0x00, 0x00); - strip->refresh(strip, 100); -#endif -} - -// Get the current state of button -// a '1' means active (pressed), a '0' means inactive. -uint32_t board_button_read(void) -{ - return gpio_get_level(BUTTON_PIN) == BUTTON_STATE_ACTIVE; -} - -// Get characters from UART -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -// Send characters to UART -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake deleted file mode 100644 index 2bff4f836..000000000 --- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake +++ /dev/null @@ -1,7 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake deleted file mode 100644 index 2bff4f836..000000000 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake +++ /dev/null @@ -1,7 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake deleted file mode 100644 index 2bff4f836..000000000 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake +++ /dev/null @@ -1,7 +0,0 @@ -# Apply board specific content here -target_include_directories(${COMPONENT_LIB} PRIVATE .) - -target_compile_options(${COMPONENT_TARGET} PUBLIC - "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" - "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) diff --git a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt deleted file mode 100644 index 8266c5a1c..000000000 --- a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ -set(component_srcs "src/led_strip_rmt_ws2812.c") - -idf_component_register(SRCS "${component_srcs}" - INCLUDE_DIRS "include" - PRIV_INCLUDE_DIRS "" - PRIV_REQUIRES "driver" - REQUIRES "") diff --git a/hw/bsp/esp32s3/components/led_strip/include/led_strip.h b/hw/bsp/esp32s3/components/led_strip/include/led_strip.h deleted file mode 100644 index a9dffc325..000000000 --- a/hw/bsp/esp32s3/components/led_strip/include/led_strip.h +++ /dev/null @@ -1,126 +0,0 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#include "esp_err.h" - -/** -* @brief LED Strip Type -* -*/ -typedef struct led_strip_s led_strip_t; - -/** -* @brief LED Strip Device Type -* -*/ -typedef void *led_strip_dev_t; - -/** -* @brief Declare of LED Strip Type -* -*/ -struct led_strip_s { - /** - * @brief Set RGB for a specific pixel - * - * @param strip: LED strip - * @param index: index of pixel to set - * @param red: red part of color - * @param green: green part of color - * @param blue: blue part of color - * - * @return - * - ESP_OK: Set RGB for a specific pixel successfully - * - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters - * - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred - */ - esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue); - - /** - * @brief Refresh memory colors to LEDs - * - * @param strip: LED strip - * @param timeout_ms: timeout value for refreshing task - * - * @return - * - ESP_OK: Refresh successfully - * - ESP_ERR_TIMEOUT: Refresh failed because of timeout - * - ESP_FAIL: Refresh failed because some other error occurred - * - * @note: - * After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. - */ - esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms); - - /** - * @brief Clear LED strip (turn off all LEDs) - * - * @param strip: LED strip - * @param timeout_ms: timeout value for clearing task - * - * @return - * - ESP_OK: Clear LEDs successfully - * - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout - * - ESP_FAIL: Clear LEDs failed because some other error occurred - */ - esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms); - - /** - * @brief Free LED strip resources - * - * @param strip: LED strip - * - * @return - * - ESP_OK: Free resources successfully - * - ESP_FAIL: Free resources failed because error occurred - */ - esp_err_t (*del)(led_strip_t *strip); -}; - -/** -* @brief LED Strip Configuration Type -* -*/ -typedef struct { - uint32_t max_leds; /*!< Maximum LEDs in a single strip */ - led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */ -} led_strip_config_t; - -/** - * @brief Default configuration for LED strip - * - */ -#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \ - { \ - .max_leds = number, \ - .dev = dev_hdl, \ - } - -/** -* @brief Install a new ws2812 driver (based on RMT peripheral) -* -* @param config: LED strip configuration -* @return -* LED strip instance or NULL -*/ -led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config); - -#ifdef __cplusplus -} -#endif diff --git a/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c b/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c deleted file mode 100644 index fd1746cad..000000000 --- a/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c +++ /dev/null @@ -1,171 +0,0 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include -#include -#include -#include "esp_log.h" -#include "esp_attr.h" -#include "led_strip.h" -#include "driver/rmt.h" - -static const char *TAG = "ws2812"; -#define STRIP_CHECK(a, str, goto_tag, ret_value, ...) \ - do \ - { \ - if (!(a)) \ - { \ - ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \ - ret = ret_value; \ - goto goto_tag; \ - } \ - } while (0) - -#define WS2812_T0H_NS (350) -#define WS2812_T0L_NS (1000) -#define WS2812_T1H_NS (1000) -#define WS2812_T1L_NS (350) -#define WS2812_RESET_US (280) - -static uint32_t ws2812_t0h_ticks = 0; -static uint32_t ws2812_t1h_ticks = 0; -static uint32_t ws2812_t0l_ticks = 0; -static uint32_t ws2812_t1l_ticks = 0; - -typedef struct { - led_strip_t parent; - rmt_channel_t rmt_channel; - uint32_t strip_len; - uint8_t buffer[0]; -} ws2812_t; - -/** - * @brief Convert RGB data to RMT format. - * - * @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t) - * - * @param[in] src: source data, to converted to RMT format - * @param[in] dest: place where to store the convert result - * @param[in] src_size: size of source data - * @param[in] wanted_num: number of RMT items that want to get - * @param[out] translated_size: number of source data that got converted - * @param[out] item_num: number of RMT items which are converted from source data - */ -static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size, - size_t wanted_num, size_t *translated_size, size_t *item_num) -{ - if (src == NULL || dest == NULL) { - *translated_size = 0; - *item_num = 0; - return; - } - const rmt_item32_t bit0 = {{{ ws2812_t0h_ticks, 1, ws2812_t0l_ticks, 0 }}}; //Logical 0 - const rmt_item32_t bit1 = {{{ ws2812_t1h_ticks, 1, ws2812_t1l_ticks, 0 }}}; //Logical 1 - size_t size = 0; - size_t num = 0; - uint8_t *psrc = (uint8_t *)src; - rmt_item32_t *pdest = dest; - while (size < src_size && num < wanted_num) { - for (int i = 0; i < 8; i++) { - // MSB first - if (*psrc & (1 << (7 - i))) { - pdest->val = bit1.val; - } else { - pdest->val = bit0.val; - } - num++; - pdest++; - } - size++; - psrc++; - } - *translated_size = size; - *item_num = num; -} - -static esp_err_t ws2812_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) -{ - esp_err_t ret = ESP_OK; - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - STRIP_CHECK(index < ws2812->strip_len, "index out of the maximum number of leds", err, ESP_ERR_INVALID_ARG); - uint32_t start = index * 3; - // In thr order of GRB - ws2812->buffer[start + 0] = green & 0xFF; - ws2812->buffer[start + 1] = red & 0xFF; - ws2812->buffer[start + 2] = blue & 0xFF; - return ESP_OK; -err: - return ret; -} - -static esp_err_t ws2812_refresh(led_strip_t *strip, uint32_t timeout_ms) -{ - esp_err_t ret = ESP_OK; - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - STRIP_CHECK(rmt_write_sample(ws2812->rmt_channel, ws2812->buffer, ws2812->strip_len * 3, true) == ESP_OK, - "transmit RMT samples failed", err, ESP_FAIL); - return rmt_wait_tx_done(ws2812->rmt_channel, pdMS_TO_TICKS(timeout_ms)); -err: - return ret; -} - -static esp_err_t ws2812_clear(led_strip_t *strip, uint32_t timeout_ms) -{ - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - // Write zero to turn off all leds - memset(ws2812->buffer, 0, ws2812->strip_len * 3); - return ws2812_refresh(strip, timeout_ms); -} - -static esp_err_t ws2812_del(led_strip_t *strip) -{ - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - free(ws2812); - return ESP_OK; -} - -led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config) -{ - led_strip_t *ret = NULL; - STRIP_CHECK(config, "configuration can't be null", err, NULL); - - // 24 bits per led - uint32_t ws2812_size = sizeof(ws2812_t) + config->max_leds * 3; - ws2812_t *ws2812 = calloc(1, ws2812_size); - STRIP_CHECK(ws2812, "request memory for ws2812 failed", err, NULL); - - uint32_t counter_clk_hz = 0; - STRIP_CHECK(rmt_get_counter_clock((rmt_channel_t)config->dev, &counter_clk_hz) == ESP_OK, - "get rmt counter clock failed", err, NULL); - // ns -> ticks - float ratio = (float)counter_clk_hz / 1e9; - ws2812_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS); - ws2812_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS); - ws2812_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS); - ws2812_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS); - - // set ws2812 to rmt adapter - rmt_translator_init((rmt_channel_t)config->dev, ws2812_rmt_adapter); - - ws2812->rmt_channel = (rmt_channel_t)config->dev; - ws2812->strip_len = config->max_leds; - - ws2812->parent.set_pixel = ws2812_set_pixel; - ws2812->parent.refresh = ws2812_refresh; - ws2812->parent.clear = ws2812_clear; - ws2812->parent.del = ws2812_del; - - return &ws2812->parent; -err: - return ret; -} diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake deleted file mode 100644 index 0bcad035e..000000000 --- a/hw/bsp/esp32s3/family.cmake +++ /dev/null @@ -1,7 +0,0 @@ -cmake_minimum_required(VERSION 3.5) - -# Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") -include($ENV{IDF_PATH}/tools/cmake/project.cmake) -set(SUPPORTED_TARGETS esp32s3) -set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/family.mk b/hw/bsp/esp32s3/family.mk deleted file mode 100644 index d82a1c969..000000000 --- a/hw/bsp/esp32s3/family.mk +++ /dev/null @@ -1,25 +0,0 @@ -#DEPS_SUBMODULES += - -.PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu - -all: - idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s3 build - -build: all - -clean: - idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) clean - -fullclean: - if test -f sdkconfig; then $(RM) -f sdkconfig ; fi - if test -d $(BUILD); then $(RM) -rf $(BUILD) ; fi - -flash bootloader-flash app-flash erase monitor dfu-flash dfu: - idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@ - -uf2: $(BUILD)/$(PROJECT).uf2 - -UF2_FAMILY_ID = 0xc47e5767 -$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin - @echo CREATE $@ - $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ diff --git a/hw/bsp/esp32s3/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt similarity index 73% rename from hw/bsp/esp32s3/boards/CMakeLists.txt rename to hw/bsp/espressif/boards/CMakeLists.txt index 311c6e900..3832037a9 100644 --- a/hw/bsp/esp32s3/boards/CMakeLists.txt +++ b/hw/bsp/espressif/boards/CMakeLists.txt @@ -1,4 +1,4 @@ -idf_component_register(SRCS esp32s3.c +idf_component_register(SRCS family.c INCLUDE_DIRS "." "${BOARD}" PRIV_REQUIRES "driver" REQUIRES freertos src led_strip) @@ -6,7 +6,7 @@ idf_component_register(SRCS esp32s3.c # Apply board specific content include("${BOARD}/board.cmake") -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) +idf_component_get_property(FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake new file mode 100644 index 000000000..fcd2f6e9f --- /dev/null +++ b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") +set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.h similarity index 100% rename from hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h rename to hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.h diff --git a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake new file mode 100644 index 000000000..fcd2f6e9f --- /dev/null +++ b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") +set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.h similarity index 100% rename from hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h rename to hw/bsp/espressif/boards/adafruit_magtag_29gray/board.h diff --git a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake new file mode 100644 index 000000000..fcd2f6e9f --- /dev/null +++ b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") +set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h similarity index 100% rename from hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h rename to hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h diff --git a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake new file mode 100644 index 000000000..bc528e9fa --- /dev/null +++ b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s3") +set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h b/hw/bsp/espressif/boards/espressif_addax_1/board.h similarity index 100% rename from hw/bsp/esp32s3/boards/espressif_addax_1/board.h rename to hw/bsp/espressif/boards/espressif_addax_1/board.h diff --git a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake new file mode 100644 index 000000000..fcd2f6e9f --- /dev/null +++ b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") +set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h b/hw/bsp/espressif/boards/espressif_kaluga_1/board.h similarity index 100% rename from hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h rename to hw/bsp/espressif/boards/espressif_kaluga_1/board.h diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake new file mode 100644 index 000000000..bc528e9fa --- /dev/null +++ b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s3") +set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.h similarity index 100% rename from hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h rename to hw/bsp/espressif/boards/espressif_s3_devkitc/board.h diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake new file mode 100644 index 000000000..bc528e9fa --- /dev/null +++ b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s3") +set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h similarity index 100% rename from hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h rename to hw/bsp/espressif/boards/espressif_s3_devkitm/board.h diff --git a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake new file mode 100644 index 000000000..fcd2f6e9f --- /dev/null +++ b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake @@ -0,0 +1,3 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") +set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h b/hw/bsp/espressif/boards/espressif_saola_1/board.h similarity index 100% rename from hw/bsp/esp32s2/boards/espressif_saola_1/board.h rename to hw/bsp/espressif/boards/espressif_saola_1/board.h diff --git a/hw/bsp/esp32s2/boards/esp32s2.c b/hw/bsp/espressif/boards/family.c similarity index 100% rename from hw/bsp/esp32s2/boards/esp32s2.c rename to hw/bsp/espressif/boards/family.c diff --git a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt b/hw/bsp/espressif/components/led_strip/CMakeLists.txt similarity index 100% rename from hw/bsp/esp32s2/components/led_strip/CMakeLists.txt rename to hw/bsp/espressif/components/led_strip/CMakeLists.txt diff --git a/hw/bsp/esp32s2/components/led_strip/include/led_strip.h b/hw/bsp/espressif/components/led_strip/include/led_strip.h similarity index 100% rename from hw/bsp/esp32s2/components/led_strip/include/led_strip.h rename to hw/bsp/espressif/components/led_strip/include/led_strip.h diff --git a/hw/bsp/esp32s2/components/led_strip/src/led_strip_rmt_ws2812.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c similarity index 100% rename from hw/bsp/esp32s2/components/led_strip/src/led_strip_rmt_ws2812.c rename to hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt new file mode 100644 index 000000000..0bd404cee --- /dev/null +++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt @@ -0,0 +1,60 @@ +idf_build_get_property(target IDF_TARGET) + +set(srcs) +set(includes_public) +set(includes_private) +set(compile_options) +set(tusb_src "${TOP}/src") + +if(target STREQUAL "esp32s3") + set(tusb_mcu "OPT_MCU_ESP32S3") +elseif(target STREQUAL "esp32s2") + set(tusb_mcu "OPT_MCU_ESP32S2") +else() + # CONFIG_TINYUSB dependency has been guaranteed by Kconfig logic, + # So it's not possible that cmake goes here + message(FATAL_ERROR "TinyUSB is not support on ${target}.") + return() +endif() + +list(APPEND compile_options + "-DCFG_TUSB_MCU=${tusb_mcu}" + #"-DCFG_TUSB_DEBUG=1" + ) + +idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR) + +list(APPEND includes_private + "${tusb_src}" + ) + +list(APPEND includes_public + "${tusb_src}" + # The FreeRTOS API include convention in tinyusb is different from esp-idf + "${freertos_component_dir}/include/freertos" + ) + +list(APPEND srcs + "${tusb_src}/tusb.c" + "${tusb_src}/common/tusb_fifo.c" + "${tusb_src}/device/usbd.c" + "${tusb_src}/device/usbd_control.c" + "${tusb_src}/class/cdc/cdc_device.c" + "${tusb_src}/class/dfu/dfu_rt_device.c" + "${tusb_src}/class/hid/hid_device.c" + "${tusb_src}/class/midi/midi_device.c" + "${tusb_src}/class/msc/msc_device.c" + "${tusb_src}/class/net/ecm_rndis_device.c" + "${tusb_src}/class/net/ncm_device.c" + "${tusb_src}/class/usbtmc/usbtmc_device.c" + "${tusb_src}/class/vendor/vendor_device.c" + "${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c" + ) + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes_public} + PRIV_INCLUDE_DIRS ${includes_private} + PRIV_REQUIRES src + ) + +target_compile_options(${COMPONENT_LIB} PUBLIC ${compile_options}) diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake new file mode 100644 index 000000000..19b9139c3 --- /dev/null +++ b/hw/bsp/espressif/family.cmake @@ -0,0 +1,9 @@ +cmake_minimum_required(VERSION 3.5) + +# Apply board specific content +include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake") + +# Add example src and bsp directories +set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components") + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) diff --git a/hw/bsp/esp32s2/family.mk b/hw/bsp/espressif/family.mk similarity index 62% rename from hw/bsp/esp32s2/family.mk rename to hw/bsp/espressif/family.mk index fba0f038b..0dc21b8eb 100644 --- a/hw/bsp/esp32s2/family.mk +++ b/hw/bsp/espressif/family.mk @@ -1,9 +1,21 @@ #DEPS_SUBMODULES += +UF2_FAMILY_ID_esp32s2 = 0xbfdd4eee +UF2_FAMILY_ID_esp32s3 = 0xc47e5767 + +BOARD_CMAKE := $(file < $(TOP)/$(BOARD_PATH)/board.cmake) +ifneq ($(findstring esp32s2,$(BOARD_CMAKE)),) + IDF_TARGET = esp32s2 +else +ifneq ($(findstring esp32s3,$(BOARD_CMAKE)),) + IDF_TARGET = esp32s3 +endif +endif + .PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu all: - idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s2 build + idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) build build: all @@ -17,7 +29,6 @@ clean flash bootloader-flash app-flash erase monitor dfu-flash dfu size size-com uf2: $(BUILD)/$(PROJECT).uf2 -UF2_FAMILY_ID = 0xbfdd4eee $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin @echo CREATE $@ - $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ + $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID_$(IDF_TARGET)) -b 0x0 -c -o $@ $^ diff --git a/tools/build_esp32sx.py b/tools/build_esp32sx.py index 2947a0a6b..00783bf58 100644 --- a/tools/build_esp32sx.py +++ b/tools/build_esp32sx.py @@ -37,10 +37,7 @@ all_examples.sort() # Build all boards if not specified all_boards = [] -for entry in os.scandir("hw/bsp/esp32s2/boards"): - if entry.is_dir(): - all_boards.append(entry.name) -for entry in os.scandir("hw/bsp/esp32s3/boards"): +for entry in os.scandir("hw/bsp/espressif/boards"): if entry.is_dir(): all_boards.append(entry.name) filter_with_input(all_boards) diff --git a/tools/build_family.py b/tools/build_family.py index 532938d42..ae0bb282d 100644 --- a/tools/build_family.py +++ b/tools/build_family.py @@ -52,7 +52,7 @@ if __name__ == '__main__': # If family are not specified in arguments, build all all_families = [] for entry in os.scandir("hw/bsp"): - if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name not in ("esp32s2", "esp32s3"): + if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif' all_families.append(entry.name) filter_with_input(all_families) all_families.sort() From 641613c428e10a029b172c318d4db077e35fee7d Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 30 Mar 2023 10:41:11 +0700 Subject: [PATCH 128/142] update all cmake for esp32 build --- examples/device/board_test/CMakeLists.txt | 27 ++++++--------- examples/device/board_test/src/CMakeLists.txt | 16 ++------- examples/device/board_test/src/main.c | 2 +- .../device/cdc_msc_freertos/CMakeLists.txt | 2 +- .../cdc_msc_freertos/src/CMakeLists.txt | 4 --- .../device/cdc_msc_freertos/src/tusb_config.h | 2 ++ .../hid_composite_freertos/CMakeLists.txt | 20 ++++++----- .../hid_composite_freertos/src/CMakeLists.txt | 34 ++----------------- .../hid_composite_freertos/src/tusb_config.h | 2 ++ hw/bsp/espressif/boards/CMakeLists.txt | 8 +---- hw/bsp/espressif/boards/family.c | 2 +- .../components/tinyusb_src/CMakeLists.txt | 1 + tools/build_family.py | 4 +-- 13 files changed, 40 insertions(+), 84 deletions(-) diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt index 37113578e..b21d56f9e 100644 --- a/examples/device/board_test/CMakeLists.txt +++ b/examples/device/board_test/CMakeLists.txt @@ -1,29 +1,24 @@ cmake_minimum_required(VERSION 3.5) -include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) - -# Check for -DFAMILY= -if(FAMILY MATCHES "^esp32s[2-3]") - # use BOARD-Directory name for project id - get_filename_component(PROJECT ${CMAKE_CURRENT_SOURCE_DIR} NAME) - set(PROJECT ${BOARD}-${PROJECT}) - +# -DFAMILY=espressif +if(FAMILY STREQUAL "espressif") # TOP is absolute path to root directory of TinyUSB git repo set(TOP "../../..") get_filename_component(TOP "${TOP}" REALPATH) +endif() - project(${PROJECT}) +include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) -else() +# gets PROJECT name for the example (e.g. -) +family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) - # gets PROJECT name for the example (e.g. -) - family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) +project(${PROJECT}) - project(${PROJECT}) - - # Checks this example is valid for the family and initializes the project - family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) +# Checks this example is valid for the family and initializes the project +family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) +# Other family such as rp2040 +if(NOT FAMILY STREQUAL "espressif") add_executable(${PROJECT}) # Example source diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt index 37625f441..03f4c7505 100644 --- a/examples/device/board_test/src/CMakeLists.txt +++ b/examples/device/board_test/src/CMakeLists.txt @@ -1,17 +1,7 @@ -# FAMILY = esp32sx idf_component_register(SRCS "main.c" INCLUDE_DIRS "." - REQUIRES freertos soc) + REQUIRES freertos soc tinyusb_src) -file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake) - -if(EXISTS ${board_cmake}) - include(${board_cmake}) -endif() - -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" - "${TOP}/hw" - "${TOP}/src" -) + "${TOP}/hw" + ) diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c index 3f8d55c52..b11f6f2bb 100644 --- a/examples/device/board_test/src/main.c +++ b/examples/device/board_test/src/main.c @@ -30,7 +30,7 @@ #include "bsp/board.h" //--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF PROTYPES +// MACRO CONSTANT TYPEDEF PROTOTYPES //--------------------------------------------------------------------+ /* Blink pattern diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt index 82bf79f19..573924b18 100644 --- a/examples/device/cdc_msc_freertos/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/CMakeLists.txt @@ -16,6 +16,6 @@ project(${PROJECT}) family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) # Check for -DFAMILY= -if(NOT FAMILY STREQUAL "espressif") +if(NOT FAMILY STREQUAL "espressif") message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}") endif() diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt index e433e5074..9c597b302 100644 --- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt @@ -5,7 +5,3 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c" target_include_directories(${COMPONENT_TARGET} PUBLIC "${TOP}/hw" ) - -target_compile_definitions(${COMPONENT_TARGET} PUBLIC - ESP_PLATFORM -) diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h index 0ec8896b9..91efe7d40 100644 --- a/examples/device/cdc_msc_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_freertos/src/tusb_config.h @@ -54,7 +54,9 @@ #endif // This examples use FreeRTOS +#ifndef CFG_TUSB_OS #define CFG_TUSB_OS OPT_OS_FREERTOS +#endif // Espressif IDF requires "freertos/" prefix in include path #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt index ed734b954..573924b18 100644 --- a/examples/device/hid_composite_freertos/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/CMakeLists.txt @@ -1,17 +1,21 @@ cmake_minimum_required(VERSION 3.5) -# use BOARD-Directory name for project id -get_filename_component(PROJECT ${CMAKE_CURRENT_SOURCE_DIR} NAME) -set(PROJECT ${BOARD}-${PROJECT}) - # TOP is absolute path to root directory of TinyUSB git repo +# needed for esp32sx build. TODO could be removed later on set(TOP "../../..") get_filename_component(TOP "${TOP}" REALPATH) +include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) + +# gets PROJECT name for the example (e.g. -) +family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) + +project(${PROJECT}) + +# Checks this example is valid for the family and initializes the project +family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) + # Check for -DFAMILY= -if(FAMILY MATCHES "^esp32s[2-3]") - include(${TOP}/hw/bsp/${FAMILY}/family.cmake) - project(${PROJECT}) -else() +if(NOT FAMILY STREQUAL "espressif") message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}") endif() diff --git a/examples/device/hid_composite_freertos/src/CMakeLists.txt b/examples/device/hid_composite_freertos/src/CMakeLists.txt index 25da8fcd7..1e1e465e0 100644 --- a/examples/device/hid_composite_freertos/src/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/src/CMakeLists.txt @@ -1,35 +1,7 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" INCLUDE_DIRS "." - REQUIRES freertos soc) - -file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake) - -if(EXISTS ${board_cmake}) - include(${board_cmake}) -endif() + REQUIRES freertos soc tinyusb_src) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" - "${TOP}/src" -) - -target_compile_definitions(${COMPONENT_TARGET} PUBLIC - ESP_PLATFORM -) - -target_sources(${COMPONENT_TARGET} PUBLIC - "${TOP}/src/tusb.c" - "${TOP}/src/common/tusb_fifo.c" - "${TOP}/src/device/usbd.c" - "${TOP}/src/device/usbd_control.c" - "${TOP}/src/class/cdc/cdc_device.c" - "${TOP}/src/class/dfu/dfu_rt_device.c" - "${TOP}/src/class/hid/hid_device.c" - "${TOP}/src/class/midi/midi_device.c" - "${TOP}/src/class/msc/msc_device.c" - "${TOP}/src/class/net/ecm_rndis_device.c" - "${TOP}/src/class/net/ncm_device.c" - "${TOP}/src/class/usbtmc/usbtmc_device.c" - "${TOP}/src/class/vendor/vendor_device.c" - "${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c" -) + "${TOP}/hw" + ) diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index 935ae9453..3ba9bf311 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -54,7 +54,9 @@ #endif // This examples use FreeRTOS +#ifndef CFG_TUSB_OS #define CFG_TUSB_OS OPT_OS_FREERTOS +#endif // Espressif IDF requires "freertos/" prefix in include path #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) diff --git a/hw/bsp/espressif/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt index 3832037a9..a5332d715 100644 --- a/hw/bsp/espressif/boards/CMakeLists.txt +++ b/hw/bsp/espressif/boards/CMakeLists.txt @@ -1,14 +1,8 @@ idf_component_register(SRCS family.c INCLUDE_DIRS "." "${BOARD}" PRIV_REQUIRES "driver" - REQUIRES freertos src led_strip) + REQUIRES led_strip src tinyusb_src) -# Apply board specific content -include("${BOARD}/board.cmake") - -idf_component_get_property(FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" - "${TOP}/src" ) diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c index 015d8305b..8fc4a1cc8 100644 --- a/hw/bsp/espressif/boards/family.c +++ b/hw/bsp/espressif/boards/family.c @@ -24,7 +24,7 @@ * This file is part of the TinyUSB stack. */ -#include "../../board.h" +#include "bsp/board.h" #include "board.h" #include "esp_rom_gpio.h" diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt index 0bd404cee..9aadda43d 100644 --- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt +++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt @@ -19,6 +19,7 @@ endif() list(APPEND compile_options "-DCFG_TUSB_MCU=${tusb_mcu}" + "-DCFG_TUSB_OS=OPT_OS_FREERTOS" #"-DCFG_TUSB_DEBUG=1" ) diff --git a/tools/build_family.py b/tools/build_family.py index ae0bb282d..f9f7261fe 100644 --- a/tools/build_family.py +++ b/tools/build_family.py @@ -42,7 +42,7 @@ if __name__ == '__main__': # If examples are not specified in arguments, build all all_examples = [] for dir1 in os.scandir("examples"): - if dir1.is_dir(): + if dir1.is_dir() and 'cmake-build' not in dir1.name: for entry in os.scandir(dir1.path): if entry.is_dir(): all_examples.append(dir1.name + '/' + entry.name) @@ -52,7 +52,7 @@ if __name__ == '__main__': # If family are not specified in arguments, build all all_families = [] for entry in os.scandir("hw/bsp"): - if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif' + if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif': all_families.append(entry.name) filter_with_input(all_families) all_families.sort() From cf7aad790c23dd1adebd0d86ae2338a1cd64aa97 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 30 Mar 2023 11:37:36 +0700 Subject: [PATCH 129/142] more esp32 cmake clean up --- examples/device/board_test/CMakeLists.txt | 7 ------- examples/device/board_test/src/CMakeLists.txt | 6 +----- examples/device/cdc_msc_freertos/CMakeLists.txt | 5 ----- examples/device/cdc_msc_freertos/src/CMakeLists.txt | 6 +----- examples/device/hid_composite_freertos/CMakeLists.txt | 5 ----- .../device/hid_composite_freertos/src/CMakeLists.txt | 6 +----- hw/bsp/espressif/boards/CMakeLists.txt | 8 +++----- hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt | 10 ++-------- hw/bsp/espressif/family.cmake | 2 +- 9 files changed, 9 insertions(+), 46 deletions(-) diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt index b21d56f9e..4435bd523 100644 --- a/examples/device/board_test/CMakeLists.txt +++ b/examples/device/board_test/CMakeLists.txt @@ -1,12 +1,5 @@ cmake_minimum_required(VERSION 3.5) -# -DFAMILY=espressif -if(FAMILY STREQUAL "espressif") - # TOP is absolute path to root directory of TinyUSB git repo - set(TOP "../../..") - get_filename_component(TOP "${TOP}" REALPATH) -endif() - include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) # gets PROJECT name for the example (e.g. -) diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt index 03f4c7505..8d85dcafd 100644 --- a/examples/device/board_test/src/CMakeLists.txt +++ b/examples/device/board_test/src/CMakeLists.txt @@ -1,7 +1,3 @@ idf_component_register(SRCS "main.c" INCLUDE_DIRS "." - REQUIRES freertos soc tinyusb_src) - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" - ) + REQUIRES boards tinyusb_src) diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt index 573924b18..714e5333b 100644 --- a/examples/device/cdc_msc_freertos/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/CMakeLists.txt @@ -1,10 +1,5 @@ cmake_minimum_required(VERSION 3.5) -# TOP is absolute path to root directory of TinyUSB git repo -# needed for esp32sx build. TODO could be removed later on -set(TOP "../../..") -get_filename_component(TOP "${TOP}" REALPATH) - include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) # gets PROJECT name for the example (e.g. -) diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt index 9c597b302..b77a68c8d 100644 --- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt @@ -1,7 +1,3 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c" INCLUDE_DIRS "." - REQUIRES freertos soc tinyusb_src) - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" -) + REQUIRES boards tinyusb_src) diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt index 573924b18..714e5333b 100644 --- a/examples/device/hid_composite_freertos/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/CMakeLists.txt @@ -1,10 +1,5 @@ cmake_minimum_required(VERSION 3.5) -# TOP is absolute path to root directory of TinyUSB git repo -# needed for esp32sx build. TODO could be removed later on -set(TOP "../../..") -get_filename_component(TOP "${TOP}" REALPATH) - include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) # gets PROJECT name for the example (e.g. -) diff --git a/examples/device/hid_composite_freertos/src/CMakeLists.txt b/examples/device/hid_composite_freertos/src/CMakeLists.txt index 1e1e465e0..6d912854f 100644 --- a/examples/device/hid_composite_freertos/src/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/src/CMakeLists.txt @@ -1,7 +1,3 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" INCLUDE_DIRS "." - REQUIRES freertos soc tinyusb_src) - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" - ) + REQUIRES boards tinyusb_src) diff --git a/hw/bsp/espressif/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt index a5332d715..325263c1d 100644 --- a/hw/bsp/espressif/boards/CMakeLists.txt +++ b/hw/bsp/espressif/boards/CMakeLists.txt @@ -1,8 +1,6 @@ +set(hw_dir "${CMAKE_CURRENT_LIST_DIR}/../../../") + idf_component_register(SRCS family.c - INCLUDE_DIRS "." "${BOARD}" + INCLUDE_DIRS "." ${BOARD} ${hw_dir} PRIV_REQUIRES "driver" REQUIRES led_strip src tinyusb_src) - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${TOP}/hw" -) diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt index 9aadda43d..5e0ed9ac7 100644 --- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt +++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt @@ -2,9 +2,8 @@ idf_build_get_property(target IDF_TARGET) set(srcs) set(includes_public) -set(includes_private) set(compile_options) -set(tusb_src "${TOP}/src") +set(tusb_src "${CMAKE_CURRENT_SOURCE_DIR}/../../../../../src") if(target STREQUAL "esp32s3") set(tusb_mcu "OPT_MCU_ESP32S3") @@ -25,10 +24,6 @@ list(APPEND compile_options idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR) -list(APPEND includes_private - "${tusb_src}" - ) - list(APPEND includes_public "${tusb_src}" # The FreeRTOS API include convention in tinyusb is different from esp-idf @@ -54,8 +49,7 @@ list(APPEND srcs idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes_public} - PRIV_INCLUDE_DIRS ${includes_private} - PRIV_REQUIRES src + REQUIRES src ) target_compile_options(${COMPONENT_LIB} PUBLIC ${compile_options}) diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake index 19b9139c3..954dc635b 100644 --- a/hw/bsp/espressif/family.cmake +++ b/hw/bsp/espressif/family.cmake @@ -1,6 +1,6 @@ cmake_minimum_required(VERSION 3.5) -# Apply board specific content +# Apply board specific content i.e IDF_TARGET must be set before project.cmake is included include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake") # Add example src and bsp directories From d7d4e7b527357d0d4eac63e1c7c26548de5177e3 Mon Sep 17 00:00:00 2001 From: epatstarkey Date: Thu, 30 Mar 2023 11:34:39 -0500 Subject: [PATCH 130/142] Update samples --- examples/device/webusb_serial/src/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c index 838d86381..eaca78c73 100644 --- a/examples/device/webusb_serial/src/main.c +++ b/examples/device/webusb_serial/src/main.c @@ -112,7 +112,7 @@ void echo_all(uint8_t buf[], uint32_t count) if ( web_serial_connected ) { tud_vendor_write(buf, count); - tud_vendor_flush(); + tud_vendor_write_flush(); } // echo to cdc @@ -211,7 +211,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ blink_interval_ms = BLINK_ALWAYS_ON; tud_vendor_write_str("\r\nWebUSB interface connected\r\n"); - tud_vendor_flush(); + tud_vendor_write_flush(); }else { blink_interval_ms = BLINK_MOUNTED; From 1372d4e4d55ee0ff63e07e75aa873c3df3f9e108 Mon Sep 17 00:00:00 2001 From: epatstarkey Date: Fri, 31 Mar 2023 12:58:51 -0500 Subject: [PATCH 131/142] Remove trailing whitespace --- src/class/vendor/vendor_device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index ca4837d7b..7afd49cc1 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) From 160e2a8aeb2b2ed67f2abb6231b4efd2e0792077 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Apr 2023 11:07:48 +0700 Subject: [PATCH 132/142] skip .idea --- .gitignore | 1 - 1 file changed, 1 deletion(-) diff --git a/.gitignore b/.gitignore index 268decfc6..8f5bb6efd 100644 --- a/.gitignore +++ b/.gitignore @@ -12,7 +12,6 @@ latex *.ind .env .settings/ -.idea/ .vscode/ .gdb_history /examples/*/*/build* From 1911c613c7f66d13bf22a1252144cadae1264533 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Apr 2023 11:33:53 +0700 Subject: [PATCH 133/142] add some .idea configuration --- .idea/.gitignore | 8 +++ .idea/cmake.xml | 28 +++++++++ .idea/runConfigurations/cdc_msc.xml | 10 +++ .idea/runConfigurations/hid_composite.xml | 10 +++ .idea/runConfigurations/msc_dual_lun.xml | 10 +++ .idea/runConfigurations/tinyusb_examples.xml | 5 ++ .idea/vcs.xml | 65 ++++++++++++++++++++ .pre-commit-config.yaml | 1 + 8 files changed, 137 insertions(+) create mode 100644 .idea/.gitignore create mode 100644 .idea/cmake.xml create mode 100644 .idea/runConfigurations/cdc_msc.xml create mode 100644 .idea/runConfigurations/hid_composite.xml create mode 100644 .idea/runConfigurations/msc_dual_lun.xml create mode 100644 .idea/runConfigurations/tinyusb_examples.xml create mode 100644 .idea/vcs.xml diff --git a/.idea/.gitignore b/.idea/.gitignore new file mode 100644 index 000000000..73f69e095 --- /dev/null +++ b/.idea/.gitignore @@ -0,0 +1,8 @@ +# Default ignored files +/shelf/ +/workspace.xml +# Datasource local storage ignored files +/dataSources/ +/dataSources.local.xml +# Editor-based HTTP Client requests +/httpRequests/ diff --git a/.idea/cmake.xml b/.idea/cmake.xml new file mode 100644 index 000000000..291da5371 --- /dev/null +++ b/.idea/cmake.xml @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/cdc_msc.xml b/.idea/runConfigurations/cdc_msc.xml new file mode 100644 index 000000000..fbeb4ae05 --- /dev/null +++ b/.idea/runConfigurations/cdc_msc.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/hid_composite.xml b/.idea/runConfigurations/hid_composite.xml new file mode 100644 index 000000000..b9f1d1a72 --- /dev/null +++ b/.idea/runConfigurations/hid_composite.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/msc_dual_lun.xml b/.idea/runConfigurations/msc_dual_lun.xml new file mode 100644 index 000000000..6e0d74f5b --- /dev/null +++ b/.idea/runConfigurations/msc_dual_lun.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/tinyusb_examples.xml b/.idea/runConfigurations/tinyusb_examples.xml new file mode 100644 index 000000000..60e586bbc --- /dev/null +++ b/.idea/runConfigurations/tinyusb_examples.xml @@ -0,0 +1,5 @@ + + + + + \ No newline at end of file diff --git a/.idea/vcs.xml b/.idea/vcs.xml new file mode 100644 index 000000000..f05d025e7 --- /dev/null +++ b/.idea/vcs.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index d37c27d40..6fb98afb8 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -9,6 +9,7 @@ repos: - id: check-yaml - id: trailing-whitespace - id: end-of-file-fixer + exclude: ^.idea/ - id: forbid-submodules - repo: https://github.com/codespell-project/codespell From f2faf72f7fe6bf04870c65437088ae76a9db8baf Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Sat, 1 Apr 2023 21:22:33 +0200 Subject: [PATCH 134/142] openh743i: initialize USB3300 reset pin --- hw/bsp/stm32h7/boards/waveshare_openh743i/board.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h index cf6ad762e..a3d0d07f9 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h @@ -192,6 +192,14 @@ static inline void board_stm32h7_post_init(void) // Init timer TIM_HandleTypeDef tim2Handle; TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + GPIO_InitTypeDef GPIO_InitStruct; + + // ULPI_RST + GPIO_InitStruct.Pin = ULPI_RST_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = 0; + HAL_GPIO_Init(ULPI_RST_PORT, &GPIO_InitStruct); __HAL_RCC_TIM2_CLK_ENABLE(); From 5ef260d5fceeef49c8d1eb08fe39a12712b1ae53 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Apr 2023 17:44:05 +0700 Subject: [PATCH 135/142] fix build for esp32 --- .github/workflows/build_esp.yml | 2 +- examples/CMakeLists.txt | 1 + .../espressif/boards/adafruit_feather_esp32s2/board.cmake | 1 - hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake | 1 - hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake | 1 - hw/bsp/espressif/boards/espressif_addax_1/board.cmake | 1 - hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake | 1 - hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake | 1 - hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake | 1 - hw/bsp/espressif/boards/espressif_saola_1/board.cmake | 1 - hw/bsp/espressif/family.cmake | 6 ++++++ tools/{build_esp32sx.py => build_esp32.py} | 0 tools/build_utils.py | 7 +++++++ 13 files changed, 15 insertions(+), 9 deletions(-) rename tools/{build_esp32sx.py => build_esp32.py} (100%) diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml index dbc51a60f..0a6815ea2 100644 --- a/.github/workflows/build_esp.yml +++ b/.github/workflows/build_esp.yml @@ -54,7 +54,7 @@ jobs: path: linkermap - name: Build - run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32sx.py ${{ matrix.board }} + run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32.py ${{ matrix.board }} - name: Linker Map run: | diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt index 8f5626fa9..d91d8ca62 100644 --- a/examples/CMakeLists.txt +++ b/examples/CMakeLists.txt @@ -1,5 +1,6 @@ cmake_minimum_required(VERSION 3.5) +#set(CMAKE_EXPORT_COMPILE_COMMANDS ON) include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake) project(tinyusb_examples) diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake index fcd2f6e9f..abbdf7abc 100644 --- a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake +++ b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s2") -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake index fcd2f6e9f..abbdf7abc 100644 --- a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake +++ b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s2") -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake index fcd2f6e9f..abbdf7abc 100644 --- a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake +++ b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s2") -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake index bc528e9fa..9bac46d64 100644 --- a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake +++ b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s3") -set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake index fcd2f6e9f..abbdf7abc 100644 --- a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake +++ b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s2") -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake index bc528e9fa..9bac46d64 100644 --- a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake +++ b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s3") -set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake index bc528e9fa..9bac46d64 100644 --- a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake +++ b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s3") -set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake index fcd2f6e9f..abbdf7abc 100644 --- a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake +++ b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake @@ -1,3 +1,2 @@ # Apply board specific content here set(IDF_TARGET "esp32s2") -set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake index 954dc635b..92a9bcb04 100644 --- a/hw/bsp/espressif/family.cmake +++ b/hw/bsp/espressif/family.cmake @@ -3,6 +3,12 @@ cmake_minimum_required(VERSION 3.5) # Apply board specific content i.e IDF_TARGET must be set before project.cmake is included include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake") +if(IDF_TARGET STREQUAL "esp32s2") + set(FAMILY_MCUS ESP32S2) +elseif(IDF_TARGET STREQUAL "esp32s3") + set(FAMILY_MCUS ESP32S3) +endif() + # Add example src and bsp directories set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components") diff --git a/tools/build_esp32sx.py b/tools/build_esp32.py similarity index 100% rename from tools/build_esp32sx.py rename to tools/build_esp32.py diff --git a/tools/build_utils.py b/tools/build_utils.py index 905d06a86..ec850e732 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -53,6 +53,13 @@ def skip_example(example, board): token = token.strip("\"") _, opt_mcu = token.split("=") mcu = opt_mcu[len("OPT_MCU_"):] + break + if "esp32s2" in token: + mcu = "ESP32S2" + break + if "esp32s3" in token: + mcu = "ESP32S3" + break # Skip all OPT_MCU_NONE these are WIP port if mcu == "NONE": From 4f96a1f3b2f4dd265214594450277e4851680258 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Apr 2023 18:05:22 +0700 Subject: [PATCH 136/142] more fix --- hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt index 5e0ed9ac7..bf8e45be2 100644 --- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt +++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt @@ -27,7 +27,7 @@ idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR) list(APPEND includes_public "${tusb_src}" # The FreeRTOS API include convention in tinyusb is different from esp-idf - "${freertos_component_dir}/include/freertos" + #"${freertos_component_dir}/include/freertos" ) list(APPEND srcs From 718bcdb8bc3b9b522e9bad12ace2c7b62589cb4c Mon Sep 17 00:00:00 2001 From: John Cronin Date: Mon, 3 Apr 2023 13:56:16 +0100 Subject: [PATCH 137/142] Add STM32L5 support - no OTG similar to some L4s --- src/common/tusb_mcu.h | 6 ++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 6 ++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 8 ++++++++ src/tusb_option.h | 1 + 4 files changed, 21 insertions(+) diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index b903abeca..ba8976a8c 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -229,6 +229,12 @@ #define TUP_USBIP_DWC2_STM32 #define TUP_DCD_ENDPOINT_MAX 6 +#elif TU_CHECK_MCU(OPT_MCU_STM32L5) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 + + //--------------------------------------------------------------------+ // Sony //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 1677cfa12..98d3d0829 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -362,6 +362,9 @@ void dcd_int_enable (uint8_t rhport) NVIC_EnableIRQ(USB_HP_IRQn); NVIC_EnableIRQ(USB_LP_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + NVIC_EnableIRQ(USB_FS_IRQn); + #else #error Unknown arch in USB driver #endif @@ -409,6 +412,9 @@ void dcd_int_disable(uint8_t rhport) NVIC_DisableIRQ(USB_HP_IRQn); NVIC_DisableIRQ(USB_LP_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + NVIC_DisableIRQ(USB_FS_IRQn); + #else #error Unknown arch in USB driver #endif diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 015b177cf..e3fc8aeb5 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -93,6 +93,14 @@ #include "stm32l4xx.h" #define PMA_LENGTH (1024u) +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + #include "stm32l5xx.h" + #define PMA_LENGTH (1024u) + + #ifndef USB_PMAADDR + #define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS)) + #endif + #else #error You are using an untested or unimplemented STM32 variant. Please update the driver. // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4 diff --git a/src/tusb_option.h b/src/tusb_option.h index f8ac722f4..44d036ea4 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -82,6 +82,7 @@ #define OPT_MCU_STM32G4 311 ///< ST G4 #define OPT_MCU_STM32WB 312 ///< ST WB #define OPT_MCU_STM32U5 313 ///< ST U5 +#define OPT_MCU_STM32L5 314 ///< ST L5 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 From 44fab77c3df784fd6ac94ff75aaa19f70e7760f4 Mon Sep 17 00:00:00 2001 From: Ha Thach Date: Tue, 4 Apr 2023 11:02:20 +0700 Subject: [PATCH 138/142] Update bug_report.yml --- .github/ISSUE_TEMPLATE/bug_report.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml index dc5f0ee16..d00ee78bd 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.yml +++ b/.github/ISSUE_TEMPLATE/bug_report.yml @@ -60,15 +60,15 @@ body: - type: textarea attributes: - label: Debug Log as txt file + label: Debug Log as txt file (LOG/CFG_TUSB_DEBUG=2) placeholder: | Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events. Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability. - Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. + Note2: To enable logging, add `LOG=2` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=2` in your tusb_config.h. More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md) validations: - required: false + required: true - type: textarea attributes: From 106084289dec0146c117fad69925696b388509be Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Apr 2023 11:15:57 +0700 Subject: [PATCH 139/142] add define for vendor_flush() to write_flush() for backward compatible --- src/class/vendor/vendor_device.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 7afd49cc1..d239406b4 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -52,7 +52,9 @@ uint32_t tud_vendor_n_write_flush (uint8_t itf); uint32_t tud_vendor_n_write_available (uint8_t itf); static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); -uint32_t tud_vendor_n_flush (uint8_t itf); + +// backward compatible +#define tud_vendor_n_flush(itf) tud_vendor_n_write_flush(itf) //--------------------------------------------------------------------+ // Application API (Single Port) @@ -67,6 +69,9 @@ static inline uint32_t tud_vendor_write_str (char const* str); static inline uint32_t tud_vendor_write_available (void); static inline uint32_t tud_vendor_write_flush (void); +// backward compatible +#define tud_vendor_flush() tud_vendor_write_flush() + //--------------------------------------------------------------------+ // Application Callback API (weak is optional) //--------------------------------------------------------------------+ From 6db24e0dbae248c865ec3ed0e5febcf341b489d4 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Apr 2023 11:16:28 +0700 Subject: [PATCH 140/142] implement tuh_hid_receive_ready() and tuh_hid_send_ready() --- src/class/hid/hid_host.c | 23 ++++++++++++++++------- src/class/hid/hid_host.h | 9 ++++++--- 2 files changed, 22 insertions(+), 10 deletions(-) diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index a0032aeba..d95d3ef35 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -331,6 +331,15 @@ static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, t // Interrupt Endpoint API //--------------------------------------------------------------------+ +// Check if HID interface is ready to receive report +bool tuh_hid_receive_ready(uint8_t dev_addr, uint8_t idx) +{ + hidh_interface_t* p_hid = get_hid_itf(dev_addr, idx); + TU_VERIFY(p_hid); + + return !usbh_edpt_busy(dev_addr, p_hid->ep_in); +} + bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx) { hidh_interface_t* p_hid = get_hid_itf(daddr, idx); @@ -348,13 +357,13 @@ bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx) return true; } -//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance) -//{ -// TU_VERIFY(tuh_n_hid_n_mounted(dev_addr, instance)); -// -// hidh_interface_t* hid_itf = get_instance(dev_addr, instance); -// return !usbh_edpt_busy(dev_addr, hid_itf->ep_in); -//} +bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx) +{ + hidh_interface_t* p_hid = get_hid_itf(dev_addr, idx); + TU_VERIFY(p_hid); + + return !usbh_edpt_busy(dev_addr, p_hid->ep_out); +} bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len) { diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index c0c727e6a..08ad421d2 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -62,7 +62,7 @@ typedef struct // Interface API //--------------------------------------------------------------------+ -// Get the number of mounted HID interfaces of a device +// Get the total number of mounted HID interfaces of a device uint8_t tuh_hid_itf_get_count(uint8_t dev_addr); // Get all mounted interfaces across devices @@ -109,14 +109,17 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_ // Interrupt Endpoint API //--------------------------------------------------------------------+ -// Check if the interface is ready to use -//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t idx); +// Check if HID interface is ready to receive report +bool tuh_hid_receive_ready(uint8_t dev_addr, uint8_t idx); // Try to receive next report on Interrupt Endpoint. Immediately return // - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available // - false if failed to queue the transfer e.g endpoint is busy bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t idx); +// Check if HID interface is ready to send report +bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx); + // Send report using interrupt endpoint // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent. bool tuh_hid_send_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len); From d4c7c9871ed4e304385aab125116720cb553298d Mon Sep 17 00:00:00 2001 From: tyustli <1225613647@qq.com> Date: Sat, 8 Apr 2023 18:14:10 +0800 Subject: [PATCH 141/142] fix audio comment error --- examples/device/audio_4_channel_mic/src/usb_descriptors.c | 4 ++-- examples/device/audio_test/src/usb_descriptors.c | 4 ++-- examples/device/audio_test_multi_rate/src/usb_descriptors.c | 4 ++-- examples/device/uac2_headset/src/usb_descriptors.c | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c index 8bf9eebc4..160e4f12f 100644 --- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c +++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c @@ -44,7 +44,7 @@ tusb_desc_device_t const desc_device = .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = 0x0200, - // Use Interface Association Descriptor (IAD) for CDC + // Use Interface Association Descriptor (IAD) for Audio // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, @@ -96,7 +96,7 @@ enum uint8_t const desc_configuration[] = { - // Interface count, string index, total length, attribute, power in mA + // Config number, Interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c index 891e90802..e9c3aee7a 100644 --- a/examples/device/audio_test/src/usb_descriptors.c +++ b/examples/device/audio_test/src/usb_descriptors.c @@ -44,7 +44,7 @@ tusb_desc_device_t const desc_device = .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = 0x0200, - // Use Interface Association Descriptor (IAD) for CDC + // Use Interface Association Descriptor (IAD) for Audio // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, @@ -96,7 +96,7 @@ enum uint8_t const desc_configuration[] = { - // Interface count, string index, total length, attribute, power in mA + // Config number, Interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c index 276bf8aa0..78c72a6c2 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c @@ -46,7 +46,7 @@ tusb_desc_device_t const desc_device = .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = 0x0200, - // Use Interface Association Descriptor (IAD) for CDC + // Use Interface Association Descriptor (IAD) for Audio // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, @@ -98,7 +98,7 @@ enum uint8_t const desc_configuration[] = { - // Interface count, string index, total length, attribute, power in mA + // Config number, Interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c index 0a0b4c602..6d6931682 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.c +++ b/examples/device/uac2_headset/src/usb_descriptors.c @@ -46,7 +46,7 @@ tusb_desc_device_t const desc_device = .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = 0x0200, - // Use Interface Association Descriptor (IAD) for CDC + // Use Interface Association Descriptor (IAD) for Audio // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, @@ -106,7 +106,7 @@ uint8_t const * tud_descriptor_device_cb(void) uint8_t const desc_configuration[] = { - // Interface count, string index, total length, attribute, power in mA + // Config number, Interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size From 95dec2ac26fd1b552f2b892f62ec0ed96033e4ba Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Sat, 8 Apr 2023 15:39:33 +0200 Subject: [PATCH 142/142] Fix case. --- examples/device/audio_4_channel_mic/src/usb_descriptors.c | 2 +- examples/device/audio_test/src/usb_descriptors.c | 2 +- examples/device/audio_test_multi_rate/src/usb_descriptors.c | 2 +- examples/device/uac2_headset/src/usb_descriptors.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c index 160e4f12f..b77da9fac 100644 --- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c +++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c @@ -96,7 +96,7 @@ enum uint8_t const desc_configuration[] = { - // Config number, Interface count, string index, total length, attribute, power in mA + // Config number, interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c index e9c3aee7a..cc364ee88 100644 --- a/examples/device/audio_test/src/usb_descriptors.c +++ b/examples/device/audio_test/src/usb_descriptors.c @@ -96,7 +96,7 @@ enum uint8_t const desc_configuration[] = { - // Config number, Interface count, string index, total length, attribute, power in mA + // Config number, interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c index 78c72a6c2..2c72edb17 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c @@ -98,7 +98,7 @@ enum uint8_t const desc_configuration[] = { - // Config number, Interface count, string index, total length, attribute, power in mA + // Config number, interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c index 6d6931682..682774b72 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.c +++ b/examples/device/uac2_headset/src/usb_descriptors.c @@ -106,7 +106,7 @@ uint8_t const * tud_descriptor_device_cb(void) uint8_t const desc_configuration[] = { - // Config number, Interface count, string index, total length, attribute, power in mA + // Config number, interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), // Interface number, string index, EP Out & EP In address, EP size