diff --git a/demos/bsp/lpc11uxx/startup_keil/lpc11uxx.sct b/demos/bsp/lpc11uxx/startup_keil/lpc11uxx.sct new file mode 100644 index 000000000..ca4bf3c8f --- /dev/null +++ b/demos/bsp/lpc11uxx/startup_keil/lpc11uxx.sct @@ -0,0 +1,19 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00020000 { ; load region size_region + ER_IROM1 0x00000000 0x00020000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x10000000 0x00002000 { ; RW data + .ANY (+RW +ZI) + } + + RW_IRAM2 0x20004000 0x00000800 { + *(USBRAM_SECTION) + } +} + diff --git a/demos/bsp/lpc13uxx/startup_keil/lpc13uxx.sct b/demos/bsp/lpc13uxx/startup_keil/lpc13uxx.sct new file mode 100644 index 000000000..2db8d93ea --- /dev/null +++ b/demos/bsp/lpc13uxx/startup_keil/lpc13uxx.sct @@ -0,0 +1,18 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00010000 { ; load region size_region + ER_IROM1 0x00000000 0x00010000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x10000000 0x00002000 { ; RW data + .ANY (+RW +ZI) + } + RW_IRAM2 0x20004000 0x00000800 { + *(USBRAM_SECTION) + } +} + diff --git a/demos/device/device_os_none/.cproject b/demos/device/device_os_none/.cproject index 40e570177..cc39c4394 100644 --- a/demos/device/device_os_none/.cproject +++ b/demos/device/device_os_none/.cproject @@ -568,49 +568,45 @@ <?xml version="1.0" encoding="UTF-8"?> <TargetConfig> -<Properties property_0="" property_3="NXP" property_4="LPC1347" property_count="5" version="1"/> -<infoList vendor="NXP"><info chip="LPC1347" match_id="0x08020543" name="LPC1347" stub="crt_emu_lpc11_13_nxp"><chip><name>LPC1347</name> -<family>LPC13xx (12bit ADC)</family> +<Properties property_0="" property_3="NXP" property_4="LPC11U37/401" property_count="5" version="1"/> +<infoList vendor="NXP"><info chip="LPC11U37/401" match_id="0x00017C40" name="LPC11U37/401" stub="crt_emu_lpc11_13_nxp"><chip><name>LPC11U37/401</name> +<family>LPC11Uxx</family> <vendor>NXP (formerly Philips)</vendor> <reset board="None" core="Real" sys="Real"/> <clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> <memory can_program="true" id="Flash" is_ro="true" type="Flash"/> <memory id="RAM" type="RAM"/> <memory id="Periph" is_volatile="true" type="Peripheral"/> -<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/> +<memoryInstance derived_from="Flash" id="MFlash128" location="0x0" size="0x20000"/> <memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> <memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/> -<memoryInstance derived_from="RAM" id="RamPeriph2" location="0x20000000" size="0x800"/> -<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/> -<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/> -<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/> -<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/> -<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/> -<peripheralInstance derived_from="I2C" id="I2C" location="0x40000000"/> -<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40004000"/> -<peripheralInstance derived_from="USART" id="USART" location="0x40008000"/> -<peripheralInstance derived_from="CT16B0" id="CT16B0" location="0x4000c000"/> -<peripheralInstance derived_from="CT16B1" id="CT16B1" location="0x40010000"/> -<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40014000"/> -<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40018000"/> -<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/> -<peripheralInstance derived_from="PMU" id="PMU" location="0x40038000"/> -<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x4003c000"/> -<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40040000"/> -<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/> -<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/> -<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x4004c000"/> -<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40058000"/> -<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x4005c000"/> -<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40060000"/> -<peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x40064000"/> -<peripheralInstance derived_from="USB" id="USB" location="0x40080000"/> -<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x50000000"/> +<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x400" progwithcode="TRUE" size="0x20000"/> +<peripheralInstance derived_from="CM0_NVIC" id="NVIC" location="0xe000e000"/> +<peripheralInstance derived_from="LPC11U_GPIO" id="GPIO" location="0x50000000"/> +<peripheralInstance derived_from="LPC11U_USBDEV" id="USB" location="0x40080000"/> +<peripheralInstance derived_from="CM0_DCR" id="DCR" location="0xe000edf0"/> +<peripheralInstance derived_from="LPC11U_GPIO_GROUP_INT" id="GPIOGROUP0INT" location="0x40060000"/> +<peripheralInstance derived_from="LPC11U_GPIO_GROUP_INT" id="GPIOGROUP1INT" location="0x4005c000"/> +<peripheralInstance derived_from="LPC11U_GPIO_INT" id="GPIOINT" location="0x4004c000"/> +<peripheralInstance derived_from="LPC11_13_SSP" id="SSP1" location="0x40058000"/> +<peripheralInstance derived_from="LPC11U_FMC" id="FMC" location="0x4003c000"/> +<peripheralInstance derived_from="LPC11U_SYSCTL" id="SYSCTL" location="0x40048000"/> +<peripheralInstance derived_from="LPC11U_IOCON" id="IOCON" location="0x40044000"/> +<peripheralInstance derived_from="LPC11_13_SSP" id="SSP0" location="0x40040000"/> +<peripheralInstance derived_from="LPC11_13_PMU" id="PMU" location="0x40038000"/> +<peripheralInstance derived_from="LPC11_13_ADC" id="ADC" location="0x4001c000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" id="TIMER1" location="0x40018000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" id="TIMER0" location="0x40014000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" id="TMR161" location="0x40010000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" id="TMR160" location="0x4000c000"/> +<peripheralInstance derived_from="LPC1xxx_UART_MODEM" id="UART0" location="0x40008000"/> +<peripheralInstance derived_from="LPC11_13_WDT" id="WDT" location="0x40004000"/> +<peripheralInstance derived_from="LPC11_13_I2C" id="I2C0" location="0x40000000"/> </chip> -<processor><name gcc_name="cortex-m3">Cortex-M3</name> +<processor><name gcc_name="cortex-m0">Cortex-M0</name> <family>Cortex-M</family> </processor> -<link href="nxp_lpc13Uxx_peripheral.xme" show="embed" type="simple"/> +<link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/> </info> </infoList> </TargetConfig> diff --git a/demos/device/device_os_none/device_os_none.uvopt b/demos/device/device_os_none/device_os_none.uvopt index 380621dfb..34031745b 100644 --- a/demos/device/device_os_none/device_os_none.uvopt +++ b/demos/device/device_os_none/device_os_none.uvopt @@ -623,7 +623,7 @@ 1 0 - 0 + 1 8 @@ -786,7 +786,7 @@ 1 0 - 1 + 0 8 @@ -865,10 +865,6 @@ ARMDBGFLAGS - - 0 - DLGUARM - 0 JL2CM3 @@ -922,10 +918,10 @@ 1 0 0 - 29 + 24 0 - 125 - 137 + 60 + 11 0 ..\src\main.c main.c @@ -1048,7 +1044,7 @@ tinyusb - 0 + 1 0 0 0 @@ -1330,10 +1326,10 @@ 1 0 0 - 1 + 0 0 - 408 - 412 + 1 + 1 0 ..\..\..\tinyusb\device\dcd_lpc_11uxx_13uxx.c dcd_lpc_11uxx_13uxx.c @@ -1652,7 +1648,7 @@ 0 19 0 - 19 + 20 23 0 ..\..\bsp\lpc11uxx\LPC11Uxx_DriverLib\lpc11uxx_gpio.c @@ -1668,7 +1664,7 @@ 0 19 0 - 10 + 11 14 0 ..\..\bsp\lpc11uxx\LPC11Uxx_DriverLib\lpc11uxx_uart.c @@ -2012,7 +2008,7 @@ 0 30 0 - 145 + 146 150 0 ..\..\bsp\lpc43xx\startup_keil\startup_LPC43xx.s diff --git a/demos/device/device_os_none/device_os_none.uvproj b/demos/device/device_os_none/device_os_none.uvproj index acc4a20d8..72e07d1a5 100644 --- a/demos/device/device_os_none/device_os_none.uvproj +++ b/demos/device/device_os_none/device_os_none.uvproj @@ -4078,7 +4078,7 @@ - 1 + 0 0 0 0 @@ -4086,7 +4086,7 @@ 0 0x1A000000 0x10000000 - + ..\..\bsp\lpc11uxx\startup_keil\lpc11uxx.sct diff --git a/tinyusb/device/dcd_lpc_11uxx_13uxx.c b/tinyusb/device/dcd_lpc_11uxx_13uxx.c index d87c80ad2..4eef8f7dd 100644 --- a/tinyusb/device/dcd_lpc_11uxx_13uxx.c +++ b/tinyusb/device/dcd_lpc_11uxx_13uxx.c @@ -113,7 +113,7 @@ typedef struct { uint16_t total_bytes; }next_td[DCD_11U_13U_QHD_COUNT]; - uint32_t current_ioc; ///< interrupt on complete mask for current TD + uint32_t current_ioc; ///< interrupt on complete mask for current TD uint32_t next_ioc; ///< interrupt on complete mask for next TD // should start from 128 diff --git a/tinyusb/hal/hal_lpc11uxx.c b/tinyusb/hal/hal_lpc11uxx.c index 60177485d..d1ee35e2c 100644 --- a/tinyusb/hal/hal_lpc11uxx.c +++ b/tinyusb/hal/hal_lpc11uxx.c @@ -46,6 +46,7 @@ tusb_error_t hal_init(void) // TODO remove magic number /* Enable AHB clock to the USB block and USB RAM. */ LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14) | (0x1<<27)); + LPC_SYSCON->PDRUNCFG &= ~( BIT_(8) | BIT_(10) ); // enable USB PLL & USB transceiver /* Pull-down is needed, or internally, VBUS will be floating. This is to address the wrong status in VBUSDebouncing bit in CmdStatus register. */ diff --git a/tinyusb/hal/hal_lpc13uxx.h b/tinyusb/hal/hal_lpc13uxx.h index fefa58d20..51d17ca59 100644 --- a/tinyusb/hal/hal_lpc13uxx.h +++ b/tinyusb/hal/hal_lpc13uxx.h @@ -36,12 +36,6 @@ */ /**************************************************************************/ -/** \file - * \brief TBD - * - * \note TBD - */ - /** \ingroup TBD * \defgroup TBD * \brief TBD