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https://github.com/hathach/tinyusb.git
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Merge pull request #2847 from pschatzmann/rp2040-iso
Rp2040 - ISO API to make Audio work / Merge to master
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commit
c6dccffa2d
@ -1307,7 +1307,7 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
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#ifdef TUP_DCD_EDPT_ISO_ALLOC
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/* Allocate ISO endpoints */
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uint16_t ep_size = 0;
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uint16_t ep_addr = 0;
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uint8_t ep_addr = 0;
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uint8_t const *p_desc = (uint8_t const*)itf_desc + stm->desc.beg;
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uint8_t const *p_desc_end = (uint8_t const*)itf_desc + stm->desc.end;
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while (p_desc < p_desc_end) {
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@ -177,6 +177,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { retur
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//------------- Mathematics -------------//
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TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return TU_DIV_CEIL(v, d); }
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TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_round_up(uint32_t v, uint32_t f) { return tu_div_ceil(v, f) * f; }
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// log2 of a value is its MSB's position
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// TODO use clz TODO remove
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@ -400,6 +400,7 @@
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// Raspberry Pi
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//--------------------------------------------------------------------+
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#elif TU_CHECK_MCU(OPT_MCU_RP2040)
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#define TUP_DCD_EDPT_ISO_ALLOC
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#define TUP_DCD_ENDPOINT_MAX 16
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#define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb")))
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@ -46,7 +46,6 @@
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/*------------------------------------------------------------------*/
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/* Low level controller
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*------------------------------------------------------------------*/
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// Init these in dcd_init
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static uint8_t* next_buffer_ptr;
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@ -66,58 +65,31 @@ TU_ATTR_ALWAYS_INLINE static inline struct hw_endpoint* hw_endpoint_get_by_addr(
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return hw_endpoint_get_by_num(num, dir);
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}
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static void _hw_endpoint_alloc(struct hw_endpoint* ep, uint8_t transfer_type) {
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// size must be multiple of 64
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uint size = tu_div_ceil(ep->wMaxPacketSize, 64) * 64u;
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// Allocate from the USB buffer space (max 3840 bytes)
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static void hw_endpoint_alloc(struct hw_endpoint* ep, size_t size) {
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// round up size to multiple of 64
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size = tu_round_up(ep->wMaxPacketSize, 64);
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// double buffered Bulk endpoint
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if (transfer_type == TUSB_XFER_BULK) {
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if (ep->transfer_type == TUSB_XFER_BULK) {
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size *= 2u;
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}
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// assign buffer
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ep->hw_data_buf = next_buffer_ptr;
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next_buffer_ptr += size;
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assert(((uintptr_t) next_buffer_ptr & 0b111111u) == 0);
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uint dpram_offset = hw_data_offset(ep->hw_data_buf);
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hard_assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX);
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pico_info(" Allocated %d bytes at offset 0x%x (0x%p)\r\n", size, dpram_offset, ep->hw_data_buf);
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// Fill in endpoint control register with buffer offset
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uint32_t const reg = EP_CTRL_ENABLE_BITS | ((uint) transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset;
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hard_assert(next_buffer_ptr < usb_dpram->epx_data + sizeof(usb_dpram->epx_data));
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pico_info(" Allocated %d bytes (0x%p)\r\n", size, ep->hw_data_buf);
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}
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// Enable endpoint
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TU_ATTR_ALWAYS_INLINE static inline void hw_endpoint_enable(struct hw_endpoint* ep) {
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uint32_t const reg = EP_CTRL_ENABLE_BITS | ((uint) ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | hw_data_offset(ep->hw_data_buf);
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*ep->endpoint_control = reg;
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}
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static void _hw_endpoint_close(struct hw_endpoint* ep) {
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// Clear hardware registers and then zero the struct
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// Clears endpoint enable
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*ep->endpoint_control = 0;
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// Clears buffer available, etc
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*ep->buffer_control = 0;
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// Clear any endpoint state
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memset(ep, 0, sizeof(struct hw_endpoint));
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// Reclaim buffer space if all endpoints are closed
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bool reclaim_buffers = true;
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for (uint8_t i = 1; i < USB_MAX_ENDPOINTS; i++) {
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if (hw_endpoint_get_by_num(i, TUSB_DIR_OUT)->hw_data_buf != NULL ||
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hw_endpoint_get_by_num(i, TUSB_DIR_IN)->hw_data_buf != NULL) {
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reclaim_buffers = false;
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break;
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}
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}
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if (reclaim_buffers) {
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next_buffer_ptr = &usb_dpram->epx_data[0];
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}
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}
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static void hw_endpoint_close(uint8_t ep_addr) {
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struct hw_endpoint* ep = hw_endpoint_get_by_addr(ep_addr);
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_hw_endpoint_close(ep);
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}
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// main processing for dcd_edpt_iso_activate
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static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type) {
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struct hw_endpoint* ep = hw_endpoint_get_by_addr(ep_addr);
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@ -156,9 +128,18 @@ static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t t
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} else {
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ep->endpoint_control = &usb_dpram->ep_ctrl[num - 1].out;
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}
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}
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}
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// alloc a buffer and fill in endpoint control register
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_hw_endpoint_alloc(ep, transfer_type);
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// Init, allocate buffer and enable endpoint
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static void hw_endpoint_open(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type) {
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struct hw_endpoint* ep = hw_endpoint_get_by_addr(ep_addr);
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hw_endpoint_init(ep_addr, wMaxPacketSize, transfer_type);
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const uint8_t num = tu_edpt_number(ep_addr);
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if (num != 0) {
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// EP0 is already enabled
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hw_endpoint_alloc(ep, ep->wMaxPacketSize);
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hw_endpoint_enable(ep);
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}
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}
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@ -387,8 +368,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
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// Init control endpoints
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tu_memclr(hw_endpoints[0], 2 * sizeof(hw_endpoint_t));
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hw_endpoint_init(0x0, 64, TUSB_XFER_CONTROL);
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hw_endpoint_init(0x80, 64, TUSB_XFER_CONTROL);
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hw_endpoint_open(0x0, 64, TUSB_XFER_CONTROL);
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hw_endpoint_open(0x80, 64, TUSB_XFER_CONTROL);
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// Init non-control endpoints
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reset_non_control_endpoints();
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@ -493,9 +474,34 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* req
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}
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}
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bool dcd_edpt_open(__unused uint8_t rhport, tusb_desc_endpoint_t const* desc_edpt) {
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assert(rhport == 0);
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hw_endpoint_init(desc_edpt->bEndpointAddress, tu_edpt_packet_size(desc_edpt), desc_edpt->bmAttributes.xfer);
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bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_edpt) {
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(void) rhport;
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const uint8_t xfer_type = desc_edpt->bmAttributes.xfer;
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TU_VERIFY(xfer_type != TUSB_XFER_ISOCHRONOUS);
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hw_endpoint_open(desc_edpt->bEndpointAddress, tu_edpt_packet_size(desc_edpt), xfer_type);
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return true;
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}
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// New API: Allocate packet buffer used by ISO endpoints
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// Some MCU need manual packet buffer allocation, we allocate the largest size to avoid clustering
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bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
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(void) rhport;
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struct hw_endpoint* ep = hw_endpoint_get_by_addr(ep_addr);
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hw_endpoint_init(ep_addr, largest_packet_size, TUSB_XFER_ISOCHRONOUS);
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hw_endpoint_alloc(ep, largest_packet_size);
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return true;
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}
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// New API: Configure and enable an ISO endpoint according to descriptor
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bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
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(void) rhport;
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const uint8_t ep_addr = ep_desc->bEndpointAddress;
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// Fill in endpoint control register with buffer offset
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struct hw_endpoint* ep = hw_endpoint_get_by_addr(ep_addr);
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TU_ASSERT(ep->hw_data_buf != NULL); // must be inited and buffer allocated
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ep->wMaxPacketSize = ep_desc->wMaxPacketSize;
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hw_endpoint_enable(ep);
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return true;
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}
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@ -540,12 +546,6 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
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}
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}
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void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
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(void) rhport;
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pico_trace("dcd_edpt_close %02x\r\n", ep_addr);
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hw_endpoint_close(ep_addr);
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}
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void __tusb_irq_path_func(dcd_int_handler)(uint8_t rhport) {
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(void) rhport;
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dcd_rp2040_irq();
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