mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-30 22:20:17 +00:00
Merge pull request #66 from hathach/develop
support makefile device example for all boards
This commit is contained in:
commit
c4b1539250
2
.gitmodules
vendored
2
.gitmodules
vendored
@ -9,7 +9,7 @@
|
||||
url = https://github.com/ThrowTheSwitch/Unity.git
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[submodule "hw/mcu/st/stm32lib"]
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path = hw/mcu/st/stm32lib
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url = https://github.com/micropython/stm32lib.git
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url = https://github.com/hathach/stm32lib.git
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[submodule "hw/mcu/nxp/lpcopen"]
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path = hw/mcu/nxp/lpcopen
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url = https://github.com/hathach/lpcopen.git
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|
@ -9,7 +9,4 @@ INC += \
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EXAMPLE_SOURCE += $(wildcard src/*.c)
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# Board source
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SRC_C += hw/bsp/$(BOARD)/board_$(BOARD).c
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include ../../rules.mk
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|
@ -91,7 +91,6 @@
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/gpio_11u6x.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/syscon_11u6x.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/sysinit_11u6x.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/uart_0_11u6x.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/iocon_11u6x.c" />
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</folder>
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</folder>
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|
@ -81,7 +81,6 @@
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/gpio_13xx_1.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysctl_13xx.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysinit_13xx.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/uart_13xx.c" />
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<file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/iocon_13xx.c" />
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</folder>
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</folder>
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|
@ -1,7 +1,7 @@
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/*
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||||
* The MIT License (MIT)
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||||
*
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* Copyright (c) 2018, hathach (tinyusb.org)
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -46,7 +46,9 @@
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#endif
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#define CFG_TUSB_OS OPT_OS_NONE
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#define CFG_TUSB_DEBUG 2
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// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
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// #define CFG_TUSB_DEBUG 0
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/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
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* Tinyusb use follows macros to declare transferring memory so that they can be put
|
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|
@ -1,7 +1,7 @@
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||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
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||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -136,7 +136,7 @@ uint8_t const desc_configuration[] =
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#if CFG_TUD_MSC
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// Interface number, string index, EP Out & EP In address, EP size
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TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC, 0x80 | EPNUM_MSC, 64), // highspeed 512
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TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
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#endif
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#if CFG_TUD_HID
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|
@ -11,9 +11,6 @@ INC += \
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EXAMPLE_SOURCE += $(wildcard src/*.c)
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# Board source
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SRC_C += hw/bsp/$(BOARD)/board_$(BOARD).c
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# FreeRTOS source
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SRC_C += \
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lib/FreeRTOS/Source/list.c \
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|
@ -1,7 +1,7 @@
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||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -46,7 +46,9 @@
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#endif
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||||
#define CFG_TUSB_OS OPT_OS_FREERTOS
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#define CFG_TUSB_DEBUG 2
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// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
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// #define CFG_TUSB_DEBUG 0
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||||
|
||||
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
||||
* Tinyusb use follows macros to declare transferring memory so that they can be put
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -9,7 +9,4 @@ INC += \
|
||||
EXAMPLE_SOURCE += $(wildcard src/*.c)
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||||
SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# Board source
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SRC_C += hw/bsp/$(BOARD)/board_$(BOARD).c
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include ../../rules.mk
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|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
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||||
@ -46,7 +46,9 @@
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#endif
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#define CFG_TUSB_OS OPT_OS_NONE
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#define CFG_TUSB_DEBUG 2
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// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
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// #define CFG_TUSB_DEBUG 0
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||||
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
||||
* Tinyusb use follows macros to declare transferring memory so that they can be put
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -9,7 +9,4 @@ INC += \
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EXAMPLE_SOURCE += $(wildcard src/*.c)
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# Board source
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SRC_C += hw/bsp/$(BOARD)/board_$(BOARD).c
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include ../../rules.mk
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|
@ -1,7 +1,7 @@
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/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -46,7 +46,9 @@
|
||||
#endif
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||||
|
||||
#define CFG_TUSB_OS OPT_OS_NONE
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#define CFG_TUSB_DEBUG 2
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||||
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
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||||
// #define CFG_TUSB_DEBUG 0
|
||||
|
||||
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
||||
* Tinyusb use follows macros to declare transferring memory so that they can be put
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -79,7 +79,7 @@ uint8_t const desc_configuration[] =
|
||||
TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
|
||||
|
||||
// Interface number, string index, EP Out & EP In address, EP size
|
||||
TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EPNUM_MSC, 0x80 | EPNUM_MSC, 64), // highspeed 512
|
||||
TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
|
||||
};
|
||||
|
||||
// Invoked when received GET DEVICE DESCRIPTOR
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -46,9 +46,11 @@
|
||||
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST
|
||||
#endif
|
||||
|
||||
#define CFG_TUSB_DEBUG 2
|
||||
#define CFG_TUSB_OS OPT_OS_NONE
|
||||
|
||||
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
|
||||
// #define CFG_TUSB_DEBUG 0
|
||||
|
||||
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
||||
* Tinyusb use follows macros to declare transferring memory so that they can be put
|
||||
* into those specific section.
|
||||
|
@ -31,6 +31,9 @@ BUILD = build-$(BOARD)
|
||||
# Board specific
|
||||
include $(TOP)/hw/bsp/$(BOARD)/board.mk
|
||||
|
||||
# Include all source C in board folder
|
||||
SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/$(BOARD)/*.c))
|
||||
|
||||
# Compiler Flags
|
||||
CFLAGS += \
|
||||
-fsingle-precision-constant \
|
||||
@ -59,7 +62,7 @@ CFLAGS += \
|
||||
|
||||
# Debugging/Optimization
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -O0 -ggdb
|
||||
CFLAGS += -O0 -ggdb -DCFG_TUSB_DEBUG=1
|
||||
else
|
||||
CFLAGS += -flto -Os
|
||||
endif
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -54,7 +54,7 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// COMMON CONFIGURATION
|
||||
//--------------------------------------------------------------------+
|
||||
#define CFG_TUSB_DEBUG 2
|
||||
#define CFG_TUSB_DEBUG 1
|
||||
|
||||
//#define CFG_TUSB_OS OPT_OS_NONE // defined using eclipse build
|
||||
//#define CFG_TUD_TASK_PRIO 0 // defined using eclipse build
|
||||
|
@ -22,6 +22,7 @@ INC += $(TOP)/src
|
||||
#
|
||||
CFLAGS += $(addprefix -I,$(INC))
|
||||
LDFLAGS += $(CFLAGS) -fshort-enums -Wl,-T,$(TOP)/$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nosys.specs -specs=nano.specs
|
||||
ASFLAGS += $(CFLAGS)
|
||||
|
||||
# Assembly files can be name with upper case .S, convert it to .s
|
||||
SRC_S := $(SRC_S:.S=.s)
|
||||
@ -108,4 +109,4 @@ flash-jlink: $(BUILD)/$(BOARD)-firmware.hex
|
||||
@echo r >> $(BUILD)/$(BOARD).jlink
|
||||
@echo go >> $(BUILD)/$(BOARD).jlink
|
||||
@echo exit >> $(BUILD)/$(BOARD).jlink
|
||||
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
|
||||
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
41
hw/bsp/ea4088qs/board.mk
Normal file
41
hw/bsp/ea4088qs/board.mk
Normal file
@ -0,0 +1,41 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-nostdlib \
|
||||
-DCORE_M4 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC40XX \
|
||||
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
|
||||
-D__USE_LPCOPEN
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/ea4088qs/lpc4088.ld
|
||||
|
||||
# TODO remove later
|
||||
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/chip_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/clock_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/gpio_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/iocon_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/sysctl_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/sysinit_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/uart_17xx_40xx.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_40xx/inc
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc17_40
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM3
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC4088
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -30,9 +30,8 @@
|
||||
#define LED_PORT 2
|
||||
#define LED_PIN 19
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
#define BUTTON_PORT 2
|
||||
#define BUTTON_PIN 10
|
||||
|
||||
/* System oscillator rate and RTC oscillator rate */
|
||||
const uint32_t OscRateIn = 12000000;
|
||||
@ -41,8 +40,11 @@ const uint32_t RTCOscRateIn = 32768;
|
||||
/* Pin muxing configuration */
|
||||
static const PINMUX_GRP_T pinmuxing[] =
|
||||
{
|
||||
/* LEDs */
|
||||
// LED
|
||||
{2, 19, (IOCON_FUNC0 | IOCON_MODE_INACT)},
|
||||
|
||||
// Button
|
||||
{2, 10, (IOCON_FUNC0 | IOCON_MODE_INACT | IOCON_MODE_PULLUP)},
|
||||
};
|
||||
|
||||
static const PINMUX_GRP_T pin_usb_mux[] =
|
||||
@ -67,7 +69,7 @@ static const PINMUX_GRP_T pin_usb_mux[] =
|
||||
// Invoked by startup code
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* Enable IOCON clock */
|
||||
Chip_IOCON_Init(LPC_IOCON);
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
|
||||
Chip_SetupXtalClocking();
|
||||
}
|
||||
@ -86,16 +88,17 @@ void board_init(void)
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO);
|
||||
|
||||
//------------- LED -------------//
|
||||
// LED
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
|
||||
|
||||
//------------- BUTTON -------------//
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIO_SetDir(buttons[i].port, TU_BIT(buttons[i].pin), 0);
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
|
||||
//------------- UART -------------//
|
||||
// UART
|
||||
|
||||
//------------- USB -------------//
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
|
||||
|
||||
// Port1 as Host, Port2: Device
|
||||
Chip_USB_Init();
|
||||
|
||||
@ -108,35 +111,23 @@ void board_init(void)
|
||||
|
||||
// USB1 = host, USB2 = device
|
||||
LPC_USB->StCtrl = 0x3;
|
||||
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
//------------- LED -------------//
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state);
|
||||
}
|
||||
|
||||
//------------- Buttons -------------//
|
||||
#if 0
|
||||
static bool button_read(uint8_t id)
|
||||
{
|
||||
// return !TU_BIT_TEST( GPIO_ReadValue(buttons[id].gpio_port), buttons[id].gpio_pin ); // button is active low
|
||||
}
|
||||
#endif
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
uint32_t result = 0;
|
||||
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0);
|
||||
|
||||
return result;
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
//------------- UART -------------//
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
//return UART_ReceiveByte(BOARD_UART_PORT);
|
||||
@ -153,14 +144,8 @@ int board_uart_write(void const * buf, int len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
@ -170,5 +155,4 @@ uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
418
hw/bsp/ea4088qs/cr_startup_lpc40xx.c
Normal file
418
hw/bsp/ea4088qs/cr_startup_lpc40xx.c
Normal file
@ -0,0 +1,418 @@
|
||||
//*****************************************************************************
|
||||
// LPC407x_8x Microcontroller Startup code for use with LPCXpresso IDE
|
||||
//
|
||||
// Version : 140114
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2014
|
||||
// All rights reserved.
|
||||
//
|
||||
// Software that is described herein is for illustrative purposes only
|
||||
// which provides customers with programming information regarding the
|
||||
// LPC products. This software is supplied "AS IS" without any warranties of
|
||||
// any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
// all warranties, express or implied, including all implied warranties of
|
||||
// merchantability, fitness for a particular purpose and non-infringement of
|
||||
// intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
// or liability for the use of the software, conveys no license or rights under any
|
||||
// patent, copyright, mask work right, or any other intellectual property rights in
|
||||
// or to any products. NXP Semiconductors reserves the right to make changes
|
||||
// in the software without notification. NXP Semiconductors also makes no
|
||||
// representation or warranty that such application will be suitable for the
|
||||
// specified use without further testing or modification.
|
||||
//
|
||||
// Permission to use, copy, modify, and distribute this software and its
|
||||
// documentation is hereby granted, under NXP Semiconductors' and its
|
||||
// licensor's relevant copyrights in the software, without fee, provided that it
|
||||
// is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
// copyright, permission, and disclaimer notice must appear in all copies of
|
||||
// this code.
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
// Declaration of external SystemInit function
|
||||
extern void SystemInit(void);
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#if defined (__USE_LPCOPEN)
|
||||
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#else
|
||||
void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#endif
|
||||
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#if defined (__USE_LPCOPEN)
|
||||
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#else
|
||||
void MCI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#endif
|
||||
void UART4_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PWM0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM4
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC40xx
|
||||
WDT_IRQHandler, // 16, 0x40 - WDT
|
||||
TIMER0_IRQHandler, // 17, 0x44 - TIMER0
|
||||
TIMER1_IRQHandler, // 18, 0x48 - TIMER1
|
||||
TIMER2_IRQHandler, // 19, 0x4c - TIMER2
|
||||
TIMER3_IRQHandler, // 20, 0x50 - TIMER3
|
||||
UART0_IRQHandler, // 21, 0x54 - UART0
|
||||
UART1_IRQHandler, // 22, 0x58 - UART1
|
||||
UART2_IRQHandler, // 23, 0x5c - UART2
|
||||
UART3_IRQHandler, // 24, 0x60 - UART3
|
||||
PWM1_IRQHandler, // 25, 0x64 - PWM1
|
||||
I2C0_IRQHandler, // 26, 0x68 - I2C0
|
||||
I2C1_IRQHandler, // 27, 0x6c - I2C1
|
||||
I2C2_IRQHandler, // 28, 0x70 - I2C2
|
||||
IntDefaultHandler, // 29, Not used
|
||||
SSP0_IRQHandler, // 30, 0x78 - SSP0
|
||||
SSP1_IRQHandler, // 31, 0x7c - SSP1
|
||||
PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
|
||||
RTC_IRQHandler, // 33, 0x84 - RTC
|
||||
EINT0_IRQHandler, // 34, 0x88 - EINT0
|
||||
EINT1_IRQHandler, // 35, 0x8c - EINT1
|
||||
EINT2_IRQHandler, // 36, 0x90 - EINT2
|
||||
EINT3_IRQHandler, // 37, 0x94 - EINT3
|
||||
ADC_IRQHandler, // 38, 0x98 - ADC
|
||||
BOD_IRQHandler, // 39, 0x9c - BOD
|
||||
USB_IRQHandler, // 40, 0xA0 - USB
|
||||
CAN_IRQHandler, // 41, 0xa4 - CAN
|
||||
DMA_IRQHandler, // 42, 0xa8 - GP DMA
|
||||
I2S_IRQHandler, // 43, 0xac - I2S
|
||||
#if defined (__USE_LPCOPEN)
|
||||
ETH_IRQHandler, // 44, 0xb0 - Ethernet
|
||||
SDIO_IRQHandler, // 45, 0xb4 - SD/MMC card I/F
|
||||
#else
|
||||
ENET_IRQHandler, // 44, 0xb0 - Ethernet
|
||||
MCI_IRQHandler, // 45, 0xb4 - SD/MMC card I/F
|
||||
#endif
|
||||
MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
|
||||
QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
|
||||
PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
|
||||
USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
|
||||
CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
|
||||
UART4_IRQHandler, // 51, 0xcc - UART4
|
||||
SSP2_IRQHandler, // 52, 0xd0 - SSP2
|
||||
LCD_IRQHandler, // 53, 0xd4 - LCD
|
||||
GPIO_IRQHandler, // 54, 0xd8 - GPIO
|
||||
PWM0_IRQHandler, // 55, 0xdc - PWM0
|
||||
EEPROM_IRQHandler, // 56, 0xe0 - EEPROM
|
||||
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
|
||||
/*
|
||||
* Code to enable the Cortex-M4 FPU only included
|
||||
* if appropriate build options have been selected.
|
||||
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
|
||||
*/
|
||||
// Read CPACR (located at address 0xE000ED88)
|
||||
// Set bits 20-23 to enable CP10 and CP11 coprocessors
|
||||
// Write back the modified value to the CPACR
|
||||
asm volatile ("LDR.W R0, =0xE000ED88\n\t"
|
||||
"LDR R1, [R0]\n\t"
|
||||
"ORR R1, R1, #(0xF << 20)\n\t"
|
||||
"STR R1, [R0]");
|
||||
#endif // (__VFP_FP__) && !(__SOFTFP__)
|
||||
|
||||
// Check to see if we are running the code from a non-zero
|
||||
// address (eg RAM, external flash), in which case we need
|
||||
// to modify the VTOR register to tell the CPU that the
|
||||
// vector table is located at a non-0x0 address.
|
||||
|
||||
// Note that we do not use the CMSIS register access mechanism,
|
||||
// as there is no guarantee that the project has been configured
|
||||
// to use CMSIS.
|
||||
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
|
||||
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
|
||||
// CMSIS : SCB->VTOR = <address of vector table>
|
||||
*pSCB_VTOR = (unsigned int)g_pfnVectors;
|
||||
}
|
||||
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void MemManage_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void BusFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void UsageFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void DebugMon_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{ while(1) {}
|
||||
}
|
184
hw/bsp/ea4088qs/lpc4088.ld
Normal file
184
hw/bsp/ea4088qs/lpc4088.ld
Normal file
@ -0,0 +1,184 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC4088
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 15, 2019 5:16:07 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
|
||||
RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */
|
||||
RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlash512 = 0x0 ; /* MFlash512 */
|
||||
__base_Flash = 0x0 ; /* Flash */
|
||||
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__base_RamLoc64 = 0x10000000 ; /* RamLoc64 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */
|
||||
__top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */
|
||||
__base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */
|
||||
__base_RAM2 = 0x20000000 ; /* RAM2 */
|
||||
__top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlash512
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlash512
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash512
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash512
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamPeriph32 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamPeriph32)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamPeriph32*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamPeriph32 AT>MFlash512
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc64
|
||||
|
||||
/* Main DATA section (RamLoc64) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc64 AT>MFlash512
|
||||
|
||||
/* BSS section for RamPeriph32 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamPeriph32*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamPeriph32
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > RamLoc64
|
||||
|
||||
/* NOINIT section for RamPeriph32 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamPeriph32*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamPeriph32
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc64
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
41
hw/bsp/ea4357/board.mk
Normal file
41
hw/bsp/ea4357/board.mk
Normal file
@ -0,0 +1,41 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-nostdlib \
|
||||
-DCORE_M4 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX \
|
||||
-D__USE_LPCOPEN
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/ea4357/lpc4357.ld
|
||||
|
||||
# TODO remove later
|
||||
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/chip_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/clock_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/gpio_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/sysinit_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/i2c_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/i2cm_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_43xx/src/uart_18xx_43xx.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc/config_43xx
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc18_43
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC4357
|
||||
JLINK_IF = jtag
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -33,55 +33,40 @@
|
||||
#define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD
|
||||
#define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD
|
||||
|
||||
static const struct {
|
||||
uint8_t mux_port;
|
||||
uint8_t mux_pin;
|
||||
// P9_1 joystick down
|
||||
#define BUTTON_PORT 4
|
||||
#define BUTTON_PIN 13
|
||||
|
||||
uint8_t gpio_port;
|
||||
uint8_t gpio_pin;
|
||||
}buttons[] =
|
||||
{
|
||||
{0x0a, 3, 4, 10 }, // Joystick up
|
||||
{0x09, 1, 4, 13 }, // Joystick down
|
||||
{0x0a, 2, 4, 9 }, // Joystick left
|
||||
{0x09, 0, 4, 12 }, // Joystick right
|
||||
{0x0a, 1, 4, 8 }, // Joystick press
|
||||
{0x02, 7, 0, 7 }, // SW6
|
||||
};
|
||||
|
||||
enum {
|
||||
BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
|
||||
};
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
//static const struct {
|
||||
// uint8_t mux_port;
|
||||
// uint8_t mux_pin;
|
||||
//
|
||||
// uint8_t gpio_port;
|
||||
// uint8_t gpio_pin;
|
||||
//}buttons[] =
|
||||
//{
|
||||
// {0x0a, 3, 4, 10 }, // Joystick up
|
||||
// {0x09, 1, 4, 13 }, // Joystick down
|
||||
// {0x0a, 2, 4, 9 }, // Joystick left
|
||||
// {0x09, 0, 4, 12 }, // Joystick right
|
||||
// {0x0a, 1, 4, 8 }, // Joystick press
|
||||
// {0x02, 7, 0, 7 }, // SW6
|
||||
//};
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* BOARD API
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
/* System configuration variables used by chip driver */
|
||||
const uint32_t ExtRateIn = 0;
|
||||
const uint32_t OscRateIn = 12000000;
|
||||
const uint32_t ExtRateIn = 0;
|
||||
|
||||
static const PINMUX_GRP_T pinmuxing[] =
|
||||
{
|
||||
// Button
|
||||
{0x9, 1, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP)},
|
||||
|
||||
// USB
|
||||
|
||||
/* I2S */
|
||||
@ -124,12 +109,14 @@ void board_init(void)
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO_PORT);
|
||||
|
||||
//------------- LED -------------//
|
||||
/* Init I2C */
|
||||
// LED via pca9532 I2C
|
||||
Chip_SCU_I2C0PinConfig(I2C0_STANDARD_FAST_MODE);
|
||||
Chip_I2C_Init(I2C0);
|
||||
Chip_I2C_SetClockRate(I2C0, 100000);
|
||||
@ -137,14 +124,10 @@ void board_init(void)
|
||||
|
||||
pca9532_init();
|
||||
|
||||
#if 0
|
||||
//------------- BUTTON -------------//
|
||||
for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++)
|
||||
{
|
||||
scu_pinmux(buttons[i].mux_port, buttons[i].mux_pin, GPIO_NOPULL, FUNC0);
|
||||
GPIO_SetDir(buttons[i].gpio_port, TU_BIT(buttons[i].gpio_pin), 0);
|
||||
}
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
#if 0
|
||||
//------------- UART -------------//
|
||||
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1);
|
||||
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1);
|
||||
@ -247,7 +230,10 @@ void board_init(void)
|
||||
// TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host
|
||||
}
|
||||
|
||||
// LED
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
if (state)
|
||||
@ -259,28 +245,12 @@ void board_led_write(bool state)
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// BUTTONS
|
||||
//--------------------------------------------------------------------+
|
||||
#if 0
|
||||
static bool button_read(uint8_t id)
|
||||
{
|
||||
// return !TU_BIT_TEST( GPIO_ReadValue(buttons[id].gpio_port), buttons[id].gpio_pin ); // button is active low
|
||||
}
|
||||
#endif
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
uint32_t result = 0;
|
||||
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0);
|
||||
|
||||
return result;
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// UART
|
||||
//--------------------------------------------------------------------+
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
//return UART_ReceiveByte(BOARD_UART_PORT);
|
||||
@ -296,3 +266,16 @@ int board_uart_write(void const * buf, int len)
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
515
hw/bsp/ea4357/cr_startup_lpc43xx.c
Normal file
515
hw/bsp/ea4357/cr_startup_lpc43xx.c
Normal file
@ -0,0 +1,515 @@
|
||||
//*****************************************************************************
|
||||
// LPC43xx (Cortex-M4) Microcontroller Startup code for use with LPCXpresso IDE
|
||||
//
|
||||
// Version : 150706
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2013-2015
|
||||
// All rights reserved.
|
||||
//
|
||||
// Software that is described herein is for illustrative purposes only
|
||||
// which provides customers with programming information regarding the
|
||||
// LPC products. This software is supplied "AS IS" without any warranties of
|
||||
// any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
// all warranties, express or implied, including all implied warranties of
|
||||
// merchantability, fitness for a particular purpose and non-infringement of
|
||||
// intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
// or liability for the use of the software, conveys no license or rights under any
|
||||
// patent, copyright, mask work right, or any other intellectual property rights in
|
||||
// or to any products. NXP Semiconductors reserves the right to make changes
|
||||
// in the software without notification. NXP Semiconductors also makes no
|
||||
// representation or warranty that such application will be suitable for the
|
||||
// specified use without further testing or modification.
|
||||
//
|
||||
// Permission to use, copy, modify, and distribute this software and its
|
||||
// documentation is hereby granted, under NXP Semiconductors' and its
|
||||
// licensor's relevant copyrights in the software, without fee, provided that it
|
||||
// is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
// copyright, permission, and disclaimer notice must appear in all copies of
|
||||
// this code.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
// Declaration of external SystemInit function
|
||||
extern void SystemInit(void);
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#if defined (__USE_LPCOPEN)
|
||||
void M0APP_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#else
|
||||
void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#endif
|
||||
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#if defined (__USE_LPCOPEN)
|
||||
void ADCHS_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#else
|
||||
void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#endif
|
||||
void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void M0SUB_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for LPC MCU vector table checksum from Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
WEAK extern void __valid_user_code_checksum(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((used,section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM4
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
__valid_user_code_checksum, // LPC MCU Checksum
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC43 (M4)
|
||||
DAC_IRQHandler, // 16
|
||||
#if defined (__USE_LPCOPEN)
|
||||
M0APP_IRQHandler, // 17 CortexM4/M0 (LPC43XX ONLY)
|
||||
#else
|
||||
M0CORE_IRQHandler, // 17
|
||||
#endif
|
||||
DMA_IRQHandler, // 18
|
||||
0, // 19
|
||||
FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
|
||||
ETH_IRQHandler, // 21
|
||||
SDIO_IRQHandler, // 22
|
||||
LCD_IRQHandler, // 23
|
||||
USB0_IRQHandler, // 24
|
||||
USB1_IRQHandler, // 25
|
||||
SCT_IRQHandler, // 26
|
||||
RIT_IRQHandler, // 27
|
||||
TIMER0_IRQHandler, // 28
|
||||
TIMER1_IRQHandler, // 29
|
||||
TIMER2_IRQHandler, // 30
|
||||
TIMER3_IRQHandler, // 31
|
||||
MCPWM_IRQHandler, // 32
|
||||
ADC0_IRQHandler, // 33
|
||||
I2C0_IRQHandler, // 34
|
||||
I2C1_IRQHandler, // 35
|
||||
SPI_IRQHandler, // 36
|
||||
ADC1_IRQHandler, // 37
|
||||
SSP0_IRQHandler, // 38
|
||||
SSP1_IRQHandler, // 39
|
||||
UART0_IRQHandler, // 40
|
||||
UART1_IRQHandler, // 41
|
||||
UART2_IRQHandler, // 42
|
||||
UART3_IRQHandler, // 43
|
||||
I2S0_IRQHandler, // 44
|
||||
I2S1_IRQHandler, // 45
|
||||
SPIFI_IRQHandler, // 46
|
||||
SGPIO_IRQHandler, // 47
|
||||
GPIO0_IRQHandler, // 48
|
||||
GPIO1_IRQHandler, // 49
|
||||
GPIO2_IRQHandler, // 50
|
||||
GPIO3_IRQHandler, // 51
|
||||
GPIO4_IRQHandler, // 52
|
||||
GPIO5_IRQHandler, // 53
|
||||
GPIO6_IRQHandler, // 54
|
||||
GPIO7_IRQHandler, // 55
|
||||
GINT0_IRQHandler, // 56
|
||||
GINT1_IRQHandler, // 57
|
||||
EVRT_IRQHandler, // 58
|
||||
CAN1_IRQHandler, // 59
|
||||
0, // 60
|
||||
#if defined (__USE_LPCOPEN)
|
||||
ADCHS_IRQHandler, // 61 ADCHS combined interrupt
|
||||
#else
|
||||
VADC_IRQHandler, // 61
|
||||
#endif
|
||||
ATIMER_IRQHandler, // 62
|
||||
RTC_IRQHandler, // 63
|
||||
0, // 64
|
||||
WDT_IRQHandler, // 65
|
||||
M0SUB_IRQHandler, // 66
|
||||
CAN0_IRQHandler, // 67
|
||||
QEI_IRQHandler, // 68
|
||||
};
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__((section(".after_vectors"
|
||||
)))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void) {
|
||||
|
||||
// *************************************************************
|
||||
// The following conditional block of code manually resets as
|
||||
// much of the peripheral set of the LPC43 as possible. This is
|
||||
// done because the LPC43 does not provide a means of triggering
|
||||
// a full system reset under debugger control, which can cause
|
||||
// problems in certain circumstances when debugging.
|
||||
//
|
||||
// You can prevent this code block being included if you require
|
||||
// (for example when creating a final executable which you will
|
||||
// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
|
||||
//
|
||||
#ifndef DONT_RESET_ON_RESTART
|
||||
|
||||
// Disable interrupts
|
||||
__asm volatile ("cpsid i");
|
||||
// equivalent to CMSIS '__disable_irq()' function
|
||||
|
||||
unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
|
||||
// LPC_RGU->RESET_CTRL0 @ 0x40053100
|
||||
// LPC_RGU->RESET_CTRL1 @ 0x40053104
|
||||
// Note that we do not use the CMSIS register access mechanism,
|
||||
// as there is no guarantee that the project has been configured
|
||||
// to use CMSIS.
|
||||
|
||||
// Write to LPC_RGU->RESET_CTRL0
|
||||
*(RESET_CONTROL + 0) = 0x10DF1000;
|
||||
// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
|
||||
// USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST
|
||||
|
||||
// Write to LPC_RGU->RESET_CTRL1
|
||||
*(RESET_CONTROL + 1) = 0x01DFF7FF;
|
||||
// M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
|
||||
// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
|
||||
// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
|
||||
// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
|
||||
|
||||
// Clear all pending interrupts in the NVIC
|
||||
volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
|
||||
unsigned int irqpendloop;
|
||||
for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
|
||||
*(NVIC_ICPR + irqpendloop) = 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
// Reenable interrupts
|
||||
__asm volatile ("cpsie i");
|
||||
// equivalent to CMSIS '__enable_irq()' function
|
||||
|
||||
#endif // ifndef DONT_RESET_ON_RESTART
|
||||
// *************************************************************
|
||||
|
||||
#if defined (__USE_LPCOPEN)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
#if !defined (__USE_LPCOPEN)
|
||||
// LPCOpen init code deals with FP and VTOR initialisation
|
||||
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
|
||||
/*
|
||||
* Code to enable the Cortex-M4 FPU only included
|
||||
* if appropriate build options have been selected.
|
||||
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
|
||||
*/
|
||||
// CPACR is located at address 0xE000ED88
|
||||
asm("LDR.W R0, =0xE000ED88");
|
||||
// Read CPACR
|
||||
asm("LDR R1, [R0]");
|
||||
// Set bits 20-23 to enable CP10 and CP11 coprocessors
|
||||
asm(" ORR R1, R1, #(0xF << 20)");
|
||||
// Write back the modified value to the CPACR
|
||||
asm("STR R1, [R0]");
|
||||
#endif // (__VFP_FP__) && !(__SOFTFP__)
|
||||
// ******************************
|
||||
// Check to see if we are running the code from a non-zero
|
||||
// address (eg RAM, external flash), in which case we need
|
||||
// to modify the VTOR register to tell the CPU that the
|
||||
// vector table is located at a non-0x0 address.
|
||||
|
||||
// Note that we do not use the CMSIS register access mechanism,
|
||||
// as there is no guarantee that the project has been configured
|
||||
// to use CMSIS.
|
||||
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
|
||||
if ((unsigned int *) g_pfnVectors != (unsigned int *) 0x00000000) {
|
||||
// CMSIS : SCB->VTOR = <address of vector table>
|
||||
*pSCB_VTOR = (unsigned int) g_pfnVectors;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (__USE_CMSIS)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main();
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void MemManage_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void BusFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void UsageFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void DebugMon_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
324
hw/bsp/ea4357/lpc4357.ld
Normal file
324
hw/bsp/ea4357/lpc4357.ld
Normal file
@ -0,0 +1,324 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC4357
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 15, 2019 5:48:43 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
|
||||
MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
|
||||
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||
RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
|
||||
RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
|
||||
RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
|
||||
RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
|
||||
__base_Flash = 0x1a000000 ; /* Flash */
|
||||
__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
|
||||
__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
|
||||
__base_Flash2 = 0x1b000000 ; /* Flash2 */
|
||||
__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
|
||||
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
|
||||
__base_RAM2 = 0x10080000 ; /* RAM2 */
|
||||
__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
|
||||
__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
|
||||
__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
|
||||
__base_RAM3 = 0x20000000 ; /* RAM3 */
|
||||
__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
|
||||
__base_RAM4 = 0x20008000 ; /* RAM4 */
|
||||
__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
|
||||
__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
|
||||
__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
|
||||
__base_RAM5 = 0x2000c000 ; /* RAM5 */
|
||||
__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
|
||||
__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
|
||||
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text_Flash2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
*(.text_Flash2*) /* for compatibility with previous releases */
|
||||
*(.text_MFlashB512*) /* for compatibility with previous releases */
|
||||
*(.text.$Flash2*)
|
||||
*(.text.$MFlashB512*)
|
||||
*(.rodata.$Flash2*)
|
||||
*(.rodata.$MFlashB512*)
|
||||
} > MFlashB512
|
||||
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
LONG(LOADADDR(.data_RAM3));
|
||||
LONG( ADDR(.data_RAM3));
|
||||
LONG( SIZEOF(.data_RAM3));
|
||||
LONG(LOADADDR(.data_RAM4));
|
||||
LONG( ADDR(.data_RAM4));
|
||||
LONG( SIZEOF(.data_RAM4));
|
||||
LONG(LOADADDR(.data_RAM5));
|
||||
LONG( ADDR(.data_RAM5));
|
||||
LONG( SIZEOF(.data_RAM5));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
LONG( ADDR(.bss_RAM3));
|
||||
LONG( SIZEOF(.bss_RAM3));
|
||||
LONG( ADDR(.bss_RAM4));
|
||||
LONG( SIZEOF(.bss_RAM4));
|
||||
LONG( ADDR(.bss_RAM5));
|
||||
LONG( SIZEOF(.bss_RAM5));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlashA512
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlashA512
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlashA512
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlashA512
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamLoc40 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamLoc40)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamLoc40*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamLoc40 AT>MFlashA512
|
||||
/* DATA section for RamAHB32 */
|
||||
|
||||
.data_RAM3 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM3 = .) ;
|
||||
*(.ramfunc.$RAM3)
|
||||
*(.ramfunc.$RamAHB32)
|
||||
*(.data.$RAM3*)
|
||||
*(.data.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM3 = .) ;
|
||||
} > RamAHB32 AT>MFlashA512
|
||||
/* DATA section for RamAHB16 */
|
||||
|
||||
.data_RAM4 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM4 = .) ;
|
||||
*(.ramfunc.$RAM4)
|
||||
*(.ramfunc.$RamAHB16)
|
||||
*(.data.$RAM4*)
|
||||
*(.data.$RamAHB16*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM4 = .) ;
|
||||
} > RamAHB16 AT>MFlashA512
|
||||
/* DATA section for RamAHB_ETB16 */
|
||||
|
||||
.data_RAM5 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM5 = .) ;
|
||||
*(.ramfunc.$RAM5)
|
||||
*(.ramfunc.$RamAHB_ETB16)
|
||||
*(.data.$RAM5*)
|
||||
*(.data.$RamAHB_ETB16*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM5 = .) ;
|
||||
} > RamAHB_ETB16 AT>MFlashA512
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* Main DATA section (RamLoc32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc32 AT>MFlashA512
|
||||
|
||||
/* BSS section for RamLoc40 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamLoc40*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamLoc40
|
||||
|
||||
/* BSS section for RamAHB32 */
|
||||
.bss_RAM3 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM3 = .) ;
|
||||
*(.bss.$RAM3*)
|
||||
*(.bss.$RamAHB32*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM3 = .) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* BSS section for RamAHB16 */
|
||||
.bss_RAM4 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM4 = .) ;
|
||||
*(.bss.$RAM4*)
|
||||
*(.bss.$RamAHB16*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM4 = .) ;
|
||||
} > RamAHB16
|
||||
|
||||
/* BSS section for RamAHB_ETB16 */
|
||||
.bss_RAM5 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM5 = .) ;
|
||||
*(.bss.$RAM5*)
|
||||
*(.bss.$RamAHB_ETB16*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM5 = .) ;
|
||||
} > RamAHB_ETB16
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > RamLoc32
|
||||
|
||||
/* NOINIT section for RamLoc40 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamLoc40*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamLoc40
|
||||
|
||||
/* NOINIT section for RamAHB32 */
|
||||
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM3*)
|
||||
*(.noinit.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* NOINIT section for RamAHB16 */
|
||||
.noinit_RAM4 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM4*)
|
||||
*(.noinit.$RamAHB16*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB16
|
||||
|
||||
/* NOINIT section for RamAHB_ETB16 */
|
||||
.noinit_RAM5 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM5*)
|
||||
*(.noinit.$RamAHB_ETB16*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB_ETB16
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc32
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
@ -35,9 +35,6 @@ INC += \
|
||||
SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S
|
||||
|
||||
ASFLAGS += -D__HEAP_SIZE=0
|
||||
ASFLAGS += -DSWI_DISABLE0
|
||||
ASFLAGS += -DFLOAT_ABI_HARD
|
||||
ASFLAGS += -DNRF52840_XXAA
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nordic
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -46,28 +46,6 @@
|
||||
|
||||
#define BUTTON_PIN _PINNUM(1, 02)
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* BOARD API
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
// tinyusb function that handles power event (detected, ready, removed)
|
||||
// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
|
||||
extern void tusb_hal_nrf_power_event(uint32_t event);
|
||||
@ -128,6 +106,10 @@ void board_init(void)
|
||||
if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
@ -153,6 +135,19 @@ int board_uart_write(void const * buf, int len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
// process SOC event from SD
|
||||
uint32_t proc_soc(void)
|
||||
|
39
hw/bsp/lpcxpresso11u68/board.mk
Normal file
39
hw/bsp/lpcxpresso11u68/board.mk
Normal file
@ -0,0 +1,39 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m0plus \
|
||||
-nostdlib \
|
||||
-DCORE_M0PLUS \
|
||||
-D__VTOR_PRESENT=0 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
|
||||
-D__USE_LPCOPEN \
|
||||
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
|
||||
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/chip_11u6x.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/clock_11u6x.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/gpio_11u6x.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/iocon_11u6x.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/syscon_11u6x.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/sysinit_11u6x.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_11u6x/inc
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc11_13_15
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM0
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC11U68
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -31,14 +31,8 @@
|
||||
#define LED_PIN 17
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
static const struct {
|
||||
uint8_t port;
|
||||
uint8_t pin;
|
||||
} buttons[] = { { 0, 1 } };
|
||||
|
||||
enum {
|
||||
BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
|
||||
};
|
||||
#define BUTTON_PORT 0
|
||||
#define BUTTON_PIN 1
|
||||
|
||||
/* System oscillator rate and RTC oscillator rate */
|
||||
const uint32_t OscRateIn = 12000000;
|
||||
@ -78,26 +72,47 @@ void board_init(void)
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO);
|
||||
|
||||
//------------- LED -------------//
|
||||
// LED
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
|
||||
|
||||
//------------- BUTTON -------------//
|
||||
//for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOSetDir(buttons[i].port, buttons[i].pin, 0);
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
//------------- UART -------------//
|
||||
//UARTInit(CFG_UART_BAUDRATE);
|
||||
|
||||
// USB
|
||||
Chip_USB_Init(); // Setup PLL clock, and power
|
||||
// USB: Setup PLL clock, and power
|
||||
Chip_USB_Init();
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
@ -107,42 +122,4 @@ uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// LEDS
|
||||
//--------------------------------------------------------------------+
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Buttons
|
||||
//--------------------------------------------------------------------+
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOGetPinValue(buttons[i].port, buttons[i].pin);
|
||||
// return GPIOGetPinValue(buttons[0].port, buttons[0].pin) ? 0 : 1; // button is active low
|
||||
return 0;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// UART
|
||||
//--------------------------------------------------------------------+
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
// *buffer = get_key(); TODO cannot find available code for uart getchar
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
//UARTSend(&c, 1);
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
352
hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
Normal file
352
hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
Normal file
@ -0,0 +1,352 @@
|
||||
//*****************************************************************************
|
||||
// LPC11U6x Microcontroller Startup code for use with LPCXpresso IDE
|
||||
//
|
||||
// Version : 140113
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2014
|
||||
// All rights reserved.
|
||||
//
|
||||
// Software that is described herein is for illustrative purposes only
|
||||
// which provides customers with programming information regarding the
|
||||
// LPC products. This software is supplied "AS IS" without any warranties of
|
||||
// any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
// all warranties, express or implied, including all implied warranties of
|
||||
// merchantability, fitness for a particular purpose and non-infringement of
|
||||
// intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
// or liability for the use of the software, conveys no license or rights under any
|
||||
// patent, copyright, mask work right, or any other intellectual property rights in
|
||||
// or to any products. NXP Semiconductors reserves the right to make changes
|
||||
// in the software without notification. NXP Semiconductors also makes no
|
||||
// representation or warranty that such application will be suitable for the
|
||||
// specified use without further testing or modification.
|
||||
//
|
||||
// Permission to use, copy, modify, and distribute this software and its
|
||||
// documentation is hereby granted, under NXP Semiconductors' and its
|
||||
// licensor's relevant copyrights in the software, without fee, provided that it
|
||||
// is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
// copyright, permission, and disclaimer notice must appear in all copies of
|
||||
// this code.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
// Declaration of external SystemInit function
|
||||
extern void SystemInit(void);
|
||||
#endif
|
||||
|
||||
// Patch the AEABI integer divide functions to use MCU's romdivide library
|
||||
#ifdef __USE_ROMDIVIDE
|
||||
// Location in memory that holds the address of the ROM Driver table
|
||||
#define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8))
|
||||
// Variables to store addresses of idiv and udiv functions within MCU ROM
|
||||
unsigned int *pDivRom_idiv;
|
||||
unsigned int *pDivRom_uidiv;
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for redlib based applications
|
||||
// main() is the entry point for newlib based applications
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// LPC11U6x specific handlers
|
||||
PIN_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
|
||||
PIN_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
|
||||
PIN_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
|
||||
PIN_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
|
||||
PIN_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
|
||||
PIN_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
|
||||
PIN_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
|
||||
PIN_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
|
||||
GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
|
||||
GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
|
||||
I2C1_IRQHandler, // 10 - I2C1
|
||||
USART1_4_IRQHandler, // 11 - combined USART1 & 4 interrupt
|
||||
USART2_3_IRQHandler, // 12 - combined USART2 & 3 interrupt
|
||||
SCT0_1_IRQHandler, // 13 - combined SCT0 and 1 interrupt
|
||||
SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
|
||||
I2C0_IRQHandler, // 15 - I2C0
|
||||
TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
|
||||
TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
|
||||
TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
|
||||
TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
|
||||
SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
|
||||
USART0_IRQHandler, // 21 - USART0
|
||||
USB_IRQHandler, // 22 - USB IRQ
|
||||
USB_FIQHandler, // 23 - USB FIQ
|
||||
ADCA_IRQHandler, // 24 - ADC A(A/D Converter)
|
||||
RTC_IRQHandler, // 25 - Real Time CLock interrpt
|
||||
BOD_WDT_IRQHandler, // 25 - Combined Brownout/Watchdog interrupt
|
||||
FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
|
||||
DMA_IRQHandler, // 28 - DMA interrupt
|
||||
ADCB_IRQHandler, // 24 - ADC B (A/D Converter)
|
||||
USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
|
||||
0, // 31 - Reserved
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
// Optionally enable RAM banks that may be off by default at reset
|
||||
#if !defined (DONT_ENABLE_DISABLED_RAMBANKS)
|
||||
volatile unsigned int *SYSCON_SYSAHBCLKCTRL = (unsigned int *) 0x40048080;
|
||||
// Ensure that RAM1(26) and USBSRAM(27) bits in SYSAHBCLKCTRL are set
|
||||
*SYSCON_SYSAHBCLKCTRL |= (1 << 26) | (1 <<27);
|
||||
#endif
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
// Patch the AEABI integer divide functions to use MCU's romdivide library
|
||||
#ifdef __USE_ROMDIVIDE
|
||||
// Get address of Integer division routines function table in ROM
|
||||
unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4];
|
||||
// Get addresses of integer divide routines in ROM
|
||||
// These address are then used by the code in aeabi_romdiv_patch.s
|
||||
pDivRom_idiv = (unsigned int *)div_ptr[0];
|
||||
pDivRom_uidiv = (unsigned int *)div_ptr[1];
|
||||
#endif
|
||||
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{ while(1) { }
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{ while(1) { }
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void)
|
||||
{ while(1) { }
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{ while(1) { }
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{ while(1) { }
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{ while(1) { }
|
||||
}
|
242
hw/bsp/lpcxpresso11u68/lpc11u68.ld
Normal file
242
hw/bsp/lpcxpresso11u68/lpc11u68.ld
Normal file
@ -0,0 +1,242 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC11U68
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 4:55:54 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
|
||||
Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||
Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
|
||||
Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlash256 = 0x0 ; /* MFlash256 */
|
||||
__base_Flash = 0x0 ; /* Flash */
|
||||
__top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
|
||||
__top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
|
||||
__base_Ram0_32 = 0x10000000 ; /* Ram0_32 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_Ram1_2 = 0x20000000 ; /* Ram1_2 */
|
||||
__base_RAM2 = 0x20000000 ; /* RAM2 */
|
||||
__top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||
__top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||
__base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */
|
||||
__base_RAM3 = 0x20004000 ; /* RAM3 */
|
||||
__top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||
__top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
LONG(LOADADDR(.data_RAM3));
|
||||
LONG( ADDR(.data_RAM3));
|
||||
LONG( SIZEOF(.data_RAM3));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
LONG( ADDR(.bss_RAM3));
|
||||
LONG( SIZEOF(.bss_RAM3));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlash256
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlash256
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash256
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash256
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* possible MTB section for Ram1_2 */
|
||||
.mtb_buffer_RAM2 (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb.$RAM2*))
|
||||
KEEP(*(.mtb.$Ram1_2*))
|
||||
} > Ram1_2
|
||||
|
||||
/* DATA section for Ram1_2 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$Ram1_2)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$Ram1_2*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > Ram1_2 AT>MFlash256
|
||||
/* possible MTB section for Ram2USB_2 */
|
||||
.mtb_buffer_RAM3 (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb.$RAM3*))
|
||||
KEEP(*(.mtb.$Ram2USB_2*))
|
||||
} > Ram2USB_2
|
||||
|
||||
/* DATA section for Ram2USB_2 */
|
||||
|
||||
.data_RAM3 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM3 = .) ;
|
||||
*(.ramfunc.$RAM3)
|
||||
*(.ramfunc.$Ram2USB_2)
|
||||
*(.data.$RAM3*)
|
||||
*(.data.$Ram2USB_2*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM3 = .) ;
|
||||
} > Ram2USB_2 AT>MFlash256
|
||||
/* MAIN DATA SECTION */
|
||||
/* Default MTB section */
|
||||
.mtb_buffer_default (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb*))
|
||||
} > Ram0_32
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > Ram0_32
|
||||
|
||||
/* Main DATA section (Ram0_32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > Ram0_32 AT>MFlash256
|
||||
|
||||
/* BSS section for Ram1_2 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$Ram1_2*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > Ram1_2
|
||||
|
||||
/* BSS section for Ram2USB_2 */
|
||||
.bss_RAM3 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM3 = .) ;
|
||||
*(.bss.$RAM3*)
|
||||
*(.bss.$Ram2USB_2*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM3 = .) ;
|
||||
} > Ram2USB_2
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > Ram0_32
|
||||
|
||||
/* NOINIT section for Ram1_2 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$Ram1_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram1_2
|
||||
|
||||
/* NOINIT section for Ram2USB_2 */
|
||||
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM3*)
|
||||
*(.noinit.$Ram2USB_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram2USB_2
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > Ram0_32
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1)
|
||||
+ (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1)
|
||||
)
|
||||
);
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
38
hw/bsp/lpcxpresso1347/board.mk
Normal file
38
hw/bsp/lpcxpresso1347/board.mk
Normal file
@ -0,0 +1,38 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m3 \
|
||||
-nostdlib \
|
||||
-DCORE_M3 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
|
||||
-D__USE_LPCOPEN \
|
||||
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
|
||||
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/lpcxpresso1347/lpc1347.ld
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/chip_13xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/clock_13xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/gpio_13xx_1.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/iocon_13xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysctl_13xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysinit_13xx.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_13xx/inc
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc11_13_15
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM3
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC1347
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -27,26 +27,25 @@
|
||||
#include "chip.h"
|
||||
#include "../board.h"
|
||||
|
||||
#define LED_PORT 0
|
||||
#define LED_PIN 7
|
||||
#define LED_PORT 0
|
||||
#define LED_PIN 7
|
||||
|
||||
static const struct {
|
||||
uint8_t port;
|
||||
uint8_t pin;
|
||||
} buttons[] =
|
||||
{
|
||||
{1, 22 }, // Joystick up
|
||||
{1, 20 }, // Joystick down
|
||||
{1, 23 }, // Joystick left
|
||||
{1, 21 }, // Joystick right
|
||||
{1, 19 }, // Joystick press
|
||||
{0, 1 }, // SW3
|
||||
// {1, 4 }, // SW4 (require to remove J28)
|
||||
};
|
||||
// Joytick Down if connected to LPCXpresso Base board
|
||||
#define BUTTON_PORT 1
|
||||
#define BUTTON_PIN 20
|
||||
|
||||
enum {
|
||||
BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
|
||||
};
|
||||
//static const struct {
|
||||
// uint8_t port;
|
||||
// uint8_t pin;
|
||||
//} buttons[] =
|
||||
//{
|
||||
// {1, 22 }, // Joystick up
|
||||
// {1, 20 }, // Joystick down
|
||||
// {1, 23 }, // Joystick left
|
||||
// {1, 21 }, // Joystick right
|
||||
// {1, 19 }, // Joystick press
|
||||
// {0, 1 }, // SW3
|
||||
//};
|
||||
|
||||
/* System oscillator rate and RTC oscillator rate */
|
||||
const uint32_t OscRateIn = 12000000;
|
||||
@ -91,26 +90,22 @@ void board_init(void)
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO_PORT);
|
||||
|
||||
//------------- LED -------------//
|
||||
// LED
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN);
|
||||
|
||||
//------------- BUTTON -------------//
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOSetDir(buttons[i].port, TU_BIT(buttons[i].pin), 0);
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
//------------- UART -------------//
|
||||
//UARTInit(CFG_UART_BAUDRATE);
|
||||
|
||||
// USB
|
||||
Chip_USB_Init(); // Setup PLL clock, and power
|
||||
// USB: Setup PLL clock, and power
|
||||
Chip_USB_Init();
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
@ -120,42 +115,19 @@ uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// LEDS
|
||||
//--------------------------------------------------------------------+
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state);
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// BUTTONS
|
||||
//--------------------------------------------------------------------+
|
||||
#if 0
|
||||
static bool button_read(uint8_t id)
|
||||
{
|
||||
(void) id;
|
||||
// return !GPIOGetPinValue(buttons[id].port, buttons[id].pin); // button is active low
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
uint32_t result = 0;
|
||||
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0);
|
||||
|
||||
return result;
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// UART
|
||||
//--------------------------------------------------------------------+
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
@ -165,7 +137,6 @@ int board_uart_read(uint8_t* buf, int len)
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
// UARTSend(&c, 1);
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
|
473
hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c
Normal file
473
hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c
Normal file
@ -0,0 +1,473 @@
|
||||
//*****************************************************************************
|
||||
// +--+
|
||||
// | ++----+
|
||||
// +-++ |
|
||||
// | |
|
||||
// +-+--+ |
|
||||
// | +--+--+
|
||||
// +----+ Copyright (c) 2011-12 Code Red Technologies Ltd.
|
||||
//
|
||||
// Microcontroller Startup code for use with Red Suite
|
||||
//
|
||||
// Version : 120126
|
||||
//
|
||||
// Software License Agreement
|
||||
//
|
||||
// The software is owned by Code Red Technologies and/or its suppliers, and is
|
||||
// protected under applicable copyright laws. All rights are reserved. Any
|
||||
// use in violation of the foregoing restrictions may subject the user to criminal
|
||||
// sanctions under applicable laws, as well as to civil liability for the breach
|
||||
// of the terms and conditions of this license.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
|
||||
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
|
||||
// CODE RED TECHNOLOGIES LTD.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
/* Include sys_config.h to get the CHIP_11* device identifier */
|
||||
#include "sys_config.h"
|
||||
|
||||
// Code Red - if CMSIS is being used, then SystemInit() routine
|
||||
// will be called by startup code rather than in application's main()
|
||||
extern void SystemInit(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined(CHIP_LPC1343)
|
||||
void WAKEUP_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIOINT3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIOINT2_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIOINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIOINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
|
||||
#elif defined(CHIP_LPC1347)
|
||||
void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void RIT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void OSCFAIL_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PVTCIRCUIT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
|
||||
#else
|
||||
#error No CHIP_134* device defined
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for redlib based applications
|
||||
// main() is the entry point for newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
#if defined(CHIP_LPC1343)
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.0
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.1
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.2
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.3
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.4
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.5
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.6
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.7
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.8
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.9
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.10
|
||||
WAKEUP_IRQHandler, // Wakeup PIO0.11
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.0
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.1
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.2
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.3
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.4
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.5
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.6
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.7
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.8
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.9
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.10
|
||||
WAKEUP_IRQHandler, // Wakeup PIO1.11
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.0
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.1
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.2
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.3
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.4
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.5
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.6
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.7
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.8
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.9
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.10
|
||||
WAKEUP_IRQHandler, // Wakeup PIO2.11
|
||||
WAKEUP_IRQHandler, // Wakeup PIO3.0
|
||||
WAKEUP_IRQHandler, // Wakeup PIO3.1
|
||||
WAKEUP_IRQHandler, // Wakeup PIO3.2
|
||||
WAKEUP_IRQHandler, // Wakeup PIO3.3
|
||||
I2C_IRQHandler, // I2C
|
||||
TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0
|
||||
TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1
|
||||
TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0
|
||||
TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1
|
||||
SSP0_IRQHandler, // SSP0
|
||||
UART_IRQHandler, // UART
|
||||
USB_IRQHandler, // USB IRQ
|
||||
USB_FIQHandler, // USB FIQ
|
||||
ADC_IRQHandler, // A/D Converter
|
||||
WDT_IRQHandler, // Watchdog Timer
|
||||
BOD_IRQHandler, // Brown Out Detect
|
||||
FMC_IRQHandler, // IP2111 Flash Memory Controller
|
||||
PIOINT3_IRQHandler, // PIO INT3
|
||||
PIOINT2_IRQHandler, // PIO INT2
|
||||
PIOINT1_IRQHandler, // PIO INT1
|
||||
PIOINT0_IRQHandler, // PIO INT0
|
||||
|
||||
#elif defined(CHIP_LPC1347)
|
||||
PIN_INT0_IRQHandler, // All GPIO pin can be routed to PIN_INTx
|
||||
PIN_INT1_IRQHandler,
|
||||
PIN_INT2_IRQHandler,
|
||||
PIN_INT3_IRQHandler,
|
||||
PIN_INT4_IRQHandler,
|
||||
PIN_INT5_IRQHandler,
|
||||
PIN_INT6_IRQHandler,
|
||||
PIN_INT7_IRQHandler,
|
||||
GINT0_IRQHandler,
|
||||
GINT1_IRQHandler, // PIO0 (0:7)
|
||||
0,
|
||||
0,
|
||||
RIT_IRQHandler,
|
||||
0,
|
||||
SSP1_IRQHandler, // SSP1
|
||||
I2C_IRQHandler, // I2C
|
||||
TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0
|
||||
TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1
|
||||
TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0
|
||||
TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1
|
||||
SSP0_IRQHandler, // SSP0
|
||||
UART_IRQHandler, // UART
|
||||
USB_IRQHandler, // USB IRQ
|
||||
USB_FIQHandler, // USB FIQ
|
||||
ADC_IRQHandler, // A/D Converter
|
||||
WDT_IRQHandler, // Watchdog Timer
|
||||
BOD_IRQHandler, // Brown Out Detect
|
||||
FMC_IRQHandler, // IP2111 Flash Memory Controller
|
||||
OSCFAIL_IRQHandler, // OSC FAIL
|
||||
PVTCIRCUIT_IRQHandler, // PVT CIRCUIT
|
||||
USBWakeup_IRQHandler, // USB wake up
|
||||
0,
|
||||
|
||||
#else
|
||||
#error No CHIP_13* device defined
|
||||
#endif
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
#else
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the load address, execution address and length of the RW data section and
|
||||
// the execution and length of the BSS (zero initialized) section.
|
||||
// Note that these symbols are not normally used by the managed linker script
|
||||
// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
|
||||
// They are provide here simply so this startup code can be used with earlier
|
||||
// versions of Red Suite which do not support the more advanced managed linker
|
||||
// script mechanism introduced in the above version. To enable their use,
|
||||
// define "USE_OLD_STYLE_DATA_BSS_INIT".
|
||||
//*****************************************************************************
|
||||
extern unsigned int _etext;
|
||||
extern unsigned int _data;
|
||||
extern unsigned int _edata;
|
||||
extern unsigned int _bss;
|
||||
extern unsigned int _ebss;
|
||||
#endif
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
#else
|
||||
// Use Old Style Data and BSS section initialization.
|
||||
// This will only initialize a single RAM bank.
|
||||
unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
|
||||
|
||||
// Copy the data segment from flash to SRAM.
|
||||
LoadAddr = &_etext;
|
||||
ExeAddr = &_data;
|
||||
EndAddr = &_edata;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
|
||||
// Zero fill the bss segment
|
||||
ExeAddr = &_bss;
|
||||
EndAddr = &_ebss;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
bss_init ((unsigned int)ExeAddr, SectionLen);
|
||||
#endif
|
||||
|
||||
// extern void SystemInit(void);
|
||||
SystemInit();
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
225
hw/bsp/lpcxpresso1347/lpc1347.ld
Normal file
225
hw/bsp/lpcxpresso1347/lpc1347.ld
Normal file
@ -0,0 +1,225 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC1347
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 6:01:58 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */
|
||||
RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */
|
||||
RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
|
||||
RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlash64 = 0x0 ; /* MFlash64 */
|
||||
__base_Flash = 0x0 ; /* Flash */
|
||||
__top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */
|
||||
__top_Flash = 0x0 + 0x10000 ; /* 64K bytes */
|
||||
__base_RamLoc8 = 0x10000000 ; /* RamLoc8 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */
|
||||
__top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */
|
||||
__base_RamUsb2 = 0x20004000 ; /* RamUsb2 */
|
||||
__base_RAM2 = 0x20004000 ; /* RAM2 */
|
||||
__top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||
__top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||
__base_RamPeriph2 = 0x20000000 ; /* RamPeriph2 */
|
||||
__base_RAM3 = 0x20000000 ; /* RAM3 */
|
||||
__top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||
__top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
LONG(LOADADDR(.data_RAM3));
|
||||
LONG( ADDR(.data_RAM3));
|
||||
LONG( SIZEOF(.data_RAM3));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
LONG( ADDR(.bss_RAM3));
|
||||
LONG( SIZEOF(.bss_RAM3));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlash64
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlash64
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash64
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash64
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamUsb2 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamUsb2)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamUsb2*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamUsb2 AT>MFlash64
|
||||
/* DATA section for RamPeriph2 */
|
||||
|
||||
.data_RAM3 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM3 = .) ;
|
||||
*(.ramfunc.$RAM3)
|
||||
*(.ramfunc.$RamPeriph2)
|
||||
*(.data.$RAM3*)
|
||||
*(.data.$RamPeriph2*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM3 = .) ;
|
||||
} > RamPeriph2 AT>MFlash64
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc8
|
||||
|
||||
/* Main DATA section (RamLoc8) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc8 AT>MFlash64
|
||||
|
||||
/* BSS section for RamUsb2 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamUsb2*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamUsb2
|
||||
|
||||
/* BSS section for RamPeriph2 */
|
||||
.bss_RAM3 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM3 = .) ;
|
||||
*(.bss.$RAM3*)
|
||||
*(.bss.$RamPeriph2*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM3 = .) ;
|
||||
} > RamPeriph2
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > RamLoc8
|
||||
|
||||
/* NOINIT section for RamUsb2 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamUsb2*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamUsb2
|
||||
|
||||
/* NOINIT section for RamPeriph2 */
|
||||
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM3*)
|
||||
*(.noinit.$RamPeriph2*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamPeriph2
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc8
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
41
hw/bsp/lpcxpresso1769/board.mk
Normal file
41
hw/bsp/lpcxpresso1769/board.mk
Normal file
@ -0,0 +1,41 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m3 \
|
||||
-nostdlib \
|
||||
-DCORE_M3 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
|
||||
-D__USE_LPCOPEN \
|
||||
-DRTC_EV_SUPPORT=0
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld
|
||||
|
||||
# TODO remove later
|
||||
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/chip_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/clock_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/uart_17xx_40xx.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc17_40
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM3
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC1769
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -30,6 +30,10 @@
|
||||
#define LED_PORT 0
|
||||
#define LED_PIN 22
|
||||
|
||||
// Joytick Down if connected to LPCXpresso Base board
|
||||
#define BUTTON_PORT 0
|
||||
#define BUTTON_PIN 15
|
||||
|
||||
#define BOARD_UART_PORT LPC_UART3
|
||||
|
||||
/* System oscillator rate and RTC oscillator rate */
|
||||
@ -60,18 +64,14 @@ static const PINMUX_GRP_T pin_usb_mux[] =
|
||||
{1, 19, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PPWR
|
||||
{1, 22, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PWRD
|
||||
|
||||
/* VBUS is not connected on this board, so leave the pin at default setting. */
|
||||
/*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */
|
||||
};
|
||||
|
||||
enum {
|
||||
BOARD_BUTTON_COUNT = 5
|
||||
/* VBUS is not connected on this board, so leave the pin at default setting. */
|
||||
/*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */
|
||||
};
|
||||
|
||||
// Invoked by startup code
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* Enable IOCON clock */
|
||||
Chip_IOCON_Init(LPC_IOCON);
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
|
||||
Chip_SetupXtalClocking();
|
||||
}
|
||||
@ -90,11 +90,11 @@ void board_init(void)
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO);
|
||||
|
||||
//------------- LED -------------//
|
||||
// LED
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
|
||||
|
||||
//------------- BUTTON -------------//
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIO_SetDir(buttons[i].port, TU_BIT(buttons[i].pin), 0);
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
#if 0
|
||||
//------------- UART -------------//
|
||||
@ -121,6 +121,7 @@ void board_init(void)
|
||||
#endif
|
||||
|
||||
//------------- USB -------------//
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
|
||||
Chip_USB_Init();
|
||||
|
||||
enum {
|
||||
@ -138,67 +139,29 @@ void board_init(void)
|
||||
// set portfunc to host !!!
|
||||
LPC_USB->StCtrl = 0x3; // should be 1
|
||||
#endif
|
||||
|
||||
Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// LEDS
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// BUTTONS
|
||||
//--------------------------------------------------------------------+
|
||||
#if 0
|
||||
static bool button_read(uint8_t id)
|
||||
{
|
||||
// return !TU_BIT_TEST( GPIO_ReadValue(buttons[id].port), buttons[id].pin ); // button is active low
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
uint32_t result = 0;
|
||||
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0);
|
||||
|
||||
return result;
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// UART
|
||||
//--------------------------------------------------------------------+
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
// return UART_ReceiveByte(BOARD_UART_PORT);
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
@ -208,3 +171,16 @@ int board_uart_write(void const * buf, int len)
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
371
hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c
Normal file
371
hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c
Normal file
@ -0,0 +1,371 @@
|
||||
//*****************************************************************************
|
||||
// LPC175x_6x Microcontroller Startup code for use with LPCXpresso IDE
|
||||
//
|
||||
// Version : 140114
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2014
|
||||
// All rights reserved.
|
||||
//
|
||||
// Software that is described herein is for illustrative purposes only
|
||||
// which provides customers with programming information regarding the
|
||||
// LPC products. This software is supplied "AS IS" without any warranties of
|
||||
// any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
// all warranties, express or implied, including all implied warranties of
|
||||
// merchantability, fitness for a particular purpose and non-infringement of
|
||||
// intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
// or liability for the use of the software, conveys no license or rights under any
|
||||
// patent, copyright, mask work right, or any other intellectual property rights in
|
||||
// or to any products. NXP Semiconductors reserves the right to make changes
|
||||
// in the software without notification. NXP Semiconductors also makes no
|
||||
// representation or warranty that such application will be suitable for the
|
||||
// specified use without further testing or modification.
|
||||
//
|
||||
// Permission to use, copy, modify, and distribute this software and its
|
||||
// documentation is hereby granted, under NXP Semiconductors' and its
|
||||
// licensor's relevant copyrights in the software, without fee, provided that it
|
||||
// is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
// copyright, permission, and disclaimer notice must appear in all copies of
|
||||
// this code.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
// Declaration of external SystemInit function
|
||||
extern void SystemInit(void);
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#if defined (__USE_LPCOPEN)
|
||||
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#else
|
||||
void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
#endif
|
||||
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM3
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC17
|
||||
WDT_IRQHandler, // 16, 0x40 - WDT
|
||||
TIMER0_IRQHandler, // 17, 0x44 - TIMER0
|
||||
TIMER1_IRQHandler, // 18, 0x48 - TIMER1
|
||||
TIMER2_IRQHandler, // 19, 0x4c - TIMER2
|
||||
TIMER3_IRQHandler, // 20, 0x50 - TIMER3
|
||||
UART0_IRQHandler, // 21, 0x54 - UART0
|
||||
UART1_IRQHandler, // 22, 0x58 - UART1
|
||||
UART2_IRQHandler, // 23, 0x5c - UART2
|
||||
UART3_IRQHandler, // 24, 0x60 - UART3
|
||||
PWM1_IRQHandler, // 25, 0x64 - PWM1
|
||||
I2C0_IRQHandler, // 26, 0x68 - I2C0
|
||||
I2C1_IRQHandler, // 27, 0x6c - I2C1
|
||||
I2C2_IRQHandler, // 28, 0x70 - I2C2
|
||||
SPI_IRQHandler, // 29, 0x74 - SPI
|
||||
SSP0_IRQHandler, // 30, 0x78 - SSP0
|
||||
SSP1_IRQHandler, // 31, 0x7c - SSP1
|
||||
PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
|
||||
RTC_IRQHandler, // 33, 0x84 - RTC
|
||||
EINT0_IRQHandler, // 34, 0x88 - EINT0
|
||||
EINT1_IRQHandler, // 35, 0x8c - EINT1
|
||||
EINT2_IRQHandler, // 36, 0x90 - EINT2
|
||||
EINT3_IRQHandler, // 37, 0x94 - EINT3
|
||||
ADC_IRQHandler, // 38, 0x98 - ADC
|
||||
BOD_IRQHandler, // 39, 0x9c - BOD
|
||||
USB_IRQHandler, // 40, 0xA0 - USB
|
||||
CAN_IRQHandler, // 41, 0xa4 - CAN
|
||||
DMA_IRQHandler, // 42, 0xa8 - GP DMA
|
||||
I2S_IRQHandler, // 43, 0xac - I2S
|
||||
#if defined (__USE_LPCOPEN)
|
||||
ETH_IRQHandler, // 44, 0xb0 - Ethernet
|
||||
#else
|
||||
ENET_IRQHandler, // 44, 0xb0 - Ethernet
|
||||
#endif
|
||||
RIT_IRQHandler, // 45, 0xb4 - RITINT
|
||||
MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
|
||||
QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
|
||||
PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
|
||||
USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
|
||||
CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void MemManage_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void BusFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void UsageFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void DebugMon_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{ while(1) {}
|
||||
}
|
184
hw/bsp/lpcxpresso1769/lpc1769.ld
Normal file
184
hw/bsp/lpcxpresso1769/lpc1769.ld
Normal file
@ -0,0 +1,184 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC1769
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 6:39:29 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
|
||||
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||
RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlash512 = 0x0 ; /* MFlash512 */
|
||||
__base_Flash = 0x0 ; /* Flash */
|
||||
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */
|
||||
__base_RAM2 = 0x2007c000 ; /* RAM2 */
|
||||
__top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlash512
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlash512
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash512
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash512
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamAHB32 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamAHB32)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamAHB32 AT>MFlash512
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* Main DATA section (RamLoc32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc32 AT>MFlash512
|
||||
|
||||
/* BSS section for RamAHB32 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamAHB32*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > RamLoc32
|
||||
|
||||
/* NOINIT section for RamAHB32 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc32
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
39
hw/bsp/mcb1800/board.mk
Normal file
39
hw/bsp/mcb1800/board.mk
Normal file
@ -0,0 +1,39 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m3 \
|
||||
-nostdlib \
|
||||
-DCORE_M3 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC18XX \
|
||||
-D__USE_LPCOPEN
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/mcb1800/lpc1857.ld
|
||||
|
||||
# TODO remove later
|
||||
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_18xx/src/chip_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_18xx/src/clock_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_18xx/src/gpio_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_18xx/src/sysinit_18xx_43xx.c \
|
||||
hw/mcu/nxp/lpcopen/lpc_chip_18xx/src/uart_18xx_43xx.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc \
|
||||
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc/config_18xx
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = lpc18_43
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM3
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC1857
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -27,27 +27,36 @@
|
||||
#include "chip.h"
|
||||
#include "../board.h"
|
||||
|
||||
// PD_10
|
||||
#define LED_PORT 6
|
||||
#define LED_PIN 24
|
||||
|
||||
// P4_0
|
||||
#define BUTTON_PORT 2
|
||||
#define BUTTON_PIN 0
|
||||
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
/* System configuration variables used by chip driver */
|
||||
const uint32_t ExtRateIn = 0;
|
||||
const uint32_t OscRateIn = 12000000;
|
||||
const uint32_t ExtRateIn = 0;
|
||||
|
||||
static const PINMUX_GRP_T pinmuxing[] =
|
||||
{
|
||||
/* Board LEDs */
|
||||
// LEDs
|
||||
{0xD, 10, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4)},
|
||||
{0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4)},
|
||||
{0xD, 12, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4)},
|
||||
{0xD, 13, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4)},
|
||||
{0xD, 14, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4)},
|
||||
{0x9, 0, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0)},
|
||||
{0x9, 1, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0)},
|
||||
{0x9, 2, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0)},
|
||||
{0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN)},
|
||||
{0xD, 12, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN)},
|
||||
{0xD, 13, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN)},
|
||||
{0xD, 14, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN)},
|
||||
{0x9, 0, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLDOWN)},
|
||||
{0x9, 1, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLDOWN)},
|
||||
{0x9, 2, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLDOWN)},
|
||||
|
||||
// Button
|
||||
{0x4, 0, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP)},
|
||||
|
||||
/* I2S */
|
||||
{0x3, 0, (SCU_PINIO_FAST | SCU_MODE_FUNC2)},
|
||||
@ -67,10 +76,6 @@ static const PINMUX_GRP_T pinclockmuxing[] =
|
||||
{0, 3, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
|
||||
};
|
||||
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* BOARD API
|
||||
*------------------------------------------------------------------*/
|
||||
// Invoked by startup code
|
||||
void SystemInit(void)
|
||||
{
|
||||
@ -93,29 +98,20 @@ void board_init(void)
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
Chip_GPIO_Init(LPC_GPIO_PORT);
|
||||
|
||||
//------------- LED -------------//
|
||||
/* Port and bit mapping for LEDs on GPIOs */
|
||||
const uint8_t ledports[] = {6, 6, 6, 6, 6, 4, 4, 4};
|
||||
const uint8_t ledbits[] = {24, 25, 26, 27, 28, 12, 13, 14};
|
||||
// LED
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN);
|
||||
|
||||
for (uint32_t i = 0; i < (sizeof(ledports) / sizeof(ledports[0])); i++)
|
||||
{
|
||||
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, ledports[i], ledbits[i]);
|
||||
Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, false);
|
||||
}
|
||||
// Button
|
||||
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
|
||||
|
||||
#if 0
|
||||
//------------- BUTTON -------------//
|
||||
for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++)
|
||||
{
|
||||
scu_pinmux(buttons[i].mux_port, buttons[i].mux_pin, GPIO_NOPULL, FUNC0);
|
||||
GPIO_SetDir(buttons[i].gpio_port, TU_BIT(buttons[i].gpio_pin), 0);
|
||||
}
|
||||
|
||||
//------------- UART -------------//
|
||||
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1);
|
||||
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1);
|
||||
@ -177,33 +173,21 @@ void board_init(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
//------------- LED -------------//
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state);
|
||||
}
|
||||
|
||||
//------------- Buttons -------------//
|
||||
/*
|
||||
static bool button_read(uint8_t id)
|
||||
{
|
||||
(void) id;
|
||||
// return !TU_BIT_TEST( GPIO_ReadValue(buttons[id].gpio_port), buttons[id].gpio_pin ); // button is active low
|
||||
return false;
|
||||
}
|
||||
*/
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
uint32_t result = 0;
|
||||
|
||||
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0);
|
||||
|
||||
return result;
|
||||
// active low
|
||||
return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
|
||||
//------------- UART -------------//
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
//return UART_ReceiveByte(BOARD_UART_PORT);
|
||||
@ -220,13 +204,8 @@ int board_uart_write(void const * buf, int len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
@ -236,5 +215,4 @@ uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
477
hw/bsp/mcb1800/cr_startup_lpc18xx.c
Normal file
477
hw/bsp/mcb1800/cr_startup_lpc18xx.c
Normal file
@ -0,0 +1,477 @@
|
||||
//*****************************************************************************
|
||||
// LPC18xx Microcontroller Startup code for use with LPCXpresso IDE
|
||||
//
|
||||
// Version : 150706
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2013-2015
|
||||
// All rights reserved.
|
||||
//
|
||||
// Software that is described herein is for illustrative purposes only
|
||||
// which provides customers with programming information regarding the
|
||||
// LPC products. This software is supplied "AS IS" without any warranties of
|
||||
// any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
// all warranties, express or implied, including all implied warranties of
|
||||
// merchantability, fitness for a particular purpose and non-infringement of
|
||||
// intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
// or liability for the use of the software, conveys no license or rights under any
|
||||
// patent, copyright, mask work right, or any other intellectual property rights in
|
||||
// or to any products. NXP Semiconductors reserves the right to make changes
|
||||
// in the software without notification. NXP Semiconductors also makes no
|
||||
// representation or warranty that such application will be suitable for the
|
||||
// specified use without further testing or modification.
|
||||
//
|
||||
// Permission to use, copy, modify, and distribute this software and its
|
||||
// documentation is hereby granted, under NXP Semiconductors' and its
|
||||
// licensor's relevant copyrights in the software, without fee, provided that it
|
||||
// is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
// copyright, permission, and disclaimer notice must appear in all copies of
|
||||
// this code.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||
// Declaration of external SystemInit function
|
||||
extern void SystemInit(void);
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for LPC MCU vector table checksum from Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
WEAK extern void __valid_user_code_checksum(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((used,section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM3
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
__valid_user_code_checksum, // LPC MCU Checksum
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC18
|
||||
DAC_IRQHandler, // 16
|
||||
0, // 17
|
||||
DMA_IRQHandler, // 18
|
||||
0, // 19
|
||||
FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
|
||||
ETH_IRQHandler, // 21
|
||||
SDIO_IRQHandler, // 22
|
||||
LCD_IRQHandler, // 23
|
||||
USB0_IRQHandler, // 24
|
||||
USB1_IRQHandler, // 25
|
||||
SCT_IRQHandler, // 26
|
||||
RIT_IRQHandler, // 27
|
||||
TIMER0_IRQHandler, // 28
|
||||
TIMER1_IRQHandler, // 29
|
||||
TIMER2_IRQHandler, // 30
|
||||
TIMER3_IRQHandler, // 31
|
||||
MCPWM_IRQHandler, // 32
|
||||
ADC0_IRQHandler, // 33
|
||||
I2C0_IRQHandler, // 34
|
||||
I2C1_IRQHandler, // 35
|
||||
0, // 36
|
||||
ADC1_IRQHandler, // 37
|
||||
SSP0_IRQHandler, // 38
|
||||
SSP1_IRQHandler, // 39
|
||||
UART0_IRQHandler, // 40
|
||||
UART1_IRQHandler, // 41
|
||||
UART2_IRQHandler, // 42
|
||||
UART3_IRQHandler, // 43
|
||||
I2S0_IRQHandler, // 44
|
||||
I2S1_IRQHandler, // 45
|
||||
SPIFI_IRQHandler, // 46
|
||||
SGPIO_IRQHandler, // 47
|
||||
GPIO0_IRQHandler, // 48
|
||||
GPIO1_IRQHandler, // 49
|
||||
GPIO2_IRQHandler, // 50
|
||||
GPIO3_IRQHandler, // 51
|
||||
GPIO4_IRQHandler, // 52
|
||||
GPIO5_IRQHandler, // 53
|
||||
GPIO6_IRQHandler, // 54
|
||||
GPIO7_IRQHandler, // 55
|
||||
GINT0_IRQHandler, // 56
|
||||
GINT1_IRQHandler, // 57
|
||||
EVRT_IRQHandler, // 58
|
||||
CAN1_IRQHandler, // 59
|
||||
0, // 60
|
||||
0, // 61
|
||||
ATIMER_IRQHandler, // 62
|
||||
RTC_IRQHandler, // 63
|
||||
0, // 64
|
||||
WDT_IRQHandler, // 65
|
||||
0, // 66
|
||||
CAN0_IRQHandler, // 67
|
||||
QEI_IRQHandler, // 68
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
// *************************************************************
|
||||
// The following conditional block of code manually resets as
|
||||
// much of the peripheral set of the LPC18 as possible. This is
|
||||
// done because the LPC18 does not provide a means of triggering
|
||||
// a full system reset under debugger control, which can cause
|
||||
// problems in certain circumstances when debugging.
|
||||
//
|
||||
// You can prevent this code block being included if you require
|
||||
// (for example when creating a final executable which you will
|
||||
// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
|
||||
//
|
||||
#ifndef DONT_RESET_ON_RESTART
|
||||
|
||||
// Disable interrupts
|
||||
__asm volatile ("cpsid i");
|
||||
// equivalent to CMSIS '__disable_irq()' function
|
||||
|
||||
unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
|
||||
// LPC_RGU->RESET_CTRL0 @ 0x40053100
|
||||
// LPC_RGU->RESET_CTRL1 @ 0x40053104
|
||||
// Note that we do not use the CMSIS register access mechanism,
|
||||
// as there is no guarantee that the project has been configured
|
||||
// to use CMSIS.
|
||||
|
||||
// Write to LPC_RGU->RESET_CTRL0
|
||||
*(RESET_CONTROL+0) = 0x10DF0000;
|
||||
// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
|
||||
// USB1_RST|USB0_RST|LCD_RST
|
||||
|
||||
// Write to LPC_RGU->RESET_CTRL1
|
||||
*(RESET_CONTROL+1) = 0x00DFF7FF;
|
||||
// CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
|
||||
// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
|
||||
// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
|
||||
// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
|
||||
|
||||
// Clear all pending interrupts in the NVIC
|
||||
volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
|
||||
unsigned int irqpendloop;
|
||||
for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
|
||||
*(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
// Reenable interrupts
|
||||
__asm volatile ("cpsie i");
|
||||
// equivalent to CMSIS '__enable_irq()' function
|
||||
|
||||
#endif // ifndef DONT_RESET_ON_RESTART
|
||||
// *************************************************************
|
||||
|
||||
|
||||
#if defined (__USE_LPCOPEN)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
// ******************************
|
||||
// Check to see if we are running the code from a non-zero
|
||||
// address (eg RAM, external flash), in which case we need
|
||||
// to modify the VTOR register to tell the CPU that the
|
||||
// vector table is located at a non-0x0 address.
|
||||
|
||||
// Note that we do not use the CMSIS register access mechanism,
|
||||
// as there is no guarantee that the project has been configured
|
||||
// to use CMSIS.
|
||||
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
|
||||
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
|
||||
// CMSIS : SCB->VTOR = <address of vector table>
|
||||
*pSCB_VTOR = (unsigned int)g_pfnVectors;
|
||||
}
|
||||
|
||||
#if defined (__USE_CMSIS)
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void MemManage_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void BusFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void UsageFault_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVC_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void DebugMon_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void) {
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
323
hw/bsp/mcb1800/lpc1857.ld
Normal file
323
hw/bsp/mcb1800/lpc1857.ld
Normal file
@ -0,0 +1,323 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC1857
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 15, 2019 1:01:52 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
|
||||
MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
|
||||
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||
RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
|
||||
RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
|
||||
RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
|
||||
RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
|
||||
__base_Flash = 0x1a000000 ; /* Flash */
|
||||
__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
|
||||
__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
|
||||
__base_Flash2 = 0x1b000000 ; /* Flash2 */
|
||||
__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
|
||||
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
|
||||
__base_RAM2 = 0x10080000 ; /* RAM2 */
|
||||
__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
|
||||
__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
|
||||
__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
|
||||
__base_RAM3 = 0x20000000 ; /* RAM3 */
|
||||
__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
|
||||
__base_RAM4 = 0x20008000 ; /* RAM4 */
|
||||
__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
|
||||
__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
|
||||
__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
|
||||
__base_RAM5 = 0x2000c000 ; /* RAM5 */
|
||||
__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
|
||||
__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text_Flash2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
*(.text_Flash2*) /* for compatibility with previous releases */
|
||||
*(.text_MFlashB512*) /* for compatibility with previous releases */
|
||||
*(.text.$Flash2*)
|
||||
*(.text.$MFlashB512*)
|
||||
*(.rodata.$Flash2*)
|
||||
*(.rodata.$MFlashB512*)
|
||||
} > MFlashB512
|
||||
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
LONG(LOADADDR(.data_RAM3));
|
||||
LONG( ADDR(.data_RAM3));
|
||||
LONG( SIZEOF(.data_RAM3));
|
||||
LONG(LOADADDR(.data_RAM4));
|
||||
LONG( ADDR(.data_RAM4));
|
||||
LONG( SIZEOF(.data_RAM4));
|
||||
LONG(LOADADDR(.data_RAM5));
|
||||
LONG( ADDR(.data_RAM5));
|
||||
LONG( SIZEOF(.data_RAM5));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
LONG( ADDR(.bss_RAM3));
|
||||
LONG( SIZEOF(.bss_RAM3));
|
||||
LONG( ADDR(.bss_RAM4));
|
||||
LONG( SIZEOF(.bss_RAM4));
|
||||
LONG( ADDR(.bss_RAM5));
|
||||
LONG( SIZEOF(.bss_RAM5));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlashA512
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlashA512
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlashA512
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlashA512
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamLoc40 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamLoc40)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamLoc40*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamLoc40 AT>MFlashA512
|
||||
/* DATA section for RamAHB32 */
|
||||
|
||||
.data_RAM3 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM3 = .) ;
|
||||
*(.ramfunc.$RAM3)
|
||||
*(.ramfunc.$RamAHB32)
|
||||
*(.data.$RAM3*)
|
||||
*(.data.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM3 = .) ;
|
||||
} > RamAHB32 AT>MFlashA512
|
||||
/* DATA section for RamAHB16 */
|
||||
|
||||
.data_RAM4 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM4 = .) ;
|
||||
*(.ramfunc.$RAM4)
|
||||
*(.ramfunc.$RamAHB16)
|
||||
*(.data.$RAM4*)
|
||||
*(.data.$RamAHB16*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM4 = .) ;
|
||||
} > RamAHB16 AT>MFlashA512
|
||||
/* DATA section for RamAHB_ETB16 */
|
||||
|
||||
.data_RAM5 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM5 = .) ;
|
||||
*(.ramfunc.$RAM5)
|
||||
*(.ramfunc.$RamAHB_ETB16)
|
||||
*(.data.$RAM5*)
|
||||
*(.data.$RamAHB_ETB16*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM5 = .) ;
|
||||
} > RamAHB_ETB16 AT>MFlashA512
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* Main DATA section (RamLoc32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc32 AT>MFlashA512
|
||||
|
||||
/* BSS section for RamLoc40 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamLoc40*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamLoc40
|
||||
|
||||
/* BSS section for RamAHB32 */
|
||||
.bss_RAM3 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM3 = .) ;
|
||||
*(.bss.$RAM3*)
|
||||
*(.bss.$RamAHB32*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM3 = .) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* BSS section for RamAHB16 */
|
||||
.bss_RAM4 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM4 = .) ;
|
||||
*(.bss.$RAM4*)
|
||||
*(.bss.$RamAHB16*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM4 = .) ;
|
||||
} > RamAHB16
|
||||
|
||||
/* BSS section for RamAHB_ETB16 */
|
||||
.bss_RAM5 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM5 = .) ;
|
||||
*(.bss.$RAM5*)
|
||||
*(.bss.$RamAHB_ETB16*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM5 = .) ;
|
||||
} > RamAHB_ETB16
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} > RamLoc32
|
||||
|
||||
/* NOINIT section for RamLoc40 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamLoc40*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamLoc40
|
||||
|
||||
/* NOINIT section for RamAHB32 */
|
||||
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM3*)
|
||||
*(.noinit.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* NOINIT section for RamAHB16 */
|
||||
.noinit_RAM4 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM4*)
|
||||
*(.noinit.$RamAHB16*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB16
|
||||
|
||||
/* NOINIT section for RamAHB_ETB16 */
|
||||
.noinit_RAM5 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM5*)
|
||||
*(.noinit.$RamAHB_ETB16*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB_ETB16
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc32
|
||||
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
@ -1,19 +1,15 @@
|
||||
CFLAGS += \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD21 \
|
||||
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
|
||||
-D__SAMD21G18A__ \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m0plus \
|
||||
-msoft-float \
|
||||
-mfloat-abi=soft \
|
||||
-nostdlib -nostartfiles
|
||||
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
|
||||
-D__SAMD21G18A__ \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m0plus \
|
||||
-nostdlib -nostartfiles \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD21
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/metro_m0_express/samd21g18a_flash.ld
|
||||
|
||||
LD_FLAGS += -mthumb -mcpu=cortex-m0plus
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
|
||||
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -101,6 +101,10 @@ void board_init(void)
|
||||
_gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
gpio_set_pin_level(LED_PIN, state);
|
||||
@ -114,7 +118,6 @@ uint32_t board_button_read(void)
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
@ -124,5 +127,4 @@ uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -1,20 +1,18 @@
|
||||
CFLAGS += \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD51 \
|
||||
-D__SAMD51J19A__ \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles
|
||||
-D__SAMD51J19A__ \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD51
|
||||
|
||||
CFLAGS += -Wno-error=undef
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/metro_m4_express/samd51g19a_flash.ld
|
||||
|
||||
LDFLAGS += -mthumb -mcpu=cortex-m4
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/microchip/samd/asf4/samd51/gcc/gcc/startup_samd51.c \
|
||||
hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c \
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -90,6 +90,10 @@ void board_init(void)
|
||||
gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
gpio_set_pin_level(LED_PIN, state);
|
||||
@ -101,9 +105,6 @@ uint32_t board_button_read(void)
|
||||
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
|
@ -1,12 +1,12 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NRF5X \
|
||||
-DNRF52840_XXAA \
|
||||
-DCONFIG_GPIO_AS_PINRESET
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-DNRF52840_XXAA \
|
||||
-DCONFIG_GPIO_AS_PINRESET \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NRF5X
|
||||
|
||||
# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
|
||||
CFLAGS += -Wno-error=undef
|
||||
@ -35,9 +35,6 @@ INC += \
|
||||
SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S
|
||||
|
||||
ASFLAGS += -D__HEAP_SIZE=0
|
||||
ASFLAGS += -DSWI_DISABLE0
|
||||
ASFLAGS += -DFLOAT_ABI_HARD
|
||||
ASFLAGS += -DNRF52840_XXAA
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nordic
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -44,28 +44,6 @@
|
||||
|
||||
#define BUTTON_PIN 11
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* BOARD API
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
// tinyusb function that handles power event (detected, ready, removed)
|
||||
// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
|
||||
extern void tusb_hal_nrf_power_event(uint32_t event);
|
||||
@ -126,6 +104,10 @@ void board_init(void)
|
||||
if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
@ -151,6 +133,19 @@ int board_uart_write(void const * buf, int len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
// process SOC event from SD
|
||||
uint32_t proc_soc(void)
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -12,8 +12,6 @@ CFLAGS += \
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld
|
||||
|
||||
LDFLAGS += -mthumb -mcpu=cortex-m4
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/st/system-init/system_stm32f3xx.c \
|
||||
hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -91,6 +91,9 @@ void board_init(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
@ -103,9 +106,6 @@ uint32_t board_button_read(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
|
@ -1,19 +1,17 @@
|
||||
CFLAGS += \
|
||||
-DHSE_VALUE=8000000 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_STM32F4 \
|
||||
-DSTM32F407xx \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles
|
||||
-DHSE_VALUE=8000000 \
|
||||
-DSTM32F407xx \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_STM32F4
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld
|
||||
|
||||
LDFLAGS += -mthumb -mcpu=cortex-m4
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/st/system-init/system_stm32f4xx.c
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -34,6 +34,8 @@ void board_init(void)
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
|
||||
GPIOD->MODER |= GPIO_MODER_MODE14_0;
|
||||
|
||||
// TODO Button
|
||||
|
||||
// USB Clock init
|
||||
// PLL input- 8 MHz (External oscillator clock; HSI clock tolerance isn't
|
||||
// tight enough- 1%, need 0.25%)
|
||||
@ -59,10 +61,13 @@ void board_init(void)
|
||||
// Notify runtime of frequency change.
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#endif
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
|
||||
|
||||
@ -81,6 +86,9 @@ void board_init(void)
|
||||
GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
@ -98,12 +106,8 @@ uint32_t board_button_read(void)
|
||||
}
|
||||
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* TUSB HAL MILLISECOND
|
||||
*------------------------------------------------------------------*/
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
|
@ -1 +1 @@
|
||||
Subproject commit 166a236ca1fc35943cb0c747e2db7deffd5558c3
|
||||
Subproject commit 1dabc2df8ed1acaf0c483b58d757ba72e8b42090
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -99,7 +99,7 @@ static void _prep_out_transaction (uint8_t itf)
|
||||
bool tud_cdc_n_connected(uint8_t itf)
|
||||
{
|
||||
// DTR (bit 0) active is considered as connected
|
||||
return tud_ready() && TU_BIT_TEST(_cdcd_itf[itf].line_state, 0);
|
||||
return tud_ready() && tu_bit_test(_cdcd_itf[itf].line_state, 0);
|
||||
}
|
||||
|
||||
uint8_t tud_cdc_n_get_line_state (uint8_t itf)
|
||||
@ -358,7 +358,7 @@ bool cdcd_control_request(uint8_t rhport, tusb_control_request_t const * request
|
||||
usbd_control_status(rhport, request);
|
||||
|
||||
// Invoke callback
|
||||
if ( tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, TU_BIT_TEST(request->wValue, 0), TU_BIT_TEST(request->wValue, 1));
|
||||
if ( tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, tu_bit_test(request->wValue, 0), tu_bit_test(request->wValue, 1));
|
||||
break;
|
||||
|
||||
default: return false; // stall unsupported request
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -43,7 +43,7 @@
|
||||
CFG_TUSB_MEM_SECTION static uint8_t msg_notification[CFG_TUSB_HOST_DEVICE_MAX][8];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX];
|
||||
|
||||
STATIC_VAR rndish_data_t rndish_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
static rndish_data_t rndish_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
|
||||
// TODO Microsoft requires message length for any get command must be at least 4096 bytes
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
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Reference in New Issue
Block a user