mirror of
https://github.com/hathach/tinyusb.git
synced 2025-02-19 06:40:45 +00:00
Merge pull request #2563 from wjklimek1/master
Support for STM32H503 MCU
This commit is contained in:
Ha Thach
GitHub
commit
bc75881a40
8
hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
Normal file
8
hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
Normal file
@ -0,0 +1,8 @@
|
||||
set(MCU_VARIANT stm32h503xx)
|
||||
set(JLINK_DEVICE stm32h503rb)
|
||||
|
||||
function(update_board TARGET)
|
||||
target_compile_definitions(${TARGET} PUBLIC
|
||||
STM32H503xx
|
||||
)
|
||||
endfunction()
|
||||
122
hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
Normal file
122
hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
Normal file
@ -0,0 +1,122 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||
* Copyright (c) 2023, HiFiPhile
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// LED
|
||||
#define LED_PORT GPIOA
|
||||
#define LED_PIN GPIO_PIN_5
|
||||
#define LED_STATE_ON 1
|
||||
|
||||
// Button
|
||||
#define BUTTON_PORT GPIOA
|
||||
#define BUTTON_PIN GPIO_PIN_0
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
// UART Enable for STLink VCOM
|
||||
#define UART_DEV USART3
|
||||
#define UART_CLK_EN __USART3_CLK_ENABLE
|
||||
#define UART_GPIO_PORT GPIOA
|
||||
#define UART_GPIO_AF GPIO_AF13_USART3
|
||||
|
||||
#define UART_TX_PIN GPIO_PIN_3
|
||||
#define UART_RX_PIN GPIO_PIN_4
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// RCC Clock
|
||||
//--------------------------------------------------------------------+
|
||||
static inline void SystemClock_Config(void) {
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 12;
|
||||
RCC_OscInitStruct.PLL.PLLN = 250;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_PCLK3;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
|
||||
|
||||
// Configure CRS clock source
|
||||
__HAL_RCC_CRS_CLK_ENABLE();
|
||||
RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
|
||||
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
|
||||
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
|
||||
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
|
||||
RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
|
||||
RCC_CRSInitStruct.ErrorLimitValue = 34;
|
||||
RCC_CRSInitStruct.HSI48CalibrationValue = 32;
|
||||
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
|
||||
|
||||
/* Select HSI48 as USB clock source */
|
||||
RCC_PeriphCLKInitTypeDef usb_clk = {0 };
|
||||
usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
HAL_RCCEx_PeriphCLKConfig(&usb_clk);
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USB_CLK_ENABLE();
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
7
hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
Normal file
7
hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
Normal file
@ -0,0 +1,7 @@
|
||||
MCU_VARIANT = stm32h503xx
|
||||
|
||||
CFLAGS += \
|
||||
-DSTM32H503xx
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32h503rb
|
||||
@ -67,15 +67,19 @@ void board_init(void) {
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
|
||||
//__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
//__HAL_RCC_PWR_CLK_ENABLE();
|
||||
#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
#endif
|
||||
#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
#endif
|
||||
#ifdef __HAL_RCC_GPIOI_CLK_ENABLE
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
#endif
|
||||
|
||||
UART_CLK_EN();
|
||||
UART_CLK_EN();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
@ -141,7 +145,9 @@ void board_init(void) {
|
||||
__HAL_RCC_USB_CLK_ENABLE();
|
||||
|
||||
/* Enable VDDUSB */
|
||||
#if defined (PWR_USBSCR_USB33DEN)
|
||||
HAL_PWREx_EnableVddUSB();
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
@ -115,6 +115,11 @@
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
#include "stm32h5xx.h"
|
||||
#define FSDEV_BUS_32BIT
|
||||
|
||||
#if !defined(USB_DRD_BASE) && defined(USB_DRD_FS_BASE)
|
||||
#define USB_DRD_BASE USB_DRD_FS_BASE
|
||||
#endif
|
||||
|
||||
#define FSDEV_PMA_SIZE (2048u)
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user