mcu specific rename

src/common/tusb_mcu.h

@@ -24,8 +24,22 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef TUSB_MCU_ATTR_H_
-#define TUSB_MCU_ATTR_H_
+#ifndef TUSB_MCU_H_
+#define TUSB_MCU_H_
+
+//--------------------------------------------------------------------+
+// Port Specific
+// TUP stand for TinyUSB Port (can be renamed)
+//--------------------------------------------------------------------+
+
+//------------- Unaligned Memory Access -------------//
+
+// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
+#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
+  #define TUP_ARCH_STRICT_ALIGN   0
+#else
+  #define TUP_ARCH_STRICT_ALIGN   1
+#endif
 
 /* USB Controller Attributes for Device, Host or MCU (both)
  * - ENDPOINT_MAX: max (logical) number of endpoint
@@ -45,7 +59,7 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // TODO USB0 has 6, USB1 has 4
-  #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
+  #define TUP_USBIP_CHIPIDEA_HS
   #define DCD_ATTR_ENDPOINT_MAX     6
   #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS
 
@@ -63,7 +77,7 @@
   #define DCD_ATTR_ENDPOINT_MAX   6
 
 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
-  #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
+  #define TUP_USBIP_CHIPIDEA_HS
   #define DCD_ATTR_ENDPOINT_MAX     8
   #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS
 
@@ -106,6 +120,8 @@
   #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
       defined (STM32F107xB) || defined (STM32F107xC)
     #define DCD_ATTR_ENDPOINT_MAX   4
+
+    #define TUP_USBIP_DWC2
     #define DCD_ATTR_DWC2_STM32
   #else
     #define DCD_ATTR_ENDPOINT_MAX   8
@@ -114,6 +130,8 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32F2)
   // FS has 4 ep, HS has 5 ep
   #define DCD_ATTR_ENDPOINT_MAX   6
+
+  #define TUP_USBIP_DWC2
   #define DCD_ATTR_DWC2_STM32
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F3)
@@ -122,15 +140,21 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32F4)
   // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
   #define DCD_ATTR_ENDPOINT_MAX   6
+
+  #define TUP_USBIP_DWC2
   #define DCD_ATTR_DWC2_STM32
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F7)
   // FS has 6, HS has 9
   #define DCD_ATTR_ENDPOINT_MAX   9
+
+  #define TUP_USBIP_DWC2
   #define DCD_ATTR_DWC2_STM32
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
   #define DCD_ATTR_ENDPOINT_MAX   9
+
+  #define TUP_USBIP_DWC2
   #define DCD_ATTR_DWC2_STM32
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G4)
@@ -146,6 +170,8 @@
       defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
       defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
     #define DCD_ATTR_ENDPOINT_MAX   6
+
+    #define TUP_USBIP_DWC2
     #define DCD_ATTR_DWC2_STM32
   #else
     #define DCD_ATTR_ENDPOINT_MAX   8

src/portable/chipidea/ci_hs/dcd_ci_hs.c

@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS)
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS)
 
 //--------------------------------------------------------------------+
 // INCLUDE

src/portable/ehci/ehci.c

@@ -45,7 +45,7 @@
 #define EHCI_DBG     2
 
 // Framelist size as small as possible to save SRAM
-#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS
+#ifdef TUP_USBIP_CHIPIDEA_HS
   // NXP Transdimension: 8 elements
   #define FRAMELIST_SIZE_BIT_VALUE      7u
   #define FRAMELIST_SIZE_USBCMD_VALUE   (((FRAMELIST_SIZE_BIT_VALUE &  3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \

src/portable/synopsys/dwc2/dcd_dwc2.c

@@ -30,7 +30,7 @@
 #include "tusb_option.h"
 
 #if CFG_TUD_ENABLED && \
-    ( defined(DCD_ATTR_DWC2_STM32) || \
+    ( defined(TUP_USBIP_DWC2) || \
       TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \
       TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711, OPT_MCU_BCM2835) || \
       TU_CHECK_MCU(OPT_MCU_BCM2837, OPT_MCU_XMC4000) )

src/tusb_option.h

@@ -172,7 +172,7 @@
   #include "tusb_config.h"
 #endif
 
-#include "common/tusb_mcu_attr.h"
+#include "common/tusb_mcu.h"
 
 //--------------------------------------------------------------------
 // RootHub Mode Configuration
@@ -239,6 +239,18 @@
 #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED
 #define TUSB_OPT_HOST_ENABLED   CFG_TUH_ENABLED
 
+// TODO move later
+// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
+// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
+// to generate unaligned access code.
+// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
+#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+  #define TUP_MCU_STRICT_ALIGN   1
+#else
+  #define TUP_MCU_STRICT_ALIGN   0
+#endif
+
+
 //--------------------------------------------------------------------+
 // COMMON OPTIONS
 //--------------------------------------------------------------------+
@@ -371,31 +383,6 @@
 #define CFG_TUH_VENDOR 0
 #endif
 
-//--------------------------------------------------------------------+
-// Port Specific
-// TUP stand for TinyUSB Port (can be renamed)
-//--------------------------------------------------------------------+
-
-//------------- Unaligned Memory -------------//
-
-// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
-#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
-  #define TUP_ARCH_STRICT_ALIGN   0
-#else
-  #define TUP_ARCH_STRICT_ALIGN   1
-#endif
-
-// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
-// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
-// to generate unaligned access code.
-// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
-#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
-  #define TUP_MCU_STRICT_ALIGN   1
-#else
-  #define TUP_MCU_STRICT_ALIGN   0
-#endif
-
-
 //------------------------------------------------------------------
 // Configuration Validation
 //------------------------------------------------------------------