inital support for usb typec and pd example

This commit is contained in:
hathach 2023-06-07 15:10:40 +07:00
parent 914e82b25d
commit b893f1d541
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16 changed files with 651 additions and 145 deletions

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@ -0,0 +1,32 @@
cmake_minimum_required(VERSION 3.17)
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
project(${PROJECT} C CXX ASM)
# Checks this example is valid for the family and initializes the project
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
# Espressif has its own cmake build system
if(FAMILY STREQUAL "espressif")
return()
endif()
add_executable(${PROJECT})
# Example source
target_sources(${PROJECT} PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
)
# Example include
target_include_directories(${PROJECT} PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/src
)
# Configure compilation flags and libraries for the example... see the corresponding function
# in hw/bsp/FAMILY/family.cmake for details.
family_configure_device_example(${PROJECT})

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@ -0,0 +1,11 @@
include ../../make.mk
INC += \
src \
$(TOP)/hw \
# Example source
EXAMPLE_SOURCE += $(wildcard src/*.c)
SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
include ../../rules.mk

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@ -0,0 +1 @@
mcu:STM32G4

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@ -0,0 +1,90 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include "bsp/board.h"
#include "tusb.h"
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF PROTOTYPES
//--------------------------------------------------------------------+
/* Blink pattern
* - 250 ms : button is not pressed
* - 1000 ms : button is pressed (and hold)
*/
enum {
BLINK_PRESSED = 250,
BLINK_UNPRESSED = 1000
};
static uint32_t blink_interval_ms = BLINK_UNPRESSED;
void led_blinking_task(void);
#define HELLO_STR "Hello from TinyUSB\r\n"
int main(void)
{
board_init();
board_led_write(true);
tuc_init(0, TYPEC_PORT_SNK);
uint32_t start_ms = 0;
bool led_state = false;
while (1) {
led_blinking_task();
// tuc_task();
}
}
#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
void app_main(void)
{
main();
}
#endif
//--------------------------------------------------------------------+
// BLINKING TASK
//--------------------------------------------------------------------+
void led_blinking_task(void)
{
static uint32_t start_ms = 0;
static bool led_state = false;
// Blink every interval ms
if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
start_ms += blink_interval_ms;
board_led_write(led_state);
led_state = 1 - led_state; // toggle
}

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@ -0,0 +1,79 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#ifndef _TUSB_CONFIG_H_
#define _TUSB_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
// special example that doesn't enable device or host stack
// This can cause some TinyUSB API missing, this define hack to allow us to fill those API
// to pass the compilation process
#define tud_int_handler(x)
//--------------------------------------------------------------------
// COMMON CONFIGURATION
//--------------------------------------------------------------------
// defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined
#endif
#ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE
#endif
#define CFG_TUD_ENABLED 0
#define CFG_TUH_ENABLED 0
// Enable TYPEC stack
#define CFG_TUC_ENABLED 1
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
// #define CFG_TUSB_DEBUG 0
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section.
* e.g
* - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
* - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
*/
#ifndef CFG_TUSB_MEM_SECTION
#define CFG_TUSB_MEM_SECTION
#endif
#ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* _TUSB_CONFIG_H_ */

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@ -58,7 +58,7 @@
// RCC Clock
//--------------------------------------------------------------------+
// CPU Frequency (Core Clock) is 150MHz
// CPU Frequency (Core Clock) is 170 MHz
static inline void board_clock_init(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@ -74,9 +74,9 @@ static inline void board_clock_init(void)
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
RCC_OscInitStruct.PLL.PLLN = 75;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
RCC_OscInitStruct.PLL.PLLN = 85;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
HAL_RCC_OscConfig(&RCC_OscInitStruct);

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@ -30,132 +30,6 @@
#include "bsp/board.h"
#include "board.h"
//--------------------------------------------------------------------+
// USB PD
//--------------------------------------------------------------------+
void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) {
(void) port_num;
// Initialization phase: CFG1
UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
(0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
// General programming sequence (with UCPD configured then enabled)
if (port_type == TUSB_TYPEC_PORT_SNK) {
// Enable both CC Phy
UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
// Read Voltage State on CC1 & CC2 fore initial state
uint32_t vstate_cc[2];
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG1_INT(vstate_cc[0]);
TU_LOG1_INT(vstate_cc[1]);
// Enable CC1 & CC2 Interrupt
UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
}
// Enable interrupt
NVIC_EnableIRQ(UCPD1_IRQn);
}
uint8_t pd_rx_buf[262];
uint32_t pd_rx_count = 0;
void UCPD1_IRQHandler(void) {
uint32_t sr = UCPD1->SR;
sr &= UCPD1->IMR;
// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
uint32_t vstate_cc[2];
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
uint32_t cr = UCPD1->CR;
// TODO only support SNK for now, required highest voltage for now
if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
TU_LOG1("Attach CC1\n");
cr &= ~UCPD_CR_PHYCCSEL;
cr |= UCPD_CR_PHYRXEN;
} else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
TU_LOG1("Attach CC2\n");
cr |= UCPD_CR_PHYCCSEL;
cr |= UCPD_CR_PHYRXEN;
} else {
TU_LOG1("Detach\n");
cr &= ~UCPD_CR_PHYRXEN;
}
if (cr & UCPD_CR_PHYRXEN) {
// Enable Interrupt
UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
}
// Enable PD RX
UCPD1->CR = cr;
// ack
UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
}
//------------- Receive -------------//
if (sr & UCPD_SR_RXORDDET) {
// SOP: Start of Packet.
// uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
// reset count when received SOP
pd_rx_count = 0;
// ack
UCPD1->ICR = UCPD_ICR_RXORDDETCF;
}
if (sr & UCPD_SR_RXNE) {
// TODO DMA later
do {
pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
} while (UCPD1->SR & UCPD_SR_RXNE);
}
if (sr & UCPD_SR_RXMSGEND) {
// End of message
uint32_t payload_size = UCPD1->RX_PAYSZ;
// ack
UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
}
if (sr & UCPD_SR_RXOVR) {
TU_LOG1("RXOVR\n");
TU_LOG1_HEX(pd_rx_count);
// ack
UCPD1->ICR = UCPD_ICR_RXOVRCF;
}
// if (sr & UCPD_SR_RXNE) {
// uint8_t data = UCPD1->RXDR;
// pd_rx_buf[pd_rx_count++] = data;
// TU_LOG1_HEX(data);
// }
// else {
// TU_LOG_LOCATION();
// }
}
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
@ -174,6 +48,11 @@ void USBWakeUp_IRQHandler(void)
tud_int_handler(0);
}
// USB PD
void UCPD1_IRQHandler(void) {
tuc_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
@ -274,8 +153,6 @@ void board_init(void)
// Default CC1/CC2 is PB4/PB6
// PB4 ------> UCPD1_CC2
// PB6 ------> UCPD1_CC1
usbpd_init(0, TUSB_TYPEC_PORT_SNK);
#endif
}

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@ -90,6 +90,7 @@ function(family_configure_example TARGET)
target_sources(${TARGET} PUBLIC
# TinyUSB Port
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/typec/typec_stm32.c
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c

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@ -32,6 +32,8 @@ function(add_tinyusb TARGET)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
# typec
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c
)
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}

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@ -199,6 +199,8 @@
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
#define TUP_USBIP_FSDEV
#define TUP_USBIP_FSDEV_STM32
#define TUP_USBIP_TYPEC_STM32
#define TUP_DCD_ENDPOINT_MAX 8
#elif TU_CHECK_MCU(OPT_MCU_STM32G0)

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@ -232,16 +232,6 @@ enum {
#define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2)
//--------------------------------------------------------------------+
// TYPE-C
//--------------------------------------------------------------------+
typedef enum {
TUSB_TYPEC_PORT_SRC,
TUSB_TYPEC_PORT_SNK,
TUSB_TYPEC_PORT_DRP
} tusb_typec_port_type_t;
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
@ -487,9 +477,9 @@ typedef struct TU_ATTR_PACKED
uint16_t bcdDFUVersion;
} tusb_desc_dfu_functional_t;
/*------------------------------------------------------------------*/
/* Types
*------------------------------------------------------------------*/
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED{
union {
struct TU_ATTR_PACKED {
@ -509,6 +499,81 @@ typedef struct TU_ATTR_PACKED{
TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
//--------------------------------------------------------------------+
// TYPE-C
//--------------------------------------------------------------------+
typedef enum {
TYPEC_PORT_SRC,
TYPEC_PORT_SNK,
TYPEC_PORT_DRP
} typec_port_type_t;
typedef enum {
TYPEC_MSG_CTRL_RESERVED = 0, // 0b00000: 0
TYPEC_MSG_CTRL_GOOD_CRC, // 0b00001: 1
TYPEC_MSG_CTRL_GO_TO_MIN, // 0b00010: 2
TYPEC_MSG_CTRL_ACCEPT, // 0b00011: 3
TYPEC_MSG_CTRL_REJECT, // 0b00100: 4
TYPEC_MSG_CTRL_PING, // 0b00101: 5
TYPEC_MSG_CTRL_PS_RDY, // 0b00110: 6
TYPEC_MSG_CTRL_GET_SOURCE_CAP, // 0b00111: 7
TYPEC_MSG_CTRL_GET_SINK_CAP, // 0b01000: 8
TYPEC_MSG_CTRL_DR_SWAP, // 0b01001: 9
TYPEC_MSG_CTRL_PR_SWAP, // 0b01010: 10
TYPEC_MSG_CTRL_VCONN_SWAP, // 0b01011: 11
TYPEC_MSG_CTRL_WAIT, // 0b01100: 12
TYPEC_MSG_CTRL_SOFT_RESET, // 0b01101: 13
TYPEC_MSG_CTRL_DATA_RESET, // 0b01110: 14
TYPEC_MSG_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15
TYPEC_MSG_CTRL_NOT_SUPPORTED, // 0b10000: 16
TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
TYPEC_MSG_CTRL_GET_STATUS, // 0b10010: 18
TYPEC_MSG_CTRL_FR_SWAP, // 0b10011: 19
TYPEC_MSG_CTRL_GET_PPS_STATUS, // 0b10100: 20
TYPEC_MSG_CTRL_GET_COUNTRY_CODES, // 0b10101: 21
TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22
TYPEC_MSG_CTRL_GET_SOURCE_INFO, // 0b10111: 23
TYPEC_MSG_CTRL_REVISION, // 0b11000: 24
} typec_msg_ctrl_type_t;
typedef enum {
TYPEC_MSG_DATA_RESERVED = 0, // 0b00000: 0
TYPEC_MSG_DATA_SOURCE_CAP, // 0b00001: 1
TYPEC_MSG_DATA_REQUEST, // 0b00010: 2
TYPEC_MSG_DATA_BIST, // 0b00011: 3
TYPEC_MSG_DATA_SINK_CAP, // 0b00100: 4
TYPEC_MSG_DATA_BATTERY_STATUS, // 0b00101: 5
TYPEC_MSG_DATA_ALERT, // 0b00110: 6
TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7
TYPEC_MSG_DATA_ENTER_USB, // 0b01000: 8
TYPEC_MSG_DATA_EPR_REQUEST, // 0b01001: 9
TYPEC_MSG_DATA_EPR_MODE, // 0b01010: 10
TYPEC_MSG_DATA_SRC_INFO, // 0b01011: 11
TYPEC_MSG_DATA_REVISION, // 0b01100: 12
TYPEC_MSG_DATA_RESERVED_13, // 0b01101: 13
TYPEC_MSG_DATA_RESERVED_14, // 0b01110: 14
TYPEC_MSG_DATA_VENDOR_DEFINED, // 0b01111: 15
} typec_msg_data_type_t;
typedef struct TU_ATTR_PACKED {
uint16_t msg_type : 5; // [0:4]
uint16_t data_role : 1; // [5] SOP only
uint16_t specs_rev : 2; // [6:7]
uint16_t power_role : 1; // [8] SOP only
uint16_t msg_id : 3; // [9:11]
uint16_t n_data_obj : 3; // [12:14]
uint16_t extended : 1; // [15]
} tusb_typec_message_header_t;
typedef struct TU_ATTR_PACKED {
uint16_t data_size : 9; // [0:8]
uint16_t reserved : 1; // [9]
uint16_t request_chunk : 1; // [10]
uint16_t chunk_number : 4; // [11:14]
uint16_t chunked : 1; // [15]
} tusb_typec_message_header_extended_t;
TU_ATTR_PACKED_END // End of all packed definitions
TU_ATTR_BIT_FIELD_ORDER_END

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@ -0,0 +1,181 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "tusb_option.h"
#include "typec/tcd.h"
#if CFG_TUC_ENABLED && defined(TUP_USBIP_TYPEC_STM32)
#include "common/tusb_common.h"
#include "stm32g4xx.h"
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
uint8_t pd_rx_buf[262];
uint32_t pd_rx_count = 0;
uint8_t pd_rx_order_set;
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tcd_init(uint8_t rhport, typec_port_type_t port_type) {
(void) rhport;
// Initialization phase: CFG1
UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
(0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
(0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
// General programming sequence (with UCPD configured then enabled)
if (port_type == TYPEC_PORT_SNK) {
// Enable both CC Phy
UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
// Read Voltage State on CC1 & CC2 fore initial state
uint32_t vstate_cc[2];
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG1_INT(vstate_cc[0]);
TU_LOG1_INT(vstate_cc[1]);
// Enable CC1 & CC2 Interrupt
UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
}
return true;
}
// Enable interrupt
void tcd_int_enable (uint8_t rhport) {
(void) rhport;
NVIC_EnableIRQ(UCPD1_IRQn);
}
// Disable interrupt
void tcd_int_disable(uint8_t rhport) {
(void) rhport;
NVIC_DisableIRQ(UCPD1_IRQn);
}
void tcd_int_handler(uint8_t rhport) {
(void) rhport;
uint32_t sr = UCPD1->SR;
sr &= UCPD1->IMR;
// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
uint32_t vstate_cc[2];
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
uint32_t cr = UCPD1->CR;
// TODO only support SNK for now, required highest voltage for now
if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
TU_LOG1("Attach CC1\n");
cr &= ~UCPD_CR_PHYCCSEL;
cr |= UCPD_CR_PHYRXEN;
} else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
TU_LOG1("Attach CC2\n");
cr |= UCPD_CR_PHYCCSEL;
cr |= UCPD_CR_PHYRXEN;
} else {
TU_LOG1("Detach\n");
cr &= ~UCPD_CR_PHYRXEN;
}
if (cr & UCPD_CR_PHYRXEN) {
// Enable Interrupt
UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
}
// Enable PD RX
UCPD1->CR = cr;
// ack
UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
}
//------------- Receive -------------//
if (sr & UCPD_SR_RXORDDET) {
// SOP: Start of Packet.
pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
// reset count when received SOP
pd_rx_count = 0;
// ack
UCPD1->ICR = UCPD_ICR_RXORDDETCF;
}
if (sr & UCPD_SR_RXNE) {
// TODO DMA later
do {
pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
} while (UCPD1->SR & UCPD_SR_RXNE);
}
if (sr & UCPD_SR_RXMSGEND) {
// End of message
// Skip if CRC failed
if (!(sr & UCPD_SR_RXERR)) {
uint32_t payload_size = UCPD1->RX_PAYSZ;
TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count);
}
// ack
UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
}
if (sr & UCPD_SR_RXOVR) {
TU_LOG1("RXOVR\n");
TU_LOG1_HEX(pd_rx_count);
// ack
UCPD1->ICR = UCPD_ICR_RXOVRCF;
}
// if (sr & UCPD_SR_RXNE) {
// uint8_t data = UCPD1->RXDR;
// pd_rx_buf[pd_rx_count++] = data;
// TU_LOG1_HEX(data);
// }
// else {
// TU_LOG_LOCATION();
// }
}
#endif

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@ -40,6 +40,11 @@
#include "class/hid/hid.h"
//------------- TypeC -------------//
#if CFG_TUC_ENABLED
#include "typec/utcd.h"
#endif
//------------- HOST -------------//
#if CFG_TUH_ENABLED
#include "host/usbh.h"

58
src/typec/tcd.h Normal file
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@ -0,0 +1,58 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _TUSB_TCD_H_
#define _TUSB_TCD_H_
#include "common/tusb_common.h"
#include "osal/osal.h"
#include "common/tusb_fifo.h"
#ifdef __cplusplus
extern "C" {
#endif
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
// Initialize controller
bool tcd_init(uint8_t rhport, typec_port_type_t port_type);
// Enable interrupt
void tcd_int_enable (uint8_t rhport);
// Disable interrupt
void tcd_int_disable(uint8_t rhport);
// Interrupt Handler
void tcd_int_handler(uint8_t rhport);
#endif

48
src/typec/utcd.c Normal file
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@ -0,0 +1,48 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (thach@tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "tusb_option.h"
#if CFG_TUC_ENABLED
#include "tcd.h"
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tuc_init(uint8_t rhport, typec_port_type_t port_type) {
TU_ASSERT(tcd_init(rhport, port_type));
tcd_int_enable(rhport);
return true;
}
#endif

54
src/typec/utcd.h Normal file
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@ -0,0 +1,54 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _TUSB_UTCD_H_
#define _TUSB_UTCD_H_
#include "common/tusb_common.h"
#ifdef __cplusplus
extern "C" {
#endif
//--------------------------------------------------------------------+
// Application API
//--------------------------------------------------------------------+
// init typec stack
bool tuc_init(uint8_t rhport, typec_port_type_t port_type);
#ifndef _TUSB_TCD_H_
extern void tcd_int_handler(uint8_t rhport);
#endif
// Interrupt handler, name alias to TCD
#define tuc_int_handler tcd_int_handler
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
#endif