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https://github.com/hathach/tinyusb.git
synced 2025-03-28 16:20:26 +00:00
able to detect new device and start enumerating
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cacc96b25d
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b413439416
@ -140,11 +140,13 @@ enum {
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//
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//
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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//typedef struct {
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typedef struct {
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// uint8_t mode
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uint8_t mode;
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//} max2341e_data_t;
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//
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volatile uint16_t frame_count;
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//max2341e_data_t max2341e_data;
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} max2341e_data_t;
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static max2341e_data_t _hcd_data;
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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//
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//
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@ -168,6 +170,11 @@ static uint8_t reg_read(uint8_t reg) {
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return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2) ? rx_buf[1] : 0;
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return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2) ? rx_buf[1] : 0;
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}
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}
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static inline uint8_t mode_write(uint8_t data) {
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_hcd_data.mode = data;
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return reg_write(MODE_ADDR, data);
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}
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// Controller API
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// Controller API
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@ -220,7 +227,8 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
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}
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}
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}
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}
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reg_write(MODE_ADDR, new_mode);
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mode_write(new_mode);
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TU_LOG2_INT(speed);
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return speed;
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return speed;
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}
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}
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@ -228,6 +236,8 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
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bool hcd_init(uint8_t rhport) {
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bool hcd_init(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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tu_memclr(&_hcd_data, sizeof(_hcd_data));
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// full duplex, interrupt level (should be configurable)
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// full duplex, interrupt level (should be configurable)
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reg_write(PINCTL_ADDR, PINCTL_FDUPSPI | PINCTL_INTLEVEL);
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reg_write(PINCTL_ADDR, PINCTL_FDUPSPI | PINCTL_INTLEVEL);
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@ -239,17 +249,21 @@ bool hcd_init(uint8_t rhport) {
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}
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}
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// Mode: Host and DP/DM pull down
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// Mode: Host and DP/DM pull down
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reg_write(MODE_ADDR, MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
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mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
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// Enable Connection IRQ
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// Enable Connection IRQ
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reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ);
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reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ);
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// Note: if device is already connected, CONDET IRQ may not be triggered. We need to detect it by sampling bus signal
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#if 0
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// Note: if device is already connected, CONDET IRQ may not be triggered.
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// We need to detect it by sampling bus signal. FIXME not working
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reg_write(HCTL_ADDR, HCTL_SAMPLEBUS);
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reg_write(HCTL_ADDR, HCTL_SAMPLEBUS);
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while( !(reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS) ) {}
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while ( reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS ) {}
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handle_connect_irq(rhport);
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if ( TUSB_SPEED_INVALID != handle_connect_irq(rhport) ) {
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reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
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reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ); // clear connect irq
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}
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#endif
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// Enable Interrupt pin
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// Enable Interrupt pin
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reg_write(CPUCTL_ADDR, CPUCTL_IE);
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reg_write(CPUCTL_ADDR, CPUCTL_IE);
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@ -262,7 +276,26 @@ void hcd_int_handler(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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uint8_t hirq = reg_read(HIRQ_ADDR);
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uint8_t hirq = reg_read(HIRQ_ADDR);
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TU_LOG3_INT(hirq);
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TU_LOG3_HEX(hirq);
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if (hirq & HIRQ_CONDET_IRQ) {
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tusb_speed_t speed = handle_connect_irq(rhport);
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if (speed == TUSB_SPEED_INVALID) {
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hcd_event_device_remove(rhport, true);
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}else {
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hcd_event_device_attach(rhport, true);
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}
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}
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if (hirq & HIRQ_FRAME_IRQ) {
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_hcd_data.frame_count++;
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}
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// clear all interrupt
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if ( hirq ) {
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reg_write(HIRQ_ADDR, hirq);
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}
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}
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}
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// Enable USB interrupt
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// Enable USB interrupt
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@ -278,8 +311,7 @@ void hcd_int_disable(uint8_t rhport) {
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// Get frame number (1ms)
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// Get frame number (1ms)
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uint32_t hcd_frame_number(uint8_t rhport) {
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uint32_t hcd_frame_number(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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return (uint32_t ) _hcd_data.frame_count;
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return 0;
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}
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}
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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@ -289,26 +321,26 @@ uint32_t hcd_frame_number(uint8_t rhport) {
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// Get the current connect status of roothub port
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// Get the current connect status of roothub port
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bool hcd_port_connect_status(uint8_t rhport) {
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bool hcd_port_connect_status(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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return (_hcd_data.mode & MODE_SOFKAENAB) ? true : false;
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return false;
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}
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}
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// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
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// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
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// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
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// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
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void hcd_port_reset(uint8_t rhport) {
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void hcd_port_reset(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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reg_write(HCTL_ADDR, HCTL_BUSRST);
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}
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}
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// Complete bus reset sequence, may be required by some controllers
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// Complete bus reset sequence, may be required by some controllers
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void hcd_port_reset_end(uint8_t rhport) {
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void hcd_port_reset_end(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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reg_write(HCTL_ADDR, 0);
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}
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}
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// Get port link speed
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// Get port link speed
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tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
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tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
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(void) rhport;
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(void) rhport;
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return (_hcd_data.mode & MODE_LOWSPEED) ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
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return TUSB_SPEED_FULL;
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}
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}
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// HCD closes all opened endpoints belong to this device
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// HCD closes all opened endpoints belong to this device
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