use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEED

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hathach 2024-05-20 17:26:04 +07:00
parent 4a5fee503b
commit b19295c1c1
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GPG Key ID: 26FAB84F615C3C52
9 changed files with 98 additions and 117 deletions

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@ -134,6 +134,17 @@ OPENOCD_OPTION ?=
flash-openocd: $(BUILD)/$(PROJECT).elf flash-openocd: $(BUILD)/$(PROJECT).elf
openocd $(OPENOCD_OPTION) -c "program $< verify reset exit" openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
# --------------- openocd-wch -----------------
# wch-linke is not supported yet in official openOCD yet. We need to either use
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
# 2. compiled from https://github.com/hathach/riscv-openocd-wch or
# https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
# with ./configure --disable-werror --enable-wlinke --enable-ch347=no
OPENOCD_WCH ?= /home/${USER}/app/riscv-openocd-wch/src/openocd
OPENOCD_WCH_OPTION ?=
flash-openocd-wch: $(BUILD)/$(PROJECT).elf
$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit
# --------------- dfu-util ----------------- # --------------- dfu-util -----------------
DFU_UTIL_OPTION ?= -a 0 DFU_UTIL_OPTION ?= -a 0
flash-dfu-util: $(BUILD)/$(PROJECT).bin flash-dfu-util: $(BUILD)/$(PROJECT).bin

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@ -16,8 +16,6 @@ CPU_CORE ?= rv32imac-ilp32
CFLAGS += \ CFLAGS += \
-mcmodel=medany \ -mcmodel=medany \
-ffunction-sections \
-fdata-sections \
-ffat-lto-objects \ -ffat-lto-objects \
-flto \ -flto \
-DCH32V20x_${MCU_VARIANT} \ -DCH32V20x_${MCU_VARIANT} \
@ -46,9 +44,5 @@ INC += \
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
# wch-link is not supported yet in official openOCD yet. We need to either use OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or flash: flash-openocd-wch
# 2. compiled from modified source https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
OPENOCD ?= $(HOME)/app/riscv-openocd-wch/src/openocd
flash: $(BUILD)/$(PROJECT).elf
$(OPENOCD) -f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -c init -c halt -c "flash write_image $<" -c reset -c exit

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@ -35,41 +35,31 @@
// Forward USB interrupt events to TinyUSB IRQ Handler // Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USBHS_IRQHandler (void) __attribute__((naked)); // TODO maybe having FS as port0, HS as port1
void USBHS_IRQHandler (void)
{
__asm volatile ("call USBHS_IRQHandler_impl; mret");
}
__attribute__ ((used)) void USBHS_IRQHandler_impl (void) __attribute__((interrupt)) void USBHS_IRQHandler(void) {
{ #if CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
tud_int_handler(0); tud_int_handler(0);
#endif
} }
__attribute__((interrupt)) void OTG_FS_IRQHandler(void) {
void OTG_FS_IRQHandler (void) __attribute__((naked)); #if CFG_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED
void OTG_FS_IRQHandler (void)
{
__asm volatile ("call OTG_FS_IRQHandler_impl; mret");
}
__attribute__ ((used)) void OTG_FS_IRQHandler_impl (void)
{
tud_int_handler(0); tud_int_handler(0);
#endif
} }
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM // MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
uint32_t SysTick_Config(uint32_t ticks) uint32_t SysTick_Config(uint32_t ticks) {
{
NVIC_EnableIRQ(SysTicK_IRQn); NVIC_EnableIRQ(SysTicK_IRQn);
SysTick->CTLR=0; SysTick->CTLR = 0;
SysTick->SR=0; SysTick->SR = 0;
SysTick->CNT=0; SysTick->CNT = 0;
SysTick->CMP=ticks-1; SysTick->CMP = ticks - 1;
SysTick->CTLR=0xF; SysTick->CTLR = 0xF;
return 0; return 0;
} }
@ -82,17 +72,17 @@ void board_init(void) {
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#endif #endif
usart_printf_init(115200); usart_printf_init(115200);
#if 0 #if CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
// Use Highspeed USB
RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY); RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY);
RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE); RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE);
RCC_USBHSConfig(RCC_USBPLL_Div2); RCC_USBHSConfig(RCC_USBPLL_Div2);
RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M); RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M);
RCC_USBHSPHYPLLALIVEcmd(ENABLE); RCC_USBHSPHYPLLALIVEcmd(ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE);
#else
#else
uint8_t otg_div; uint8_t otg_div;
switch (SystemCoreClock) { switch (SystemCoreClock) {
case 48000000: otg_div = RCC_OTGFSCLKSource_PLLCLK_Div1; break; case 48000000: otg_div = RCC_OTGFSCLKSource_PLLCLK_Div1; break;
@ -102,7 +92,7 @@ void board_init(void) {
} }
RCC_OTGFSCLKConfig(otg_div); RCC_OTGFSCLKConfig(otg_div);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE);
#endif #endif
GPIO_InitTypeDef GPIO_InitStructure = {0}; GPIO_InitTypeDef GPIO_InitStructure = {0};
@ -127,24 +117,14 @@ void board_init(void) {
} }
#if CFG_TUSB_OS == OPT_OS_NONE #if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0; volatile uint32_t system_ticks = 0;
/* Small workaround to support HW stack save/restore */ __attribute__((interrupt)) void SysTick_Handler(void) {
void SysTick_Handler (void) __attribute__((naked));
void SysTick_Handler (void)
{
__asm volatile ("call SysTick_Handler_impl; mret");
}
__attribute__((used)) void SysTick_Handler_impl (void)
{
SysTick->SR = 0; SysTick->SR = 0;
system_ticks++; system_ticks++;
} }
uint32_t board_millis (void) uint32_t board_millis(void) {
{
return system_ticks; return system_ticks;
} }
@ -154,36 +134,29 @@ uint32_t board_millis (void)
// Board porting API // Board porting API
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void board_led_write (bool state) void board_led_write(bool state) {
{
GPIO_WriteBit(LED_PORT, LED_PIN, state); GPIO_WriteBit(LED_PORT, LED_PIN, state);
} }
uint32_t board_button_read (void) uint32_t board_button_read(void) {
{
return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN); return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN);
} }
int board_uart_read (uint8_t *buf, int len) int board_uart_read(uint8_t* buf, int len) {
{
(void) buf; (void) buf;
(void) len; (void) len;
return 0; return 0;
} }
int board_uart_write (void const *buf, int len) int board_uart_write(void const* buf, int len) {
{
int txsize = len; int txsize = len;
while ( txsize-- ) while (txsize--) {
{
uart_write(*(uint8_t const*) buf); uart_write(*(uint8_t const*) buf);
buf++; buf++;
} }
return len; return len;
} }
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief Reports the name of the source file and the source line number * @brief Reports the name of the source file and the source line number

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@ -1,7 +1,8 @@
include_guard() include_guard()
set(CH32_FAMILY ch32v30x) set(CH32_FAMILY ch32v30x)
set(SDK_DIR ${TOP}/hw/mcu/wch/ch32v307/EVT/EXAM/SRC) set(SDK_DIR ${TOP}/hw/mcu/wch/ch32v307)
set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
# include board specific # include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@ -13,7 +14,10 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TO
set(FAMILY_MCUS CH32V307 CACHE INTERNAL "") set(FAMILY_MCUS CH32V307 CACHE INTERNAL "")
set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg") set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
# Port0 Fullspeed, Port1 Highspeed # default to highspeed
if (NOT DEFINED SPEED)
set(SPEED high)
endif()
#------------------------------------ #------------------------------------
# BOARD_TARGET # BOARD_TARGET
@ -30,27 +34,26 @@ function(add_board_target BOARD_TARGET)
set(LD_FILE_Clang ${LD_FILE_GNU}) set(LD_FILE_Clang ${LD_FILE_GNU})
if (NOT DEFINED STARTUP_FILE_GNU) if (NOT DEFINED STARTUP_FILE_GNU)
set(STARTUP_FILE_GNU ${SDK_DIR}/Startup/startup_${CH32_FAMILY}_D8C.S) set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_D8C.S)
endif () endif ()
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU}) set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
add_library(${BOARD_TARGET} STATIC add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/Core/core_riscv.c ${SDK_SRC_DIR}/Core/core_riscv.c
${SDK_DIR}/Peripheral/src/${CH32_FAMILY}_gpio.c ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_gpio.c
${SDK_DIR}/Peripheral/src/${CH32_FAMILY}_misc.c ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_misc.c
${SDK_DIR}/Peripheral/src/${CH32_FAMILY}_rcc.c ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_rcc.c
${SDK_DIR}/Peripheral/src/${CH32_FAMILY}_usart.c ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_usart.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${CH32_FAMILY}_it.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${CH32_FAMILY}_it.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
) )
target_include_directories(${BOARD_TARGET} PUBLIC target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/Peripheral/inc ${SDK_SRC_DIR}/Peripheral/inc
${CMAKE_CURRENT_FUNCTION_LIST_DIR} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
) )
target_compile_definitions(${BOARD_TARGET} PUBLIC target_compile_definitions(${BOARD_TARGET} PUBLIC
#BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED BOARD_TUD_MAX_SPEED=$<IF:$<STREQUAL:${SPEED},high>,OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
) )
update_board(${BOARD_TARGET}) update_board(${BOARD_TARGET})
@ -104,7 +107,7 @@ function(family_configure_example TARGET RTOS)
# Add TinyUSB target and port source # Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_CH32V307 ${RTOS}) family_add_tinyusb(${TARGET} OPT_MCU_CH32V307 ${RTOS})
target_sources(${TARGET}-tinyusb PUBLIC target_sources(${TARGET}-tinyusb PUBLIC
#${TOP}/src/portable/wch/dcd_ch32_usbhs.c ${TOP}/src/portable/wch/dcd_ch32_usbhs.c
${TOP}/src/portable/wch/dcd_ch32_usbfs.c ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
) )
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})

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@ -7,63 +7,54 @@
# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack # Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
CROSS_COMPILE ?= riscv-none-elf- CROSS_COMPILE ?= riscv-none-elf-
# Submodules CH32_FAMILY = ch32v30x
CH32V307_SDK = hw/mcu/wch/ch32v307 SDK_DIR = hw/mcu/wch/ch32v307
SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
# WCH-SDK paths
CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC
include $(TOP)/$(BOARD_PATH)/board.mk include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= rv32imac-ilp32 CPU_CORE ?= rv32imac-ilp32
# default to use high speed port, unless specified in board.mk or command line
SPEED ?= high
CFLAGS += \ CFLAGS += \
-flto \ -flto \
-msmall-data-limit=8 \ -msmall-data-limit=8 \
-mno-save-restore -Os \ -mno-save-restore \
-fmessage-length=0 \ -fmessage-length=0 \
-fsigned-char \ -fsigned-char \
-ffunction-sections \
-fdata-sections \
-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \ -DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
-Xlinker --gc-sections \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED ifeq ($(SPEED),high)
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
$(info "Using USBHS driver for HighSpeed mode")
else
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
$(info "Using USBFS driver for FullSpeed mode")
endif
LDFLAGS_GCC += \ LDFLAGS_GCC += \
-nostdlib -nostartfiles \ -nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs --specs=nosys.specs --specs=nano.specs \
SRC_C += \ SRC_C += \
src/portable/wch/dcd_ch32_usbhs.c \ src/portable/wch/dcd_ch32_usbhs.c \
$(CH32V307_SDK_SRC)/Core/core_riscv.c \ src/portable/wch/dcd_ch32_usbfs.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \ $(SDK_SRC_DIR)/Core/core_riscv.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \ $(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_gpio.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_rcc.c \ $(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_misc.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c $(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_rcc.c \
$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_usart.c
SRC_S += \ SRC_S += \
$(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S $(SDK_SRC_DIR)/Startup/startup_${CH32_FAMILY}_D8C.S
INC += \ INC += \
$(TOP)/$(BOARD_PATH) \ $(TOP)/$(BOARD_PATH) \
$(TOP)/$(CH32V307_SDK_SRC)/Peripheral/inc $(TOP)/$(SDK_SRC_DIR)/Peripheral/inc
# For freeRTOS port source # For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
# wch-link is not supported yet in official openOCD yet. We need to either use OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or flash: flash-openocd-wch
# 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch
#
# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable,
# therefore we need to compile it from source as follows:
# git clone https://github.com/kprasadvnsi/riscv-openocd-wch
# cd riscv-openocd-wch
# ./bootstrap
# ./configure CFLAGS="-Wno-error" --enable-wlink
# make
# openocd binaries will be generated in riscv-openocd-wch/src
# flash target ROM bootloader
OPENOCD_WCH = /home/${USER}/app/riscv-openocd-wch/src/openocd
flash: $(BUILD)/$(PROJECT).elf
$(OPENOCD_WCH) -f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -c init -c halt -c "program $<" -c wlink_reset_resume -c exit

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@ -404,14 +404,22 @@
//------------- WCH -------------// //------------- WCH -------------//
#elif TU_CHECK_MCU(OPT_MCU_CH32V307) #elif TU_CHECK_MCU(OPT_MCU_CH32V307)
#define TUP_DCD_ENDPOINT_MAX 8 // v307 support both FS and HS
// #define TUP_RHPORT_HIGHSPEED 1 #define TUP_USBIP_WCH_USBHS
#define TUP_USBIP_WCH_USBFS
#define TUP_RHPORT_HIGHSPEED 1 // default to highspeed
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED ? 16 : 8)
#elif TU_CHECK_MCU(OPT_MCU_CH32F20X) #elif TU_CHECK_MCU(OPT_MCU_CH32F20X)
#define TUP_DCD_ENDPOINT_MAX 16 #define TUP_USBIP_WCH_USBHS
#define TUP_RHPORT_HIGHSPEED 1 #define TUP_USBIP_WCH_USBFS
#define TUP_RHPORT_HIGHSPEED 1 // default to highspeed
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED ? 16 : 8)
#elif TU_CHECK_MCU(OPT_MCU_CH32V20X) #elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
#define TUP_USBIP_WCH_USBFS
#define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_MAX 8
#endif #endif

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@ -2,9 +2,9 @@
#define _USB_CH32_USBHS_REG_H #define _USB_CH32_USBHS_REG_H
#if (CFG_TUSB_MCU == OPT_MCU_CH32V307) #if (CFG_TUSB_MCU == OPT_MCU_CH32V307)
#include <ch32v30x.h> #include <ch32v30x.h>
#elif (CFG_TUSB_MCU == OPT_MCU_CH32F20X) #elif (CFG_TUSB_MCU == OPT_MCU_CH32F20X)
#include <ch32f20x.h> #include <ch32f20x.h>
#endif #endif
/******************* GLOBAL ******************/ /******************* GLOBAL ******************/

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@ -1,6 +1,7 @@
#include "tusb_option.h" #include "tusb_option.h"
#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_CH32V20X || CFG_TUSB_MCU == OPT_MCU_CH32V307) // Note: CH32 can have both USB FS and HS, only use this driver if CFG_TUD_MAX_SPEED is full speed
#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBFS) && (CFG_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED)
#include <stdio.h> #include <stdio.h>
#include "device/dcd.h" #include "device/dcd.h"

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@ -26,11 +26,11 @@
#include "tusb_option.h" #include "tusb_option.h"
#if CFG_TUD_ENABLED && ((CFG_TUSB_MCU == OPT_MCU_CH32V307) || (CFG_TUSB_MCU == OPT_MCU_CH32F20X)) // Note: CH32 can have both USB FS and HS, only use this driver if CFG_TUD_MAX_SPEED is high speed
#include "device/dcd.h" #if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBHS) && (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED)
#include "ch32_usbhs_reg.h" #include "ch32_usbhs_reg.h"
#include "device/dcd.h"
// Max number of bi-directional endpoints including EP0 // Max number of bi-directional endpoints including EP0
#define EP_MAX 16 #define EP_MAX 16