mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-25 23:38:06 +00:00
add test code & hcd_pipe_xfer for bulk transfer
- test cross 4k boundary test for bulk transfer rename p_qtd_list to p_qtd_list_head
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@ -113,7 +113,7 @@ void verify_open_qhd(ehci_qhd_t *p_qhd, uint8_t endpoint_addr, uint16_t max_pack
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//------------- HCD -------------//
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TEST_ASSERT(p_qhd->used);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list_head);
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}
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//--------------------------------------------------------------------+
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172
tests/test/host/ehci/test_ehci_pipe_bulk_xfer.c
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172
tests/test/host/ehci/test_ehci_pipe_bulk_xfer.c
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@ -0,0 +1,172 @@
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/*
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* test_ehci_pipe_bulk_xfer.c
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*
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* Created on: Feb 27, 2013
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* Author: hathach
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*/
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/*
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* Software License Agreement (BSD License)
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* Copyright (c) 2012, hathach (tinyusb.net)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* This file is part of the tiny usb stack.
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*/
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#include "unity.h"
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#include "tusb_option.h"
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#include "errors.h"
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#include "binary.h"
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "ehci.h"
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#include "test_ehci.h"
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extern ehci_data_t ehci_data;
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
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LPC_USB0_Type lpc_usb0;
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LPC_USB1_Type lpc_usb1;
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uint8_t const control_max_packet_size = 64;
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uint8_t const hub_addr = 2;
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uint8_t const hub_port = 2;
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uint8_t dev_addr;
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uint8_t hostid;
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uint8_t xfer_data [18000]; // 18K to test buffer pointer list
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ehci_qhd_t *async_head;
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ehci_qhd_t *p_qhd_bulk;
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pipe_handle_t pipe_hdl_bulk;
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tusb_descriptor_endpoint_t const desc_ept_bulk_in =
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{
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.bLength = sizeof(tusb_descriptor_endpoint_t),
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.bDescriptorType = TUSB_DESC_ENDPOINT,
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.bEndpointAddress = 0x81,
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.bmAttributes = { .xfer = TUSB_XFER_BULK },
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.wMaxPacketSize = 512,
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.bInterval = 0
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};
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//--------------------------------------------------------------------+
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// Setup/Teardown + helper declare
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//--------------------------------------------------------------------+
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void setUp(void)
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{
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memclr_(&lpc_usb0, sizeof(LPC_USB0_Type));
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memclr_(&lpc_usb1, sizeof(LPC_USB1_Type));
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memclr_(usbh_device_info_pool, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
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memclr_(&ehci_data, sizeof(ehci_data_t));
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memclr_(xfer_data, sizeof(xfer_data));
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hcd_init();
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dev_addr = 1;
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hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
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for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX; i++)
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{
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usbh_device_info_pool[i].core_id = hostid;
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usbh_device_info_pool[i].hub_addr = hub_addr;
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usbh_device_info_pool[i].hub_port = hub_port;
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usbh_device_info_pool[i].speed = TUSB_SPEED_HIGH;
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}
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async_head = get_async_head( hostid );
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pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type);
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p_qhd_bulk = &ehci_data.device[ dev_addr ].qhd[ pipe_hdl_bulk.index ];
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}
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void tearDown(void)
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{
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}
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//--------------------------------------------------------------------+
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// BULK TRANSFER
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//--------------------------------------------------------------------+
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void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length)
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{
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TEST_ASSERT_TRUE(p_qtd->alternate.terminate); // not used, always invalid
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//------------- status -------------//
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TEST_ASSERT_FALSE(p_qtd->pingstate_err);
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TEST_ASSERT_FALSE(p_qtd->non_hs_split_state);
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TEST_ASSERT_FALSE(p_qtd->non_hs_period_missed_uframe);
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TEST_ASSERT_FALSE(p_qtd->xact_err);
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TEST_ASSERT_FALSE(p_qtd->babble_err);
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TEST_ASSERT_FALSE(p_qtd->buffer_err);
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TEST_ASSERT_FALSE(p_qtd->halted);
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TEST_ASSERT_TRUE(p_qtd->active);
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TEST_ASSERT_EQUAL(3, p_qtd->cerr);
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TEST_ASSERT_EQUAL(0, p_qtd->current_page);
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TEST_ASSERT_EQUAL(length, p_qtd->total_bytes);
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TEST_ASSERT_EQUAL_HEX( p_data, p_qtd->buffer[0] );
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for(uint8_t i=1; i<5; i++)
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{
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TEST_ASSERT_EQUAL_HEX( align4k((uint32_t) (p_data+4096*i)), align4k(p_qtd->buffer[i]) );
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}
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}
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void test_bulk_xfer(void)
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{
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//------------- Code Under Test -------------//
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hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data));
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ehci_qtd_t* p_qtd = p_qhd_bulk->p_qtd_list_head;
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TEST_ASSERT_NOT_NULL(p_qtd);
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verify_qtd( p_qtd, xfer_data, sizeof(xfer_data));
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TEST_ASSERT_TRUE(p_qtd->used);
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TEST_ASSERT_TRUE(p_qtd->next.terminate);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_qtd->pid);
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TEST_ASSERT_TRUE(p_qtd->int_on_complete);
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TEST_ASSERT_FALSE(p_qtd->data_toggle);
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}
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void test_bulk_xfer_double(void)
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{
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uint8_t data2[100];
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//------------- Code Under Test -------------//
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hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data));
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hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2));
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ehci_qtd_t* p_qtd = p_qhd_bulk->p_qtd_list_head;
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TEST_ASSERT_NOT_NULL(p_qtd);
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TEST_ASSERT_FALSE(p_qtd->next.terminate);
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}
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@ -157,7 +157,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
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p_status = &ehci_data.addr0_qtd[2];
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TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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@ -175,7 +175,7 @@ void test_control_xfer_get(void)
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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@ -201,6 +201,7 @@ void test_control_xfer_get(void)
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TEST_ASSERT_TRUE(p_status->int_on_complete);
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_OUT, p_status->pid);
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TEST_ASSERT_TRUE(p_status->next.terminate);
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}
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void test_control_xfer_set(void)
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@ -219,7 +220,7 @@ void test_control_xfer_set(void)
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hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data);
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TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX( p_status , p_setup->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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@ -228,4 +229,5 @@ void test_control_xfer_set(void)
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TEST_ASSERT_TRUE(p_status->int_on_complete);
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_status->pid);
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TEST_ASSERT_TRUE(p_status->next.terminate);
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}
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@ -289,6 +289,9 @@ static void queue_td_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_b
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{
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memclr_(p_qtd, sizeof(ehci_qtd_t));
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p_qtd->used = 1;
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p_qtd->next.terminate = 1; // init to null
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p_qtd->alternate.terminate = 1; // not used, always set to terminated
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p_qtd->active = 1;
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p_qtd->cerr = 3; // TODO 3 consecutive errors tolerance
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@ -297,6 +300,11 @@ static void queue_td_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_b
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p_qtd->buffer[0] = data_ptr;
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uint8_t i;
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for(i=1; i<5; i++)
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{
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p_qtd->buffer[i] |= align4k( p_qtd->buffer[i-1] ) + 4096;
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}
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}
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tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const * p_request, uint8_t data[])
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@ -335,7 +343,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
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p_status->next.terminate = 1;
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//------------- hook TD List to Queue Head -------------//
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p_qhd->p_qtd_list = p_setup;
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p_qhd->p_qtd_list_head = p_setup;
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p_qhd->qtd_overlay.next.address = (uint32_t) p_setup;
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return TUSB_ERROR_NONE;
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@ -392,15 +400,29 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
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return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = index};
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}
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_byte)
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes)
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{
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//------------- pipe handle validate -------------//
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//------------- find a free qtd -------------//
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// uint8_t index=0;
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// while( index<EHCI_MAX_QTD && ehci_data.device[dev_addr].qtd[index].used )
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// {
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// index++;
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// }
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// ASSERT( index < EHCI_MAX_QHD, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD);
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uint8_t index=0;
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while( index<EHCI_MAX_QTD && ehci_data.device[pipe_hdl.dev_addr].qtd[index].used )
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{
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index++;
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}
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ASSERT( index < EHCI_MAX_QTD, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD);
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//------------- set up QTD -------------//
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ehci_qhd_t *p_qhd = &ehci_data.device[pipe_hdl.dev_addr].qhd[index];
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ehci_qtd_t *p_qtd = &ehci_data.device[pipe_hdl.dev_addr].qtd[index];
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queue_td_init(p_qtd, (uint32_t) buffer, total_bytes);
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p_qtd->pid = p_qhd->pid_non_control;
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p_qtd->int_on_complete = 1;
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p_qhd->p_qtd_list_head = p_qtd;
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p_qhd->qtd_overlay.next.address = (uint32_t) p_qtd;
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return TUSB_ERROR_NONE;
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}
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@ -461,7 +483,7 @@ static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_pa
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//------------- HCD Management Data -------------//
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p_qhd->used = 1;
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p_qhd->p_qtd_list = NULL;
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p_qhd->p_qtd_list_head = NULL;
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p_qhd->pid_non_control = (endpoint_addr & 0x80) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
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}
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@ -191,14 +191,17 @@ typedef struct {
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/// Word 4-11: Transfer Overlay
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volatile ehci_qtd_t qtd_overlay;
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/// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes
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//--------------------------------------------------------------------+
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/// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes
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/// thus there are 16 bytes padding free that we can make use of.
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//--------------------------------------------------------------------+
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uint8_t used;
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uint8_t pid_non_control;
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uint8_t list_index;
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uint8_t reserved;
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ehci_qtd_t *p_qtd_list; /* used as TD head to clean up TD chain when transfer done */ // TODO consider using ehci_link_t (terminate bit)
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ehci_qtd_t *p_qtd_list_head; // head of the TD list scheduled
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volatile uint32_t status; // TODO will remove volatile after remove all HcdQHD function
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uint16_t *pActualTransferCount; /* total transferred bytes of a usb request */
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@ -80,7 +80,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
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tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_byte) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) ATTR_WARN_UNUSED_RESULT;
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#if 0
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