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house keeping, lpc43xx works okie
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2af9ecbed5
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@ -507,7 +507,6 @@ tusb_error_t dcd_pipe_xfer(endpoint_handle_t edpt_hdl, void* buffer, uint16_t t
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//------------- Device Controller Driver's Interrupt Handler -------------//
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void xfer_complete_isr(uint8_t coreid, uint32_t reg_complete)
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{
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// TODO currently exclude control
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for(uint8_t ep_idx = 2; ep_idx < DCD_QHD_MAX; ep_idx++)
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{
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if ( BIT_TEST_(reg_complete, edpt_phy2pos(ep_idx)) )
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@ -589,23 +588,12 @@ void dcd_isr(uint8_t coreid)
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if (lpc_usb->ENDPTSETUPSTAT)
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{ // 23.10.10.2 Operational model for setup transfers
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tusb_control_request_t control_request = p_dcd->qhd[0].setup_request;
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lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;
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//------------- Flush if previous transfer is not done -------------//
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// if (p_dcd->qhd[0].qtd_overlay.active || p_dcd->qhd[1].qtd_overlay.active)
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// {
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// do
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// {
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// lpc_usb->ENDPTFLUSH = BIT_(0) | BIT_(16);
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// while(lpc_usb->ENDPTFLUSH) {} // TODO refractor later
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// }while( lpc_usb->ENDPTSTAT & (BIT_(0) | BIT_(16)) );
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//
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// p_dcd->qhd[0].qtd_overlay.active = p_dcd->qhd[1].qtd_overlay.active = 0;
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// }
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lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT; // acknowledge
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usbd_setup_received_isr(coreid, &control_request);
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}else if ( edpt_complete & 0x03 )
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}
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//------------- Control Request Completed -------------//
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else if ( edpt_complete & 0x03 )
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{ // only either of Endpoint Control is set with interrupt on complete flag
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endpoint_handle_t edpt_hdl =
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{
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@ -621,8 +609,7 @@ void dcd_isr(uint8_t coreid)
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}
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//------------- Transfer Complete -------------//
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if (edpt_complete)
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if ( edpt_complete & ~(0x03UL) )
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{
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xfer_complete_isr(coreid, edpt_complete);
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}
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@ -351,7 +351,10 @@ void dcd_isr(uint8_t coreid)
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}
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//------------- Non-Control Endpoints -------------//
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endpoint_non_control_isr(int_status);
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if( int_status & ~(0x03UL) )
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{
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endpoint_non_control_isr(int_status);
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}
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}
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//--------------------------------------------------------------------+
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