diff --git a/demos/bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/system_LPC43xx.c b/demos/bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/system_LPC43xx.c
index ea33bf7f5..7e132ef03 100644
--- a/demos/bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/system_LPC43xx.c
+++ b/demos/bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/system_LPC43xx.c
@@ -1,10 +1,10 @@
/**********************************************************************
-* $Id$ system_lpc43xx.c 2011-06-02
+* $Id$ system_lpc43xx.c 2012-05-21
*//**
* @file system_lpc43xx.c
* @brief Cortex-M3 Device System Source File for NXP lpc43xx Series.
* @version 1.0
-* @date 02. June. 2011
+* @date 21. May. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
@@ -21,9 +21,23 @@
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
+* Permission to use, copy, modify, and distribute this software and its
+* documentation is hereby granted, under NXP Semiconductors'
+* relevant copyright in the software, without fee, provided that it
+* is used in conjunction with NXP Semiconductors microcontrollers. This
+* copyright, permission, and disclaimer notice must appear in all copies of
+* this code.
**********************************************************************/
#include "LPC43xx.h"
+#if !defined(__CODE_RED)
+#include "fpu_enable.h"
+#endif
+
+// CodeRed - call clock init code by default
+#ifdef __CODE_RED
+#include "lpc43xx_cgu.h"
+#endif
/*----------------------------------------------------------------------------
Define clocks
@@ -35,9 +49,7 @@
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = __IRC; /*!< System Clock Frequency (Core Clock)*/
-#ifndef __CODE_RED
extern uint32_t getPC(void);
-#endif
/**
* Initialize the system
@@ -50,28 +62,80 @@ extern uint32_t getPC(void);
*/
void SystemInit (void)
{
- SystemCoreClock = __IRC;
+ uint32_t org;
-#ifdef __CODE_RED
- // CodeRed startup code will modify VTOR register to match
- // when code has been linked to run from.
+#if !defined(__CODE_RED)
+#if defined(CORE_M4) && defined(USE_FPU)
+ fpuEnable();
+#endif
+#endif
+
+#if !defined(CORE_M0)
+// Set up Cortex_M3 or M4 VTOR register to point to vector table
+// This code uses a toolchain defined symbol to locate the vector table
+// If this is not completed, interrupts are likely to cause an exception.
+ unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
+#if defined(__IAR_SYSTEMS_ICC__)
+ extern void *__vector_table;
- // Check whether we are running from external flash
- if (SCB->VTOR == 0x1C000000)
- /*Enable Buffer for External Flash*/
- LPC_EMC->STATICCONFIG0 |= 1<<19;
+ org = *pSCB_VTOR = (unsigned int)&__vector_table;
+#elif defined(__CODE_RED)
+ extern void *g_pfnVectors;
- // Call clock initialisation code
- CGU_Init();
+ // CodeRed - correct to assign address of variable not contents
+ // org = *pSCB_VTOR = (unsigned int)g_pfnVectors;
+ org = *pSCB_VTOR = (unsigned int)&g_pfnVectors;
+#elif defined(__ARMCC_VERSION)
+ extern void *__Vectors;
+ org = *pSCB_VTOR = (unsigned int)&__Vectors;
#else
-
-#if defined(CORE_M4) || defined(CORE_M3)
- // Enable VTOR register to point to vector table
- SCB->VTOR = getPC() & 0xFFF00000;
+#error Unknown compiler
+#endif
+#else
+// Cortex M0?
+ #error Cannot configure VTOR on Cortex_M0
#endif
+// LPC18xx/LPC43xx ROM sets the PLL to run from IRC and drive the part
+// at 96 MHz out of reset
+ SystemCoreClock = 96000000;
+
+// In case we are running from external flash, (booted by boot rom)
+// We enable the EMC buffer to improve performance.
+ if(org == 0x1C000000)
+ {
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
+}
+
+// CodeRed - call clock init code by default
+#ifdef __CODE_RED
+ // Call clock initialisation code
+ CGU_Init();
+#endif
+
+// In case we are running from internal flash, we configure the flash
+// accelerator. This is a conservative value that should work up to 204
+// MHz on the LPC43xx or 180 MHz on the LPC18xx. This value may change
+// as the chips are characterized and should also change based on
+// core clock speed.
+#define FLASH_ACCELERATOR_SPEED 6
+#ifdef INTERNAL_FLASH
+ {
+ uint32_t *MAM,t;
+
+ // Set up flash controller for both banks
+ // Bank A
+ MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
+ t=*MAM;
+ t &= ~(0xF<<12);
+ *MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
+ // Bank B
+ MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
+ t=*MAM;
+ t &= ~(0xF<<12);
+ *MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
+ }
#endif
}
diff --git a/demos/host/host_freertos/.cproject b/demos/host/host_freertos/.cproject
index b1f75de4a..2fc7b1e74 100644
--- a/demos/host/host_freertos/.cproject
+++ b/demos/host/host_freertos/.cproject
@@ -90,7 +90,7 @@
-
+
@@ -751,7 +751,7 @@
-
+
diff --git a/demos/host/host_os_none/host_os_none.uvopt b/demos/host/host_os_none/host_os_none.uvopt
index 65289cc28..e56677a58 100644
--- a/demos/host/host_os_none/host_os_none.uvopt
+++ b/demos/host/host_os_none/host_os_none.uvopt
@@ -387,10 +387,10 @@
1
0
0
- 48
+ 34
0
- 22
- 25
+ 59
+ 67
0
..\src\main.c
main.c
@@ -633,7 +633,7 @@
tinyusb
- 1
+ 0
0
0
0
@@ -896,7 +896,7 @@
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\lpc43xx_uart.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_uart.c
lpc43xx_uart.c
0
0
@@ -912,7 +912,7 @@
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\lpc43xx_scu.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_scu.c
lpc43xx_scu.c
0
0
@@ -928,7 +928,7 @@
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\lpc43xx_gpio.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_gpio.c
lpc43xx_gpio.c
0
0
@@ -939,12 +939,12 @@
1
0
0
- 31
+ 0
0
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\lpc43xx_cgu.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_cgu.c
lpc43xx_cgu.c
0
0
@@ -960,7 +960,7 @@
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\system_LPC43xx.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\system_LPC43xx.c
system_LPC43xx.c
0
0
@@ -976,7 +976,7 @@
0
0
0
- ..\..\bsp\lpc43xx\CMSISv2p10_LPC43xx_DriverLib\src\lpc43xx_i2c.c
+ ..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_i2c.c
lpc43xx_i2c.c
0
0