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hcd work with esp32p4 in slave mode but have issue with DMA mode. In slave it enumerate device but has issue with msc bulk in

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hathach 2024-11-07 16:37:33 +07:00
parent 48b32f5d1e
commit ab8160a29b
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GPG Key ID: 26FAB84F615C3C52
6 changed files with 63 additions and 26 deletions
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24
docs/reference/supported.rst
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@ -21,11 +21,13 @@ Supported MCUs
+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
| Dialog | DA1469x | ✔ | ✖ | ✖ | da146xx | |
+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
| Espressif | ESP32 S2, S3 | ✔ | | ✖ | dwc2 or esp32sx | |
+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
| Espressif | S2, S3 | ✔ | ✔ | ✖ | dwc2 or esp32sx | |
| ESP32 +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | P4 | ✔ | ✔ | ✔ | dwc2 | |
+--------------+----+------------------------+--------+------+-----------+------------------------+-------------------+
| GigaDevice | GD32VF103 | ✔ | | ✖ | dwc2 | |
+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
| Infineon | XMC4500 | ✔ | | ✖ | dwc2 | |
| Infineon | XMC4500 | ✔ | ✔ | ✖ | dwc2 | |
+--------------+-----+-----------------------+--------+------+-----------+------------------------+-------------------+
| MicroChip | SAM | D11, D21, L21, L22 | ✔ | | ✖ | samd | |
| | +-----------------------+--------+------+-----------+------------------------+-------------------+
@ -89,31 +91,31 @@ Supported MCUs
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | F1 | 102, 103 | ✔ | ✖ | ✖ | stm32_fsdev | |
| | +------------------------+--------+------+-----------+------------------------+-------------------+
| | | 105, 107 | ✔ | | ✖ | dwc2 | |
| | | 105, 107 | ✔ | ✔ | ✖ | dwc2 | |
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | F2, F4, F7, H7 | ✔ | | ✔ | dwc2 | |
| | F2, F4, F7, H7 | ✔ | ✔ | ✔ | dwc2 | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | F3 | ✔ | ✖ | ✖ | stm32_fsdev | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | G0, H5 | ✔ | | ✖ | stm32_fsdev | |
| | G0, H5 | ✔ | ✖ | ✖ | stm32_fsdev | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | G4 | ✔ | ✖ | ✖ | stm32_fsdev | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | L0, L1 | ✔ | ✖ | ✖ | stm32_fsdev | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | L4 | 4x2, 4x3 | ✔ | ✖ | ✖ | stm32_fsdev | |
| | +------------------------+--------+------+-----------+------------------------+-------------------+
| | | 4x5, 4x6 | ✔ | | ✖ | dwc2 | |
| | | 4x5, 4x6 | ✔ | ✔ | ✖ | dwc2 | |
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | L4+ | ✔ | | ✖ | dwc2 | |
| | L4+ | ✔ | ✔ | ✖ | dwc2 | |
| +-----------------------------+--------+------+-----------+------------------------+-------------------+
| | L5 | ✔ | ✖ | ✖ | stm32_fsdev | |
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | U5 | 535, 545 | ✔ | | ✖ | stm32_fsdev | |
| | +------------------------+--------+------+-----------+------------------------+-------------------+
| | | 575, 585 | ✔ | | ✖ | dwc2 | |
| | | 575, 585 | ✔ | ✔ | ✖ | dwc2 | |
| | +------------------------+--------+------+-----------+------------------------+-------------------+
| | | 59x,5Ax,5Fx,5Gx | ✔ | | ✔ | dwc2 | |
| | | 59x,5Ax,5Fx,5Gx | ✔ | ✔ | ✔ | dwc2 | |
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | WBx5 | ✔ | ✖ | ✖ | stm32_fsdev | |
+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+

1
examples/host/cdc_msc_hid_freertos/only.txt
View File

@ -1,3 +1,4 @@
mcu:ESP32P4
mcu:LPC175X_6X
mcu:LPC177X_8X
mcu:LPC18XX

6
hw/bsp/espressif/boards/family.c
View File

@ -175,7 +175,13 @@ bool usb_init(void) {
usb_phy_config_t phy_conf = {
.controller = USB_PHY_CTRL_OTG,
.target = USB_PHY_TARGET_INT,
// maybe we can use USB_OTG_MODE_DEFAULT and switch using dwc2 driver
#if CFG_TUD_ENABLED
.otg_mode = USB_OTG_MODE_DEVICE,
#elif CFG_TUH_ENABLED
.otg_mode = USB_OTG_MODE_HOST,
#endif
};
// OTG IOs config

7
hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
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@ -9,9 +9,10 @@ string(TOUPPER OPT_MCU_${target} tusb_mcu)
list(APPEND compile_definitions
CFG_TUSB_MCU=${tusb_mcu}
CFG_TUSB_OS=OPT_OS_FREERTOS
# EXAMPLE port selection: port0 is fullspeed, port1 is highspeed
BOARD_TUD_RHPORT=${TUD_PORT}
BOARD_TUD_MAX_SPEED=$<IF:${TUD_PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
BOARD_TUD_RHPORT=${RHPORT_DEVICE}
BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
BOARD_TUH_RHPORT=${RHPORT_HOST}
BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
)
list(APPEND srcs

17
hw/bsp/espressif/family.cmake
View File

@ -5,14 +5,25 @@ include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
string(TOUPPER ${IDF_TARGET} FAMILY_MCUS)
# Device port default to Port1 for P4 (highspeed), Port0 for others (fullspeed)
if (NOT DEFINED TUD_PORT)
set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
if (NOT DEFINED RHPORT_DEVICE)
if (IDF_TARGET STREQUAL "esp32p4")
set(TUD_PORT 1)
set(RHPORT_DEVICE 1)
set(RHPORT_HOST 1)
else ()
set(TUD_PORT 0)
set(RHPORT_DEVICE 0)
set(RHPORT_HOST 0)
endif ()
endif()
if (NOT DEFINED RHPORT_DEVICE_SPEED)
list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
endif ()
if (NOT DEFINED RHPORT_HOST_SPEED)
list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
endif ()
# Add example src and bsp directories
set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")

34
src/portable/synopsys/dwc2/dwc2_esp32.h
View File

@ -60,21 +60,37 @@ static const dwc2_controller_t _dwc2_controller[] = {
};
#endif
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
static intr_handle_t usb_ih[TU_ARRAY_SIZE(_dwc2_controller)];
static void dcd_int_handler_wrap(void* arg) {
const uint8_t rhport = (uint8_t)(uintptr_t) arg;
dcd_int_handler(rhport);
static void dwc2_int_handler_wrap(void* arg) {
const uint8_t rhport = tu_u16_low((uint16_t)(uintptr_t)arg);
const tusb_role_t role = (tusb_role_t) tu_u16_high((uint16_t)(uintptr_t)arg);
#if CFG_TUD_ENABLED
if (role == TUSB_ROLE_DEVICE) {
dcd_int_handler(rhport);
}
#endif
#if CFG_TUH_ENABLED
if (role == TUSB_ROLE_HOST) {
hcd_int_handler(rhport, true);
}
#endif
}
TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) {
esp_intr_alloc(_dwc2_controller[rhport].irqnum, ESP_INTR_FLAG_LOWMED,
dcd_int_handler_wrap, (void*)(uintptr_t) rhport, &usb_ih[rhport]);
TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
if (enabled) {
esp_intr_alloc(_dwc2_controller[rhport].irqnum, ESP_INTR_FLAG_LOWMED,
dwc2_int_handler_wrap, (void*)(uintptr_t)tu_u16(role, rhport), &usb_ih[rhport]);
} else {
esp_intr_free(usb_ih[rhport]);
}
}
TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
esp_intr_free(usb_ih[rhport]);
}
#define dwc2_dcd_int_enable(_rhport) dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, true)
#define dwc2_dcd_int_disable(_rhport) dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, false)
TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
vTaskDelay(pdMS_TO_TICKS(1));