mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-14 04:18:56 +00:00
add TUP_USBIP_MUSB macro, minor rename
This commit is contained in:
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1402e6ec0d
commit
a9df933e0d
@ -308,6 +308,7 @@
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#define TUP_DCD_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
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#define TUP_USBIP_MUSB
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#define TUP_DCD_ENDPOINT_MAX 8
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//--------------------------------------------------------------------+
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@ -471,12 +472,11 @@
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//--------------------------------------------------------------------+
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// Analog Devices
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//--------------------------------------------------------------------+
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#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32666, \
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OPT_MCU_MAX32650, OPT_MCU_MAX78002)
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#elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
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#define TUP_USBIP_MUSB
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#define TUP_DCD_ENDPOINT_MAX 12
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#define TUP_RHPORT_HIGHSPEED 1
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#endif
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//--------------------------------------------------------------------+
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@ -27,7 +27,7 @@
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#include "tusb_option.h"
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#if CFG_TUD_ENABLED
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#if CFG_TUD_ENABLED && defined(TUP_USBIP_MUSB)
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#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
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/* GCC warns that an address may be unaligned, even though
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@ -155,7 +155,7 @@ static void process_setup_packet(uint8_t rhport)
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{
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uint32_t *p = (void*)&_dcd.setup_packet;
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volatile uint32_t *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
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volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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p[0] = *fifo_ptr;
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p[1] = *fifo_ptr;
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@ -183,7 +183,7 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
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return true;
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}
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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const unsigned mps = regs->TXMAXP;
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const unsigned len = TU_MIN(mps, rem);
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void *buf = pipe->buf;
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@ -208,7 +208,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
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unsigned epnum = tu_edpt_number(ep_addr);
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unsigned epnum_minus1 = epnum - 1;
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pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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// TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
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TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
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@ -250,7 +250,7 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16
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if (dir_in) {
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handle_xfer_in(rhport, ep_addr);
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} else {
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
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if (regs->RXCSRL & USB_RXCSRL1_RXRDY) regs->RXCSRL = 0;
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}
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return true;
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@ -260,7 +260,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
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{
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(void)rhport;
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TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
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volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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const unsigned req = _dcd.setup_packet.bmRequestType;
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TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
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@ -325,7 +325,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
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static void process_ep0(uint8_t rhport)
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{
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volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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uint_fast8_t csrl = ep0_regs->CSRL0;
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// TU_LOG1(" EP0 ep0_regs->CSRL0 = %x\r\n", csrl);
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@ -381,7 +381,7 @@ static void process_ep0(uint8_t rhport)
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return;
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}
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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/* When CSRL0 is zero, it means that completion of sending a any length packet
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* or receiving a zero length packet. */
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@ -415,7 +415,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
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const unsigned epn = tu_edpt_number(ep_addr);
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const unsigned epn_minus1 = epn - 1;
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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if (dir_in) {
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// TU_LOG1(" TXCSRL%d = %x\r\n", epn, regs->TXCSRL);
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if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
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@ -442,7 +442,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
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static void process_bus_reset(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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/* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
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* a control transfer state is SETUP or STATUS stage. */
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_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
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@ -467,7 +467,7 @@ static void process_bus_reset(uint8_t rhport)
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void dcd_init(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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ctrl_regs->IE |= USB_IE_SUSPND;
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musb_dcd_int_clear(rhport);
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musb_dcd_phy_init(rhport);
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@ -488,7 +488,7 @@ void dcd_int_disable(uint8_t rhport)
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void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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{
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(void)dev_addr;
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volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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_dcd.pipe0.buf = NULL;
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_dcd.pipe0.length = 0;
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_dcd.pipe0.remaining = 0;
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@ -499,7 +499,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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// Wake up host
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void dcd_remote_wakeup(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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ctrl_regs->POWER |= USB_POWER_RESUME;
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unsigned cnt = SystemCoreClock / 1000;
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@ -511,7 +511,7 @@ void dcd_remote_wakeup(uint8_t rhport)
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// Connect by enabling internal pull-up resistor on D+/D-
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void dcd_connect(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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ctrl_regs->POWER |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
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ctrl_regs->POWER |= USB_POWER_SOFTCONN;
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}
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@ -519,7 +519,7 @@ void dcd_connect(uint8_t rhport)
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// Disconnect by disabling internal pull-up resistor on D+/D-
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void dcd_disconnect(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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ctrl_regs->POWER &= ~USB_POWER_SOFTCONN;
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}
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@ -551,8 +551,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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pipe->length = 0;
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pipe->remaining = 0;
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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if (dir_in) {
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regs->TXMAXP = mps;
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regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
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@ -579,8 +579,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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void dcd_edpt_close_all(uint8_t rhport)
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{
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volatile musb_dcd_epn_regs_t *regs;
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_epn_regs_t *regs;
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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unsigned const ie = musb_dcd_get_int_enable(rhport);
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musb_dcd_int_disable(rhport);
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ctrl_regs->TXIE = 1; /* Enable only EP0 */
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@ -613,8 +613,8 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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unsigned const epn = tu_edpt_number(ep_addr);
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unsigned const dir_in = tu_edpt_dir(ep_addr);
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
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unsigned const ie = musb_dcd_get_int_enable(rhport);
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musb_dcd_int_disable(rhport);
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if (dir_in) {
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@ -679,14 +679,14 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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unsigned const ie = musb_dcd_get_int_enable(rhport);
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musb_dcd_int_disable(rhport);
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if (0 == epn) {
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volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
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if (!ep_addr) { /* Ignore EP80 */
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_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
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_dcd.pipe0.buf = NULL;
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ep0_regs->CSRL0 = USB_CSRL0_STALL;
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}
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} else {
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volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
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if (tu_edpt_dir(ep_addr)) { /* IN */
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regs->TXCSRL = USB_TXCSRL1_STALL;
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} else { /* OUT */
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@ -702,7 +702,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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{
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(void)rhport;
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unsigned const epn = tu_edpt_number(ep_addr);
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musb_dcd_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
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musb_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
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unsigned const ie = musb_dcd_get_int_enable(rhport);
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musb_dcd_int_disable(rhport);
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if (tu_edpt_dir(ep_addr)) { /* IN */
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@ -719,7 +719,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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void dcd_int_handler(uint8_t rhport)
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{
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uint_fast8_t is, txis, rxis;
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volatile musb_dcd_ctl_regs_t *ctrl_regs;
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volatile musb_ctl_regs_t *ctrl_regs;
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//Part specific ISR setup/entry
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musb_dcd_int_handler_enter(rhport);
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@ -24,8 +24,8 @@
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* This file is part of the TinyUSB stack.
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*/
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#ifndef _TUSB_MUSB_MAX32_H_
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#define _TUSB_MUSB_MAX32_H_
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#ifndef TUSB_MUSB_MAX32_H_
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#define TUSB_MUSB_MAX32_H_
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#ifdef __cplusplus
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extern "C" {
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@ -136,25 +136,25 @@ static inline void musb_dcd_phy_init(uint8_t rhport)
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musb_periph_inst[rhport]->m31_phy_ponrst = 1;
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}
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static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
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static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
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volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
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return regs;
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}
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static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
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static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
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{
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//Need to set index to map EP registers
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musb_periph_inst[rhport]->index = epnum;
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volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
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volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
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return regs;
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}
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static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
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static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
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{
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//Need to set index to map EP0 registers
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musb_periph_inst[rhport]->index = 0;
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volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
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volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
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return regs;
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}
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@ -213,4 +213,4 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
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}
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#endif
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#endif // _TUSB_MUSB_MAX32_H_
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#endif // TUSB_MUSB_MAX32_H_
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@ -24,8 +24,8 @@
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* This file is part of the TinyUSB stack.
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*/
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#ifndef _TUSB_MUSB_TI_H_
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#define _TUSB_MUSB_TI_H_
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#ifndef TUSB_MUSB_TI_H_
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#define TUSB_MUSB_TI_H_
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#ifdef __cplusplus
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extern "C" {
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@ -95,25 +95,25 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport){
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//Nothing to do for this part
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}
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static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
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static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
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{
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volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
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volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
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return regs;
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}
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static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
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static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
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{
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uintptr_t baseptr = (uintptr_t)&(musb_periph_inst[rhport]->TXMAXP1);
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//On the TI parts, the epn registers are 16-bytes apart. The core regs defined
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//by musb_dcd_epn_regs and 6 reserved/other use bytes
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volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)(baseptr + ((epnum - 1)*16));
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volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)(baseptr + ((epnum - 1) * 16));
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return regs;
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}
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static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
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static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
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{
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volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
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volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
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return regs;
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}
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@ -282,4 +282,4 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
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}
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#endif
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#endif // _TUSB_MUSB_TI_H_
|
||||
#endif // TUSB_MUSB_TI_H_
|
||||
|
@ -50,7 +50,7 @@ typedef struct TU_ATTR_PACKED {
|
||||
uint8_t RXCSRL;
|
||||
uint8_t RXCSRH;
|
||||
uint16_t RXCOUNT;
|
||||
} musb_dcd_epn_regs_t;
|
||||
} musb_epn_regs_t;
|
||||
|
||||
// Endpoint 0 register mapping.
|
||||
typedef struct TU_ATTR_PACKED {
|
||||
@ -58,7 +58,7 @@ typedef struct TU_ATTR_PACKED {
|
||||
uint8_t CSRH0;
|
||||
uint32_t RESERVED;
|
||||
uint8_t COUNT0;
|
||||
} musb_dcd_ep0_regs_t;
|
||||
} musb_ep0_regs_t;
|
||||
|
||||
// Control register mapping
|
||||
typedef struct TU_ATTR_PACKED {
|
||||
@ -70,7 +70,7 @@ typedef struct TU_ATTR_PACKED {
|
||||
uint16_t RXIE;
|
||||
uint8_t IS;
|
||||
uint8_t IE;
|
||||
} musb_dcd_ctl_regs_t;
|
||||
} musb_ctl_regs_t;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
|
Loading…
x
Reference in New Issue
Block a user