mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-29 10:20:57 +00:00
double buffered work with host
This commit is contained in:
parent
43656dc0a7
commit
a1a03c92f6
@ -198,10 +198,10 @@ static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t b
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_hw_endpoint_init(ep, ep_addr, wMaxPacketSize, bmAttributes);
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}
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static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes, bool start)
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static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
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{
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struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
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_hw_endpoint_xfer(ep, buffer, total_bytes, start);
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_hw_endpoint_xfer_start(ep, buffer, total_bytes);
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}
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static void hw_handle_buff_status(void)
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@ -251,7 +251,7 @@ static void ep0_0len_status(void)
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{
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// Send 0len complete response on EP0 IN
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reset_ep0();
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hw_endpoint_xfer(0x80, NULL, 0, true);
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hw_endpoint_xfer(0x80, NULL, 0);
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}
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static void _hw_endpoint_stall(struct hw_endpoint *ep)
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@ -477,7 +477,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
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request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
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request->bRequest == TUSB_REQ_SET_ADDRESS)
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{
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pico_trace("Set HW address %d\n", assigned_address);
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pico_trace("Set HW address %d\n", request->wValue);
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usb_hw->dev_addr_ctrl = (uint8_t) request->wValue;
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}
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@ -496,7 +496,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
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{
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assert(rhport == 0);
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// True means start new xfer
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hw_endpoint_xfer(ep_addr, buffer, total_bytes, true);
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hw_endpoint_xfer(ep_addr, buffer, total_bytes);
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return true;
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}
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@ -115,9 +115,9 @@ static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result)
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// Mark transfer as done before we tell the tinyusb stack
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uint8_t dev_addr = ep->dev_addr;
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uint8_t ep_addr = ep->ep_addr;
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uint total_len = ep->total_len;
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uint xferred_len = ep->len;
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hw_endpoint_reset_transfer(ep);
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hcd_event_xfer_complete(dev_addr, ep_addr, total_len, xfer_result, true);
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hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true);
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}
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static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep)
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@ -141,6 +141,20 @@ static void hw_handle_buff_status(void)
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{
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remaining_buffers &= ~bit;
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struct hw_endpoint *ep = &epx;
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uint32_t ep_ctrl = *ep->endpoint_control;
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if (ep_ctrl & EP_CTRL_DOUBLE_BUFFERED_BITS)
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{
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TU_LOG(2, "Double Buffered ");
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}else
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{
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TU_LOG(2, "Single Buffered ");
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}
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if (ep_ctrl & EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER) TU_LOG(2, "Interrupt per double ");
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if (ep_ctrl & EP_CTRL_INTERRUPT_PER_BUFFER) TU_LOG(2, "Interrupt per single ");
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TU_LOG_HEX(2, ep_ctrl);
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_handle_buff_status_bit(bit, ep);
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}
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@ -277,11 +291,11 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
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assert(ep);
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ep->buffer_control = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl;
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ep->endpoint_control = &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl;
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// 0x180 for epx
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// 0x1c0 for intep0
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// 0x200 for intep1
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// 0 for epx (double buffered): TODO increase to 1024 for ISO
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// 2x64 for intep0
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// 3x64 for intep1
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// etc
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ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 1)];
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ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 2)];
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}
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else
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{
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@ -311,7 +325,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
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ep->rx = (dir == TUSB_DIR_IN);
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// Response to a setup packet on EP0 starts with pid of 1
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ep->next_pid = num == 0 ? 1u : 0u;
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ep->next_pid = (num == 0 ? 1u : 0u);
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ep->wMaxPacketSize = wMaxPacketSize;
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ep->transfer_type = transfer_type;
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@ -340,6 +354,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
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// preamble
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uint32_t reg = dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB);
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// Assert the interrupt endpoint is IN_TO_HOST
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// TODO Interrupt can also be OUT
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assert(dir == TUSB_DIR_IN);
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if (need_pre(dev_addr))
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@ -402,7 +417,6 @@ bool hcd_port_connect_status(uint8_t rhport)
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tusb_speed_t hcd_port_speed_get(uint8_t rhport)
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{
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pico_trace("hcd_port_speed_get\n");
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assert(rhport == 0);
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// TODO: Should enumval this register
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switch (dev_speed())
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@ -445,6 +459,10 @@ void hcd_int_disable(uint8_t rhport)
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irq_set_enabled(USBCTRL_IRQ, false);
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}
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//--------------------------------------------------------------------+
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// Endpoint API
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//--------------------------------------------------------------------+
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bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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{
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(void) rhport;
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@ -467,6 +485,65 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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return true;
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}
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// return true if double buffered
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static bool xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
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{
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// Fill in info now that we're kicking off the hw
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ep->total_len = total_len;
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ep->len = 0;
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// Limit by packet size
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ep->user_buf = buffer;
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// Buffer 0
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ep->transfer_size = tu_min16(total_len, ep->wMaxPacketSize);
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total_len -= ep->transfer_size;
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// Buffer 1
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ep->buf_1_len = tu_min16(total_len, ep->wMaxPacketSize);
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total_len -= ep->buf_1_len;
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ep->active = true;
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// Write buffer control
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// Buffer 0
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uint32_t bufctrl = ep->transfer_size | USB_BUF_CTRL_AVAIL;
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// Copy data to DPB if tx
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if (!ep->rx)
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{
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// Copy data from user buffer to hw buffer
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memcpy(ep->hw_data_buf, ep->user_buf, ep->transfer_size + ep->buf_1_len);
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// Mark as full
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bufctrl |= USB_BUF_CTRL_FULL | (ep->buf_1_len ? (USB_BUF_CTRL_FULL << 16) : 0);
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}
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// PID
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bufctrl |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
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ep->next_pid ^= 1u;
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if (ep->buf_1_len)
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{
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bufctrl |= (ep->buf_1_len | USB_BUF_CTRL_AVAIL) << 16;
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bufctrl |= (ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID) << 16;
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ep->next_pid ^= 1u;
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}
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// determine which buffer is last
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if (total_len == 0)
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{
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bufctrl |= USB_BUF_CTRL_LAST << (ep->buf_1_len ? 16 : 0);
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}
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print_bufctrl32(bufctrl);
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_hw_endpoint_buffer_control_set_value32(ep, bufctrl);
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return ep->buf_1_len > 0;
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}
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
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{
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(void) rhport;
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@ -486,13 +563,12 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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_hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
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}
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// Start the transfer
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_hw_endpoint_xfer_start(ep, buffer, buflen);
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// If a normal transfer (non-interrupt) then initiate using
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// sie ctrl registers. Otherwise interrupt ep registers should
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// already be configured
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if (ep == &epx) {
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_hw_endpoint_xfer_start(ep, buffer, buflen);
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// That has set up buffer control, endpoint control etc
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// for host we have to initiate the transfer
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usb_hw->dev_addr_ctrl = dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB);
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@ -503,6 +579,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
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usb_hw->sie_ctrl = flags;
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}else
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{
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_hw_endpoint_xfer_start(ep, buffer, buflen);
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}
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return true;
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@ -556,8 +635,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
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{
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(void) rhport;
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(void) dev_addr;
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(void) ep_addr;
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panic("hcd_clear_stall");
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return true;
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@ -61,11 +61,11 @@ void rp2040_usb_init(void)
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memset(usb_dpram, 0, sizeof(*usb_dpram));
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// Mux the controller to the onboard usb phy
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usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
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usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
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// Force VBUS detect so the device thinks it is plugged into a host
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// TODO support VBUs detect
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usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
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usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
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}
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void hw_endpoint_reset_transfer(struct hw_endpoint *ep)
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@ -111,150 +111,157 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m
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*ep->buffer_control = value;
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}
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// Prepare buffer control register value
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void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
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{
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// Prepare buffer control register value
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uint32_t val = ep->transfer_size | USB_BUF_CTRL_AVAIL;
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uint16_t remaining = ep->total_len - ep->len;
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uint32_t ep_ctrl = *ep->endpoint_control;
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uint32_t buf_ctrl;
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if (!ep->rx)
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{
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// Copy data from user buffer to hw buffer
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memcpy(ep->hw_data_buf, &ep->user_buf[ep->len], ep->transfer_size);
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// Mark as full
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val |= USB_BUF_CTRL_FULL;
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}
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// Buffer 0
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ep->transfer_size = tu_min16(remaining, ep->wMaxPacketSize);
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remaining -= ep->transfer_size;
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// PID
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val |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
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buf_ctrl = ep->transfer_size | USB_BUF_CTRL_AVAIL;
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if ( !ep->rx )
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{
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// Copy data from user buffer to hw buffer
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memcpy(ep->hw_data_buf, ep->user_buf+ep->len, ep->transfer_size);
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#if TUSB_OPT_DEVICE_ENABLED
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// Mark as full
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buf_ctrl |= USB_BUF_CTRL_FULL;
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}
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// PID
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buf_ctrl |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
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ep->next_pid ^= 1u;
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// Buffer 1
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ep->buf_1_len = tu_min16(remaining, ep->wMaxPacketSize);
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remaining -= ep->buf_1_len;
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if (ep->buf_1_len)
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{
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buf_ctrl |= (ep->buf_1_len | USB_BUF_CTRL_AVAIL) << 16;
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buf_ctrl |= (ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID) << 16;
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ep->next_pid ^= 1u;
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#else
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// For Host (also device but since we dictate the endpoint size, following scenario does not occur)
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// Next PID depends on the number of packet in case wMaxPacketSize < 64 (e.g Interrupt Endpoint 8, or 12)
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// Special case with control status stage where PID is always DATA1
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if ( ep->transfer_size == 0 )
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if ( !ep->rx )
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{
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// ZLP also toggle data
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ep->next_pid ^= 1u;
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}else
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{
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uint32_t packet_count = 1 + ((ep->transfer_size - 1) / ep->wMaxPacketSize);
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if ( packet_count & 0x01 )
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{
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ep->next_pid ^= 1u;
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}
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// Copy data from user buffer to hw buffer
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memcpy(ep->hw_data_buf+64, ep->user_buf+ep->len+ep->transfer_size, ep->buf_1_len);
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}
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#endif
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// Set endpoint control double buffered bit if needed
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ep_ctrl &= ~EP_CTRL_INTERRUPT_PER_BUFFER;
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ep_ctrl |= EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER;
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}else
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{
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ep_ctrl &= ~(EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER);
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ep_ctrl |= EP_CTRL_INTERRUPT_PER_BUFFER;
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}
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*ep->endpoint_control = ep_ctrl;
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#if TUSB_OPT_HOST_ENABLED
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// Is this the last buffer? Only really matters for host mode. Will trigger
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// the trans complete irq but also stop it polling. We only really care about
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// trans complete for setup packets being sent
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if (ep->last_buf)
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{
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pico_trace("Last buf (%d bytes left)\n", ep->transfer_size);
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val |= USB_BUF_CTRL_LAST;
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}
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// Is this the last buffer? Only really matters for host mode. Will trigger
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// the trans complete irq but also stop it polling. We only really care about
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// trans complete for setup packets being sent
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if (remaining == 0)
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{
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buf_ctrl |= USB_BUF_CTRL_LAST << (ep->buf_1_len ? 16 : 0);
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}
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#endif
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// Finally, write to buffer_control which will trigger the transfer
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// the next time the controller polls this dpram address
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_hw_endpoint_buffer_control_set_value32(ep, val);
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pico_trace("buffer control (0x%p) <- 0x%x\n", ep->buffer_control, val);
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//print_bufctrl16(val);
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print_bufctrl32(buf_ctrl);
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// Finally, write to buffer_control which will trigger the transfer
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// the next time the controller polls this dpram address
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_hw_endpoint_buffer_control_set_value32(ep, buf_ctrl);
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}
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void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
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{
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_hw_endpoint_lock_update(ep, 1);
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pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
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if (ep->active)
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{
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// TODO: Is this acceptable for interrupt packets?
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pico_warn("WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
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_hw_endpoint_lock_update(ep, 1);
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pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, tu_edpt_number(ep->ep_addr),
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ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
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if ( ep->active )
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{
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// TODO: Is this acceptable for interrupt packets?
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pico_warn("WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr),
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ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
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hw_endpoint_reset_transfer(ep);
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}
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hw_endpoint_reset_transfer(ep);
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}
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// Fill in info now that we're kicking off the hw
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ep->total_len = total_len;
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ep->len = 0;
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// Fill in info now that we're kicking off the hw
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ep->total_len = total_len;
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ep->len = 0;
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ep->active = true;
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ep->user_buf = buffer;
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// Limit by packet size but not less 64 (i.e low speed 8 bytes EP0)
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ep->transfer_size = tu_min16(total_len, tu_max16(64, ep->wMaxPacketSize));
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ep->active = true;
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ep->user_buf = buffer;
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#if TUSB_OPT_HOST_ENABLED
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// Recalculate if this is the last buffer
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_hw_endpoint_update_last_buf(ep);
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ep->buf_sel = 0;
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#endif
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_hw_endpoint_start_next_buffer(ep);
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_hw_endpoint_lock_update(ep, -1);
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_hw_endpoint_start_next_buffer(ep);
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_hw_endpoint_lock_update(ep, -1);
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}
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void _hw_endpoint_xfer_sync(struct hw_endpoint *ep)
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void _hw_endpoint_xfer_sync (struct hw_endpoint *ep)
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{
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// Update hw endpoint struct with info from hardware
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||||
// after a buff status interrupt
|
||||
// Update hw endpoint struct with info from hardware
|
||||
// after a buff status interrupt
|
||||
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
uint32_t const buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
print_bufctrl32(buf_ctrl);
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// RP2040-E4
|
||||
// tag::host_buf_sel_fix[]
|
||||
// TODO need changes to support double buffering
|
||||
if (ep->buf_sel == 1)
|
||||
// Transferred bytes for each buffer
|
||||
uint16_t xferred_bytes[2];
|
||||
|
||||
xferred_bytes[0] = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
// double buffered: take buffer1 into account as well
|
||||
if ( (*ep->endpoint_control) & EP_CTRL_DOUBLE_BUFFERED_BITS )
|
||||
{
|
||||
xferred_bytes[1] = (buf_ctrl >> 16) & USB_BUF_CTRL_LEN_MASK;
|
||||
}else
|
||||
{
|
||||
xferred_bytes[1] = 0;
|
||||
}
|
||||
|
||||
TU_LOG_INT(2, xferred_bytes[0]);
|
||||
TU_LOG_INT(2, xferred_bytes[1]);
|
||||
|
||||
// We are continuing a transfer here. If we are TX, we have successfully
|
||||
// sent some data can increase the length we have sent
|
||||
if ( !ep->rx )
|
||||
{
|
||||
assert(!(buf_ctrl & USB_BUF_CTRL_FULL));
|
||||
ep->len += xferred_bytes[0] + xferred_bytes[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
// If we are OUT we have recieved some data, so can increase the length
|
||||
// we have recieved AFTER we have copied it to the user buffer at the appropriate offset
|
||||
assert(buf_ctrl & USB_BUF_CTRL_FULL);
|
||||
|
||||
memcpy(&ep->user_buf[ep->len], ep->hw_data_buf, xferred_bytes[0]);
|
||||
ep->len += xferred_bytes[0];
|
||||
|
||||
if (xferred_bytes[1])
|
||||
{
|
||||
// Host can erroneously write status to top half of buf_ctrl register
|
||||
buf_ctrl = buf_ctrl >> 16;
|
||||
|
||||
// update buf1 -> buf0 to prevent panic with "already available"
|
||||
*ep->buffer_control = buf_ctrl;
|
||||
memcpy(&ep->user_buf[ep->len], ep->hw_data_buf+64, xferred_bytes[1]);
|
||||
ep->len += xferred_bytes[1];
|
||||
}
|
||||
// Flip buf sel for host
|
||||
ep->buf_sel ^= 1u;
|
||||
// end::host_buf_sel_fix[]
|
||||
#endif
|
||||
}
|
||||
|
||||
// Get tranferred bytes after adjusted buf sel
|
||||
uint16_t const transferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
// We are continuing a transfer here. If we are TX, we have successfullly
|
||||
// sent some data can increase the length we have sent
|
||||
if (!ep->rx)
|
||||
{
|
||||
assert(!(buf_ctrl & USB_BUF_CTRL_FULL));
|
||||
pico_trace("tx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
else
|
||||
{
|
||||
// If we are OUT we have recieved some data, so can increase the length
|
||||
// we have recieved AFTER we have copied it to the user buffer at the appropriate
|
||||
// offset
|
||||
pico_trace("rx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
assert(buf_ctrl & USB_BUF_CTRL_FULL);
|
||||
memcpy(&ep->user_buf[ep->len], ep->hw_data_buf, transferred_bytes);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
|
||||
// Sometimes the host will send less data than we expect...
|
||||
// If this is a short out transfer update the total length of the transfer
|
||||
// to be the current length
|
||||
if ((ep->rx) && (transferred_bytes < ep->wMaxPacketSize))
|
||||
{
|
||||
pico_trace("Short rx transfer\n");
|
||||
// Reduce total length as this is last packet
|
||||
ep->total_len = ep->len;
|
||||
}
|
||||
// Sometimes the host will send less data than we expect...
|
||||
// If this is a short out transfer update the total length of the transfer
|
||||
// to be the current length
|
||||
if ( (ep->rx) && ((xferred_bytes[0] < ep->wMaxPacketSize) || (xferred_bytes[1] && (xferred_bytes[1] < ep->wMaxPacketSize))) )
|
||||
{
|
||||
pico_trace("Short rx transfer\n");
|
||||
// Reduce total length as this is last packet
|
||||
ep->total_len = ep->len;
|
||||
}
|
||||
}
|
||||
|
||||
// Returns true if transfer is complete
|
||||
@ -271,12 +278,11 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
_hw_endpoint_xfer_sync(ep);
|
||||
|
||||
// Now we have synced our state with the hardware. Is there more data to transfer?
|
||||
// Limit by packet size but not less 64 (i.e low speed 8 bytes EP0)
|
||||
// Limit by packet size
|
||||
uint16_t remaining_bytes = ep->total_len - ep->len;
|
||||
ep->transfer_size = tu_min16(remaining_bytes, tu_max16(64, ep->wMaxPacketSize));
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
#endif
|
||||
ep->transfer_size = tu_min16(remaining_bytes, ep->wMaxPacketSize);
|
||||
|
||||
TU_LOG_INT(2, ep->transfer_size);
|
||||
|
||||
// Can happen because of programmer error so check for it
|
||||
if (ep->len > ep->total_len)
|
||||
@ -303,23 +309,4 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
return false;
|
||||
}
|
||||
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start)
|
||||
{
|
||||
// Trace
|
||||
pico_trace("hw_endpoint_xfer ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
pico_trace(" total_len %d, start=%d\n", total_len, start);
|
||||
|
||||
assert(ep->configured);
|
||||
|
||||
|
||||
if (start)
|
||||
{
|
||||
_hw_endpoint_xfer_start(ep, buffer, total_len);
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_xfer_continue(ep);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -17,7 +17,7 @@
|
||||
#endif
|
||||
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#if true || false && !defined(NDEBUG)
|
||||
#define pico_trace(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_trace(format,...) ((void)0)
|
||||
@ -50,6 +50,7 @@ struct hw_endpoint
|
||||
|
||||
// Endpoint control register
|
||||
io_rw_32 *endpoint_control;
|
||||
|
||||
// Buffer control register
|
||||
io_rw_32 *buffer_control;
|
||||
|
||||
@ -63,8 +64,11 @@ struct hw_endpoint
|
||||
bool active;
|
||||
uint16_t total_len;
|
||||
uint16_t len;
|
||||
|
||||
// Amount of data with the hardware
|
||||
uint16_t transfer_size;
|
||||
uint16_t transfer_size; // buf0_len;
|
||||
uint16_t buf_1_len;
|
||||
|
||||
// User buffer in main memory
|
||||
uint8_t *user_buf;
|
||||
|
||||
@ -76,6 +80,7 @@ struct hw_endpoint
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Only needed for host mode
|
||||
bool last_buf;
|
||||
|
||||
// RP2040-E4: HOST BUG. Host will incorrect write status to top half of buffer
|
||||
// control register when doing transfers > 1 packet
|
||||
uint8_t buf_sel;
|
||||
@ -90,11 +95,11 @@ struct hw_endpoint
|
||||
void rp2040_usb_init(void);
|
||||
|
||||
void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start);
|
||||
void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len);
|
||||
void _hw_endpoint_xfer_sync(struct hw_endpoint *ep);
|
||||
bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep);
|
||||
|
||||
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask);
|
||||
static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) {
|
||||
return *ep->buffer_control;
|
||||
@ -149,11 +154,11 @@ static inline void print_bufctrl32(uint32_t u32)
|
||||
uint16_t u16;
|
||||
|
||||
u16 = u32 >> 16;
|
||||
TU_LOG(2, "Buffer Control 1 0x%x: ", u16);
|
||||
TU_LOG(2, " Buffer Control 1 0x%x: ", u16);
|
||||
print_bufctrl16(u16);
|
||||
|
||||
u16 = u32 & 0x0000ffff;
|
||||
TU_LOG(2, "Buffer Control 0 0x%x: ", u16);
|
||||
TU_LOG(2, " Buffer Control 0 0x%x: ", u16);
|
||||
print_bufctrl16(u16);
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user