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implement walkaround for incorrect DATA Toggle for status control.
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@ -51,6 +51,11 @@ typedef struct
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// Endpoint 0-5, each can only be either OUT or In
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xfer_desc_t _dcd_xfer[EP_COUNT];
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// Indicate that DATA Toggle for Control Status is incorrect, which must always be DATA1 by USB Specs.
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// However SAMG DToggle is read-only, therefore we must duplicate the status phase ( D0 then D1 )
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// as walk-around to resolve this. The D0 status packet is likely to be discarded by USB Host safely.
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volatile bool _walkaround_incorrect_dtoggle_control_status;
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void xfer_epsize_set(xfer_desc_t* xfer, uint16_t epsize)
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{
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xfer->epsize = epsize;
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@ -111,6 +116,7 @@ static void xact_ep_read(uint8_t epnum, uint8_t* buffer, uint16_t xact_len)
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// Set up endpoint 0, clear all other endpoints
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static void bus_reset(void)
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{
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_walkaround_incorrect_dtoggle_control_status = false;
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tu_memclr(_dcd_xfer, sizeof(_dcd_xfer));
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xfer_epsize_set(&_dcd_xfer[0], CFG_TUD_ENDPOINT0_SIZE);
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@ -201,7 +207,8 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
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// Set new address & Function enable bit
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UDP->UDP_FADDR = UDP_FADDR_FEN_Msk | UDP_FADDR_FADD(dev_addr);
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}else if (request->bRequest == TUSB_REQ_SET_CONFIGURATION)
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}
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else if (request->bRequest == TUSB_REQ_SET_CONFIGURATION)
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{
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// Configured State
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UDP->UDP_GLB_STAT |= UDP_GLB_STAT_CONFG_Msk;
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@ -248,10 +255,47 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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xfer_desc_t* xfer = &_dcd_xfer[epnum];
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xfer_begin(xfer, buffer, total_bytes);
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// Control Endpoint direction and data toggle
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if (epnum == 0)
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{
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// Transfer direction is opposite to one previously set on EP0
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// This transfer is Control Status Stage
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if ( dir != tu_bit_test(UDP->UDP_CSR[epnum], UDP_CSR_DIR_Pos) )
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{
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// Set/Clear DIR bit accordingly
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if (dir)
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{
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UDP->UDP_CSR[epnum] |= UDP_CSR_DIR_Msk;
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}else
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{
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UDP->UDP_CSR[epnum] &= ~UDP_CSR_DIR_Msk;
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}
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// DATA Toggle is 0, USB Specs requires Status Stage must be DATA1
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// Since SAMG DToggle is read-only, we mark this and implement a walk-around
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if ( !(UDP->UDP_CSR[epnum] & UDP_CSR_DTGLE_Msk) )
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{
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TU_LOG2("Incorrect DATA TOGGLE, Control Status must be DATA1\n");
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// DTGLE is read-only on SAMG, this statement has no effect
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UDP->UDP_CSR[epnum] |= UDP_CSR_DTGLE_Msk;
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_walkaround_incorrect_dtoggle_control_status = true;
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}
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}
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}
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if (dir == TUSB_DIR_IN)
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{
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// Set DIR bit for EP0
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if ( epnum == 0 ) UDP->UDP_CSR[epnum] |= UDP_CSR_DIR_Msk;
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// WALKROUND: duplicate IN transfer to send DATA1 status packet
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if (_walkaround_incorrect_dtoggle_control_status)
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{
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UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
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while ( UDP->UDP_CSR[epnum] & UDP_CSR_TXPKTRDY_Msk ) {}
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_walkaround_incorrect_dtoggle_control_status = false;
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}
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xact_ep_write(epnum, xfer->buffer, xfer_packet_len(xfer));
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@ -368,8 +412,17 @@ void dcd_isr(uint8_t rhport)
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// notify usbd
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dcd_event_setup_received(rhport, setup, true);
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// Clear Setup bit
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UDP->UDP_CSR[0] &= ~UDP_CSR_RXSETUP_Msk;
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// Set EP direction bit according to DATA stage
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if (setup[0] & 0x80)
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{
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UDP->UDP_CSR[0] |= UDP_CSR_DIR_Msk;
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}else
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{
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UDP->UDP_CSR[0] &= ~UDP_CSR_DIR_Msk;
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}
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// Clear Setup bit & stall bit if needed
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UDP->UDP_CSR[0] &= ~(UDP_CSR_RXSETUP_Msk | UDP_CSR_FORCESTALL_Msk);
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return;
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}
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@ -397,8 +450,12 @@ void dcd_isr(uint8_t rhport)
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UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
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}else
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{
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// xfer is complete
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dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, XFER_RESULT_SUCCESS, true);
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// WALKAROUND: Skip reporting this incorrect DATA Toggle status transfer
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if ( !(_walkaround_incorrect_dtoggle_control_status && (epnum == 0) && (xfer->actual_len == 0)) )
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{
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// xfer is complete
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dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, XFER_RESULT_SUCCESS, true);
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}
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}
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// Clear TX Complete bit
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@ -406,8 +463,8 @@ void dcd_isr(uint8_t rhport)
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}
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// Endpoint OUT
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// Ping-Pong is a must for Bulk/Iso
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// When both Bank0 and Bank1 are both set, there is not way to know which one comes first
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// Ping-Pong is a MUST for Bulk/Iso
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// When both Bank0 and Bank1 are both set, there is no way to know which one comes first
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if (UDP->UDP_CSR[epnum] & (UDP_CSR_RX_DATA_BK0_Msk | UDP_CSR_RX_DATA_BK1_Msk))
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{
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uint16_t const xact_len = (uint16_t) ((UDP->UDP_CSR[epnum] & UDP_CSR_RXBYTECNT_Msk) >> UDP_CSR_RXBYTECNT_Pos);
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