mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-14 04:18:56 +00:00
remove DCD API dependency tusb_dcd_edpt_queue_xfer
improve MSC driver
This commit is contained in:
parent
16aa3eb437
commit
98d6ec1ef5
@ -436,11 +436,6 @@ bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16
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return true;
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}
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bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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return true;
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}
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr)
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{
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(void) port;
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@ -219,8 +219,9 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
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// retval 0: invalid
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static inline uint8_t qtd_find_free(uint8_t port)
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{
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for(uint8_t i=2; i<DCD_QTD_MAX; i++)
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{ // exclude control's qtd
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// QTD0 is reserved for control transfer
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for(uint8_t i=1; i<DCD_QTD_MAX; i++)
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{
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if ( dcd_data_ptr[port]->qtd[i].used == 0) return i;
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}
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@ -331,6 +332,7 @@ bool tusb_dcd_edpt_busy(uint8_t port, uint8_t ep_addr)
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}
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// add only, controller virtually cannot know
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// TODO remove and merge to tusb_dcd_edpt_xfer
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static bool pipe_add_xfer(uint8_t port, uint8_t ed_idx, void * buffer, uint16_t total_bytes, bool int_on_complete)
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{
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uint8_t qtd_idx = qtd_find_free(port);
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@ -359,12 +361,6 @@ static bool pipe_add_xfer(uint8_t port, uint8_t ed_idx, void * buffer, uint16_t
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return true;
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}
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bool tusb_dcd_edpt_queue_xfer(uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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uint8_t ep_idx = edpt_addr2phy(ep_addr);
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return pipe_add_xfer(port, ep_idx, buffer, total_bytes, false);
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}
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bool tusb_dcd_edpt_xfer(uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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uint8_t ep_idx = edpt_addr2phy(ep_addr);
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@ -59,7 +59,9 @@ enum
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};
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typedef struct {
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uint8_t scsi_data[64]; // buffer for scsi's response other than read10 & write10. NOTE should be multiple of 64 to be compatible with lpc11/13u
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// buffer for scsi's response other than read10 & write10.
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// NOTE should be multiple of 64 to be compatible with lpc11/13u
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uint8_t scsi_data[64];
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ATTR_USB_MIN_ALIGNMENT msc_cbw_t cbw;
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#if defined (__ICCARM__) && (TUSB_CFG_MCU == MCU_LPC11UXX || TUSB_CFG_MCU == MCU_LPC13UXX)
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@ -73,6 +75,8 @@ typedef struct {
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uint8_t ep_in, ep_out;
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uint8_t stage;
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uint16_t data_len;
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uint16_t xferred_len; // numbered of bytes transferred so far in the Data Stage
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}mscd_interface_t;
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TUSB_CFG_ATTR_USBRAM STATIC_VAR mscd_interface_t mscd_data;
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@ -184,72 +188,81 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
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p_csw->data_residue = 0;
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// Valid command -> move to Data Stage
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p_msc->stage = MSC_STAGE_DATA;
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p_msc->stage = MSC_STAGE_DATA;
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p_msc->data_len = p_cbw->xfer_bytes;
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p_msc->xferred_len = 0;
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// If not read10 & write10, invoke application callback
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if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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{
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if ( read10_write10_data_xfer(port, p_msc) )
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{
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// read10 & write10 data is complete -> move to Status Stage
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p_msc->stage = MSC_STAGE_STATUS;
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}
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// Read10 & Write10 data len is same as CBW's xfer bytes
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read10_write10_data_xfer(port, p_msc);
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}
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else
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{
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// If not read10 & write10, invoke application callback
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void const *p_buffer = NULL;
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uint16_t actual_length = (uint16_t) p_cbw->xfer_bytes;
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// TODO SCSI data out transfer is not yet supported
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ASSERT_FALSE( p_cbw->xfer_bytes > 0 && !BIT_TEST_(p_cbw->dir, 7), TUSB_ERROR_NOT_SUPPORTED_YET);
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p_csw->status = tud_msc_scsi_cb(port, p_cbw->lun, p_cbw->command, &p_buffer, &actual_length);
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p_csw->status = tud_msc_scsi_cb(port, p_cbw->lun, p_cbw->command, &p_buffer, &p_msc->data_len);
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//------------- Data Phase (non READ10, WRITE10) -------------//
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if ( p_cbw->xfer_bytes )
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if ( p_cbw->xfer_bytes == 0)
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{
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ASSERT( p_cbw->xfer_bytes >= actual_length, TUSB_ERROR_INVALID_PARA );
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ASSERT( sizeof(p_msc->scsi_data) >= actual_length, TUSB_ERROR_NOT_ENOUGH_MEMORY); // needs to increase size for scsi_data
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// There is no DATA, move to Status Stage
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p_msc->stage = MSC_STAGE_STATUS;
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}
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else
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{
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// Data Phase (non READ10, WRITE10)
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ASSERT( p_cbw->xfer_bytes >= p_msc->data_len, TUSB_ERROR_INVALID_PARA );
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ASSERT( sizeof(p_msc->scsi_data) >= p_msc->data_len, TUSB_ERROR_NOT_ENOUGH_MEMORY); // needs to increase size for scsi_data
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uint8_t const edpt_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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uint8_t const ep_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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if ( p_buffer == NULL || actual_length == 0 )
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if ( p_buffer == NULL || p_msc->data_len == 0 )
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{
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// application does not provide data to response --> possibly unsupported SCSI command
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tusb_dcd_edpt_stall(port, edpt_data);
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tusb_dcd_edpt_stall(port, ep_data);
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p_csw->status = MSC_CSW_STATUS_FAILED;
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p_msc->stage = MSC_STAGE_STATUS;
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}else
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{
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memcpy(p_msc->scsi_data, p_buffer, actual_length);
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TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, edpt_data, p_msc->scsi_data, actual_length), TUSB_ERROR_DCD_EDPT_XFER );
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memcpy(p_msc->scsi_data, p_buffer, p_msc->data_len);
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TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_data, p_msc->scsi_data, p_msc->data_len), TUSB_ERROR_DCD_EDPT_XFER );
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}
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}
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// consider other SCSI is complete after one DATA transfer
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p_msc->stage = MSC_STAGE_STATUS;
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}
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break;
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case MSC_STAGE_DATA:
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// Can be executed several times e.g write 8K bytes (several flash write)
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if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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p_msc->xferred_len += xferred_bytes;
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// Data Stage is complete
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if ( p_msc->xferred_len == p_msc->data_len )
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{
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if ( read10_write10_data_xfer(port, p_msc) )
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{
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// read10 & write10 data is complete -> move to Status Stage
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p_msc->stage = MSC_STAGE_STATUS;
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}
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p_msc->stage = MSC_STAGE_STATUS;
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}
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else if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
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{
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// Can be executed several times e.g write 8K bytes (several flash write)
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read10_write10_data_xfer(port, p_msc);
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}else
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{
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// unlikely error
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tusb_hal_dbg_breakpoint();
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}
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break;
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case MSC_STAGE_STATUS: break;
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case MSC_STAGE_STATUS: break; // is processed immediately
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default : break;
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}
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if ( p_msc->stage == MSC_STAGE_STATUS )
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{
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// Move to default CMD stage after sending status
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p_msc->stage = MSC_STAGE_CMD;
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p_msc->stage = MSC_STAGE_CMD;
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TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)) );
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@ -269,12 +282,17 @@ static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
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// read10 & write10 has the same format
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scsi_read10_t* p_readwrite = (scsi_read10_t*) &p_cbw->command;
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uint8_t const ep_addr = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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uint8_t const ep_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->ep_in : p_msc->ep_out;
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uint32_t lba = __be2n(p_readwrite->lba);
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uint16_t block_count = __be2n_16(p_readwrite->block_count);
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uint16_t const block_size = p_cbw->xfer_bytes / block_count;
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// Adjust lba and block count according to byte transferred so far
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lba += (p_msc->xferred_len / block_size);
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block_count -= (p_msc->xferred_len / block_size);
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uint32_t const lba = __be2n(p_readwrite->lba);
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uint16_t const block_count = __be2n_16(p_readwrite->block_count);
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void *p_buffer = NULL;
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uint16_t xfer_block;
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if (SCSI_CMD_READ_10 == p_cbw->command[0])
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@ -287,33 +305,21 @@ static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
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xfer_block = min16_of(xfer_block, block_count);
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uint16_t const xfer_byte = xfer_block * (p_cbw->xfer_bytes / block_count);
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if ( 0 == xfer_block )
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{
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// xferred_block is zero will cause pipe is stalled & status in CSW set to failed
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p_csw->data_residue = p_cbw->xfer_bytes;
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p_csw->status = MSC_CSW_STATUS_FAILED;
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tusb_dcd_edpt_stall(port, ep_addr);
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tusb_dcd_edpt_stall(port, ep_data);
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return true;
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} else if (xfer_block < block_count)
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{
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TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_addr, p_buffer, xfer_byte), TUSB_ERROR_DCD_EDPT_XFER );
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// adjust lba, block_count, xfer_bytes for the next call
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p_readwrite->lba = __n2be(lba+xfer_block);
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p_readwrite->block_count = __n2be_16(block_count - xfer_block);
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p_cbw->xfer_bytes -= xfer_byte;
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return false;
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}else
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{
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p_csw->status = MSC_CSW_STATUS_PASSED;
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TU_ASSERT( tusb_dcd_edpt_queue_xfer(port, ep_addr, p_buffer, xfer_byte), TUSB_ERROR_DCD_EDPT_XFER );
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return true;
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TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_data, p_buffer, xfer_block * block_size) );
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}
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return true;
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}
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#endif
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@ -90,7 +90,6 @@ bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer,
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//------------- Other Endpoints -------------//
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bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
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bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
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bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr);
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr);
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