mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-20 04:21:29 +00:00
merge EHCI_MAX_QHD/QTD and OHCI_MAX_QHD/QTD to HCD_MAX_ENDPOINT/XFER and scale with number of enabled classes.
default config to support up to 5 device (hub + 4 others)
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@ -52,7 +52,7 @@
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//--------------------------------------------------------------------+
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// HOST CONFIGURATION
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//--------------------------------------------------------------------+
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#define TUSB_CFG_HOST_DEVICE_MAX 3 // TODO be a part of HUB config
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#define TUSB_CFG_HOST_DEVICE_MAX 5 // TODO be a part of HUB config
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//------------- CLASS -------------//
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#define TUSB_CFG_HOST_HUB 1
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@ -38,4 +38,5 @@ In order to build and run application demo, you would need
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- A supported toolchain: LPCXpresso, Keil, IAR.
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\subpage md_boards_readme
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\subpage md_doxygen_started_build
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\subpage md_doxygen_started_build_demo
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\subpage md_doxygen_started_run_demo
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@ -523,12 +523,12 @@ static void async_advance_isr(ehci_qhd_t * const async_head)
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// Host Controller has cleaned up its cached data for this device, set state to unplug
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usbh_devices[relative_dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG;
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for (uint8_t i=0; i<EHCI_MAX_QHD; i++) // free all qhd
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for (uint8_t i=0; i<HCD_MAX_ENDPOINT; i++) // free all qhd
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{
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ehci_data.device[relative_dev_addr].qhd[i].used = 0;
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ehci_data.device[relative_dev_addr].qhd[i].is_removing = 0;
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}
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for (uint8_t i=0; i<EHCI_MAX_QTD; i++) // free all qtd
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for (uint8_t i=0; i<HCD_MAX_XFER; i++) // free all qtd
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{
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ehci_data.device[relative_dev_addr].qtd[i].used = 0;
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}
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@ -560,7 +560,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
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// free all TDs from the head td to the first active TD
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while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active
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&& max_loop < EHCI_MAX_QTD)
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&& max_loop < HCD_MAX_XFER)
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{
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// TD need to be freed and removed from qhd, before invoking callback
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bool is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0);
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@ -593,7 +593,7 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
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}
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p_qhd = qhd_next(p_qhd);
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max_loop++;
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}while(p_qhd != async_head && max_loop < EHCI_MAX_QHD); // async list traversal, stop if loop around
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}while(p_qhd != async_head && max_loop < HCD_MAX_ENDPOINT); // async list traversal, stop if loop around
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// TODO abstract max loop guard for async
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}
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@ -607,7 +607,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms)
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// TODO abstract max loop guard for period
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while( !next_item.terminate &&
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!(interval_ms > 1 && period_1ms_addr == align32(next_item.address)) &&
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max_loop < (EHCI_MAX_QHD + EHCI_MAX_ITD + EHCI_MAX_SITD))
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max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD))
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{
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switch ( next_item.type )
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{
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@ -692,7 +692,7 @@ static void xfer_error_isr(uint8_t hostid)
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qhd_xfer_error_isr( p_qhd );
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p_qhd = qhd_next(p_qhd);
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max_loop++;
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}while(p_qhd != async_head && max_loop < EHCI_MAX_QHD); // async list traversal, stop if loop around
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}while(p_qhd != async_head && max_loop < HCD_MAX_ENDPOINT); // async list traversal, stop if loop around
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#if EHCI_PERIODIC_LIST
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//------------- TODO refractor period list -------------//
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@ -705,7 +705,7 @@ static void xfer_error_isr(uint8_t hostid)
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// TODO abstract max loop guard for period
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while( !next_item.terminate &&
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!(interval_ms > 1 && period_1ms_addr == align32(next_item.address)) &&
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period_max_loop < (EHCI_MAX_QHD + EHCI_MAX_ITD + EHCI_MAX_SITD))
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period_max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD))
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{
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switch ( next_item.type )
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{
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@ -852,11 +852,11 @@ static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr)
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{
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uint8_t relative_address = dev_addr-1;
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uint8_t index=0;
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while( index<EHCI_MAX_QHD && ehci_data.device[relative_address].qhd[index].used )
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while( index<HCD_MAX_ENDPOINT && ehci_data.device[relative_address].qhd[index].used )
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{
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index++;
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}
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return (index < EHCI_MAX_QHD) ? &ehci_data.device[relative_address].qhd[index] : NULL;
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return (index < HCD_MAX_ENDPOINT) ? &ehci_data.device[relative_address].qhd[index] : NULL;
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}
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static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd)
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@ -899,12 +899,12 @@ static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tus
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STATIC_ INLINE_ ehci_qtd_t* qtd_find_free(uint8_t dev_addr)
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{
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uint8_t index=0;
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while( index<EHCI_MAX_QTD && ehci_data.device[dev_addr-1].qtd[index].used )
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while( index<HCD_MAX_XFER && ehci_data.device[dev_addr-1].qtd[index].used )
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{
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index++;
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}
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return (index < EHCI_MAX_QTD) ? &ehci_data.device[dev_addr-1].qtd[index] : NULL;
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return (index < HCD_MAX_XFER) ? &ehci_data.device[dev_addr-1].qtd[index] : NULL;
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}
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static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd )
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@ -1044,7 +1044,7 @@ static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_
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while( (align32(p_prev->address) != (uint32_t) p_head) && // not loop around
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(align32(p_prev->address) != (uint32_t) p_current) && // not found yet
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!p_prev->terminate && // not advanceable
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max_loop < EHCI_MAX_QHD)
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max_loop < HCD_MAX_ENDPOINT)
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{
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p_prev = list_next(p_prev);
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max_loop++;
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@ -71,19 +71,17 @@
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#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed
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#define EHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS)
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// TODO merge OHCI with EHCI
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#define EHCI_MAX_QHD 8
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#define EHCI_MAX_QTD 20
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#define EHCI_MAX_ITD 4
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#define EHCI_MAX_SITD 16
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#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8)
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#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS)
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// TODO merge OHCI with EHCI
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enum {
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EHCI_MAX_ITD = 4,
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EHCI_MAX_SITD = 16
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};
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//------------- Validation -------------//
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#if EHCI_CFG_FRAMELIST_SIZE_BITS > 7
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#error EHCI_CFG_FRAMELIST_SIZE_BITS must be from 0-7
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#endif
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STATIC_ASSERT(EHCI_CFG_FRAMELIST_SIZE_BITS <= 7, "incorrect value");
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//--------------------------------------------------------------------+
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// EHCI Data Structure
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@ -469,8 +467,8 @@ typedef struct {
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ehci_qtd_t qtd[3];
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}control;
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ehci_qhd_t qhd[EHCI_MAX_QHD] ; ///< Queue Head Pool
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ehci_qtd_t qtd[EHCI_MAX_QTD] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool
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ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool
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ehci_qtd_t qtd[HCD_MAX_XFER] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool
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// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
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// ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool
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}device[TUSB_CFG_HOST_DEVICE_MAX];
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@ -43,12 +43,20 @@
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#ifndef _TUSB_HCD_H_
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#define _TUSB_HCD_H_
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#include "common/common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "common/common.h"
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// Max number of endpoints per device
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enum {
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HCD_MAX_ENDPOINT = TUSB_CFG_HOST_HUB + TUSB_CFG_HOST_HID_KEYBOARD + TUSB_CFG_HOST_HID_MOUSE + TUSB_CFG_HOST_HID_GENERIC +
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TUSB_CFG_HOST_MSC*2 + TUSB_CFG_HOST_CDC*3,
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HCD_MAX_XFER = HCD_MAX_ENDPOINT*2,
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};
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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@ -371,7 +371,7 @@ static inline ohci_ed_t * ed_from_pipe_handle(pipe_handle_t pipe_hdl)
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static inline ohci_ed_t * ed_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE;
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static inline ohci_ed_t * ed_find_free(uint8_t dev_addr)
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{
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for(uint8_t i = 0; i < OHCI_MAX_QHD; i++)
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for(uint8_t i = 0; i < HCD_MAX_ENDPOINT; i++)
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{
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if ( !ohci_data.device[dev_addr-1].ed[i].used )
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{
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@ -384,7 +384,7 @@ static inline ohci_ed_t * ed_find_free(uint8_t dev_addr)
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static ohci_ed_t * ed_list_find_previous(ohci_ed_t const * p_head, ohci_ed_t const * p_ed)
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{
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uint32_t max_loop = OHCI_MAX_QHD;
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uint32_t max_loop = HCD_MAX_ENDPOINT;
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ohci_ed_t const * p_prev = p_head;
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@ -444,7 +444,7 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
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static ohci_gtd_t * gtd_find_free(uint8_t dev_addr)
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{
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for(uint8_t i=0; i < OHCI_MAX_QTD; i++)
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for(uint8_t i=0; i < HCD_MAX_XFER; i++)
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{
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if (!ohci_data.device[dev_addr-1].gtd[i].used)
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{
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@ -608,7 +608,7 @@ static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_
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static void done_queue_isr(uint8_t hostid)
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{
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uint8_t max_loop = (TUSB_CFG_HOST_DEVICE_MAX+1)*(OHCI_MAX_QTD+OHCI_MAX_ITD);
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uint8_t max_loop = (TUSB_CFG_HOST_DEVICE_MAX+1)*(HCD_MAX_XFER+OHCI_MAX_ITD);
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// done head is written in reversed order of completion --> need to reverse the done queue first
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ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) align16(ohci_data.hcca.done_head) );
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@ -58,9 +58,9 @@
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#define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS)
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// TODO merge OHCI with EHCI
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#define OHCI_MAX_QHD 8
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#define OHCI_MAX_QTD 20
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#define OHCI_MAX_ITD 4
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enum {
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OHCI_MAX_ITD = 4
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};
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enum {
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OHCI_PID_SETUP = 0,
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@ -195,8 +195,8 @@ typedef struct ATTR_ALIGNED(256) {
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struct {
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// ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
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ohci_ed_t ed[OHCI_MAX_QHD];
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ohci_gtd_t gtd[OHCI_MAX_QTD];
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ohci_ed_t ed[HCD_MAX_ENDPOINT];
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ohci_gtd_t gtd[HCD_MAX_XFER];
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}device[TUSB_CFG_HOST_DEVICE_MAX];
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} ohci_data_t;
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